JP2008079488A - Dc converter - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a DC converter for enabling use of a low-withstand voltage switching element, reducing the loss in an on-resistor, and improving the efficiency. <P>SOLUTION: The DC converter is provided with a main switch Q1 connected a DC power supply Vin through a primary winding P in a transformer T; a series circuit connected to both ends of the primary winding in the transformer or both ends of the main switch, and including a capacitor C1 and an auxiliary switch Q2; a rectifying/smoothing means for rectifying/smoothing a voltage from a secondary winding S1 in the transformer, by using rectifying elements D10, D11 and smoothing elements L11, C10, and obtaining a DC output voltage; an error detecting means 40 for detecting an error between the output voltage and a reference voltage as an error detection signal; a control means 11 for alternately turning on/off the main switch and the auxiliary switch, and controlling an on-width of the main switch, based on the error detection signal; and a voltage detecting means 11 for detecting a voltage of the capacitor. The control means controls the on-width of the main switch so as to prevent the voltage of the capacitor from exceeding a predetermined value. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to a highly efficient DC converter.

  FIG. 10 is a circuit diagram of a conventional DC converter with an active clamp (Patent Document 1). The DC converter shown in FIG. 10 is a forward converter, and a main switch Q1 including a primary winding P1 (number of turns Np) of a transformer T, a MOSFET (hereinafter referred to as an FET), and the like are disposed at both ends of a DC power supply Vin. The series circuit which consists of is connected.

  The start of winding of the primary winding P1 and the secondary winding S1 of the transformer T is indicated by ●. A series circuit of an auxiliary switch Q2 made of an FET or the like and a capacitor C1 is connected to both ends of the main switch Q1. Note that an active clamp circuit composed of a series circuit of the auxiliary switch Q2 and the capacitor C2 may be connected in parallel to the primary winding P1 of the transformer T.

  A diode D1 is connected between the drain and source of the main switch Q1, and a diode D2 is connected between the drain and source of the auxiliary switch Q2. The diodes D1 and D2 may be parasitic diodes as long as the main switch Q1 and the auxiliary switch Q2 are switching elements including a parasitic diode such as an FET. The main switch Q1 and the auxiliary switch Q2 are alternately turned on / off by PWM control of the control circuit 111 as control means.

  Further, the secondary winding S1 (number of turns Ns) of the transformer T wound so as to generate the same phase voltage as that of the primary winding P1 of the transformer T includes diodes D10 and D11, a reactor L11, and a capacitor C10. A rectifying / smoothing circuit as a rectifying / smoothing means is connected. This rectifying / smoothing circuit rectifies and smoothes the voltage induced in the secondary winding S1 of the transformer T (pulse voltage controlled on / off) and supplies a DC output to the load 30. The error detection circuit 40 detects a difference voltage between the output voltage Vout and the reference voltage as an error detection signal.

  Based on the error detection signal from the error detection circuit 40, the control circuit 111 is composed of a Q1 control signal Q1g composed of a pulse for controlling on / off of the main switch Q1 and a pulse for controlling on / off of the auxiliary switch Q2. A Q2 control signal Q2g (having an opposite phase to the Q1 control signal Q1g) is generated, and the duty ratio of the Q1 control signal Q1g and the Q2 control signal Q2g is controlled so that the output voltage Vout becomes a predetermined voltage.

FIG. 11 is a timing chart of each part during the steady state of the conventional DC converter shown in FIG. The voltage Vc1 across the capacitor C1 in the steady state of the conventional DC converter shown in FIG. 10 is approximately when the on-duty of the main switch Q1 is D.

It becomes. Since the on-duty D of the main switch Q1 is 0 <D <1, the voltage Vc1 of the capacitor C1 is larger than the power supply voltage Vin.

  Next, the operation of the DC converter configured as described above will be described with reference to the timing chart shown in FIG.

  First, before the time t1, the main switch Q1 is turned off, the auxiliary switch Q2 is turned on, and the current on the primary side of the transformer T resets the exciting current of the transformer T through a path of C1 → Q2 → P1 → Vin → C1. A current Q2i flows through the auxiliary switch Q2. When the voltage of the capacitor C1 is Vc1, the voltage of the primary winding P1 of the transformer T is (Vin−Vc1) when the winding start is positive. Since Vin <Vc1 in the steady state, (Vin−Vc1) is a negative voltage. For this reason, the beginning of winding becomes a negative voltage. Since a negative voltage is applied to the secondary winding S1, the diode D10 is reverse-biased and turned off. The secondary side current circulates the energy stored in the reactor L11 to the capacitor C10. For this reason, on the secondary side, a current D11i flows through the diode D11 through a path of L11 → C10 → D11 → L11. Further, a load current flows through a path of C10 → load 30 → C10.

  Next, when the auxiliary switch Q2 turns from on to off at time t1 in the period T1 and the main switch Q1 turns from off to on, the power supply voltage Vin is applied to the primary winding P1, and the start of winding becomes a positive voltage. . For this reason, a positive voltage of Vin · (Ns / Np) is also generated in the secondary winding S1 of the transformer T. The diode D10 becomes conductive, and on the secondary side, a current D10i flows through the diode D10, such as S1, D10, L11, C10, and S1. Further, a load current flows through a path of C10 → load 30 → C10. For this reason, the primary side current is the main switch Q1 in a path of Vin → P1 → Q1 → Vin, which is a combination of the current Ns / Np times the current flowing in the secondary winding S1 and the excitation current of the primary winding P1. Current Q1i.

  Next, when the main switch Q1 is turned from on to off at time t2 in the period T2 and the auxiliary switch Q2 is turned on from off, the voltage across the primary winding P1 of the transformer T is (Vin−Vc1). Therefore, the start of winding becomes a negative voltage. Further, a current flows in a direction in which the energy stored in the exciting inductance of the primary winding P1 of the transformer T is charged in the capacitor C1 through the diode D2. That is, the current Q2i (D2i) flows through the path of P1 → Q2 (D2) → C1 → Vin → P1. Further, since the voltage of (Vin−Vc1) is applied to the voltage across the primary winding P1 of the transformer T, the start of winding becomes a negative voltage. Therefore, since a negative voltage is applied to the secondary winding S1, the diode D10 is reverse-biased and turned off. For this reason, the secondary side current circulates the energy stored in the reactor L11 to the capacitor C10. That is, on the secondary side, the current D11i flows through the diode D11 through a path of L11 → C10 → D11 → L11.

  Next, at time t3 in period T3, the current flowing through the path of P1, Q2 (D2), Vin, and P1 becomes zero, and the capacitor C1 starts discharging. For this reason, on the primary side in the period T3, the current Q2i flows through a path of C1, Q2, P1, Vin, and C1. On the secondary side, the same operation as that in the period T2 is performed.

  In such a steady state, the voltage applied to the main switch Q1 and the auxiliary switch Q2 in the off state is Vc1 when the main switch Q1 is on and the auxiliary switch Q2 is off. The voltage applied to the main switch Q1 when the auxiliary switch Q2 is on and the main switch Q1 is off is also Vc1. For this reason, the voltage Vc1 is equivalent to the voltage applied to the main switch Q1 and the auxiliary switch Q2.

The output voltage Vout is represented by Np: Ns as the primary-secondary turns ratio of the transformer T, the input voltage Vin, and the on-duty of the main switch Q1 as D.

It becomes. Further, a voltage applied to the primary winding P1 of the transformer T while the main switch Q1 is on, and a voltage applied to the primary winding P1 of the transformer T when the auxiliary switch Q2 is off. Since are equal, Expression (3) is established.

From equation (2)

The voltage Vc1 is obtained from the equation (1).

It becomes.

  For example, when designing a transformer T with an input voltage of 200 V to 400 V and an output voltage Vo = 12 [V], the turns ratio of the primary winding P1 and the secondary winding S1 is Np = 8 [T], Ns = 1 [ T], the input voltage Vin is plotted on the horizontal axis and the voltage Vc1 is plotted on the vertical axis, as shown in FIG.

である。 With respect to the input voltage Vin, the voltage Vc1 becomes a minimum value (about 380V) at a certain input voltage Vin1 (about 190V), and increases regardless of whether the input voltage becomes higher or lower. Since the input voltage Vin1 is when the on-duty is 0.5, from the equation (4)

It is.

  In the case of designing the transformer T as described above, when the maximum voltage applied to the main switch Q1 and the auxiliary switch Q2 is obtained in a steady state, the on-duty when the input voltage is 200 [V] is 0.48. Therefore, the maximum on-duty may be set to about 0.6. The input voltage Vin when the on-duty is 0.6 is 160 [V], and the voltage Vc1 at that time is 400 [V]. When the input voltage Vin is 400V, the voltage Vc1 is 526 [V]. Therefore, the maximum applied voltage of the main switch Q1 and the auxiliary switch Q2 is 526 [V], and a switching element having an absolute maximum rating of 600 [V] can be used.

However, when the output current changes abruptly or the load fails for some reason and the load is short-circuited, the main switch Q1 may be turned on up to the maximum on-duty regardless of the input voltage. For example, when the input voltage Vin is 400 [V] and the on-duty of the main switch Q1 is opened to 0.6, the voltage Vc1 is obtained from the equation (1):

And 1000 [V]. Therefore, a switching element of 600 [V] is sufficient in the steady state, but it can be seen that a switching element of 600 [V] or more is necessary when there is a sudden change in the output current or considering a load short circuit.

  FIG. 13 is a circuit example of a control circuit provided in the conventional DC converter shown in FIG. The control circuit 111 includes a current mirror circuit including a transistor Q41 and a transistor Q42, a triangular wave generator 113, a comparator COM1, a main switch drive signal generation circuit 115, and an auxiliary switch drive signal generation circuit 117. In the error detection circuit 40, the operational amplifier OP2 amplifies an error between the voltage obtained by dividing the output voltage Vout by the resistors R54 and R55 and the reference voltage Ref2, and outputs the amplified error detection signal. When the divided voltage exceeds the reference voltage Ref2, a current flows through the photodiode PD and the phototransistor PT, and a current flows through the transistor Q41 and the transistor Q42. For this reason, the voltage across the resistor R53 increases, and the voltage input to the inverting terminal of the comparator COM1 increases. For this reason, the ON width of the pulse signal output from the comparator COM1 becomes narrow, and the output voltage becomes a predetermined value as the ON width of the main switch Q1 becomes narrow. That is, the comparator COM1 compares the triangular wave signal from the triangular wave generator 113 with the error detection signal from the error detection circuit 40, and outputs the on-duty of the main switch Q1.

  FIG. 14 is a diagram showing an operation waveform when the load current changes rapidly. In FIG. 14, the waveform represents a steady operation state in a light load state before the period T <b> 1 and the waveform represents a steady operation state in a heavy load state after the period T <b> 12.

The period T2 to the period T11 are conceptual diagrams showing the operation in the transient state in which the light load state shifts to the heavy load state. When the load current changes abruptly at time t2, the output voltage Vout decreases due to the inductance of the rectifying and smoothing circuit and the delay of the error detection circuit 40 and the like. At time t4, the error detection signal is lowered so that the error detection output of the error detection circuit 40 is delayed and the on-duty of the main switch Q1 is increased. Along with this, the ON width of the main switch Q1 becomes wider, and the voltage Vc1 of the capacitor C1 rises according to the equation (1).
Japanese Patent Laid-Open No. 11-18426

  However, when the output voltage is greatly reduced due to the response delay of the error detection circuit 40, the on-width of the main switch Q1 is larger than the on-width at the time of heavy load, so the voltage Vc1 of the capacitor C1 is It becomes larger than the voltage.

  Since the breakdown voltage of the switching element is determined in consideration of the case where the load current changes abruptly in this way, a switching element having a breakdown voltage larger than the voltage applied in the steady state is required. As the withstand voltage of the switching element increases, the on-resistance increases, the resistance loss increases, and the efficiency decreases.

  An object of the present invention is to provide a high-efficiency DC converter.

  In order to solve the above-mentioned problem, the invention according to claim 1 is characterized in that a main switch connected to a DC power source via a primary winding of a transformer, both ends of the primary winding of the transformer, or both ends of the main switch. A series circuit in which a capacitor and an auxiliary switch are connected in series, and a rectifying and smoothing means for rectifying and smoothing the voltage of the secondary winding of the transformer with a rectifying element and a smoothing element to obtain a DC output voltage; An error detection means for detecting an error between the output voltage and the reference voltage as an error detection signal, and the main switch and the auxiliary switch are alternately turned on / off, and the main switch based on the error detection signal of the error detection means Control means for controlling the ON width of the capacitor, and voltage detection means for detecting the voltage of the capacitor, wherein the control means detects the voltage of the capacitor detected by the voltage detection means. There and controlling the ON width of the main switch so as not to exceed a predetermined value.

  According to a second aspect of the present invention, in the DC converter according to the first aspect, the primary winding and the secondary winding of the transformer are loosely coupled.

  According to a third aspect of the present invention, in the DC converter according to the first aspect, the secondary winding of the transformer is significantly loosely coupled to the primary winding of the transformer. Loosely coupled to the secondary winding and connected in series to the secondary winding, and the energy stored in the leakage inductance between the primary and secondary windings is fed back to the smoothing element when the main switch is off It is characterized by having a feedback winding.

  According to the present invention, even when the load current changes suddenly, the voltage detection means detects the voltage of the capacitor, and the control means controls the ON width of the main switch so that the detected voltage does not exceed a predetermined value. Thus, the voltage applied to the main switch is controlled, so that a switching element having an appropriate withstand voltage can be used. That is, a switching element with a low withstand voltage can be used, and a loss of on-resistance can be reduced to provide a highly efficient DC converter.

  Hereinafter, embodiments of a direct-current converter according to the present invention will be described in detail with reference to the drawings.

  FIG. 1 is a circuit diagram of a DC converter according to Embodiment 1 of the present invention. The DC converter of Example 1 shown in FIG. 1 differs from the conventional DC converter shown in FIG. 10 in the configuration of the control circuit 11.

  The other configuration of the DC converter shown in FIG. 1 is the same as that of the conventional DC converter shown in FIG. Here, only the configuration of the control circuit 11 will be described.

  The control circuit 11 as a control means has the function of the control circuit 111 and further detects the voltage Vc1 of the capacitor C1 and increases the ON width of the main switch Q1 so that the detected voltage Vc1 does not exceed a predetermined voltage. Control. Each of the switches Q1 and Q2 has a dead time period in which both are turned off by the control circuit 11, and repeats on / off alternately.

  FIG. 2 is a circuit example of a control circuit provided in the DC converter according to Embodiment 1 of the present invention. 2 includes a current mirror circuit composed of transistors Q51 and Q52, a current mirror circuit composed of transistors Q41 and Q42, a triangular wave generator 113, a comparator COM2, a main switch drive signal generation circuit 115, and an auxiliary switch drive signal. A generation circuit 117 is included.

  One end of the resistor 51 is connected to the plus side of the capacitor C1, and the other end of the resistor R51 is connected to the collector and base of the transistor Q51 and the base of the transistor Q52. The emitters of the transistors Q51 and Q52 are grounded, and the collector of the transistor Q52 is connected to the power source Ref via the resistor R52. Resistors R51 and R52 and transistors Q51 and Q52 detect voltage Vc1 of capacitor C1.

  The operational amplifier OP1 compares the voltage at the connection point between the resistor R52 and the transistor Q52 with the reference voltage Ref1, and outputs the comparison output to the inverting terminal of the comparator COM2 as a Vc1 control signal for controlling the voltage Vc1 of the capacitor C1. To do.

  The comparator COM2 compares the value of the error detection signal from the error detection circuit 40 with the value of the Vc1 control signal, selects a signal having a large value, and selects the selected signal and the triangular wave signal generated by the triangular wave generator 113. And the ON width of the main switch Q1 is controlled.

  FIG. 3 is a diagram showing an operation waveform when the load current suddenly changes in the DC converter according to Embodiment 1 of the present invention. In FIG. 3, time t1 to t2 is a light load operation, and time t13 to t14 is a heavy load operation. The operation of the DC converter will be described with reference to FIG.

  First, when the load current changes abruptly at time t2, the output voltage Vout decreases due to the inductance of the rectifying / smoothing circuit and the delay of the error detection circuit. At time t4, the error detection signal is lowered so that the error detection output is delayed and the on-duty of the main switch Q1 is increased. Along with this, the ON width of the main switch Q1 becomes wider, and the voltage Vc1 of the capacitor C1 rises according to equation (1).

  Then, since a larger current flows through the transistors Q51 and Q52 due to the increased voltage Vc1, the voltage drop across the resistor R52 increases. When the voltage input to the inverting terminal of the operational amplifier OP1 becomes equal to or lower than the reference voltage ref1 at time t8, the output voltage of the operational amplifier OP1, that is, the Vc1 control signal rises, and the value of this Vc1 control signal becomes the error detection circuit 40. It becomes larger than the value of the error detection signal. The comparator COM2 selects the Vc1 control signal and controls the main switch Q1 to be turned on when the value of the triangular wave signal is equal to or greater than the value of the selected Vc1 control signal. For this reason, the ON width of the main switch Q1 is shortened. Accordingly, the voltage Vc1 of the capacitor C1 is controlled below the reference voltage Ref1, the resistor R51, the resistor R52, and the voltage set by the transistors Q51 and Q52 (corresponding to the Vc1 control value in FIG. 3). This Vc1 control value is set lower than the rated voltage Vdss of the main switch Q1.

  As described above, according to the DC converter of the first embodiment, even when the load current changes rapidly, the ON width of the main switch Q1 is detected so that the voltage Vc1 of the capacitor C1 is detected and the detected voltage does not exceed a predetermined value. By controlling the voltage, the voltage applied to the main switch Q1 is controlled, so that a switching element having an appropriate withstand voltage can be used. That is, a switching element with a low withstand voltage can be used, and a loss of on-resistance is reduced, so that a highly efficient DC converter can be configured.

  FIG. 4 is a circuit diagram of a DC converter according to Embodiment 2 of the present invention. 4 is characterized in that a primary winding P1 and a secondary winding S1 of a transformer Ta are loosely coupled to the DC converter shown in FIG. A voltage resonance capacitor C2 is connected between the drain and source of the main switch Q1. The capacitor C2 for voltage resonance may be a parasitic capacitance of the MOSFET that is the main switch Q1.

  The voltage resonance capacitor C2 may be connected between the drain and source of the auxiliary switch Q2 and may be a parasitic capacitance of a MOSFET that is the auxiliary switch Q2.

  The other configuration of the DC converter shown in FIG. 4 is the same as that of the DC converter according to the first embodiment shown in FIG. The control circuit 11 detects the voltage of the capacitor C1 and controls the ON width of the main switch Q1 so that the voltage of the capacitor C1 does not exceed a predetermined value.

  Since the primary winding P1 and the secondary winding S1 of the transformer Ta are loosely coupled, there is a leakage inductance between the primary and secondary windings. This leakage inductance is connected in series with the secondary winding S1 as L10 in FIG. When there is a leakage inductance, zero voltage switching (ZVS) or zero current switching (ZCS) is possible when the switches Q1 and Q2 are turned on / off.

  FIG. 5 is a timing chart of each part in the direct-current converter according to Embodiment 2 of the present invention. Next, the operation of the DC converter according to the second embodiment will be described with reference to the timing chart shown in FIG.

  First, before the time t1, the main switch Q1 is turned off and the auxiliary switch Q2 is turned on, and the current Q2i flows through the path of P1 → Vin → C1 → Q2 → P1 on the primary side of the transformer Ta. (Vin−Vc1) is applied to the primary winding P1 of the transformer Ta, and a negative voltage is applied at the beginning of winding. For this reason, since the winding at the secondary winding S1 is a negative voltage, the diode D10 is off. For this reason, on the secondary side, a current D11i flows through the diode D11 through a path of L11 → C10 → D11 → L11.

  Next, the auxiliary switch Q2 is turned off from on at time t1 in the period T1. The primary side current that has flowed through the path of P1, Vin, C1, Q2, and P1 becomes zero when the auxiliary switch Q2 is turned off at time t1. For this reason, the current C2i flows through the path of P1, Vin, C2, and P1, the capacitor C2 is discharged, and the drain-source voltage Q1v of the main switch Q1 drops.

  When the voltage Q1v of the main switch Q1 reaches zero volts at time t2 in the period T2, the voltage between the primary windings P1 of the transformer Ta becomes Vin, and the voltage between the secondary windings S1 becomes a positive voltage at the start of winding.

  Therefore, a voltage of Vin · (Ns / Np) is induced in the secondary winding S1 with the start of winding as a positive voltage, but since there is an inductance L10 corresponding to the leakage inductance, the reactor L11 that has flowed in the period T1 Current cannot immediately transfer to the diode D10. For this reason, the current D10i of the diode D10 gradually increases, and all the current of the reactor L11 is transferred to the diode D10 at time t4. Further, the current D11i of the diode D11 decreases as the current D10i of the diode D10 increases.

For this reason, the current D11i of the diode D11 becomes zero at the time t4 when all the current of the reactor L11 moves to the diode D10. The current D10i flowing through the diode D10 increases according to the following equation, where time is t.

  Further, the primary current increases in proportion to the current of the secondary winding S1, and becomes Ns / Np times the current flowing in the reactor L11 at time t4. For this reason, the primary side current that has flowed in the path of P1 → Vin → C2 → P1 in the period T2 flows as P1 → Vin → D1 → P1, and becomes zero at time t3, and Vin → P1 → Q1 → in the period T3. A current Q1i flows through the path of Vin.

  Since current flows through the diode D1 connected in parallel with the main switch Q1 during the period T2, ZCS and ZVS of the main switch Q1 can be performed by setting the gate signal Q1g of the main switch Q1 to H level during this period. .

  However, the current D11i of the diode D11 becomes zero, and the voltage of {Vin · (Ns / Np) −Vout} is applied to the reactor L11 at time t4. For this reason, the on-duty of the primary side main switch Q1 is increased by the periods T2 and T3, and the voltage Vc1 of the capacitor C1 is increased according to the equation (1).

  Further, since the average current of the reactor L11 increases as the load current increases, the time periods T2 and T3 also increase, and the voltage Vc1 of the capacitor C1 increases as the load increases.

  For this reason, the voltage applied to the main switch Q1 and the auxiliary switch Q2 also increases. Since the on-duty of the primary side main switch Q1 increases as the output current increases, when the output voltage decreases due to sudden load fluctuations, the capacitor C10 is charged by the amount that the output voltage drops in addition to the load current. Must be supplied. For this reason, it is necessary to temporarily increase the current sent to the secondary side.

  Accordingly, it can be seen that the circuit configuration of FIG. 4 is more effective than the circuit configuration of FIG. 1 because the voltage applied to the main switch Q1 and the auxiliary switch Q2 during the transient response is larger.

  On the secondary side in the period T4, a current D10i flows through a path of S1, L10, D10, L11, C10, and S1. On the primary side, a current Q1i flows through a path of Vin → P1 → Q1 → Vin.

  At time t5 in period T5, the gate signal Q1g of the main switch Q1 becomes L level, the main switch Q1 is turned off, and the current Q1i of the main switch Q1 becomes zero. For this reason, the current flowing in the path of Vin → P1 → Q1 → Vin flows in the path of Vin → P1 → C2 → Vin, the voltage of the capacitor C2 increases, and the voltage Q1v of the main switch Q1 also increases. Therefore, the main switch Q1 is in ZVS operation.

  At time t6 in the period T6, the voltage of the capacitor C2, that is, the voltage Q1v of the main switch Q1, becomes the voltage of the capacitor C1, the diode D2 becomes conductive, and on the primary side, the path of P1 → D2 → C1 → Vin → P1. Current flows. The voltage of the primary winding P1 of the transformer Ta is (Vin → Vc1), and the winding start is a negative voltage. For this reason, the voltage of the secondary winding S1 is also a negative voltage, and the voltage of (Vc1-Vin) · (Ns / Np) is applied to the secondary winding S1.

  In the period T5, the current S1 → L10 → D10 → L11 → C10 → S1 flows, so the diode D10 does not turn off even if the voltage of the secondary winding S1 becomes a negative voltage, and S1 → L10 → D10 → The current D10i flows through the path L11 → C10 → S1. For this reason, the voltage (Vc1−Vin) · (Ns / Np) of the secondary winding S1 is applied to the reactor L10, and the current of S1 → L10 → D10 → L11 → C10 → S1 gradually decreases. For this reason, the current D10i of the diode D10 gradually decreases, and the current D11i of the diode D11 increases as much as the current D10i of the diode D10 decreases, and all the current of the reactor L11 flows through the diode D11 at time t7.

  On the secondary side in the period T7, a current D11i flows through a path of L11 → C10 → D11 → L11. On the primary side, the current Q2i (D2i) flows through the path of P1-> Q2 (D2)-> C1-> Vin-> P1 in the reset direction of the exciting current of the transformer Ta. By setting the gate signal G2g of the auxiliary switch Q2 to the H level during this period, the auxiliary switch Q2 can perform ZCS and ZVS.

  At time t8 in period T8, the primary current that has flowed in the order of P1, D2, C1, Vin, and P1 becomes zero, and the current Q2i flows through the path of C1, Q2, P1, Vin, and C1.

  As described above, according to the DC converter of the second embodiment, when the primary winding P1 and the secondary winding S1 are loosely coupled, ZVS and ZCS of the switches Q1 and Q2 can be realized, and FIG. It can be seen that the voltage applied to the main switch Q1 and the auxiliary switch Q2 during the transient response is greater in the circuit configuration of FIG. 4 than in the circuit configuration of FIG.

  FIG. 6 is a circuit diagram of a DC converter according to Embodiment 3 of the present invention. In FIG. 6, the configuration of the transformer Tb is different from the DC converter shown in FIG. The transformer Tb has a primary winding P1 (number of turns Np), a secondary winding S1 (number of turns Ns), and a feedback winding S2 (number of turns Ns). A series circuit of a diode D11 and a capacitor C10 is connected to both ends of the series circuit of the secondary winding S1 and the feedback winding S2 of the transformer Tb. A diode D10 is connected to a connection point between the secondary winding S1 and the feedback winding S2 and a connection point between the diode D11 and the capacitor C10. The primary winding P1 and the secondary winding S1 are wound in the same phase, and the primary winding P1 and the feedback winding S2 are wound in opposite phases.

  The secondary winding S1 is significantly loosely coupled to the primary winding P1. A reactor L12 connected in series with the secondary winding S1 is a leakage inductance between the primary winding P1 and the secondary winding S1. Reactor L12 serves as a choke coil for the forward converter, and stores energy when main switch Q1 is on.

  The feedback winding S2 is loosely coupled to the primary winding P1, and the energy stored in the leakage inductance (reactor L12) between the primary winding P1 and the secondary winding S1 when the main switch Q1 is turned on is the main switch Q1. Returns to the smoothing capacitor C10 when OFF. For this reason, efficiency is improved. A reactor L13 connected in series with the feedback winding S2 is a leakage inductance between the primary winding P1 and the feedback winding S2.

  A saturable reactor LH is connected to both ends of the series circuit of the secondary winding S1 and the reactor L12.

  The other configuration of the DC converter shown in FIG. 6 is the same as that of the DC converter of Embodiment 1 shown in FIG. The control circuit 11 detects the voltage of the capacitor C1 and controls the ON width of the main switch Q1 so that the voltage of the capacitor C1 does not exceed a predetermined value.

  FIG. 7 shows an example of the structure of a transformer used in the DC converter according to Embodiment 3 of the present invention. FIG. 8 is an equivalent circuit of a transformer used in the DC converter according to Embodiment 3 of the present invention. The transformer Tb shown in FIG. 7 has a Japanese character-shaped core 30, and the primary winding P <b> 1 and the feedback winding S <b> 2 are wound around the core portion 30 a of the core 30 in close proximity. As a result, the primary winding P1 and the feedback winding S2 are loosely coupled and have a leakage inductance. In addition, a pass core 30c and a gap 31 are formed in the core 30, and a secondary winding S1 is wound around the outer core. That is, the primary winding P1 and the secondary winding S1 are significantly loosely coupled by the pass core 30c.

  Further, by forming a part of the core around which the secondary winding S1 is wound as the recess 30b, the part of the core around which the secondary winding S1 is wound is saturated to increase the excitation current, Voltage resonance is made. Saturable reactor LH is provided by saturation of recess 30b.

  Further, the leakage inductance L13 due to the loosely coupled primary winding P1 and feedback winding S2 stores the energy stored when the main switch Q1 is on in the capacitor C1 when the main switch Q1 is off. Then, by turning on the auxiliary switch Q2, the core recess 30b around which the secondary winding S1 is wound is pulled down to the third quadrant with the energy stored in the capacitor C1 to saturate the current of the auxiliary switch Q2. By increasing it, the ZVS operation of the main switch Q1 becomes possible.

  FIG. 9 is a timing chart of each part in the DC converter according to Embodiment 3 of the present invention. The DC converter shown in FIG. 6 uses a leakage inductance of the transformer Tb instead of the reactor L11 as compared with the DC converter shown in FIG. 4, and is one of the cores 30 around which the secondary winding S1 is wound. The difference is that the concave portion 30b is used to saturate the concave portion 30b of the core 30 around which the secondary winding S1 is wound, thereby increasing the excitation current and causing voltage resonance.

  Reactor L13 in FIG. 6 corresponds to reactor L10 in FIG. When the reactor L13 is present, ZVS and ZCS can be performed when the switches Q1 and Q2 are turned on / off as shown in the operation waveform of FIG.

  However, since the durations of the periods T2 and T3 widen the ON widths of the switches Q1 and Q2, the voltage Vc1 of the capacitor C1 increases from the equation (1). Since the period T2 and T3 increase as the load current increases, the voltage rise of the capacitor C1 due to a sudden change in the load is greater in the circuit configuration of FIG. 6 than in the circuit configuration of FIG. It will be even bigger.

  The operation in FIG. 9 is the same as that in FIG. 5, but the core 30 in which the secondary winding S <b> 1 is wound is obtained by forming a part of the core 30 in which the secondary winding S <b> 1 is wound in the period T <b> 9 as a recess 30 b. The only difference is that a portion of 30 is saturated and the excitation current Q2i is increased. Therefore, the other description is omitted and only the operation in the period T9 will be described.

  The difference between the second embodiment of FIG. 4 and the third embodiment of FIG. 6 is how to store the energy of voltage resonance that lowers the voltage Q1v of the main switch Q1 to zero volts when the auxiliary switch Q2 is turned off (time t1). In Example 2 of FIG. 4, the energy of voltage resonance is obtained by increasing the excitation current, but in Example 3 of FIG. 6, the recess 30b of the core 30 around which the secondary winding S1 is wound is saturated, The difference is that the energy of voltage resonance is obtained by the saturation current (excitation current Q2i).

  In the DC converter shown in FIG. 6, the currents in the periods T7 and T8 can be reduced if the current when the auxiliary switch Q2 is turned off is the same. For this reason, since the loss of the auxiliary switch Q2 can be reduced, a highly efficient DC converter can be configured.

  However, when the load current increases, the saturation current in the period T9 increases, so the negative direction of the main switch Q1 (current flowing through the diode D1) increases. Then, since the time of the period T2 increases, the voltage increase of the capacitor C1 due to the sudden change in the load is larger in the circuit configuration of FIG. 6 than in the circuit configuration of FIG. Become.

It is a circuit diagram of the DC converter of Example 1 of the present invention. It is a circuit example of the control circuit provided in the DC converter of Example 1 of this invention. It is a figure which shows an operation | movement waveform when the load current in the direct-current converter of Example 1 of this invention changes rapidly. It is a circuit diagram of the direct-current converter of Example 2 of the present invention. It is a timing chart of each part in the direct-current converter of Example 2 of the present invention. It is a circuit diagram of the direct-current converter of Example 3 of the present invention. It is a structural example of the transformer used for the DC converter of Example 3 of the present invention. It is the equivalent circuit of the transformer used for the direct-current converter of Example 3 of the present invention. It is a timing chart of each part in the direct-current converter of Example 3 of the present invention. It is a circuit diagram of the conventional DC converter with an active clamp. It is a timing chart of each part in the normal time of the conventional DC converter shown in FIG. It is a figure which shows the change of the input voltage of the conventional DC converter, and the voltage of an active clamp capacitor. 12 is a circuit example of a control circuit provided in the conventional DC converter shown in FIG. It is a figure which shows an operation | movement waveform when the load current in the conventional DC converter shown in FIG. 10 changes rapidly.

Explanation of symbols

Vin DC power supply T, Ta, Tb Transformer P1 Primary winding S1 Secondary winding S2 Feedback winding Q1 Main switch Q2 Auxiliary switch
C1, C2 Capacitor 11,111 Control circuit 30 Load 40 Error detection circuit D1, D2, D10, D11 Diode

Claims (3)

A main switch connected to the DC power supply via the primary winding of the transformer;
A series circuit connected to both ends of the primary winding of the transformer or both ends of the main switch and having a capacitor and an auxiliary switch connected in series;
Rectifying and smoothing means for obtaining a DC output voltage by rectifying and smoothing the voltage of the secondary winding of the transformer with a rectifying element and a smoothing element;
Error detection means for detecting an error between the output voltage and a reference voltage as an error detection signal;
Control means for alternately turning on and off the main switch and the auxiliary switch and controlling the on-width of the main switch based on an error detection signal of the error detection means;
Voltage detecting means for detecting the voltage of the capacitor,
The DC converter according to claim 1, wherein the control unit controls an ON width of the main switch so that a voltage of the capacitor detected by the voltage detection unit does not exceed a predetermined value.   The DC converter according to claim 1, wherein the primary winding and the secondary winding of the transformer are loosely coupled. The secondary winding of the transformer is significantly loosely coupled with the primary winding of the transformer,
The transformer is loosely coupled to the primary winding and connected in series to the secondary winding, and the main switch turns off the energy stored in the leakage inductance between the primary winding and the secondary winding. 2. The DC converter according to claim 1, further comprising a feedback winding that feeds back to the smoothing element.

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