JP2008077960A - Electron source and its manufacturing method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To suppress an effect to the surrounding electron emitting elements in the case of discharge generated in a manufacturing method of an electron source having a plurality of electron emitting elements having a pair of electrodes and a matrix wiring for driving the electron emitting elements on a substrate. <P>SOLUTION: A connecting electrode 7 is covered by an interlayer insulating layer 8 to insulate a first wiring 10 and a second wiring 6 and the first wiring 10 laminated on the interlayer insulating layer 8 so that the connecting electrode 7 to connect one 4 of the pair of electrodes, and the first wiring 10 may not be exposed on the surface. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to an electron source that is a constituent member of an image display device and includes a plurality of electron-emitting devices on a substrate and matrix wiring for driving the electron-emitting devices, and a method for manufacturing the electron source.

  As an electron source of a flat-panel image display device, a plurality of electron-emitting devices having a pair of electrodes, such as a surface conduction electron-emitting device, are arranged on a substrate, and each electron-emitting device is arranged via a matrix wiring. Driving electron sources are known. The matrix wiring is composed of column-direction wiring and row-direction wiring that intersect with each other via an interlayer insulating layer. Each of the pair of electrodes is connected to one of the column direction wiring and the row direction wiring intersecting with each other through the interlayer insulating layer. That is, one electrode of the pair of electrodes is connected to the column direction wiring, and the other electrode is connected to the row direction wiring.

  Here, the row direction wiring arranged on the upper side and the electrode connected thereto are connected through a contact hole provided in the interlayer insulating layer, but the interlayer insulating layer is a thick film, resulting in poor connection. There was a fear. Therefore, in order to achieve a good connection between the electrode and the row direction wiring, a configuration in which a member called a connection electrode or an additional electrode is arranged between the electrode and the row direction wiring has been proposed (Patent Documents 1 to 3). .

  For example, in Patent Document 1, as shown in FIG. 3, a plurality of row-direction wirings 108 on a substrate 101 and a plurality of column-direction wirings 105 electrically insulated from the row-direction wirings 108 by an insulating layer 106. A pair of electrodes 102 electrically connected to each other is disclosed. A conductive film 103 having a gap is disposed between the pair of electrodes 102. One electrode of the pair of electrodes 102 is directly electrically connected to the column direction wiring 105, and the other electrode is connected to the row direction wiring 108 via the connection electrode 104. The row wiring 108 is electrically connected to the connection electrode 104 through a contact hole 107 provided in the insulating layer 106.

  In an electron source having such a matrix structure, the scanning signal is applied to the row direction wiring and the modulation signal is applied to the column direction wiring, and thus depends on the voltage difference between the potential of the row direction wiring and the potential of the column direction wiring. Thus, the amount of electron emission from each electron-emitting device can be controlled. And the said electron source is arrange | positioned so as to oppose the anode provided with the light-emitting body, and an image display apparatus is comprised. A high voltage of typically 1 kV to 30 kV is applied between the anode and the electron source. As a result, electrons emitted from the electron-emitting device collide with the light emitter, and an image is displayed.

  Further, in the manufacturing process of the surface conduction electron-emitting device, the “activation” process disclosed in Patent Document 3 and Patent Document 4 is preferably applied. This “activation” step is performed by repeatedly applying different potentials to a pair of electrodes constituting the electron-emitting device in an atmosphere containing a carbon compound gas (typically a hydrocarbon gas) or a metal compound gas. Is called. The potential is applied by repeatedly applying a voltage between the pair of electrodes from a power source electrically connected to the pair of electrodes via the row direction wiring and the column direction wiring. By this “activation” step, the first conductive film and the second conductive film are provided to face each other with a gap between the pair of electrodes described above. The first conductive film is electrically connected to one of the pair of electrodes, and the second conductive film is electrically connected to the other of the pair of electrodes. The conductive film deposited in the “activation” process is a carbon film (a film containing carbon as a main component) when a hydrocarbon gas is used in the “activation” process, and a metal when a metal compound gas is used. It is a containing film (typically a film containing metal and carbon).

Japanese Patent No. 313581 JP 2002-216616 A Japanese Patent Laid-Open No. 9-50757 JP 2000-231872 A

  In the “activation” step, once a discharge occurs between the pair of electrodes described above for a certain reason, a large amount of charge is accumulated in the wiring from the power source connected to the wiring described above in order to perform “activation”. In some cases, the charged charges may flow between the pair of electrodes at once.

  When a large current flows as described above, the electrode material may be evaporated. As described above, when a conductive material such as a connection electrode or an additional electrode is interposed between the electrode and the wiring, these conductive materials The material could evaporate. If the thickness of the connection electrode and the additional electrode is large, the amount of evaporation increases accordingly, and the evaporated material may be scattered to the surroundings.As a result, the discharge is transferred to the surrounding electron-emitting devices, Alternatively, the characteristics of the surrounding electron-emitting devices may change. The large current flow described above is remarkable in the method for manufacturing an electron-emitting device having an “activation” step, but is not limited to the method for manufacturing an electron-emitting device having an “activation” step. In an electron source that requires a step of applying a voltage to each electron-emitting device via wiring at the time of manufacture, the same problem occurs to some extent. Even during driving, if an excessive current flows from the power source into the wiring for some reason or the like, a problem similar to the above problem occurs.

  An object of the present invention is to provide an electron source in which the influence on the surrounding electron-emitting devices is suppressed when an unexpectedly large current is generated in the “activation” step as described above, and a method for manufacturing the same. There is to do. In addition, the present invention can be applied to the case where an unexpected large current flows through a wiring during manufacturing or driving of an electron source that needs to apply a voltage to the electron-emitting device through the wiring connected to each electron-emitting device. It is an object of the present invention to provide an electron source and a method for manufacturing the same.

According to a first aspect of the present invention, a plurality of electron-emitting devices each having a pair of electrodes on a substrate, a first wiring connected to one of the pair of electrodes, and a first wiring connected to the other of the pair of electrodes An electron source comprising: a matrix wiring intersecting with two wirings via an interlayer insulating layer;
One electrode of the electron-emitting device and the first wiring are connected to each other through a connection electrode having a lower resistance and a thicker film than the electrode, and the one electrode is partially covered by the connection electrode. The connection electrode end on the electrode is covered with the interlayer insulating layer.

According to a second aspect of the present invention, there is provided a method of manufacturing an electron source including a matrix wiring in which a first wiring and a second wiring intersect via an interlayer insulating layer and a plurality of electron-emitting devices having a pair of device electrodes on a substrate. A method,
A step of forming a plurality of electrode pairs on the substrate, a step of partially covering one electrode of each electrode pair to form a thick connection electrode having a lower resistance than the electrodes, and the electrode pair A step of forming a second wiring for connecting to the other electrode, and laminating the interlayer insulating layer and the first wiring so that the connection electrode is not exposed and the connection electrode and the first wiring are connected And a step of applying a voltage to the electrode pair through the first wiring and the second wiring.

  According to the present invention, since the connection electrode that connects the electrode and the wiring is covered with the interlayer insulating layer and the wiring, even if a discharge current flows into the connection electrode, the material of the connection electrode can be evaporated and scattered around. And the influence on the surrounding electron-emitting devices is prevented.

  The electron source of the present invention includes a plurality of electron-emitting devices and a matrix wiring for driving the electron-emitting devices on a substrate. The matrix wiring is composed of column-direction wiring and row-direction wiring that intersect with each other via an interlayer insulating layer.

  In the present invention, a surface conduction electron-emitting device can be preferably applied as the electron-emitting device, but other electron-emitting devices including a pair of electrodes can also be used. Each of the pair of electrodes is connected to one of a column direction wiring (second wiring) and a row direction wiring (first wiring) intersecting each other via an interlayer insulating layer. That is, one electrode of the pair of electrodes is connected to the column direction wiring, and the other electrode is connected to the row direction wiring.

  In general, in the case of an electron source including a matrix wiring, it is preferable to apply a scanning signal to a row direction wiring (first wiring) and a modulation signal to a column direction wiring (second wiring). At this time, the row direction corresponds to the horizontal direction (lateral direction) toward the display image of the image display device, and the column direction corresponds to the vertical direction (vertical direction).

  Of the current flowing between a pair of electrodes during driving (electron emission), a current that does not reach the anode cannot be ignored (typically a surface conduction electron emission element or MIM type electron emission element). In the electron source using, the resistance of the row direction wiring (first wiring) to which the scanning signal is applied is set lower than the resistance of the column direction wiring (second wiring) to which the modulation signal is applied. The row direction wiring (first wiring) is stacked on the column direction wiring (second wiring) via an insulating layer. Further, the driving is performed by setting the potential of the electrode connected to the row direction wiring (first wiring) higher than the potential of the electrode connected to the column direction wiring (second wiring). That is, the electrode connected to the row direction wiring (first wiring) corresponds to the cathode electrode, and the electrode connected to the column direction wiring (second wiring) corresponds to the gate electrode (leading electrode). The row direction wiring (first wiring) and the electrode electrically connected to the row direction wiring are connected via a connection electrode. Examples of the electron-emitting device used in such an electron source include a surface conduction electron-emitting device and an MIM-type electron-emitting device, but the electron-emitting devices applicable to the present invention are not limited to these. . When a discharge occurs between the anode and the electron-emitting device or the wiring while driving the image display device, the discharge current has a larger allowable current amount than the column-direction wiring (second wiring) in the row direction. It is preferable to induce the current to flow through the wiring (first wiring). Therefore, the resistance between the row direction wiring and one electrode of the pair of electrodes connected to the row direction wiring is more than the resistance between the column direction wiring and the other electrode connected to the column direction wiring. It is preferable to set a small value.

  The present invention will be described below with reference to the drawings.

  FIG. 1 is a partial schematic plan view of a preferred embodiment of the electron source of the present invention. In this example, a surface conduction electron-emitting device is used as the electron-emitting device. Further, in this example, of the first wiring and the second wiring intersecting with each other through the interlayer insulating layer, the upper second wiring applies the scanning signal, and the lower second wiring applies the modulation signal. Signal wiring.

  In FIG. 1, 1 is a substrate, 2 and 3 are resistance films, 4 and 5 are electrodes (electrodes constituting an electron-emitting device), 6 is a signal wiring (second wiring), 7 is a connection electrode, and 8 is an interlayer insulating layer. , 9 are contact holes, 10 is a scanning wiring (first wiring), 11 is a conductive film, and 12 is a gap.

  2A to 2F show a manufacturing process of the electron source of FIG. Hereinafter, the present invention will be described in detail with reference to FIG.

First, the substrate 1 is prepared. As the substrate 1, it is preferable to employ a substrate in which a SiO ₂ film is provided on the surface of a glass substrate. A sputtering method is suitable as a means for forming the SiO ₂ film.

  Next, resistance films 2 and 3 are formed (FIG. 2-a). The resistance films 2 and 3 are members for controlling respective resistances between an electrode 4 and a connection electrode 7 described later, and between the electrode 5 and the signal wiring 6, and are formed as necessary. Therefore, only one of the resistance films 2 and 3 may be formed, or both may not be formed. That is, if the resistance to the first wiring (10) to which the scanning signal is applied can be set lower than the resistance from the conductive film 11 or the gap 12 to the wiring (6) to which the modulation signal is applied, the resistance film 2 3 may or may not be present. The form shown in FIG. 2A is an example in which the resistance is set high by forming the resistive film 3 in a zigzag shape. Further, these resistance films 2 and 3 can be handled as a part of the electrodes 4 and 5 in the present invention. That is, the electrode 4 (5) and the resistance film 2 (3) can be regarded as one of a pair of electrodes constituting the electron-emitting device. In this way, each of the pair of electrodes constituting the electron-emitting device can be configured by connecting a plurality of conductive members. Examples of the method for forming the resistance films 2 and 3 include an etching method and a lift-off method in which a thin film forming means using a vacuum system such as a vacuum deposition method, a sputtering method, and a plasma CVD method and a means for photolithography patterning a resist are combined. . Moreover, the printing method etc. which used the electrically conductive paste (The paste containing electroconductive particle) are mentioned. As a means for forming a thin film with high accuracy at low cost, a pattern of a photosensitive resin capable of absorbing a solution containing a metal component is formed in advance on a substrate by photolithography. Next, the substrate on which the resin pattern is formed is immersed in a solution containing a metal component, so that the solution containing the metal component is absorbed in the resin pattern, and finally a predetermined metal or metal compound pattern is obtained through a baking process. Is appropriate.

  Next, the first electrode 4 and the second electrode 5 are formed and connected to the resistance films 2 and 3, respectively (FIG. 2-b). For the formation method, the same method as for the resistance films 2 and 3 is preferably used. The thickness of the electrodes 4 and 5 is practically appropriate from 10 nm to 0.5 μm.

  Next, the signal wiring 6 and the connection electrode 7 are formed (FIG. 2-c). The signal wiring 6 and the connection electrode 7 can be formed simultaneously or separately. Preferably, they are formed simultaneously. The reduction in wiring resistance by increasing the thickness of the signal wiring 6 leads to a reduction in the load on the driver that drives the electron source, which in turn leads to a reduction in panel cost and an improvement in display quality. Although it is possible to apply a thin film wiring formed by vacuum deposition of a metal thin film as this wiring, it takes a long time to form a film in order to increase the film thickness in order to reduce the wiring resistance value. There was a case.

  On the other hand, in recent years, a wiring formation technique in which a photolithography technique is introduced for thick film paste printing has been developed. The thick film photo paste patterning method is effectively applied to high-definition wiring required for large screens and high-definition displays and long span position accuracy corresponding to a large area display unit. The thick film photo paste is composed of a solvent, a metal particle serving as a conductive filler, a frit glass component, a photosensitizer, an organic binder, and the like. A predetermined pattern is formed by printing, exposing and developing, and baking the thick film photo paste. Here, the connection electrode 7 is used for electrical connection between the scanning wiring 10 and the resistance film 2.

  The connection electrode 7 is formed so as to cover a part of one of the pair of electrodes constituting the electron-emitting device, and has a lower resistance and a thicker film than the electrode. In the example of FIG. 2C, the connection electrode 7 covers a part of the resistance film 2 so that the first electrode 4 and the connection electrode 7 are electrically connected. However, as described above, the electrode 4 and the resistance film 2 can be regarded as one electrode of a pair of electrodes constituting the electron-emitting device. Therefore, also in the example of FIG. 2C, the connection electrode 7 covers a part of one of the pair of electrodes constituting the electron-emitting device. The thickness of the connection electrode 7 is practically 1 μm or more and 10 μm or less, preferably 1 μm or more and 5 μm or less.

  Next, an interlayer insulating layer 8 is formed (FIG. 2-d). The constituent material of the interlayer insulating layer 8 may be any material as long as the signal wiring 6 and the scanning wiring 10 can be substantially insulated. For example, the interlayer insulating layer 8 can be formed by printing a paste containing a glass component as a main component and then baking the paste. Further, if photosensitivity is imparted to the paste, exposure / development using light can be performed, so that the interlayer insulating layer 8 having a high definition pattern can be formed. The interlayer insulating layer 8 is formed so as to cover the connection electrode 7. That is, the end of the connection electrode 7 located on the electrode 2 is covered with the interlayer insulating layer 8. In the interlayer insulating layer 8, a contact hole 9 for connecting to the connection electrode 7 is formed on the connection electrode 7. That is, the entire surface of the connection electrode 7 is covered with the interlayer insulating layer 8 except for the portion located in the contact hole 9. In general, the interlayer insulating layer 8 may repeat printing, drying, (pattern exposure, development), and baking a plurality of times in order to ensure sufficient insulation between the upper and lower wirings. The number of repetitions is increased or decreased in consideration of insulation. Here, the interlayer insulating layer 8 is provided with a large number of openings arranged in a lattice pattern, but the form of the interlayer insulating layer is not limited to this. For example, it may be arranged in parallel with the scanning wiring under each scanning wiring 10 formed in the next step.

  Next, the scanning wiring 10 is formed (FIG. 2-e). As a forming method, a method of printing and baking a conductive paste by a printing method (for example, a screen printing method) is appropriate. A part of the scanning wiring 10 is disposed in the contact hole 9, and the scanning wiring 10 and the connection electrode 7 are connected in the contact hole 9. The contact hole 9 is typically completely filled with the constituent material of the scanning wiring 10. Therefore, typically, the entire surface of the connection electrode 7 is covered with the interlayer insulating layer 8 and the scanning wiring 10 and is not exposed to the surface. Therefore, there is no possibility that the connection electrode 7 is evaporated and scattered even when the discharge occurs. The contact hole 9 may not be completely covered with the wiring 10. That is, the discharge (cathode) that moves from the electrode 4 to the scanning wiring 10 side (interlayer insulating layer 8 side) stops near the interface between the electrode 4 and the interlayer insulating layer 9 and the discharge ends. That is, the end of the connection electrode 7 on the electrode 4 side is covered with the interlayer insulating layer 9 (preferably, a part of the electrode 4 may be covered with the interlayer insulating layer 9). If it is such a form, it can suppress that the material of the connection electrode 7 evaporates and scatters with the heat | fever which generate | occur | produces by discharge.

Subsequently, the conductive film 11 is formed (FIG. 2-f). As the material of the conductive film 11, a material in which a conductive material such as Ni, Au, PdO, Pd, and Pt is formed with a film thickness that exhibits a resistance value of Rs (sheet resistance) of 10 ² to 10 ⁷ Ω / □ is preferably used. It is done. Rs is a value that appears when a resistance R measured in the length direction of a thin film having a thickness of t, a width of w, and a length of l is expressed as R = Rs (l / w). Then, Rs = ρ / t. The film thickness showing the resistance value is in the range of about 5 nm to 50 nm. In this film thickness range, the thin film of each material preferably has the form of a fine particle film. Among the exemplified materials, PdO is a suitable material. However, the effects of the present invention are not limited to PdO, and are not limited to the materials exemplified above. The conductive film 11 is applied between the first electrode 4 and the second electrode 5 by applying a solution of an organometallic compound whose main element is a metal such as Pd, Ni, Au, or Pt, which is the material of the conductive film 11. A baking process is performed, and patterning is performed by lift-off, etching, or the like. The conductive film 4 may be formed by vacuum deposition, sputtering, CVD, dispersion coating, dipping, spinner, ink jet, or the like.

  Then, a known “forming” process is performed by connecting a power source (not shown) to the scanning wiring (first wiring) 10 and the signal wiring (second wiring) 6 and applying a voltage to each of the pair of electrodes. And “activation” processing.

  In the “forming” process, a voltage is preferably applied between the pair of electrodes (4, 5) from the power source via the first wiring and the second wiring in an atmosphere having a pressure lower than atmospheric pressure. Thereby, a gap is formed in the conductive film 11. Ideally, the conductive film 11 faces the substrate surface in the lateral direction and is completely separated with a gap as a boundary. May be. The “forming” treatment is more preferably performed in an atmosphere at a pressure lower than atmospheric pressure and containing a reducing gas (typically hydrogen gas). It should be noted that if the distance between the first electrode 4 and the second electrode 5 can be set to be about the gap formed by the “forming” process, both the process of forming the conductive film 11 and the “forming” process are necessarily performed. There is no need. When the conductive film 11 is not used, the gap between the first electrode 4 and the second electrode 5 corresponds to the gap formed by the “forming” process described above.

  Subsequently, an “activation” process is performed. In the “activation” process, each electron-emitting device (each pair of electrodes) is arranged in an atmosphere containing a carbon compound gas (typically a hydrocarbon gas) or a metal compound gas, and the first wiring and the second wiring. A voltage is repeatedly applied between the pair of electrodes (4, 5) from the power source. The voltage is applied by, for example, selecting a predetermined number (one or more) of the plurality of first wirings 10, connecting a power source to the selected wirings, and supplying a potential to the selected wirings. In addition, two or more wirings (typically, all the second wirings) of the plurality of second wirings 6 are selected in synchronization with the potential supply to the wiring selected from the first wirings 10. The potential of the selected wiring is simultaneously set to a predetermined potential. The predetermined potential of each of the two or more wirings selected from among the plurality of second wirings 6 may be the same potential, but preferably the voltage in consideration of the voltage drop in the first wiring. It may be different to compensate for the descent. As described above, in the “activation” process, a voltage is simultaneously applied to a plurality (preferably all) of a plurality of electron-emitting devices (a pair of electrodes) connected to the selected first wiring 10. This voltage application is repeated until the same processing is performed on all the first wirings. That is, following the above-described voltage application, the same operation as the above-described voltage application is performed on the non-selected wirings among the first wirings 10.

  A carbon film (or a metal-containing film) is formed by the “activation” process. The carbon film (or metal-containing film) is composed of first and second carbon films (or metal-containing films). The first and second carbon films (or the first and second metal-containing films) are arranged adjacent to each other with a nano-order gap 12 on the substrate surface. The first and second carbon films (or the first and second metal-containing films) are preferably completely separated with the gap 12 as a boundary, but sufficient electrons can be obtained even if they are connected in a minute region. It is acceptable as long as it exhibits release characteristics. The first carbon film (metal-containing film) is electrically connected to the first electrode 4, and the second carbon film (metal-containing film) is electrically connected to the second electrode 5. When the conductive film 11 is used, the conductive film 11 is disposed between the carbon film (metal-containing film) and the electrodes (4, 5).

  The gap 12 substantially corresponds to an electron emission portion, but may be formed after an image display member provided with an anode or a light emitter on the substrate is disposed opposite to the substrate 1 and sealed.

  The electron source of FIG. 1 was manufactured according to the process of FIG.

First, the resistance films 2 and 3 were simultaneously formed on the substrate 1 on which the SiO ₂ film was formed to 0.4 μm by sputtering on the entire surface of the glass substrate (FIG. 2-a). In this example, the resistance films 2 and 3 are formed of a ruthenium film.

  Next, electrodes 4 and 5 were formed simultaneously (FIG. 2-b). At that time, the electrode 4 and the resistance film 2 were connected, and the electrode 5 and the resistance film 3 were connected. Here, platinum was used.

  Next, the signal wiring 6 and the connection electrode 7 were formed simultaneously (FIG. 2-c). The connection electrode 7 was formed to be connected to the resistance film 4, and the signal wiring 6 was formed to be connected to the resistance film 5. As a forming method, the conductive photo paste was printed, exposed and developed, and further baked. The used paste is a paste containing Ag particles as a conductor component, a photosensitive component and a resin.

  Next, an interlayer insulating layer 8 was formed using an insulating photo paste. At that time, the pattern shape was a pattern having contact holes 9 (FIG. 2D). Here, the paste is a mixture of glass mainly composed of bismuth oxide and a principal component composed of a resin and a photosensitive component.

  Next, the scanning wiring 10 was formed with the conductive paste by the screen printing method (FIG. 2-e). Here, the conductive paste is a paste containing silver particles and a resin.

  Finally, a conductive film 11 was formed between the electrodes 4 and 5 by an ink jet method (FIG. 2-f).

  In this example, for the purpose of obtaining a palladium oxide film as the conductive film 11, an organic palladium-containing solution was applied so as to connect between the electrode 4 and the electrode 5 using an ink jet ejecting apparatus using a piezoelectric element. Thereafter, this substrate was heated and fired in air to form a palladium oxide (PdO) film 11. A conductive film 11 having a diameter of about 60 μm and a maximum thickness of 10 nm was obtained.

  Next, the gap 12 was formed by the “forming” process and the “activation” process, and the electron source of the present invention was manufactured. Thereafter, the electron source of this example was opposed to a face plate including an anode electrode and a light emitter, and the interior was maintained and sealed at a predetermined degree of vacuum, thereby producing a flat-panel image display device. For example, the method described in Japanese Patent No. 3703448 can be referred to for the steps from the formation of the electron source to the creation of the image display device.

  In the manufacturing process of the electron source and the image display device according to this example, the “activation” process can be performed stably without the connection electrode 7 being evaporated in the “activation” step. In addition, although some of the electrodes 4 were found to have melted portions that seemed to be caused by discharge, the influence did not reach the surrounding electron-emitting devices. Further, the formed image display device could maintain a good image for a long time.

It is a plane schematic diagram of one embodiment of the electron source of the present invention. It is a plane schematic diagram explaining the manufacturing process of the electron source of FIG. It is a plane schematic diagram explaining the manufacturing process of the electron source of FIG. It is a plane schematic diagram explaining the manufacturing process of the electron source of FIG. It is a plane schematic diagram explaining the manufacturing process of the electron source of FIG. It is a plane schematic diagram explaining the manufacturing process of the electron source of FIG. It is a plane schematic diagram explaining the manufacturing process of the electron source of FIG. It is a plane schematic diagram which shows the structure of the conventional electron source.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Glass substrate 2,3 Resistive film 4,5 Electrode 6 Signal wiring 7 Connection electrode 8 Interlayer insulation layer 9 Contact hole 10 Scanning wiring 11 Conductive film 12 Gap

Claims (2)

A plurality of electron-emitting devices each having a pair of electrodes on a substrate, a first wiring connected to one of the pair of electrodes, and a second wiring connected to the other of the pair of electrodes are interlayer insulating layers An electron source comprising a matrix wiring crossing through
One electrode of the electron-emitting device and the first wiring are connected to each other through a connection electrode having a lower resistance and a thicker film than the electrode, and the one electrode is partially covered by the connection electrode. An electron source, wherein an end portion of the connection electrode on the electrode is covered with the interlayer insulating layer. A method for manufacturing an electron source comprising a matrix wiring in which a first wiring and a second wiring intersect via an interlayer insulating layer and a plurality of electron-emitting devices having a pair of device electrodes on a substrate,
A step of forming a plurality of electrode pairs on the substrate, a step of partially covering one electrode of each electrode pair to form a thick connection electrode having a lower resistance than the electrodes, and the electrode pair A step of forming a second wiring for connecting to the other electrode, and laminating the interlayer insulating layer and the first wiring so that the connection electrode is not exposed and the connection electrode and the first wiring are connected A method of manufacturing an electron source comprising at least a step of forming and a step of applying a voltage to the electrode pair through the first wiring and the second wiring.

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