JP2008061231A - Transmission circuit and communication device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a transmission circuit 1 capable of precisely compensating for an offset characteristic of an amplitude modulation section 15 and operating with low distortion and high efficiency over a wide output electric power range. <P>SOLUTION: A signal generation section 11 outputs an amplitude signal and an angle modulation signal. An amplitude amplifying section 14 inputs, to the amplitude modulation section 15, a signal corresponding to a magnitude of the amplitude signal having been inputted. The amplitude modulation section 15 amplitude-modulates the angle modulation signal with the signal inputted from the amplitude amplifying section 14, and outputs a resultant signal as a modulation signal. A power measuring section 18 measures an output power of the amplitude modulation section 15. An offset compensation section 12 reads an offset compensation value from a memory 13 in accordance with the output power of the amplitude modulation section 15, and adds the read offset compensation value to the amplitude signal. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to a transmission circuit used in a communication device such as a mobile phone or a wireless LAN, and more particularly to a transmission circuit that operates with low distortion and high efficiency, and a communication device using the transmission circuit.

  Communication devices such as mobile phones and wireless LANs are required to operate with low power consumption while ensuring the accuracy of output signals even when operating over a wide bandwidth. In such a communication device, a transmission circuit that outputs a highly accurate transmission signal regardless of the bandwidth and operates with high efficiency is used. A conventional transmission circuit will be described below.

  As a conventional transmission circuit, for example, there has been a transmission circuit (hereinafter referred to as an orthogonal modulation circuit) that generates a transmission signal using a modulation method such as orthogonal modulation. The quadrature modulation circuit is widely known and will not be described. Further, as a conventional transmission circuit that operates smaller and more efficiently than the quadrature modulation circuit, for example, there is a transmission circuit 500 shown in FIG. FIG. 18 is a block diagram showing an example of the configuration of a conventional transmission circuit 500. As shown in FIG. In FIG. 18, a conventional transmission circuit 500 includes a signal generation unit 501, an output terminal 502, an amplitude amplification unit 503, an amplitude modulation unit 504, and a power supply terminal 505.

  In the conventional transmission circuit 500, the signal generation unit 501 outputs an amplitude signal and an angle modulation signal. The amplitude signal is input to the amplitude amplification unit 503. The amplitude amplifying unit 503 supplies a voltage corresponding to the magnitude of the input amplitude signal to the amplitude modulating unit 504. Note that a DC voltage is supplied from the power supply terminal 505 to the amplitude amplifying unit 503. The amplitude amplifying unit 503 typically supplies a voltage proportional to the magnitude of the input amplitude signal to the amplitude modulating unit 504.

  The angle modulation signal output from the signal generation unit 501 is input to the amplitude modulation unit 504. The amplitude modulation unit 504 amplitude-modulates the angle modulation signal with the voltage (in this example, the collector voltage Vc) supplied from the amplitude amplification unit 503, and outputs the modulated signal that is angle-modulated and amplitude-modulated. This modulated signal is output from the output terminal 502 as a transmission signal. Such a transmission circuit 500 is referred to as a polar modulation circuit.

  However, the conventional transmission circuit 500 cannot always output a highly accurate transmission signal depending on the characteristics of the amplitude modulation unit 504. The characteristics of the amplitude modulation unit 504 will be described with reference to FIG. FIG. 19 is a diagram illustrating a relationship between the collector voltage Vc supplied to the amplitude modulation unit 504 and the output voltage Vo. However, the magnitude of the input voltage (angle modulation signal) is constant. As shown in FIG. 19, when the HBT (heterojunction bipolar transistor) is mainly used, the amplitude modulation unit 504 cannot output the voltage until the collector voltage Vc becomes a value equal to or higher than a certain threshold value. . That is, the output voltage Vo cannot be output linearly with respect to the input collector voltage Vc. Hereinafter, the characteristic of the amplitude modulation unit 504 is referred to as an offset characteristic.

  Such offset characteristics vary depending on the temperature of the amplitude modulation section 504, individual differences, and the like, as shown in FIG. This cause is mainly due to the characteristics of the HBT used for the amplitude modulation unit 504. For example, the offset characteristic of the amplitude modulation unit 504 changes as the temperature of the amplitude modulation unit 504 changes from low temperature to room temperature or from room temperature to high temperature. In the example shown in FIG. 19, the temperature of the amplitude modulation unit 504 is assumed to be in the range of about −25 ° C. to 120 ° C., and the room temperature is about 25 ° C. In the example shown in FIG. 19, the case where the slope of the straight line indicating the relationship between the collector voltage Vc and the output voltage Vo is constant is shown. The slope of this straight line changes according to the temperature of the amplitude modulation unit 504. There is also a case.

Patent Document 1 discloses a transmission circuit 600 that compensates for an offset characteristic of an amplitude modulation unit 504 according to the temperature of the amplitude modulation unit 504. FIG. 20 is a block diagram illustrating an example of a configuration of a conventional transmission circuit 600 disclosed in Patent Document 1. In FIG. In FIG. 20, a conventional transmission circuit 600 includes a signal generation unit 501, an output terminal 502, an amplitude amplification unit 503, an amplitude modulation unit 504, a power supply terminal 505, a temperature sensor 601, and an offset compensation unit 602. The temperature sensor 601 measures the temperature of the amplitude modulation unit 504. The offset compensation unit 602 changes the magnitude of the input amplitude signal according to the temperature of the amplitude modulation unit 504 measured by the temperature sensor 601, and compensates the offset characteristics of the amplitude modulation unit 504.
US Pat. No. 6,998,919

  However, in the conventional transmission circuit 600 (see FIG. 20), the offset characteristics with respect to the temperature of the amplitude modulation unit 504 are not always constant due to individual differences of the amplitude modulation unit 504, and the output signal of the amplitude modulation unit 504 varies. Could occur. As described above, the conventional transmission circuit 600 has a problem in that the offset characteristic of the amplitude modulation unit 504 cannot be accurately compensated and the transmission signal is distorted.

  SUMMARY OF THE INVENTION Therefore, an object of the present invention is to provide a transmission circuit that accurately compensates for offset characteristics of an amplitude modulation unit and operates with low distortion and high efficiency over a wide range of output power, and a communication device using the same. It is to be.

  An object of the present invention is directed to a transmission circuit that generates and outputs a transmission signal based on input data. In order to achieve the above object, the transmission circuit of the present invention performs predetermined signal processing on input data to generate an amplitude signal and an angle modulation signal, and an amplitude signal according to a predetermined instruction. An offset compensation unit that compensates the magnitude, an amplitude amplification unit that outputs a signal corresponding to the magnitude of the amplitude signal input through the offset compensation unit, and an angle modulation signal that is output from the amplitude amplification unit An amplitude modulation unit that modulates and outputs as a modulated signal subjected to angle modulation and amplitude modulation, a power measurement unit that measures output power of the amplitude modulation unit, and an offset compensation value for compensating for offset characteristics of the amplitude modulation unit And a control unit that controls operations of the offset compensation unit and the power measurement unit at a predetermined timing. The offset compensation unit reads an offset compensation value corresponding to the output power of the amplitude modulation unit measured by the power measurement unit from the memory unit and adds the read offset compensation value to the amplitude signal in accordance with an instruction from the control unit.

  Preferably, the offset compensation unit includes an arithmetic processing unit that reads an offset compensation value corresponding to the output power of the amplitude modulation unit from the memory unit, and an addition unit that adds the offset compensation value read by the arithmetic processing unit to the amplitude signal. .

  The memory unit may further store a gain for compensating for the slope of the offset characteristic of the amplitude modulation unit. In such a case, the offset compensator includes a calculation processing unit that reads an offset compensation value and a gain corresponding to the output power of the amplitude modulation unit from the memory unit, and a variable that amplifies the amplitude signal with the gain read by the calculation processing unit. A gain amplifying unit; and an adding unit that adds the offset compensation value read by the arithmetic processing unit to the amplitude signal output by the variable gain amplifying unit.

  Preferably, the control unit instructs the arithmetic processing unit and the power measurement unit to calculate an offset compensation value for compensating for the offset characteristic of the amplitude modulation unit. In such a case, when instructed to calculate the offset compensation value, the power measurement unit measures the output power of the amplitude modulation unit. When the calculation processing unit is instructed to calculate the offset compensation value, it outputs a plurality of amplitude signals whose sizes are changed, and based on the change in the output power of the amplitude modulation unit when outputting the plurality of amplitude signals, An offset compensation value is calculated.

  In addition, the control unit can instruct the arithmetic processing unit and the power measurement unit to calculate a gain for compensating for the slope of the offset characteristic of the amplitude modulation unit. In such a case, when instructed to calculate the gain, the power measurement unit measures the output power of the amplitude modulation unit. When the calculation processing unit is instructed to calculate the gain, it outputs a plurality of amplitude signals whose magnitudes are changed, and based on the change in output power of the amplitude modulation unit when the plurality of amplitude signals are output, The gain for compensating for the inclination of is calculated.

  Preferably, the transmission circuit further includes a temperature measurement unit that measures the temperature of the amplitude modulation unit. The control unit instructs the arithmetic processing unit and the temperature measurement unit to update the storage contents of the memory unit. In such a case, the temperature measurement unit measures the temperature of the amplitude modulation unit in accordance with an instruction from the control unit. The arithmetic processing unit calculates an offset compensation value according to the temperature of the amplitude modulation unit measured by the temperature measurement unit in accordance with an instruction from the control unit, and updates the storage content of the memory unit with the calculated offset compensation value.

  The transmission circuit further includes a temperature measurement unit that measures the temperature of the amplitude modulation unit. The control unit instructs the arithmetic processing unit and the temperature measurement unit to update the storage contents of the memory unit. In such a case, the temperature measurement unit measures the temperature of the amplitude modulation unit in accordance with an instruction from the control unit. The arithmetic processing unit calculates a gain for compensating for the slope of the offset characteristic according to the temperature of the amplitude modulation unit measured by the temperature measurement unit in accordance with an instruction from the control unit, and updates the stored contents of the memory unit with the calculated gain. To do.

  The transmission circuit according to the present invention includes a signal generation unit that performs predetermined signal processing on input data to generate an amplitude signal and an angle modulation signal, an offset compensation unit that compensates for the magnitude of the amplitude signal, and an offset compensation unit. An amplitude amplifying unit that outputs a signal corresponding to the magnitude of the amplitude signal input via the signal, and amplitude-modulating the angle-modulated signal with the signal output from the amplitude amplifying unit to obtain a modulated signal that is angle-modulated and amplitude-modulated An output amplitude modulation unit, a memory unit that stores an offset compensation value for compensating for an offset characteristic of the amplitude modulation unit, and a control unit that controls the operation of the offset compensation unit at a predetermined timing. Also good. However, a power control signal for controlling the output power of the transmission signal is input to the offset compensator. The offset compensation unit reads an offset compensation value corresponding to the power control signal from the memory unit in accordance with an instruction from the control unit, and adds the read offset compensation value to the amplitude signal.

  The present invention is also directed to a communication device including the above-described transmission circuit. The communication device includes a transmission circuit that generates a transmission signal and an antenna that outputs the transmission signal generated by the transmission circuit. In addition, the communication device includes a reception circuit that processes a reception signal received from the antenna, and an antenna sharing unit that outputs the transmission signal generated by the transmission circuit to the antenna and outputs the reception signal received from the antenna to the reception circuit. Furthermore, you may provide.

  As described above, according to the present invention, the offset compensation unit adds the offset compensation value of the amplitude modulation unit to the amplitude signal based on the output power of the amplitude modulation unit. For this reason, the offset compensator can accurately compensate the offset characteristics of the amplitude modulation unit even if the output signal of the amplitude modulation unit varies due to individual differences of the amplitude modulation unit. As a result, the transmission circuit can operate with low distortion and high efficiency over a wide range of output power.

  According to the present invention, the offset compensation unit amplifies the amplitude signal based on the output power of the amplitude modulation unit so as to further compensate for the slope of the offset characteristic of the amplitude modulation unit. For this reason, the offset compensator can accurately compensate the offset characteristics of the amplitude modulation unit even if the output signal of the amplitude modulation unit varies due to individual differences of the amplitude modulation unit. As a result, the transmission circuit can operate with low distortion and high efficiency over a wide range of output power.

  Further, according to the communication device of the present invention, it is possible to operate with low distortion and high efficiency over a wide range of output power by using the transmission circuit described above.

(First embodiment)
FIG. 1A is a block diagram showing an example of the configuration of the transmission circuit 1 according to the first embodiment of the present invention. 1A, the transmission circuit 1 includes a signal generation unit 11, an offset compensation unit 12, a memory 13, an amplitude amplification unit 14, an amplitude modulation unit 15, a power supply terminal 16, an output terminal 17, a power measurement unit 18, and a control unit 19. Prepare. The offset compensation unit 12 includes an adder 121 and an arithmetic processing unit 122. The offset compensation unit 12 may include a memory 13.

  The signal generation unit 11 performs predetermined signal processing on the input data to generate an amplitude signal M1 and an angle modulation signal. The amplitude signal M1 is input to the offset compensation unit 12. The offset compensator 12 compensates the magnitude of the amplitude signal M1 and outputs it as an amplitude signal M2. The amplitude signal M2 is input to the amplitude amplifying unit 14. In addition, a DC voltage is supplied from the power supply terminal 16 to the amplitude amplifying unit 14. The amplitude amplifying unit 14 supplies a signal corresponding to the magnitude of the input amplitude signal M2 to the amplitude modulating unit 15. The amplitude amplifying unit 14 typically supplies a voltage proportional to the magnitude of the amplitude signal M2 to the amplitude modulating unit 15. The amplitude amplifying unit 14 may supply a current proportional to the magnitude of the input amplitude signal M2 to the amplitude modulating unit 15. On the other hand, the angle modulation signal is input to the amplitude modulation unit 15. The amplitude modulation unit 15 amplitude-modulates the angle modulation signal with the voltage supplied from the amplitude amplification unit 14 and outputs the modulated signal as an angle-modulated and amplitude-modulated signal. This modulated signal is output from the output terminal 17 as a transmission signal.

  The memory 13 stores an offset compensation value for compensating for the offset characteristic of the amplitude modulation unit 15. FIG. 2 is a diagram illustrating an example of the contents stored in the memory 13. As shown in FIG. 2, the memory 13 stores offset compensation values (for example, AMO1, AMO2, and AMO3) corresponding to the output power of the amplitude modulation unit 15 (for example, the output voltages Vo1, Vo2, and Vo3 of the amplitude modulation unit 15). I remember it. The offset compensation value may be stored in the memory 13 in advance or may be calculated by a predetermined method. A method for calculating the offset compensation value will be described later.

  The control unit 19 controls operations of the offset compensation unit 12 and the power measurement unit 18. For example, the control unit 19 instructs the offset compensation unit 12 to compensate the magnitude of the amplitude signal M1 and the power measurement unit 18 to measure the output power of the amplitude modulation unit 15. The power measurement unit 18 measures the output power of the amplitude modulation unit 15 in accordance with an instruction from the control unit 19. Here, the power measurement unit 18 measures the output voltage Vo (or output power) of the amplitude modulation unit 15 as the output power of the amplitude modulation unit 15. In the offset compensation unit 12, the output power of the amplitude modulation unit 15 measured by the power measurement unit 18 is input to the arithmetic processing unit 122. The arithmetic processing unit 122 reads an offset compensation value corresponding to the output power of the amplitude modulation unit 15 from the memory 13 and outputs the read value to the adder 121. The adder 121 adds the offset compensation value output from the arithmetic processing unit 122 to the amplitude signal M1, and outputs the result as the amplitude signal M2.

  In the transmission circuit 1 described above, the arithmetic processing unit 122 reads the offset compensation value from the memory 13 based on the measurement value of the output power of the amplitude modulation unit 15, but, for example, as in the transmission circuit 1b illustrated in FIG. 1B. The offset compensation value may be read from the memory 13 based on a power control signal sent from a baseband unit (not shown). Also in this case, since the amplitude signal M1 is compensated with the offset compensation value corresponding to the characteristic of the amplitude modulation unit 15 included in each transmission circuit 1b, the transmission circuit 1b is based on the measurement value of the output power of the amplitude modulation unit 15. Thus, the same effect as when the offset compensation value is read from the memory 13 can be obtained.

  Next, a method for calculating the offset compensation value of the amplitude modulation unit 15 will be described. FIG. 3 is a flowchart showing an example of a method for calculating the offset compensation value. Referring to FIG. 3, the control unit 19 calculates the offset compensation value of the amplitude modulation unit 15 for the offset compensation unit 12 and the power measurement unit 18, for example, at the time of factory shipment or when the circuit is turned on. Instruct. When the control unit 19 instructs the offset compensation unit 12 to calculate an offset compensation value, the offset compensation unit 12 outputs an amplitude signal M2 having an arbitrary magnitude. Thereby, the amplitude modulation unit 15 outputs a modulation signal corresponding to the amplitude signal M2. The power measurement unit 18 measures the output power of the amplitude modulation unit 15 in accordance with an instruction from the control unit 19. Next, the offset compensation unit 12 outputs the amplitude signal M2 whose magnitude has been changed, and the power measurement unit 18 measures the output power of the amplitude modulation unit 15 at that time. The offset compensation unit 12 repeats the above-described operation n times. However, n is an arbitrary natural number of 1 or more.

  In the offset compensation unit 12, the arithmetic processing unit 122 performs a predetermined calculation based on the output power of the amplitude modulation unit 15 repeatedly measured, and calculates an offset compensation value. A method of calculating the offset compensation value in the arithmetic processing unit 122 will be described with reference to FIGS. 4A to 4C. 4A to 4C, the vertical axis represents the output voltage Vo of the amplitude modulation unit 15, and the horizontal axis represents the collector voltage Vc input to the amplitude modulation unit 15. A dotted line represents the output characteristic of the amplitude modulation unit 15.

  FIG. 4A is a diagram illustrating a method for calculating an offset compensation value by linear approximation between two points. Referring to FIG. 4A, arithmetic processing unit 122 extends a straight line connecting two points of output voltage Vo of amplitude modulation unit 15 measured by changing the magnitude of collector voltage Vc (ie, amplitude signal M2). The intersection of the extended straight line and the horizontal axis is calculated as the offset compensation value AMO.

  FIG. 4B is a diagram for explaining a method of calculating an offset compensation value by linear approximation using a least square method between three points. Referring to FIG. 4B, the arithmetic processing unit 122 uses a least square method between three points of the output voltage Vo of the amplitude modulation unit 15 measured by changing the magnitude of the collector voltage Vc (that is, the amplitude signal M2). The intersection point between the extended straight line and the horizontal axis is calculated as an offset compensation value AMO. Note that the arithmetic processing unit 122 can calculate the offset compensation value AMO by linear approximation using the least square method even between four or more points.

  FIG. 4C is a diagram for explaining a method of calculating a plurality of offset compensation values by linear approximation between two points. 4C, the arithmetic processing unit 122 extends a straight line connecting two points of the output voltage Vo of the amplitude modulation unit 15 measured by changing the magnitude of the collector voltage Vc (that is, the amplitude signal M2). Then, the intersection of the extended straight line and the horizontal axis is calculated as the first offset compensation value AMO1. The arithmetic processing unit 122 extends a straight line connecting the other two points of the measured output voltage Vo of the amplitude modulation unit 15, and calculates the intersection of the extended straight line and the horizontal axis as the second offset compensation value AMO2. To do. Such a calculation method is useful when the amplitude modulation unit 15 has different offset compensation values for different output powers.

  Next, specific configurations of the signal generation unit 11, the amplitude amplification unit 14, and the amplitude modulation unit 15 will be described. The signal generation unit 11 can be configured using, for example, a polar coordinate signal generation unit that generates a polar coordinate signal. FIG. 5A is a block diagram illustrating an example of a configuration of a signal generation unit 11a using a polar coordinate signal generation unit. In FIG. 5A, the signal generation unit 11 a includes a polar coordinate signal generation unit 111 and an angle modulation unit 112. The polar coordinate signal generation unit 111 processes the input data to generate an amplitude signal M1 and a phase signal that are polar coordinate signals. The angle modulation unit 112 angle-modulates the phase signal and outputs an angle modulation signal.

  Moreover, the signal generation part 11 can also be comprised using the orthogonal signal generation part which produces | generates an orthogonal signal, for example. FIG. 5B is a block diagram illustrating an example of a configuration of the signal generation unit 11b using the orthogonal signal generation unit. 5B, the signal generation unit 11b includes an orthogonal signal generation unit 113, a vector modulation unit 114, an envelope detection unit 115, and a limiter 116. The orthogonal signal generation unit 113 performs signal processing on the input data to generate I and Q signals that are orthogonal signals. The I and Q signals are input to the vector modulation unit 114. The vector modulation unit 114 performs vector modulation on the I and Q signals. For example, a quadrature modulator is used for the vector modulation unit 114. The signal output from the vector modulation unit 114 is input to the envelope detection unit 115 and the limiter 116. The envelope detector 115 detects the envelope component of the signal output from the vector modulator 114, and outputs the detected envelope component as the amplitude signal M1. The limiter 116 limits the envelope component of the signal output from the vector modulation unit 114 to a certain magnitude, and outputs a signal with the magnitude restricted as an angle modulation signal.

  The amplitude amplifying unit 14 can be configured using, for example, a series regulator. FIG. 6A is a block diagram illustrating an example of the configuration of the series regulator 14a. 6A, the series regulator 14a includes an input terminal 141, a comparison unit 142, a power supply terminal 143, a transistor 144, and an output terminal 145. Here, the transistor 144 is a field effect transistor. The amplitude signal M <b> 2 is input to the input terminal 141 via the offset compensation unit 12. The amplitude signal M2 is input to the gate terminal of the transistor 144 via the comparison unit 142. A DC voltage is supplied from the power supply terminal 143 to the drain terminal of the transistor 144.

  The transistor 144 outputs a voltage proportional to the magnitude of the input amplitude signal M2 from the source terminal. The voltage output from the source terminal of the transistor 144 is fed back to the comparison unit 142. The comparison unit 142 adjusts the magnitude of the amplitude signal M2 input to the gate terminal of the transistor 144 based on the fed back voltage. In this way, the series regulator 14a can stably supply a voltage corresponding to the magnitude of the amplitude signal M2 from the output terminal 145. Note that even if the transistor 144 is a bipolar transistor, the same effect can be obtained. The transmission circuit 1 can operate in a wide band by using the series regulator 14 a in the amplitude amplifying unit 14.

  Further, the amplitude amplifying unit 14 can be configured using a switching regulator, for example. FIG. 6B is a block diagram illustrating an example of the configuration of the switching regulator 14b. 6B, the switching regulator 14b includes an input terminal 141, a power supply terminal 143, a signal conversion unit 146, an amplification unit 147, a low-pass filter 148, and an output terminal 145. The amplitude signal M <b> 2 is input to the input terminal 141 via the offset compensation unit 12. The amplitude signal M2 is input to the signal conversion unit 146. The signal converter 146 converts the input amplitude signal M2 into a PWM or delta-sigma modulated signal. The signal converted by the signal conversion unit 146 is input to the amplification unit 147. The amplifying unit 147 amplifies the input signal and outputs the amplified signal. The amplification unit 147 is supplied with a DC voltage from the power supply terminal 143. The amplification unit 147 is a high-efficiency switching amplifier such as a class D amplifier.

  The signal output from the amplifying unit 147 is input to the low pass filter 148. The low pass filter 148 removes spurious components such as quantization noise and switching noise from the signal output from the amplification unit 147. The signal from which the spurious component has been removed by the low-pass filter 148 is output from the output terminal 145 as a voltage corresponding to the magnitude of the amplitude signal M2. Note that the switching regulator 14b may feed back the signal output from the low-pass filter 148 to the signal converter 146 in order to stabilize the output voltage. The transmission circuit 1 can reduce the power consumption as a transmission circuit by using the highly efficient switching regulator 14b for the amplitude amplifying unit 14.

  In addition, the amplitude amplifying unit 14 can be configured with, for example, a current-driven regulator. FIG. 6C is a block diagram illustrating an example of the configuration of the current-driven regulator 14c. 6C, the current drive type regulator 14c includes an input terminal 141, a power supply terminal 143, a variable current source 149, a transistor 150a, a transistor 150b, and an output terminal 145. The amplitude signal M <b> 2 is input to the input terminal 141 via the offset compensation unit 12. A DC voltage is supplied to the power supply terminal 143. The amplitude signal M2 input through the input terminal 141 is output from the output terminal 145 as a current corresponding to the magnitude of the amplitude signal M2 through the variable current source 149, the transistor 150a, and the transistor 150b. Such a current drive type regulator 14c is useful when the amplitude modulation section 15 is composed of a bipolar transistor. Note that the transistor 150a and the transistor 150b may be field effect transistors or bipolar transistors.

  The amplitude modulation unit 15 can be configured as shown in FIG. 7A, for example. FIG. 7A is a block diagram illustrating an example of the configuration of the amplitude modulation unit 15a. 7A, the amplitude modulation unit 15a includes an input terminal 151, a matching circuit 152, a bias circuit 153, a power supply terminal 154, a transistor 155, a bias circuit 156, an input terminal 157, a matching circuit 158, and an output terminal 159. Here, the transistor 155 is a bipolar transistor. An angle modulation signal is input from the signal generator 11 to the input terminal 151. The angle modulation signal is input to the base terminal of the transistor 155 through the matching circuit 152.

  Further, a DC voltage is applied to the power supply terminal 154. That is, a bias voltage is supplied to the base terminal of the transistor 155 through the power supply terminal 154 and the bias circuit 153. A voltage corresponding to the magnitude of the amplitude signal M2 is supplied from the amplitude amplifying unit 14 to the input terminal 157. A voltage corresponding to the magnitude of the amplitude signal M2 is supplied to the collector terminal of the transistor 155 via the bias circuit 156. The transistor 155 amplitude-modulates the angle modulation signal with a voltage corresponding to the magnitude of the amplitude signal M2, and outputs the modulated signal.

  The modulation signal output from the transistor 155 is output from the output terminal 159 via the matching circuit 158. Note that even if the transistor 155 is a field-effect transistor, the same effect can be obtained. Further, when the amplitude amplifying unit 14 is configured by a current drive type regulator 14c, a current corresponding to the magnitude of the amplitude signal M2 is input to the power supply terminal 154 from the current drive type regulator 14c. In this case, a current corresponding to the magnitude of the amplitude signal M <b> 2 is input to the collector terminal of the transistor 155 via the bias circuit 156. The transistor 155 amplitude-modulates the angle modulation signal with a current corresponding to the magnitude of the amplitude signal M2, and outputs the modulated signal.

  Further, the amplitude modulation unit 15 can be configured as shown in FIG. 7B, for example. FIG. 7B is a block diagram illustrating an example of the configuration of the amplitude modulation unit 15b. In FIG. 7B, the amplitude modulation unit 15b basically has a configuration in which two amplitude modulation units 15a (see FIG. 7A) are connected in series. A bias voltage is supplied from the power supply terminal 154 to the base terminal of the transistor 155 via the bias circuit 153. A bias voltage is supplied from the power supply terminal 160 to the base terminal of the transistor 161 via the bias circuit 165.

  A voltage corresponding to the magnitude of the amplitude signal M2 is supplied from the amplitude amplifying unit 14 to the collector terminal of the transistor 155 via the terminal 164 and the bias circuit 156. A voltage corresponding to the magnitude of the amplitude signal M2 is supplied from the amplitude amplifying unit 14 to the collector terminal of the transistor 161 via the terminal 164 and the bias circuit 162. With such a configuration, the amplitude modulation unit 15b can output a modulation signal having a larger dynamic range as compared with the amplitude modulation unit 15a illustrated in FIG. 7A. In the amplitude modulation unit 15, the transistor is a bipolar transistor, but the same effect can be obtained by using a field effect transistor. Further, the voltages supplied to the two bias circuits 156 and 162 need not be exactly the same. That is, the voltage supplied to one bias circuit may be a fixed voltage, and only the voltage supplied to the other bias circuit may be a voltage corresponding to the magnitude of the amplitude signal M2.

  As described above, according to the transmission circuit 1 according to the first embodiment of the present invention, the offset compensation unit 12 has the amplitude included in each transmission circuit in the amplitude signal M1 based on the output power of the amplitude modulation unit 15. An offset compensation value corresponding to the characteristic of the modulation unit 15 is added. For this reason, the offset compensation unit 12 can accurately compensate the offset characteristics of the amplitude modulation unit 15 even if the output signal of the amplitude modulation unit 15 varies due to individual differences of the amplitude modulation unit 15 or the like. As a result, the transmission circuit 1 can operate with low distortion and high efficiency over a wide range of output power.

  In the above-described example, the transmission circuit 1 changes the offset compensation value for each output power of the amplitude modulation unit 15. However, when the offset compensation value is almost the same even if the output power is different, The same offset compensation value may be used for a plurality of output powers. Thereby, the transmission circuit 1 can reduce memory capacity, circuit size, and the like.

(Second Embodiment)
FIG. 8A is a block diagram showing an example of the configuration of the transmission circuit 2 according to the second embodiment of the present invention. In FIG. 8A, the transmission circuit 2 is different from the transmission circuit 1 according to the first embodiment in the configuration of the offset compensation unit 22 and the storage contents of the memory 23. The offset compensation unit 22 includes an adder 221, an arithmetic processing unit 222, and a variable gain amplifier 223. The variable gain amplifier 223 amplifies the amplitude signal M1 with a predetermined gain in accordance with an instruction from the arithmetic processing unit 222, and describes an output characteristic gradient (hereinafter referred to as an offset characteristic gradient) caused by individual differences of the amplitude modulator 15. ).

  The memory 23 stores an offset compensation value for compensating for the offset characteristic of the amplitude modulation unit 15 and a gain for compensating for the slope of the offset characteristic of the amplitude modulation unit 15 (that is, the gain of the variable gain amplifier 223). . FIG. 9 is a diagram illustrating an example of the contents stored in the memory 23. As illustrated in FIG. 9, the memory 23 includes offset compensation values (for example, AMO1, AMO2, and AMO3) corresponding to the output power of the amplitude modulation unit 15 (for example, the output voltages Vo1, Vo2, and Vo3 of the amplitude modulation unit 15). The gain (for example, Gain1, Gain2, Gain3) of the variable gain amplifier 223 is stored. The offset compensation value and the gain of the variable gain amplifier 223 may be stored in the memory 23 in advance or may be calculated by a predetermined method. A method for calculating the offset compensation value and the gain of the variable gain amplifier 223 will be described later.

  Similarly to the first embodiment, the output power of the amplitude modulation unit 15 measured by the power measurement unit 18 is input to the arithmetic processing unit 222. The arithmetic processing unit 222 reads the gain corresponding to the output power of the amplitude modulation unit 15 from the memory 23 and sets the read gain in the variable gain amplifier 223. The variable gain amplifier 223 amplifies and outputs the amplitude signal M1 according to the set gain. In addition, the arithmetic processing unit 222 reads an offset compensation value corresponding to the output power of the amplitude modulation unit 15 from the memory 23 and outputs it to the adder 221. The adder 221 adds the offset compensation value output from the arithmetic processing unit 222 to the output of the variable gain amplifier 223, and outputs the result as an amplitude signal M2.

  In the transmission circuit 2 described above, the arithmetic processing unit 222 reads the offset compensation value and the gain from the memory 23 based on the measurement value of the output power of the amplitude modulation unit 15, but for example, the transmission circuit 2b illustrated in FIG. As described above, the offset compensation value and the gain may be read from the memory 23 based on a power control signal sent from a baseband unit (not shown). Also in this case, since the amplitude signal M1 is compensated with the offset compensation value and the gain according to the characteristics of the amplitude modulation unit 15 included in each transmission circuit 2b, the transmission circuit 2b is a measured value of the output power of the amplitude modulation unit 15. The same effect as when the offset compensation value and the gain are read from the memory 23 can be obtained.

  Next, a method for calculating the offset compensation value of the amplitude modulator 15 and the gain of the variable gain amplifier 223 will be described. The method for calculating the offset compensation value is the same as in the first embodiment. The offset compensator 22 calculates the gain of the variable gain amplifier 223 using, for example, the following method. In the offset compensation unit 22, the arithmetic processing unit 222 can calculate the slope of the straight line shown in FIGS. 4A to 4C (that is, the slope of the offset characteristic of the amplitude modulation unit 15) in the process of calculating the offset compensation value. . Then, the arithmetic processing unit 222 calculates the gain of the variable gain amplifier 223 so that the calculated slope of the straight line coincides with the slope of the ideal offset characteristic of the amplitude modulator 15. Further, as illustrated in FIG. 4C, the arithmetic processing unit 222 outputs the output of the amplitude modulation unit 15 when the slope of the offset characteristic of the amplitude modulation unit 15 varies depending on the magnitude of the output voltage Vo of the amplitude modulation unit 15. The gain of the variable gain amplifier 223 may be changed according to the magnitude of the voltage Vo.

  As described above, according to the transmission circuit 2 according to the second embodiment of the present invention, the offset compensator 22 further sets the slope of the offset characteristic of the amplitude modulator 15 based on the output power of the amplitude modulator 15. The amplitude signal M1 is amplified so as to compensate. For this reason, the offset compensator 22 can accurately compensate the offset characteristics of the amplitude modulator 15 even if the output signal of the amplitude modulator 15 varies due to individual differences of the amplitude modulator 15 or the like. As a result, the transmission circuit 2 can operate with lower distortion.

(Third embodiment)
FIG. 10A is a block diagram showing an example of the configuration of the transmission circuit 3 according to the third embodiment of the present invention. 10A, the transmission circuit 3 further includes an interface unit 31 as compared with the transmission circuit 1 (see FIG. 1A) according to the first embodiment. The transmission circuit 3 is connected to the external control device 32 via the interface unit 31 at the time of initial setting such as factory shipment. The external control device 32 instructs the power measurement unit 18 and the control unit 39 to calculate the offset compensation value of the amplitude modulation unit 15 via the interface unit 31. When receiving the instruction, the control unit 39 instructs the offset compensation unit 12 to calculate the offset compensation value of the amplitude modulation unit 15. The offset compensation unit 12 and the power measurement unit 18 calculate the offset compensation value of the amplitude modulation unit 15 using the same method as in the first embodiment. The transmission circuit according to the third embodiment can also be applied to the transmission circuit 1b (see FIG. 1B) according to the first embodiment, like the transmission circuit 3b illustrated in FIG. 10B.

  Further, the transmission circuit according to the third embodiment can be applied to the transmission circuit 2 according to the second embodiment (see FIG. 8A), like the transmission circuit 3c shown in FIG. 10C. FIG. 10C is a block diagram showing an example of the configuration of the transmission circuit 3c according to the third embodiment of the present invention. Also in FIG. 10C, the transmission circuit 3 c calculates the offset compensation value of the amplitude modulation unit 15 and the gain of the variable gain amplifier 223 according to the instruction of the external control device 32. The transmission circuit according to the third embodiment can also be applied to the transmission circuit 2b (see FIG. 8B) according to the second embodiment, like the transmission circuit 3d illustrated in FIG. 10D.

  As described above, the transmission circuit 3 according to the third embodiment of the present invention includes the offset compensation value of the amplitude modulation unit 15 and the variable gain amplifier according to the instruction of the external control device 32 at the time of initial setting such as factory shipment. The gain of 223 is calculated. As a result, the transmission circuit 3 can cause the external control device 32 to have a part of the function of the control unit 39 provided therein.

(Fourth embodiment)
FIG. 11A is a block diagram showing an example of the configuration of the transmission circuit 4 according to the fourth embodiment of the present invention. In FIG. 11A, the transmission circuit 4 according to the fourth embodiment is stored in the memory 13 in accordance with the temperature of the amplitude modulation unit 15, as compared with the transmission circuit 1 according to the first embodiment (see FIG. 1A). The difference is that the offset compensation value can be updated in real time. The transmission circuit 4 further includes a temperature measurement unit 41. The control unit 49 instructs the offset compensation unit 42 and the temperature measurement unit 41 to update the offset compensation value stored in the memory 13. The temperature measurement unit 41 measures the temperature of the amplitude modulation unit 15 in accordance with an instruction from the control unit 49. The offset compensation unit 42 (arithmetic processing unit 422) calculates a new offset compensation value in consideration of the temperature of the amplitude modulation unit 15 at a timing instructed by the control unit 49. The arithmetic processing unit 422 updates the contents of the memory 13 with the calculated offset compensation value. The transmission circuit according to the fourth embodiment can also be applied to the transmission circuit 1b (see FIG. 1B) according to the first embodiment, like the transmission circuit 4b illustrated in FIG. 11B.

  In addition, the transmission circuit according to the fourth embodiment can be applied to the transmission circuit 2 according to the second embodiment (see FIG. 8A) like the transmission circuit 4c illustrated in FIG. 11C. FIG. 11C is a block diagram illustrating an example of a configuration of a transmission circuit 4c according to the fourth embodiment of the present invention. In FIG. 11C, the transmission circuit 4c can update the offset compensation value and the gain stored in the memory 23 in real time according to the temperature of the amplitude modulation unit 15. The transmission circuit according to the fourth embodiment can also be applied to the transmission circuit 2b according to the second embodiment (see FIG. 8B), like the transmission circuit 4d illustrated in FIG. 11D. That is, the transmission circuits 4c and 4d according to the fourth embodiment have the variable gain stored in the memory 23 when the slope of the offset characteristic of the amplitude modulation unit 15 changes according to the temperature of the amplitude modulation unit 15. The gain of the amplifier 223 may be updated.

  FIG. 12 is a diagram for explaining the timing for updating the offset compensation value when the transmission circuit 4 is applied to the TDMA system. As shown in FIG. 12, when the transmission circuit 4 is applied to the TDMA system, the control unit 49, for example, performs an offset so that the update of the offset compensation value is completed within the TX ramp up time. The compensation unit 42 and the temperature measurement unit 41 are instructed to update the offset compensation value. Thus, the transmission circuit 4 can update the offset compensation value without affecting the transmission data. Further, the transmission circuit 4 can compensate the offset characteristics of the amplitude modulation unit 15 using the updated offset compensation value in the same time slot as the time slot in which the offset compensation value is updated.

  FIG. 13 is a diagram for explaining the timing for updating the offset compensation value when the transmission circuit 4 is applied to the CDMA system. As shown in FIG. 13, when the transmission circuit 4 is applied to the CDMA system, the control unit 49 notifies the offset compensation unit 42 and the temperature measurement unit 41 when the transmission power is changed by a TPC command, for example. This is instructed as the timing for updating the offset compensation value.

  Note that the transmission circuit according to the fourth embodiment may have a configuration of the transmission circuit 4x as shown in FIG. FIG. 14 is a block diagram showing an example of the configuration of a transmission circuit 4x according to the fourth embodiment of the present invention. In FIG. 14, the transmission circuit 4 x does not update the offset compensation value stored in the memory 13 according to the temperature of the amplitude modulation unit 15, and the offset compensation value stored in the memory 13 and the amplitude modulation unit 15. The difference from the offset compensation value changed according to the temperature is added to the amplitude signal M1. The offset compensation unit 42x includes a first adder 121, a second adder 412x, and an arithmetic processing unit 422x. In the offset compensation unit 42x, the arithmetic processing unit 422x calculates a difference between the offset compensation value stored in the memory 13 and the offset compensation value that has been changed according to the temperature of the amplitude modulation unit 15. The second adder 421x adds the difference between the offset compensation values calculated by the arithmetic processing unit 422x to the amplitude signal M1.

  As described above, according to the transmission circuit 4 according to the fourth embodiment of the present invention, even when the offset compensation value of the amplitude modulation unit 15 and the slope of the offset characteristic change according to the temperature of the amplitude modulation unit 15. The offset characteristic of the amplitude modulator 15 can be accurately compensated. Thereby, the transmission circuit 4 can operate with lower distortion.

(Fifth embodiment)
FIG. 15A is a block diagram showing an example of the configuration of the transmission circuit 5 according to the fifth embodiment of the present invention. In FIG. 15A, the transmission circuit 5 is more sensitive to changes in the output power of the amplitude modulation section 15 due to temperature changes and the like, particularly at low power, compared to the transmission circuit 1 according to the first embodiment (see FIG. 1A). The difference is that the offset compensation value stored in the memory 13 can be updated in real time. Note that when the output power of the amplitude modulation unit 15 is large, the transmission circuit 5 has a small change in output voltage due to a temperature change or the like of the amplitude modulation unit 15, so that the offset compensation value stored in the memory 13 only when the power is low. Should be updated.

  The control unit 59 monitors the output power of the amplitude modulation unit 15 measured by the power measurement unit 18. For example, when the output power becomes a predetermined threshold value or less, the control unit 59 sends the offset compensation unit 52 and the power measurement unit 18 to each other. The timing for updating the offset compensation value stored in the memory 13 is instructed. The offset compensation unit 52 (calculation processing unit 522) and the power measurement unit 18 calculate the offset compensation value of the amplitude modulation unit 15 at the timing instructed by the control unit 59. The arithmetic processing unit 522 updates the contents of the memory 13 with the calculated offset compensation value. Further, the transmission circuit according to the fifth embodiment can also be applied to the transmission circuit 1b (see FIG. 1B) like the transmission circuit 5b shown in FIG. 15B. In such a case, for example, the control unit 59 instructs the offset compensation unit 52 to update the offset compensation value when the power control signal becomes equal to or less than a predetermined threshold value.

  The transmission circuit 5 according to the fifth embodiment can also be applied to the transmission circuit 2 according to the second embodiment (see FIG. 8A), like the transmission circuit 5c illustrated in FIG. 15C. FIG. 15C is a block diagram illustrating an example of a configuration of a transmission circuit 5c according to the fifth embodiment of the present invention. In FIG. 15C, the transmission circuit 5c updates the offset compensation value and the gain stored in the memory 23 in real time based on the change in the output power of the amplitude modulation unit 15 at the time of particularly low power due to the temperature change or the like. Is possible. The control unit 59 monitors the output power of the amplitude modulation unit 15 measured by the power measurement unit 18. For example, when the output power becomes a predetermined threshold value or less, the control unit 59 sends the offset compensation unit 52 and the power measurement unit 18 to each other. The timing for updating the offset compensation value and the gain stored in the memory 23 is instructed.

  The transmission circuit according to the fifth embodiment can also be applied to the transmission circuit 2b according to the second embodiment (see FIG. 8B), like the transmission circuit 5d illustrated in FIG. 15D. In such a case, for example, the control unit 59 instructs the offset compensation unit 52 to update the offset compensation value and the gain when the power control signal falls below a predetermined threshold value. That is, the transmission circuits 5c and 5d according to the fifth embodiment are stored in the memory 23 when the slope of the offset characteristic of the amplitude modulation unit 15 changes due to a temperature change or the like of the amplitude modulation unit 15. The gain of the variable gain amplifier 223 may be updated.

  FIG. 16 is a diagram for explaining the timing for updating the offset compensation value when the transmission circuit 5 is applied to the TDMA system. As illustrated in FIG. 16, when the transmission circuit 5 is applied to the TDMA system, the control unit 59 transmits a low-power test signal within a TX ramp up time, for example, and transmits the transmitted test signal. Based on the above, the offset compensation unit 52 and the power measurement unit 18 are controlled so as to calculate the offset compensation value of the amplitude modulation unit 15.

  As described above, according to the transmission circuit 5 according to the fifth embodiment of the present invention, when the offset compensation value of the amplitude modulation unit 15 and the slope of the offset characteristic change according to the output power of the amplitude modulation unit 15. In addition, the offset characteristic of the amplitude modulator 15 can be accurately compensated. Thereby, the transmission circuit 5 can operate with lower distortion.

  The transmission circuits according to the fourth to sixth embodiments described above do not necessarily have to calculate the offset compensation value and the slope of the offset characteristic at the timings illustrated in FIGS. Is just an example. The transmission circuit can obtain the same effect by updating the offset compensation value and the slope of the offset characteristic stored in the memory 13 in real time based on the change in the output power of the amplitude modulator 15 caused by the temperature change or the like. Can do.

(Sixth embodiment)
FIG. 17 is a block diagram showing an example of the configuration of a communication device according to the sixth embodiment of the present invention. Referring to FIG. 17, a communication device 200 according to the sixth embodiment includes a transmission circuit 210, a reception circuit 220, an antenna sharing unit 230, and an antenna 240. The transmission circuit 210 is the transmission circuit according to any one of the first to fifth aspects described above. The antenna sharing unit 230 transmits the transmission signal output from the transmission circuit 210 to the antenna 240 and prevents the transmission signal from leaking to the reception circuit 220. The antenna sharing unit 230 transmits the reception signal input from the antenna 240 to the reception circuit 220 and prevents the reception signal from leaking to the transmission circuit 210.

  Therefore, the transmission signal is output from the transmission circuit 210 and emitted from the antenna 240 to the space via the antenna sharing unit 230. The received signal is received by the antenna 240 and received by the receiving circuit 220 via the antenna sharing unit 230. The communication device 200 according to the sixth embodiment can achieve low distortion as a wireless device while ensuring the linearity of the transmission signal by using the transmission circuit according to the first to fifth embodiments. it can. Further, since there is no branch such as a directional coupler in the output of the transmission circuit 210, loss from the transmission circuit 210 to the antenna 240 can be reduced, power consumption during transmission can be reduced, and wireless As a communication device, it can be used for a long time. Note that the communication device 200 may include only the transmission circuit 210 and the antenna 240.

  The transmission circuit according to the present invention can be applied to communication devices such as mobile phones and wireless LANs.

1 is a block diagram showing an example of a configuration of a transmission circuit 1 according to a first embodiment of the present invention. The block diagram which shows an example of a structure of the transmission circuit 1b which concerns on the 1st Embodiment of this invention. The figure which shows an example of the memory content of the memory 13 Flow showing an example of a method for calculating an offset compensation value The figure explaining the method of calculating an offset compensation value by the linear approximation between two points The figure explaining the method of calculating an offset compensation value by the linear approximation using the least squares method between three points The figure explaining the method of calculating several offset compensation values by the linear approximation between two points The block diagram which shows an example of a structure of the signal generation part 11a using a polar coordinate signal generation part. The block diagram which shows an example of a structure of the signal generation part 11b using an orthogonal signal generation part. Block diagram showing an example of the configuration of the series regulator 14a Block diagram showing an example of the configuration of the switching regulator 14b The block diagram which shows an example of a structure of the current drive type regulator 14c The block diagram which shows an example of a structure of the amplitude modulation part 15a The block diagram which shows an example of a structure of the amplitude modulation part 15b The block diagram which shows an example of a structure of the transmission circuit 2 which concerns on the 2nd Embodiment of this invention. The block diagram which shows an example of a structure of the transmission circuit 2b which concerns on the 2nd Embodiment of this invention. The figure which shows an example of the memory content of the memory 23 The block diagram which shows an example of a structure of the transmission circuit 3 which concerns on the 3rd Embodiment of this invention. The block diagram which shows an example of a structure of the transmission circuit 3b which concerns on the 3rd Embodiment of this invention. The block diagram which shows an example of a structure of the transmission circuit 3c which concerns on the 3rd Embodiment of this invention. The block diagram which shows an example of a structure of the transmission circuit 3d which concerns on the 3rd Embodiment of this invention. The block diagram which shows an example of a structure of the transmission circuit 4 which concerns on the 4th Embodiment of this invention. The block diagram which shows an example of a structure of the transmission circuit 4b which concerns on the 4th Embodiment of this invention. The block diagram which shows an example of a structure of the transmission circuit 4c which concerns on the 4th Embodiment of this invention. The block diagram which shows an example of a structure of the transmission circuit 4d which concerns on the 4th Embodiment of this invention. The figure explaining the timing which updates the offset compensation value when the transmission circuit 4 is applied to the TDMA system The figure explaining the timing which updates the offset compensation value when the transmission circuit 4 is applied to the CDMA system The block diagram which shows an example of a structure of the transmission circuit 4x which concerns on the 4th Embodiment of this invention. The block diagram which shows an example of a structure of the transmission circuit 5 which concerns on the 5th Embodiment of this invention. The block diagram which shows an example of a structure of the transmission circuit 5b which concerns on the 5th Embodiment of this invention. The block diagram which shows an example of a structure of the transmission circuit 5c which concerns on the 5th Embodiment of this invention. The block diagram which shows an example of a structure of the transmission circuit 5d which concerns on the 5th Embodiment of this invention. The figure explaining the timing which updates the offset compensation value when the transmission circuit 5 is applied to the TDMA system The block diagram which shows an example of a structure of the communication apparatus which concerns on the 6th Embodiment of this invention. A block diagram showing an example of a configuration of a conventional transmission circuit 500 The figure which shows the relationship between the collector voltage Vc supplied to the amplitude modulation part 504, and the output voltage Vo. A block diagram showing an example of a configuration of a conventional transmission circuit 600

Explanation of symbols

1 to 5 Transmission circuit 11 Signal generation unit 111 Polar coordinate signal generation unit 112 Angle modulation unit 113 Orthogonal signal generation unit 114 Vector modulation unit 115 Envelope detection unit 116 Limiter 12, 22, 42 Offset compensation unit 121 Adder 122, 222, 422 Arithmetic processing unit 223 Variable gain amplifier 13, 23 Memory 14 Regulator 14a Series regulator 14b Switching regulator 14c Current drive regulator 141, 143, 145 Terminal 142 Comparator 144 Transistor 146 Signal converter 147 Amplifier 148 Low-pass filter 149 Variable current source 150a, 150b transistor 15 amplitude modulator 151, 154, 157, 159, 164 terminals 152, 158, 163 matching circuit 153, 156, 162, 165 bias times 16 power supply terminal 17 output terminal 18 power measuring unit 19, 49 control unit 31 interface unit 32 external control unit 41 the temperature measuring unit 200 communication apparatus 210 transmission circuit 220 receiving circuit 230 antenna duplexer 240 antenna

Claims (10)

A transmission circuit that generates and outputs a transmission signal based on input data,
A signal generation unit that performs predetermined signal processing on the input data to generate an amplitude signal and an angle modulation signal;
An offset compensator for compensating the magnitude of the amplitude signal according to a predetermined instruction;
An amplitude amplifying unit that outputs a signal according to the magnitude of the amplitude signal input via the offset compensation unit;
An amplitude modulation unit that modulates the amplitude of the angle modulation signal with the signal output from the amplitude amplification unit, and outputs the modulated signal that is angle-modulated and amplitude-modulated;
A power measurement unit for measuring the output power of the amplitude modulation unit;
A memory unit storing an offset compensation value for compensating an offset characteristic of the amplitude modulation unit;
A control unit that controls operations of the offset compensation unit and the power measurement unit at a predetermined timing;
The offset compensation unit reads the offset compensation value corresponding to the output power of the amplitude modulation unit measured by the power measurement unit from the memory unit according to an instruction from the control unit, and reads the read offset compensation value from the amplitude unit. A transmission circuit characterized by adding to a signal. The offset compensator is
An arithmetic processing unit that reads an offset compensation value corresponding to the output power of the amplitude modulation unit from the memory unit;
The transmission circuit according to claim 1, further comprising: an addition unit that adds the offset compensation value read by the arithmetic processing unit to the amplitude signal. The memory unit further stores a gain for compensating for an inclination of an offset characteristic of the amplitude modulation unit,
The offset compensator is
An arithmetic processing unit that reads an offset compensation value and a gain corresponding to the output power of the amplitude modulation unit from the memory unit;
A variable gain amplifying unit for amplifying the amplitude signal with the gain read by the arithmetic processing unit;
The transmission circuit according to claim 1, further comprising: an addition unit that adds the offset compensation value read by the arithmetic processing unit to the amplitude signal output by the variable gain amplification unit. The control unit instructs the calculation processing unit and the power measurement unit to calculate an offset compensation value for compensating for an offset characteristic of the amplitude modulation unit,
The power measurement unit, when instructed to calculate the offset compensation value, measures the output power of the amplitude modulation unit,
When the calculation processing unit is instructed to calculate the offset compensation value, the arithmetic processing unit outputs a plurality of amplitude signals whose sizes are changed, and the amplitude measured by the power measurement unit when the plurality of amplitude signals are output. The transmission circuit according to claim 2, wherein the offset compensation value is calculated based on a change in output power of the modulation unit. The control unit instructs the arithmetic processing unit and the power measurement unit to calculate a gain for compensating for an offset characteristic slope of the amplitude modulation unit,
When the power measurement unit is instructed to calculate the gain, it measures the output power of the amplitude modulation unit,
When the calculation processing unit is instructed to calculate the gain, the arithmetic processing unit outputs a plurality of amplitude signals whose magnitudes are changed, and the amplitude modulation unit measured by the power measurement unit when outputting the plurality of amplitude signals 4. The transmission circuit according to claim 3, wherein a gain for compensating for an inclination of the offset characteristic is calculated on the basis of a change in output power. A temperature measurement unit for measuring the temperature of the amplitude modulation unit;
The control unit instructs the arithmetic processing unit and the temperature measurement unit to update the storage contents of the memory unit,
The temperature measurement unit measures the temperature of the amplitude modulation unit according to an instruction from the control unit,
The arithmetic processing unit calculates an offset compensation value according to the temperature of the amplitude modulation unit measured by the temperature measurement unit in accordance with an instruction from the control unit, and stores the storage contents of the memory unit with the calculated offset compensation value. The transmission circuit according to claim 4, wherein the transmission circuit is updated. A temperature measurement unit for measuring the temperature of the amplitude modulation unit;
The control unit instructs the arithmetic processing unit and the temperature measurement unit to update the storage contents of the memory unit,
The temperature measurement unit measures the temperature of the amplitude modulation unit according to an instruction from the control unit,
The arithmetic processing unit calculates a gain for compensating for the slope of the offset characteristic according to the temperature of the amplitude modulation unit measured by the temperature measurement unit according to an instruction of the control unit, and the calculated gain The transmission circuit according to claim 5, wherein the content stored in the memory unit is updated. A transmission circuit that generates and outputs a transmission signal based on input data,
A signal generation unit that performs predetermined signal processing on the input data to generate an amplitude signal and an angle modulation signal;
An offset compensator for compensating the magnitude of the amplitude signal;
An amplitude amplifying unit that outputs a signal according to the magnitude of the amplitude signal input via the offset compensation unit;
An amplitude modulation unit that modulates the amplitude of the angle modulation signal with the signal output from the amplitude amplification unit, and outputs the modulated signal that is angle-modulated and amplitude-modulated;
A memory unit storing an offset compensation value for compensating an offset characteristic of the amplitude modulation unit;
A control unit that controls the operation of the offset compensation unit at a predetermined timing;
The offset compensation unit receives a power control signal for controlling the output power of the transmission signal,
The offset compensation unit reads the offset compensation value corresponding to the power control signal from the memory unit according to an instruction from the control unit, and adds the read offset compensation value to the amplitude signal. Transmitter circuit. Communication equipment,
A transmission circuit for generating a transmission signal;
An antenna for outputting a transmission signal generated by the transmission circuit;
The communication device according to claim 1, wherein the transmission circuit is the transmission circuit according to claim 1. A receiving circuit for processing a received signal received from the antenna;
The communication according to claim 9, further comprising: an antenna sharing unit that outputs a transmission signal generated by the transmission circuit to the antenna and outputs a reception signal received from the antenna to the reception circuit. machine.

Images