JP2008053496A - Etching device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide an etching device that executes impedance matching in a short period of time. <P>SOLUTION: The etching device 1 is provided with a processing chamber 11, a gas supply device 20 for supplying an etching gas and an etching-resistant-layer forming gas into the processing chamber 11, a high-frequency power supply 32 for generating plasma by applying high-frequency power to an antenna 31, a matching device 33 connected between the antenna 31 and the high-frequency power supply 32, and a control device 22 that allows to alternately and repeatedly execute an etching step and an etching-resistant-layer forming step. The matching device 33 has a matching control unit 38 that executes automatic matching processing for executing the impedance matching by automatically adjusting each capacitance of variable capacitors 34, 35. When receiving a step start signal transmitted from the control device 22 at the start of each step, the matching control unit 38 once stops the automatic matching processing so as to execute processing for adjusting each capacitance of the variable capacitors 34, 35 to a set value preset as capacitance at the start of each step. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention alternately repeats an etching process for etching a silicon substrate by converting the etching gas into a plasma and an etching resistant layer forming process for forming an etching resistant layer on the silicon substrate by converting the etching resistant layer forming gas into a plasma. The present invention relates to an etching apparatus for etching.

  Conventionally, for example, an etching apparatus disclosed in Japanese Patent Application Laid-Open No. 2005-252057 is known as the etching apparatus. Although not specifically shown, this etching apparatus is provided with a processing chamber having a closed space, a base disposed on the lower side of the processing chamber, on which a silicon substrate to be etched is placed, and etching in the processing chamber. A gas supply device for supplying a gas and an etching-resistant layer forming gas; an antenna (coil) disposed on an upper side of the outer periphery of the processing chamber; a first high-frequency power source for applying high-frequency power to the antenna; A matching device connected between the power supply and a second high-frequency power supply for applying high-frequency power to the base is provided, and the etching process and the etching resistant layer forming process are alternately repeated.

  The gas supply device supplies the etching gas and the etching resistant layer forming gas into the processing chamber so as to correspond to the alternately repeated etching process and the etching resistant layer forming process, and the etching gas supply flow rate is controlled during the etching process. More than the etching layer forming gas, the supply flow rate of the etching resistant layer forming gas is set higher than that of the etching gas during the etching resistant layer forming step.

  The first high-frequency power source forms a magnetic field in the processing chamber by applying high-frequency power to the antenna, and plasma (gas for etching gas and etching-resistant layer forming gas) is generated in the processing chamber by the electric field induced by the magnetic field. Turn into. The second high frequency power supply generates a potential difference (bias potential) between the base and the plasma by applying high frequency power to the base.

  The matching device includes two variable capacitors connected between the antenna and the first high-frequency power source, and each variable so that the combined impedance on the load side including the antenna and itself is equal to the impedance on the first high-frequency power source side. And a control unit for adjusting the capacitance of the capacitor. The adjustment of the capacitance is performed by driving the drive motor to change the facing area between the movable electrode and the fixed electrode.

  Note that the etching gas supplied into the processing chamber is a plasma containing ions, electrons, radicals, and the like by the electric field induced by the antenna, and the silicon substrate has radicals chemically reacting with silicon atoms or ions are bias potentials. Thus, etching is performed by moving toward the base (silicon substrate) and colliding. On the other hand, the etching-resistant layer forming gas is a plasma containing ions, electrons, radical atoms, etc. by the electric field induced by the antenna. For example, a polymer is generated from the radicals and deposited on the surface of the silicon substrate. An unreacted etching resistant layer (protective film) is formed.

  According to this etching apparatus, the silicon substrate placed on the base is etched by alternately repeating the etching process and the etching resistant layer forming process. In the etching process, the supply flow rate of the etching gas is Since the etching-resistant layer forming gas is larger than the etching-resistant layer forming gas, the etching-resistant layer is removed and etched more than the etching-resistant layer is formed. In the etching-resistant layer forming process, the etching-resistant layer forming gas is supplied at a higher flow rate than the etching gas. Therefore, the formation of the etching resistant layer proceeds more than the removal and etching of the etching resistant layer.

  Then, the etching process and the etching resistant layer forming process are alternately repeated, so that the etching proceeds in the depth direction while the sidewalls of the holes and the grooves are protected by the etching resistant layer. Grooves and holes having a depth are formed in the silicon substrate.

  In addition, during the execution of each process, the capacitance of each variable capacitor is adjusted as needed by the matching device so that the combined impedance on the load side and the impedance on the first high frequency power supply side are equal.

JP 2005-252057 A

  By the way, since the impedance of the antenna changes depending on the type of processing gas to be converted into plasma, the pressure in the processing chamber, the generation state of plasma, etc., the process is switched, the processing gas supplied into the processing chamber changes, When the pressure in the chamber and the plasma generation state fluctuate, the impedance of the antenna changes greatly. In addition, it takes a certain time for the process gas in the process chamber to change, the pressure in the process chamber to stabilize, and the plasma generation state to stabilize after the process switches (that is, the process switches). Until a certain period of time elapses, the etching gas and the etching-resistant layer forming gas are in a mixed state), and the impedance of the antenna is unstable and changes complicatedly during that time.

  For this reason, in the conventional etching apparatus described above, even if the capacitance of the variable capacitor is adjusted by driving the drive motor in accordance with the change in the impedance of the antenna that is unstable and complicated, the follow-up delay of the adjustment of the capacitance is delayed. It was not possible to eliminate the unstable state of the impedance on the load side, and it took a long time to reach the matching state. Until the matching state is reached, the reflected power is large and sufficient high-frequency power cannot be supplied to the antenna, so the generation of plasma becomes unstable. As a result, the etching rate is lowered and the accuracy of the etching shape is lowered.

  Further, as described above, when the silicon substrate is etched by alternately repeating the etching process and the etching resistant layer forming process, irregularities are formed on the sidewalls of the holes and grooves formed by the etching, as shown in FIG. Therefore, in order to reduce such unevenness, it is preferable to switch each process in a short time by shortening each processing time of the etching process and the etching resistant layer forming process. In FIG. 8, symbol M indicates a mask, symbol K indicates a silicon substrate, and symbol T indicates a hole or groove.

  However, in the above conventional etching apparatus, since it takes a long time to reach the alignment state, in order to secure the minimum substantial processing time in each process, it is necessary to shorten the processing time in each process. Have certain limits.

  The present invention has been made in view of the above circumstances, and an object thereof is to provide an etching apparatus capable of performing impedance matching in a shorter time.

To achieve the above object, the present invention provides:
A processing chamber having a closed space in which a silicon substrate is disposed;
Gas supply means for supplying at least two processing gases into the processing chamber, a processing gas mainly containing an etching gas and a processing gas mainly containing an etching-resistant layer forming gas;
Plasma excitation means for converting the processing gas supplied into the processing chamber by the gas supply means into plasma;
First power supply means for applying high-frequency power to the plasma excitation means;
At least one variable impedance element connected between the plasma excitation means and the first power supply means, and a combined impedance on the load side including the variable impedance element and the plasma excitation means are on the first power supply means side. A first matching means comprising a matching control unit for performing an automatic matching process for adjusting the impedance of the variable impedance element to be equal to the impedance;
A control means for controlling the operation of the gas supply means and the first power supply means,
The control means includes: an etching process for supplying a processing gas containing the etching gas as a main component into the processing chamber from the gas supply means to etch the silicon substrate; and an etching resistant layer forming gas from the gas supply means. Etching configured to alternately and repeatedly execute at least two steps of an etching resistant layer forming step of forming an etching resistant layer on the silicon substrate by supplying a processing gas mainly composed of A device,
The control means transmits an etching process start signal to the alignment control unit at the start of the etching process, and transmits an etching resistant layer formation process start signal to the alignment control unit at the start of the etching resistant layer formation process. Configured as
When the matching control unit receives the etching process start signal from the control unit, the matching control unit temporarily stops the automatic matching process, and determines the impedance of the variable impedance element to be the impedance of the variable impedance element at the start of the etching process. As the process of adjusting to a preset set value is performed, and when the start signal of the etching resistant layer forming process is received from the control means, the automatic matching process is temporarily stopped, and the impedance of the variable impedance element is The present invention relates to an etching apparatus configured to execute a process that matches a preset value as the impedance of the variable impedance element at the start of the etching resistant layer forming process.

  According to the present invention, after the silicon substrate is appropriately disposed in the processing chamber, the etching process and the etching resistant layer forming process are alternately repeated under the control of the control means, and the etching process and the etching resistant layer forming process are repeated. Starting from the layer forming step, the etching resistant layer forming step and the etching step are alternately repeated to etch the silicon substrate.

  In the etching step, a processing gas containing an etching gas as a main component is supplied from the gas supply means into the processing chamber, and high-frequency power is applied to the plasma excitation means by the first power supply means. The supplied processing gas is converted into plasma containing ions, electrons, radicals, etc. by plasma excitation means to which high-frequency power is applied. The silicon substrate is etched by radicals or ions to form grooves and holes having a predetermined width and depth.

  On the other hand, in the etching resistant layer forming step, a processing gas mainly comprising an etching resistant layer forming gas is supplied from the gas supplying means into the processing chamber, and high frequency power is applied to the plasma exciting means by the first power supplying means. The The supplied processing gas is turned into plasma containing ions, electrons, radicals, etc. by plasma excitation means to which high-frequency power is applied, and the radicals and ions cause an etching resistant layer (polymer) on the side walls and bottom of the grooves and holes. A protective film or an oxide film is formed.

  And when such an etching process and an etching-resistant layer forming process are repeated alternately, in the etching process, the removal and etching of the etching-resistant layer proceeds at the bottom of the groove or hole, and at the sidewall of the groove or hole, Etching of the sidewall is prevented by the etching resistant layer, and the etching resistant layer is formed again on the bottom surface and the sidewall in the etching resistant layer forming step. Thus, etching proceeds in the depth direction while the sidewalls of the holes and grooves are protected by the etching resistant layer.

  During the execution of each process, the automatic matching process is executed by the matching control unit of the first matching unit to adjust the impedance of the variable impedance element as needed, and the combined impedance on the load side including the variable impedance element and the plasma excitation unit The impedance on the first power supply means side is made equal.

  However, when each process is started (when each process is switched), when the control unit transmits an etching process start signal or an etching resistant layer forming process start signal to the matching control unit, and the matching control unit receives it. The automatic matching process is temporarily stopped, and the impedance of the variable impedance element is set to a predetermined set value.

  Specifically, when an etching process start signal is received, a process for adjusting the impedance of the variable impedance element to a preset value as the impedance of the variable impedance element at the start of the etching process is performed, and etching resistance When the layer formation process start signal is received, a process of matching the impedance of the variable impedance element to a preset value set as the impedance of the variable impedance element at the start of the etching resistant layer formation process is executed. Note that the preset set value is, for example, that a certain time has elapsed after the process is switched (the processing gas in the processing chamber is substantially replaced, the pressure in the processing chamber is substantially stabilized, the generation of plasma is This is the impedance of the variable impedance element when the state of the plasma excitation means is substantially stable. Further, this set value can be obtained empirically, for example.

  Thus, according to the etching apparatus of the present invention, at the start of each process, the matching control unit temporarily stops the automatic matching process and executes the process of matching the impedance of the variable impedance element to the set value. After the start of each step, the impedance of the variable impedance element can be set to the set value without being affected by the impedance of the plasma excitation means that is unstable and changes in a complicated manner. As a result, it is possible to quickly stabilize the impedance of the variable impedance element and perform matching in a short time, and supply sufficient high-frequency power to the plasma excitation means in a short time after the start of each process to change the plasma generation state. It can be stabilized. Therefore, in each process, the etching on the silicon substrate and the formation of the etching resistant layer can be sufficiently performed, the etching rate can be increased, and the accuracy of the etching shape can be increased.

  In addition, since the alignment state can be obtained in a short time, it becomes possible to switch each process in a short time by shortening each processing time of the etching process and the etching resistant layer forming process, and switching each process in a short time. Thus, the unevenness formed on the sidewalls of the holes and grooves by etching can be reduced, and the sidewall shape can be improved.

  The etching apparatus is disposed on the lower side in the processing chamber, a base on which a silicon substrate is placed, a second power supply means for applying high-frequency power to the base, the base, At least one variable impedance element connected to the second power supply means, and the combined impedance on the load side including the variable impedance element and the base is equal to the impedance on the second power supply means side. And a second matching unit including a matching control unit that performs an automatic matching process for adjusting the impedance of the variable impedance element, and the control unit performs the etching process and / or the etching resistant layer forming process when the first process is performed. (2) Applying high frequency power to the base by means of power supply means, starting signal of the etching process and / or etching resistant layer A process start signal is also transmitted to the matching control unit of the second matching unit, and the matching control unit of the second matching unit is similar to the matching control unit of the first matching unit from the control unit. When the etching process start signal is received, the automatic matching process is temporarily stopped, and the impedance of the variable impedance element is adjusted to a preset value as the impedance of the variable impedance element at the start of the etching process. And when the control means receives a start signal of the etching resistant layer forming process, the automatic matching process is temporarily stopped to change the impedance of the variable impedance element to the variable at the start of the etching resistant layer forming process. Process to match the preset value as the impedance of the impedance element The may be configured to run.

  When high frequency power is applied to the base by the second power supply means, a potential difference (bias potential) is generated between the base and the plasma, and by this bias potential, ions collide with the silicon substrate, Etching is removed, the etching resistant layer is removed, and ions and radicals for forming the etching resistant layer are attracted to the silicon substrate side to effectively form the etching resistant layer.

  Since the impedance of the base is affected by the plasma generation state, it greatly changes when the process is switched and the plasma generation state fluctuates. In addition, it takes a certain time for the plasma generation state to stabilize after the process is switched, during which the impedance of the base is unstable and changes in a complicated manner. For this reason, the impedance of the variable impedance element is adjusted according to the impedance change of the base that is unstable and changes in a complicated manner, and the combined impedance on the load side including the variable impedance element and the base is the second power supply means side. Even if it is equal to the impedance, it will not be possible to eliminate the follow-up delay in the impedance adjustment of the variable impedance element, or the unstable state of the impedance on the load side, and it will take a long time to reach the matching state. . Until the matching state is reached, the reflected power is large and sufficient high frequency power cannot be supplied to the base, so that a sufficient bias potential cannot be generated or the generated bias potential becomes unstable. As a result, the incident amount of ions is not constant, etching to the silicon substrate and removal of the etching resistant layer become non-uniform, and ions and radicals are hardly attracted to the silicon substrate side, and an etching resistant layer is efficiently formed. Or the formation of the etching resistant layer becomes non-uniform, the etching rate decreases, the accuracy of the etching shape decreases, and a discharge occurs between the plasma and the silicon substrate. There was a problem of damage.

  Therefore, as with the first matching means, when the matching control unit receives the start signal of the etching process or the etching resistant layer forming process from the control means, the automatic matching process is temporarily stopped and variable as well. A process for adjusting the impedance of the impedance element to a preset value set as the impedance of the variable impedance element at the start of the etching process or at the start of the etching resistant layer forming process is executed.

  By configuring in this way, the impedance of the variable impedance element is set as the set value without being affected by the impedance of the base that is unstable and complicatedly changed after the start of the etching process and / or the etching resistant layer forming process. It is possible to quickly stabilize the impedance of the variable impedance element and perform matching in a short time, and supply sufficient high frequency power to the base in a short time after the start of the etching process and / or the etching resistant layer forming process. And a stable bias potential can be generated. As a result, the etching of the silicon substrate, the removal of the etching resistant layer, the formation of the etching resistant layer can be sufficiently performed, the etching resistant layer can be formed efficiently, the etching rate can be increased, and the etching shape accuracy can be improved. Can be increased. In addition, it is possible to prevent discharge from occurring between the plasma and the silicon substrate, thereby preventing the silicon substrate from being damaged.

  Examples of the plasma excitation means include, but are not limited to, inductive coupling type, capacitive coupling type, and those using helicon waves. Various types can be employed.

  The inductively coupled plasma excitation means includes a helical, annular, or spiral antenna (coil) disposed outside the processing chamber, or an annular antenna (coil) disposed within the processing chamber. It is comprised so that electric power may be applied. When high frequency power is applied to the antenna, a magnetic field is formed in the processing chamber, and the processing gas supplied into the processing chamber is turned into plasma by an electric field induced by the magnetic field.

  Further, the capacitively coupled plasma excitation means is configured so that two plate electrodes are arranged in parallel at a predetermined interval in the processing chamber, one electrode is grounded, and high-frequency power is applied to the other electrode. It is composed of. When high frequency power is applied to the other electrode, an electric field is formed between the electrodes, and the processing gas supplied into the processing chamber is turned into plasma by this electric field.

  The plasma excitation means using helicon waves includes an antenna wound around the outer periphery of the processing chamber and a magnetic field forming coil provided on the outer periphery of the antenna, and is configured so that high frequency power is applied to the antenna. It has been done. When high frequency power is applied to the antenna, an electric field is formed in the processing chamber, and the formed electric field excites a helicon wave propagating clockwise in parallel with the magnetic field. The processing gas supplied to is converted into plasma.

  As described above, according to the etching apparatus of the present invention, by quickly stabilizing the impedance of the variable impedance elements of the first matching unit and the second matching unit, and stabilizing the plasma generation state and the bias potential, The etching rate can be increased and the accuracy of the etching shape can be increased. Moreover, each process can be switched in a short time, and the unevenness | corrugation formed in the side wall of a hole or a groove | channel can be made small, and a side wall shape can be made favorable. In addition, it is possible to prevent discharge from occurring between the plasma and the silicon substrate, thereby preventing the silicon substrate from being damaged.

  Hereinafter, specific embodiments of the present invention will be described with reference to the accompanying drawings. FIG. 1 is a cross-sectional view partially showing a schematic configuration of an etching apparatus according to an embodiment of the present invention.

  As shown in FIG. 1, an etching apparatus 1 of this example includes a processing chamber 11 having a closed space, and a base on which a silicon substrate K to be etched is placed so as to be movable up and down in the processing chamber 11. 15, an elevating cylinder 18 that raises and lowers the base 15, an exhaust device 19 that reduces the pressure in the processing chamber 11, a gas supply device 20 that supplies processing gas into the processing chamber 11, and an outside of the processing chamber 11. An antenna (coil) 31 disposed; a first high-frequency power source 32 that applies high-frequency power to the antenna 31; a first matching device 33 connected between the antenna 31 and the first high-frequency power source 32; 15, a second high-frequency power source 21 that applies high-frequency power to the power source 15, a second matching device 40 connected between the base 15 and the second high-frequency power source 21, the lift cylinder 18, the exhaust device 19, and the gas Feeding device 20 comprises a first high frequency power supply 32, the first matching unit 33, and a control unit 22 for controlling the operation of the second high-frequency power source 21 and the second matching device 40.

  The processing chamber 11 includes a lower container 12 that accommodates the base 15 and the silicon substrate K, and an upper container 13 that is provided above the lower container 12 and is smaller than the lower container 12. A through hole 12a is formed on the upper surface of the lower container 12, and an opening 12b for carrying the silicon substrate K in and out of the side wall of the lower container 12 and an internal gas are exhausted to the outside. And an exhaust port 12c are formed respectively. The internal space of the lower container 12 and the internal space of the upper container 13 communicate with each other through the through hole 12a. The opening 12b is opened and closed by a shutter 14.

  The base 15 includes an upper member 16 and a lower member 17 that are arranged vertically. A silicon substrate K is placed on the upper member 16, and the elevating cylinder 18 is connected to the lower member 17.

  The exhaust device 19 includes an exhaust pump 19a, an exhaust pipe 19b that connects the exhaust pump 19a and the exhaust port 12c, and a pressure control unit 19c that controls the operation of the exhaust pump 19a. Then, the gas in the lower container 12 is exhausted to bring the inside of the processing chamber 11 to a predetermined pressure. The pressure control unit 19c receives a signal related to the execution of the etching resistant layer forming process and a signal related to the execution of the etching process from the control device 22, respectively, and changes the pressure in the processing chamber 11 of the etching resistant layer forming process. The pressure corresponds to each of the execution time and the execution time of the etching process.

The gas supply device 20, the process gas (hereinafter, simply referred to as "SF ₆ gas") for etching mainly composed of SF ₆ gas and the process for etching-resistant layer forming mainly composed of C ₄ F ₈ gas Gas (hereinafter simply referred to as “C ₄ F ₈ gas”), a supply unit 20a for supplying the gas while adjusting the flow rate, and a supply pipe 20b connecting the supply unit 20a and the center of the ceiling of the upper container 13; And a flow rate control unit 20c that controls the flow rates of SF ₆ gas and C ₄ F ₈ gas supplied from the supply unit 20a into the upper container 13. The flow rate control unit 20c receives a signal related to the execution of the etching resistant layer forming process and a signal related to the execution of the etching process from the control device 22, respectively, and supplies the supply flow rates of SF ₆ gas and C ₄ F ₈ gas, The supply flow rate is set to correspond to the time when the etching-resistant layer forming process is performed and the time when the etching process is performed (see FIG. 4).

  The antenna 31 is formed in an annular shape, and is arranged in parallel up and down around the upper container 13. The first high-frequency power source 32 applies a high-frequency power to the antenna 31 to form a magnetic field in the upper container 13 and converts the processing gas in the upper container 13 into plasma by an electric field induced by the magnetic field. The second high frequency power source 21 applies a high frequency power to the base 15 to generate a potential difference (bias potential) between the base 15 and the plasma.

  The first matching device 33 includes a first variable capacitor 34 that is a variable impedance element, one end of which is connected to a circuit 33a that connects the antenna 31 and the first high-frequency power source 32, and the other end is grounded. The second variable capacitor 35, which is a variable impedance element, disposed on the circuit 33a on the antenna 31 side with respect to the connection portion with the capacitor 34, and the circuit on the first high frequency power supply 32 side with respect to the connection portion with the first variable capacitor 34. 33, a detector 36 for detecting a phase difference between current and voltage, and capacitances of the first variable capacitor 34 and the second variable capacitor 35 at the start of an etching process and an etching resistant layer forming process described later. As the first set value storage unit 37 for storing the set values set in advance, the phase difference detected by the detector 36, and the first set value Based on the stored set values 憶部 37 consists of a first matching control unit 38. for adjusting the electrostatic capacitance of the first variable capacitor 34 and the second variable capacitor 35.

  Each of the variable capacitors 34 and 35 includes a fixed electrode and a movable electrode, and a drive motor that drives the movable electrode to change the facing area between the movable electrode and the fixed electrode. The capacitance is adjusted by adjusting the area.

  In the first set value storage unit 37, for example, a certain time has elapsed after the process is switched (the processing gas in the processing chamber 11 is substantially replaced, the pressure in the processing chamber 11 is substantially stabilized, the plasma is Of the first variable capacitor 34 and the second variable capacitor 35 when the impedance change of the antenna 31 is substantially stable, and is obtained, for example, empirically. The stored capacitance (set value) is stored.

  The first matching control unit 38 adjusts the capacitances of the variable capacitors 34 and 35 based on the phase difference between the current and voltage detected by the detector 36 so that these phase differences are eliminated. A first process (automatic matching process) for making the combined impedance on the load side including the variable capacitors 34, 35, the detector 36, the antenna 31 and the like equal to the impedance on the first high-frequency power source 32 side by adjusting the impedance of At the start of the etching process and the etching resistant layer forming process, the first process is temporarily stopped, and the capacitances of the variable capacitors 34 and 35 are adjusted to the set values stored in the first set value storage unit 37. Two processes, the second process, are executed.

  Specifically, a series of processes as shown in FIGS. 2 and 3 are sequentially performed to execute the first process and the second process. The first alignment control unit 38 receives a signal indicating that a series of etching processes for the silicon substrate K has been started from the control device 22, starts a series of processes, and first starts the first process (step S1).

  Thereafter, the first process is continued until the start signal of the etching resistant layer forming process is received from the control device 22 (step S2). When the start signal is received, the first set value storage unit 37 stores the received first signal. After recognizing the set value at the start of the etching resistant layer forming process (step S3), the first process is stopped and the second process is started (step S4).

  In step S5, it is confirmed whether or not the capacitance of each variable capacitor 34, 35 has reached the set value recognized in step S3. When the set value is confirmed, the second process is terminated. The first process is resumed (step S6).

  Thereafter, the first process is continued until an etching process start signal is received from the control device 22 (step S7). When the start signal is received, the etching process stored in the first set value storage unit 37 is performed. After recognizing the set value at the start (step S8), the first process is stopped and the second process is started (step S9).

  In step S10, it is confirmed whether or not the capacitance of each variable capacitor 34, 35 has reached the set value recognized in step S8. When it is confirmed that the set value has been reached, the second process is terminated. The first process is resumed (step S11). In step 12, it is determined whether or not the process is completed depending on whether a signal indicating that a series of etching processes on the silicon substrate K is completed from the control device 22, and the processes in and after step 2 are performed until it is determined that the process is completed. Repeat this step.

  Since the impedance of the antenna 31 changes gently during the first process resumed in step S6 and step S11, the capacitances of the variable capacitors 34 and 35 are adjusted accordingly.

  The second matching device 40 includes a first variable capacitor 41, which is a variable impedance element, one end of which is connected to the circuit 40a connecting the base 15 and the second high-frequency power source 21, and the other end is grounded. A second variable capacitor 42, which is a variable impedance element, is disposed on the circuit 40a on the base 15 side of the connection portion with the variable capacitor 41, and is disposed on the circuit 40a on the base 15 side of the second variable capacitor 42. A detector 44 for detecting a phase difference between a current and a voltage, which is disposed on the circuit 40a on the second high-frequency power source 21 side from the connection portion between the coil 43 serving as a fixed impedance element and the first variable capacitor 41; The capacitances of the first variable capacitor 41 and the second variable capacitor 42 are set in advance at the start of an etching process and an etching resistant layer forming process which will be described later. Based on the second set value storage unit 45 that stores the set values, the phase difference detected by the detector 44, and the set values stored in the second set value storage unit 45, the first variable capacitor 41 and the first 2 includes a second matching control unit 46 that adjusts the capacitance of the variable capacitor 42.

  Each of the variable capacitors 41 and 42 includes a fixed electrode and a movable electrode, and a drive motor that drives the movable electrode to change the facing area between the movable electrode and the fixed electrode. The capacitance is adjusted by adjusting the area.

  In the second set value storage unit 45, for example, a first time when a certain time has passed since the process was switched (plasma generation state is substantially stabilized) and the impedance change of the base 15 is substantially stabilized. The capacitance (setting value) of the variable capacitor 41 and the second variable capacitor 42, for example, the capacitance (setting value) obtained empirically is stored.

  Based on the phase difference between the current and voltage detected by the detector 44, the second matching control unit 46 adjusts the capacitance of each variable capacitor 41, 42 so that these phase differences are eliminated. By adjusting the impedance of the first processing (automatically), the combined impedance on the load side including the variable capacitors 41, 42, the coil 43, the detector 44, the base 15 and the like is made equal to the impedance on the second high-frequency power source 21 side. The first process is temporarily stopped at the start of the matching process and the etching process and the etching resistant layer forming process, and the capacitances of the variable capacitors 41 and 42 are stored in the second set value storage unit 45. Two processes, the second process that matches the set value, are executed.

  Specifically, the first process and the second process are performed by performing the same process as the first matching control unit 38 (see FIGS. 2 and 3). The second alignment control unit 46 receives a signal indicating that a series of etching processes for the silicon substrate K has been started from the control device 22, starts a series of processes, and first starts the first process (step S1).

  Thereafter, the first process is continued until the start signal of the etching resistant layer forming process is received from the control device 22 (step S2). When the start signal is received, the first set value is stored in the second set value storage unit 45. After recognizing the set value at the start of the etching resistant layer forming process (step S3), the first process is stopped and the second process is started (step S4).

  In step S5, it is confirmed whether or not the capacitance of each of the variable capacitors 41, 42 has reached the set value recognized in step S3. When the set value is confirmed, the second process is terminated. The first process is resumed (step S6).

  Thereafter, the first process is continued until an etching process start signal is received from the control device 22 (step S7). When the start signal is received, the etching process stored in the second set value storage unit 45 is performed. After recognizing the set value at the start (step S8), the first process is stopped and the second process is started (step S9).

  In step S10, it is confirmed whether or not the capacitance of each of the variable capacitors 41, 42 has reached the set value recognized in step S8. When the set value is confirmed, the second process is terminated. The first process is resumed (step S11). In step 12, it is determined whether or not the process is completed depending on whether a signal indicating that a series of etching processes on the silicon substrate K is completed from the control device 22, and the processes in and after step 2 are performed until it is determined that the process is completed. Repeat this step.

  Since the impedance of the base 15 changes gently during the first process resumed in step S6 or step S11, the capacitances of the variable capacitors 41 and 42 are adjusted accordingly.

As shown in FIG. 4, the control device 22 supplies an etching resistant layer forming step D for forming an etching resistant layer on the silicon substrate K by supplying C ₄ F ₈ gas from the gas supply device 20 into the upper container 13; The etching process E in which the SF ₆ gas is supplied from the gas supply device 20 into the upper container 13 and the silicon substrate K is etched is alternately and repeatedly executed for each predetermined time. In the etching resistant layer forming step D, a signal related to the execution of the etching resistant layer forming step D is transmitted to the flow rate control unit 20c, and under the control of the flow rate control unit 20c, C ₄ F ₈ gas at a predetermined flow rate is processed into the processing chamber. 11, and in the etching process E, a signal related to the execution of the etching process E is transmitted to the flow rate control unit 20 c, and under the control of the flow rate control unit 20 c, a predetermined flow rate of SF ₆ gas is supplied into the processing chamber 11. To supply.

  In addition, the control device 22 applies high-frequency power to the antenna 31 and the base 15 by the first high-frequency power source 32 and the second high-frequency power source 21 in each of the etching resistant layer forming step D and the etching step E, respectively. Further, a signal related to the execution of the etching resistant layer forming step D and a signal related to the execution of the etching step E are transmitted to the pressure control unit 19c of the exhaust device 19, and the process chamber 11 is controlled under the control of the pressure control unit 19c. To a predetermined pressure.

  Further, when the control device 22 starts a series of etching processes for the silicon substrate K, the control device 22 sends a signal to that effect to the first matching control unit 38 and the second matching control unit 46 and starts the etching resistant layer forming process. When the start signal of the layer forming process is sent to the first matching control unit 38 and the second matching control unit 46 and the etching process is started, the start signal of the etching process is sent to the first matching control unit 38 and the second matching control unit 46. When a series of etching processes on the substrate K is completed, a signal to that effect is transmitted to the first alignment control unit 38 and the second alignment control unit 46.

  According to the etching apparatus 1 of the present example configured as described above, after the silicon substrate K is appropriately placed on the base 15 in the lower container 12 of the processing chamber 11, under the control of the control apparatus 22, Starting from the etching resistant layer forming step, the etching resistant layer forming step and the etching step are alternately repeated to etch the silicon substrate K.

In the etching resistant layer forming step, C ₄ F ₈ gas is supplied from the gas supply device 20 into the upper container 13 of the processing chamber 11, and the gas in the processing chamber 11 is exhausted from the lower container 12 side by the exhaust device 19. The high frequency power is applied to the antenna 31 and the base 15 by the first high frequency power source 32 and the second high frequency power source 21, respectively. When high frequency power is applied to the antenna 31, a magnetic field is formed in the upper container 13, and the supplied C ₄ F ₈ gas is converted into plasma containing ions, electrons, radicals, and the like by an electric field induced by this magnetic field. The Then, a polymer is generated from the radicals and deposited on the surface of the silicon substrate K (such as grooves formed by etching, sidewalls and bottom surfaces of holes), and an etching resistant layer (fluorocarbon film) that does not react with F radicals is formed. The

On the other hand, in the etching process, SF ₆ gas is supplied from the gas supply device 20 into the upper container 13 of the processing chamber 11, and the gas in the processing chamber 11 is exhausted from the lower container 12 side by the exhaust device 19. High frequency power is applied to the antenna 31 and the base 15 by the high frequency power supply 32 and the second high frequency power supply 21, respectively. The supplied SF ₆ gas is changed to plasma containing ions, electrons, F radicals, and the like by the electric field, and the silicon substrate K is etched by F radicals and ions that move and collide with the bias potential, and have a predetermined width and Grooves and holes with depth are formed.

  When the etching resistant layer forming process and the etching process are alternately repeated, the etching resistant layer is removed and etched at the bottom of the groove and the hole where the ion irradiation is frequently performed in the etching process. In the side walls of few grooves and holes, the etching resistance layer prevents the etching of the side walls, and the etching resistance layer is formed again on the bottom surface and the side walls in the etching resistance layer forming step. Thus, etching proceeds in the depth direction while the sidewalls of the holes and grooves are protected by the etching resistant layer.

  During the execution of each step, the first matching control unit 38 normally executes the first process, and the variable capacitors 34 and 35 are based on the phase difference between the current and the voltage detected by the detector 36. Is adjusted at any time, and the combined impedance on the load side including the variable capacitors 34, 35, the detector 36, the antenna 31 and the like is made equal to the impedance on the first high frequency power supply 32 side.

  In addition, the second matching control unit 46 normally executes the first process, and the capacitances of the variable capacitors 41 and 42 are changed as needed based on the phase difference between the current and voltage detected by the detector 44. Thus, the combined impedance on the load side including the variable capacitors 41 and 42, the coil 43, the detector 44, the base 15 and the like is made equal to the impedance on the second high-frequency power source 21 side.

  However, at the start of each process (at the time of switching each process), a process start signal is transmitted from the control device 22 to the first alignment control unit 38 and the second alignment control unit 46, which are transmitted to the first alignment control unit 38 and the second alignment control unit 38. When received by the two matching control unit 46, the first process is temporarily stopped and the second process is executed. That is, regardless of the phase difference between the current and voltage detected by the detector 36, the capacitance of each of the variable capacitors 34 and 35 is set to the set value stored in the first set value storage unit 37. Regardless of the phase difference between the current and voltage detected by the device 44, the capacitance of each of the variable capacitors 41 and 42 is set as the set value stored in the second set value storage unit 45.

  As described above, according to the etching apparatus 1 of the present example, at the start of each process, the first matching control unit 38 temporarily stops the first process, and the capacitances of the variable capacitors 34 and 35 are set to the first. By executing the second processing to match the set value stored in the set value storage unit 37, each variable capacitor 34 is not affected by the impedance of the antenna 31 that is unstable and complicatedly changed after the start of each process. , 35 can be set as the set value. This makes it possible to quickly stabilize the capacitances of the variable capacitors 34 and 35 and perform matching in a short time, and supply sufficient high-frequency power to the antenna 31 in a short time after the start of each process. The generation state of can be stabilized. Therefore, in each step, the silicon substrate K can be sufficiently etched and the etching resistant layer can be sufficiently formed, and the etching rate can be increased and the accuracy of the etching shape can be increased.

  In addition, since the alignment state can be obtained in a short time, it becomes possible to switch each process in a short time by shortening each processing time of the etching process and the etching resistant layer forming process, and switching each process in a short time. Thus, the unevenness formed on the sidewalls of the holes and grooves by etching can be reduced, and the sidewall shape can be improved.

  By the way, since the impedance of the base 15 is affected by the plasma generation state, it greatly changes when the process is switched and the plasma generation state fluctuates. In addition, a certain time is required until the plasma generation state is stabilized after the process is switched, and during that time, the impedance of the base 15 is unstable and changes in a complicated manner. For this reason, even if the capacitances of the variable capacitors 41 and 42 are adjusted by driving the drive motor in accordance with the impedance change of the base 15 which is unstable and changes in a complicated manner, there is a delay in tracking the capacitance adjustment. It is not possible to eliminate the unstable state of the impedance on the load side, and it takes a long time to reach the matching state. Until the matching state is reached, the reflected power is large and sufficient high-frequency power cannot be supplied to the base 15, so that a sufficient bias potential cannot be generated or the generated bias potential becomes unstable. As a result, the incident amount of ions is not constant, etching to the silicon substrate K and removal of the etching resistant layer become non-uniform, and radicals are hardly attracted to the silicon substrate K side, so that the etching resistant layer is efficiently formed. The problem is that the etching cannot be performed, the formation of the etching resistant layer is not uniform, the etching rate is lowered, the accuracy of the etching shape is lowered, and a discharge occurs between the plasma and the silicon substrate K, which causes the silicon substrate. Was causing the problem of damage.

  Therefore, as described above, at the start of each process, the second matching control unit 46 temporarily stops the first process, and the capacitances of the variable capacitors 41 and 42 are stored in the second set value storage unit 45. If the second process is performed to match the set value, the capacitances of the variable capacitors 41 and 42 are not affected by the impedance of the base 15 that is unstable and changes in a complicated manner after the start of each process. The set value can be used. This makes it possible to quickly stabilize the capacitances of the variable capacitors 41 and 42 and perform matching in a short time, and supply sufficient high-frequency power to the base 15 in a short time after the start of each process. And a stable bias potential can be generated. Therefore, the etching of the silicon substrate K, the removal of the etching resistant layer, the formation of the etching resistant layer can be sufficiently performed, the etching resistant layer can be formed efficiently, the etching rate can be increased, and the etching shape accuracy can be increased. Can be increased. Further, it is possible to prevent discharge from occurring between the plasma and the silicon substrate K, thereby preventing the silicon substrate K from being damaged.

  As mentioned above, although one Embodiment of this invention was described, the specific aspect which this invention can take is not limited to this at all.

  In the above example, the setting value storage units 37 and 45 and the matching control units 38 and 46 of the matching devices 33 and 40 are separated from the control device 22, but the present invention is not limited to this. You may comprise so that it may provide in. Even in this case, the matching control units 38 and 46 are supplied from the phase difference detected by the detectors 36 and 44, the set values stored in the set value storage units 37 and 45, and the appropriate control units in the control device 22. The capacitances of the first variable capacitors 34 and 41 and the second variable capacitors 35 and 42 are adjusted based on the transmitted start signal of the etching resistant layer forming process and the start signal of the etching process.

In the above example, the variable capacitors 34, 35, 41, and 42 are employed as the variable impedance elements. However, the present invention is not limited to this, and for example, a variable coil (inductor) may be employed. In addition, the processing gas for etching mainly contains SF ₆ gas as the main component, and the processing gas for forming the etching resistant layer includes C ₄ F ₈ gas as the main component, but the present invention is not limited thereto. For example, oxygen gas may be employed as the processing gas for forming the etching resistant layer. When oxygen gas is employed, an oxide film serving as an etching resistant layer is formed on the bottom and side walls of the holes and grooves of the silicon substrate K.

  In the above example, the high frequency power is applied to the base 15 by the second high frequency power source 21 during the execution of the etching process and the etching resistant layer forming process. However, the present invention is not limited to this. You may comprise so that high frequency electric power may be applied to the base 15 only at the time of execution of an etching process.

  In this case, the control device 22 applies high-frequency power to the base 15 by the second high-frequency power source 21 only in the etching process, and at the start of the etching resistant layer forming process, the start signal of the etching resistant layer forming process is second matched. It is configured not to transmit to the control unit 46.

  Further, the second matching control unit 46, based on the phase difference between the current and the voltage detected by the detector 44 during the execution of the etching process, eliminates the phase difference between the variable capacitors 41, 42. By adjusting these impedances by adjusting the capacitance of the load, the combined impedance on the load side including each of the variable capacitors 41, 42, the coil 43, the detector 44, the base 15 and the like is changed to the second high frequency power supply 21 side. At the start of the first process (automatic matching process) for equalizing the impedance and the etching process, the first process is temporarily stopped, and the capacitances of the variable capacitors 41 and 42 are stored in the second set value storage unit 45. Two processes, the second process to match the stored set value, are executed.

  Specifically, a series of processes as shown in FIG. 5 are sequentially performed to execute the first process and the second process. The second alignment control unit 46 receives a signal indicating that a series of etching processes for the silicon substrate K has been started from the control device 22, starts a series of processes, and first starts the first process (step S21).

  Thereafter, the first process is continued until an etching process start signal is received from the control device 22 (step S22). When the start signal is received, the etching process stored in the second set value storage unit 45 is performed. After recognizing the set value at the start (step S23), the first process is stopped and the second process is started (step S24).

  In step S25, it is confirmed whether or not the capacitance of each of the variable capacitors 41, 42 has reached the set value recognized in step S23. When the set value is confirmed, the second process is terminated. The first process is resumed (step S26). In step 27, it is determined whether or not the process is completed depending on whether a signal indicating that a series of etching processes on the silicon substrate K has been completed is received from the control device 22, and the processes in and after step 22 are performed until it is determined that the process is completed. Repeat this step.

  During the first process restarted in step S26, the impedance of the base 15 changes gently, and the capacitance of each variable capacitor 41, 42 is adjusted accordingly.

  In addition, when high frequency power is applied to the base 15 by the second high frequency power source 21 only during the execution of the etching resistant layer forming step, the second matching device 40 is configured in the same manner as described above, and The first process may be temporarily stopped at the start of the etching layer forming process, and the second process may be executed.

  In the above example, the inductively coupled plasma excitation source including the annular antenna 31 disposed outside the processing chamber 11 is taken as an example of the plasma excitation source. However, the present invention is not limited to this. Various types such as the capacitively coupled plasma excitation source 50 shown in FIG. 6 and the plasma excitation source 55 using helicon waves shown in FIG. 7 can be adopted. In addition to the above configuration, the inductively coupled plasma excitation source 31 is arranged in a spiral or spiral antenna (coil) disposed outside the processing chamber 11 or in the processing chamber 11 although not particularly illustrated. It may be provided with an annular antenna (coil).

  In the plasma excitation source 50 shown in FIG. 6, two plate electrodes 51 and 52 are arranged in parallel at a predetermined interval in the processing chamber 11, one electrode 51 is grounded, and the other electrode 52 has a high frequency. It is comprised so that electric power may be applied. When high frequency power is applied to the other electrode 52, an electric field is formed between the electrodes 51 and 52, and the processing gas supplied into the processing chamber 11 is turned into plasma by this electric field. In addition, a bias potential is generated between the other electrode 52 and the plasma. The silicon substrate K is placed on the other electrode 52. Reference numeral 53 denotes a capacitor. In addition, the same components as those of the etching apparatus 1 are denoted by the same reference numerals.

  The plasma excitation source 55 shown in FIG. 7 includes an antenna 56 wound around the outer peripheral portion of the upper container 13 made of a quartz tube or the like, and a magnetic field forming coil 57 provided on the outer peripheral side of the antenna 56. The high frequency power is configured to be applied. When high frequency power is applied to the antenna 56, an electric field is formed in the processing chamber 11, and the formed electric field excites a helicon wave propagating clockwise in parallel with the magnetic field. The processing gas supplied into the chamber 11 is turned into plasma. Reference numeral 58 denotes a permanent magnet provided on the outer periphery of the lower container 12 in order to suppress the loss of plasma. In addition, the same components as those of the etching apparatus 1 are denoted by the same reference numerals.

It is sectional drawing which showed the schematic structure of the etching apparatus which concerns on one Embodiment of this invention with a partial block diagram. It is the flowchart which showed a series of processes in the 1st matching control part of this embodiment. It is the flowchart which showed a series of processes in the 1st matching control part of this embodiment. Is a timing chart showing the control state of the supply flow rate of C ₄ F ₈ gas and SF ₆ gas in the present embodiment. It is the flowchart which showed a series of processes in the 2nd matching control part of other embodiment of this invention. It is sectional drawing which showed schematic structure, such as a plasma excitation source which concerns on other embodiment of this invention. It is sectional drawing which showed schematic structure, such as a plasma excitation source which concerns on other embodiment of this invention. It is sectional drawing for demonstrating the side wall shape of the groove | channel and hole formed by an etching.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Etching apparatus 11 Processing chamber 15 Base 19 Exhaust apparatus 20 Gas supply apparatus 21 2nd high frequency power supply 22 Control apparatus 31 Antenna 32 1st high frequency power supply 33 1st matching apparatus 34 1st variable capacitor 35 2nd variable capacitor 36 Detector 37 First setting value storage unit 38 First matching control unit 40 Second matching device 41 First variable capacitor 42 Second variable capacitor 43 Coil 44 Detector 45 Second setting value storage unit 46 Second matching control unit K Silicon substrate

Claims (2)

A processing chamber having a closed space in which a silicon substrate is disposed;
Gas supply means for supplying at least two processing gases into the processing chamber, a processing gas mainly containing an etching gas and a processing gas mainly containing an etching-resistant layer forming gas;
Plasma excitation means for converting the processing gas supplied into the processing chamber by the gas supply means into plasma;
First power supply means for applying high-frequency power to the plasma excitation means;
At least one variable impedance element connected between the plasma excitation means and the first power supply means, and a combined impedance on the load side including the variable impedance element and the plasma excitation means are on the first power supply means side. A first matching means comprising a matching control unit for performing an automatic matching process for adjusting the impedance of the variable impedance element to be equal to the impedance;
A control means for controlling the operation of the gas supply means and the first power supply means,
The control means includes: an etching process for supplying a processing gas containing the etching gas as a main component into the processing chamber from the gas supply means to etch the silicon substrate; and an etching resistant layer forming gas from the gas supply means. Etching configured to alternately and repeatedly execute at least two steps of an etching resistant layer forming step of forming an etching resistant layer on the silicon substrate by supplying a processing gas mainly composed of A device,
The control means transmits an etching process start signal to the alignment control unit at the start of the etching process, and transmits an etching resistant layer formation process start signal to the alignment control unit at the start of the etching resistant layer formation process. Configured as
When the matching control unit receives the etching process start signal from the control unit, the matching control unit temporarily stops the automatic matching process, and determines the impedance of the variable impedance element to be the impedance of the variable impedance element at the start of the etching process. As the process of adjusting to a preset set value is performed, and when the start signal of the etching resistant layer forming process is received from the control means, the automatic matching process is temporarily stopped, and the impedance of the variable impedance element is An etching apparatus configured to execute a process that matches a preset value as the impedance of the variable impedance element at the start of the etching resistant layer forming process. A base disposed on the lower side in the processing chamber and on which a silicon substrate is placed;
Second power supply means for applying high frequency power to the base;
At least one variable impedance element connected between the base and the second power supply means, and a combined impedance on the load side including the variable impedance element and the base is an impedance on the second power supply means side. And a second matching means including a matching control unit that performs an automatic matching process for adjusting the impedance of the variable impedance element to be equal,
The control means applies high frequency power to the base by the second power supply means during execution of the etching step and / or etching resistant layer forming step, and also includes a start signal of the etching step and / or an etching resistant layer. A forming process start signal is also transmitted to the matching control unit of the second matching means;
The matching control unit of the second matching unit, like the matching control unit of the first matching unit, receives the etching process start signal from the control unit, temporarily stops the automatic matching process, and the variable impedance When the process of matching the impedance of the element with a preset value set as the impedance of the variable impedance element at the start of the etching process is received, and when the start signal of the etching resistant layer forming process is received from the control means, the automatic The matching process is temporarily stopped, and the process is performed to match the impedance of the variable impedance element to a preset value set as the impedance of the variable impedance element at the start of the etching resistant layer forming process. The etching apparatus according to claim 1, wherein .

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