JP2008052723A5

JP2008052723A5 -

Info

Publication number: JP2008052723A5
Application number: JP2007192942A
Authority: JP
Filing date: 2007-07-25
Publication date: 2010-09-02
Anticipated expiration: 2027-07-25

Claims

An arithmetic processing circuit comprising an arithmetic circuit and a control circuit;
A memory circuit including a ROM and a RAM;
The arithmetic processing circuit and the memory circuit are connected via an address bus and a data bus,
The ROM is a machine language program to be executed using the arithmetic processing circuit is stored,
The RAM has a plurality of banks,
In the machine language program, a high-level language program is decomposed into token strings, a syntax tree is created from the token strings, the syntax tree is converted into an intermediate language, the intermediate language is converted into an execution code, and the execution code is converted into an execution code. The execution code is converted using the analyzed analysis result,
The processing data when the machine language program is executed is divided into a plurality of stacks ,
Wherein the plurality of stacks which are not read out until the end the machine language program of the stack is dispensed, and the stack of writing has been continuously out of the plurality of stacks are written in any one of the banks of the plurality of banks Turkey And a semiconductor device.

An arithmetic processing circuit comprising an arithmetic circuit and a control circuit;
A memory circuit comprising a ROM and a RAM;
And a program conversion means for converting a high-level language program into a machine language program,
The arithmetic processing circuit and the memory circuit are connected via an address bus and a data bus,
The ROM stores the machine language program to be executed using the arithmetic processing circuit,
The RAM has a plurality of banks,
The program conversion means includes a lexical analysis means for decomposing the high-level language program into token strings, a syntax analysis means for analyzing the token strings to create a syntax tree, and a semantic analysis means for converting the syntax tree into an intermediate language. A code generation unit that converts the intermediate language into an execution code, a stack analysis unit that analyzes the execution code and creates an analysis result, and converts the execution code using the analysis result and converts the execution code Optimizing means for outputting an execution code as the machine language program,
The optimization means converts the execution code so as to omit a stack that is not read until the end of the machine language program and to write a plurality of consecutively written stacks to any one of the plurality of banks. A semiconductor device characterized by the above.

In claim 1 or claim 2,
The arithmetic processing circuit outputs an address bus signal to the memory circuit via the address bus, and reads a startup routine from the ROM as a data bus signal via the data bus,
The semiconductor device according to claim 1, wherein the arithmetic circuit executes the startup routine and sets a stack pointer for storing the processing data in accordance with the startup routine.

In claim 3,
The semiconductor device according to claim 1, wherein the startup routine is executed before the machine language program is executed.

An arithmetic processing circuit comprising an arithmetic circuit and a control circuit;
A memory circuit including a ROM and a RAM;
The arithmetic processing circuit and the memory circuit are connected via an address bus and a data bus,
The ROM stores a machine language program to be executed using the arithmetic processing circuit,
The RAM has a plurality of banks,
The machine language program decomposes the high-level language program into token sequences, creates a syntax tree from the token sequence, converts the syntax tree into an intermediate language, converts the intermediate language into an execution code, and converts the execution code into an execution code. The execution code is converted using the analyzed analysis result,
Processing data at the time of executing the machine language program into a plurality of stacks,
A stack that is not read out until the end of the machine language program of the plurality of stacks can save, and, to be non-write the continuous stack to any one of the bank of the plurality of banks writing of the plurality of stack A method for driving a semiconductor device.

In claim 5,
The arithmetic processing circuit outputs an address bus signal to the memory circuit via the address bus, and reads a startup routine from the ROM as a data bus signal via the data bus,
A method of driving a semiconductor device, wherein the arithmetic circuit executes the startup routine and sets a stack pointer for storing the processing data in accordance with the startup routine.

In claim 6,
The method of driving a semiconductor device, wherein the startup routine is executed before the machine language program is executed.