JP2008042677A - Photoelectric conversion apparatus and imaging apparatus - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To suppress a deterioration in image quality due to a variance in characteristics between pixels when strong light is made incident. <P>SOLUTION: A readout circuit 200 reads out a pixel signal from a pixel by a method determined based on a difference in a first potential and a second potential read out from the pixel. The first potential is a potential that is read out from the pixel while resetting a charge/voltage converting section. The second potential is a potential that is read out from the pixel after resetting of the charge/voltage converting section is canceled and before a transfer gate is activated. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to a photoelectric conversion device and an imaging device.

  In recent years, solid-state imaging devices using amplification type photoelectric conversion devices, particularly MOS-type solid-state imaging devices, have attracted attention. In the MOS type solid-state imaging device, when very strong light is incident on the imaging surface as in the case where the sun is present within the angle of view, a phenomenon in which the incident portion of the strong light appears black may occur. This phenomenon is called a high-luminance black sun, black sun, or blackening phenomenon. Here, this phenomenon is called “black sun”.

  Black sun is seen in a CDS (Correlated Double Sampling) system in which an S output (data level) and an N output (noise level) are read from a pixel, and the difference between the two is calculated and output. If high-intensity light is incident when the N output is read, the charge generated thereby enters the floating diffusion portion and lowers the potential of the floating diffusion portion. In response to this, the N output output from the pixel decreases. When this decrease becomes excessive, the difference between the S output and the N output becomes extremely small, and black sun is generated.

Patent Document 1 describes a technique for performing a difference operation with respect to a data level by replacing a noise level with a reset power supply potential when the noise level exceeds a certain threshold (when darkening may occur). . With this technology, black sun can be suppressed.
JP 2004-112740 A

  In the technique described in Patent Document 1, when strong light such as sunlight is incident, a pixel signal is generated based on a difference between a data level and a reset level. Will appear.

  The present invention has been made with the above problem recognition as an opportunity, and for example, an object of the present invention is to suppress deterioration in image quality due to variation in characteristics between pixels when strong light is incident.

  A first aspect of the present invention relates to a photoelectric conversion device, wherein the photoelectric conversion device reads out a pixel signal from the pixel via a pixel, a pixel output line driven by the pixel, and the pixel output line. Circuit. The pixel includes a photoelectric conversion unit, a charge voltage conversion unit, a transfer gate that is activated to transfer the charge of the photoelectric conversion unit to the charge voltage conversion unit, a reset unit that resets the charge voltage conversion unit, and An amplifier that drives the pixel output line based on the potential of the charge-voltage converter; The readout circuit reads the first potential read from the pixel to the readout circuit during the reset of the charge-voltage conversion unit and the readout from the pixel after the reset of the charge-voltage conversion unit is released and before the transfer gate is activated. A pixel signal is read out from the pixel by a method determined based on a difference from the second potential read out to the circuit.

  According to the present invention, for example, it is possible to suppress deterioration in image quality due to characteristic variation between pixels when strong light is incident.

  FIG. 1 is a diagram illustrating a configuration of a photoelectric conversion device (solid-state imaging device) according to a first embodiment of the present invention. A photoelectric conversion device (solid-state imaging device) 100 as shown in FIG. 1 can also be called an amplification-type solid-state imaging device or an amplification-type MOS sensor. The photoelectric conversion device 100 includes a plurality of pixels 101 arranged in a one-dimensional shape or a two-dimensional shape. The pixel 101 drives the pixel output line 130 in accordance with incident light. The pixel 101 can include, for example, a photoelectric conversion unit 102, a transfer gate 103, a charge-voltage conversion unit 104, an amplification transistor (amplification unit) 105, and a reset transistor (reset unit) 106, but is not limited thereto. The photoelectric conversion unit 102 includes, for example, a photodiode, and generates charges upon receiving light. The transfer gate 103 is activated according to the activation of the transfer pulse ptx, and transfers the charge generated in the photoelectric conversion unit 102 to the charge-voltage conversion unit 104. In general, the charge-voltage converter 104 can be configured as a floating diffusion. The potential of the charge-voltage converter 104 is determined by the amount of charge transferred to it. Therefore, the charge-voltage conversion unit 104 can be grasped as an element that converts the amount of charge into a potential. The amplification transistor 105 amplifies the charge based on the voltage of the charge voltage conversion unit 104 and outputs the amplified charge to the pixel output line 130.

  The reset transistor 106 resets the potential of the charge-voltage conversion unit 104 to a predetermined potential. The source of the reset transistor 106 is connected to the charge voltage converter 104 and the gate of the amplification transistor 105, and the drain of the reset transistor 106 is connected to the drain line VD together with the drain of the amplification transistor 105.

  In FIG. 1, for convenience of explanation, the arrangement of the pixels 101 is simplified as an arrangement of 2 rows × 2 columns. Further, in FIG. 1, as an example, an upper readout circuit is illustrated in a photoelectric conversion device in which a signal of an odd-numbered pixel is read by a lower readout circuit and a signal of an even-numbered pixel is read by an upper readout circuit. It is omitted.

  A signal output on the pixel output line 130 is read by the reading circuit 200 arranged in each column. The pixel signal read by the read circuit 200 is provided to the differential amplifier 120 under the control of the horizontal scanning circuit 119.

  FIG. 2 is a diagram illustrating a configuration example of the read circuit 200 illustrated in FIG. A column amplifier 401 is connected to the pixel output line 130 via an input capacitor 412. The column amplifier 401 amplifies the signal on the pixel signal line 130 with an inversion gain determined by the ratio between the input capacitor 8 and the feedback capacitor 9.

  The transfer transistor 403 transfers a reset noise level VNR (= vn), which is a noise level during reset of the charge-voltage converter 104, to the capacitor 405 in accordance with the activation of the transfer pulse ptn. Here, the reset noise level VNR (= vn) is a potential (first potential) read from the pixel 101 to the readout circuit 200 during the reset of the charge-voltage conversion unit 104 of the pixel 101 to be read. The transfer transistor 404 transfers the data level VS to the capacitor 406 in accordance with the activation of the transfer pulse pts.

  The capacitor 405 is connected to one input terminal of the comparator 411. The transfer transistor 410 transfers the reset noise level VN (= vn + vn1) to the comparator 411 to the input terminal according to the activation of the transfer pulse pSW. Here, the post-reset noise level VN is a potential (second potential) read from the pixel 101 to the readout circuit 200 after the reset of the charge-voltage conversion unit 104 of the pixel 101 to be read and before the transfer gate 103 is activated. It is.

  The switch transistor 412 is controlled by the comparison result by the comparator 412 when the transfer transistor 410 is on. Specifically, the comparison result by the comparator 412 indicates whether or not the difference between the post-reset noise level VN (first potential) and the reset noise level VNR (second potential) is less than or equal to an allowable value. The switch transistor 412 is turned on when the difference between the noise level VN after reset and the noise level VNR during reset is equal to or less than the allowable value, and turned off when the difference exceeds the allowable value. Here, as a case where the difference between the noise level VN after reset and the noise level VNR during reset exceeds an allowable value, a case where strong light is incident on the pixel 101 can be considered. When strong light is incident on the pixel, the charge enters the charge-voltage conversion unit 104 when the noise level is read, and the potential of the charge-voltage conversion unit 104 is lowered.

  When the difference between the noise level VN after reset and the noise level VNR during reset is equal to or less than the allowable value, the switch transistor 412 is turned on, so that a path through which the noise level VNR during reset is read is connected to the capacitor 405. As a result, the VNR held in the capacitor 405 is rewritten by VN.

  Therefore, the readout circuit 200 reads out the pixel signal from the pixel 101 to be read out by a method determined based on the difference between the noise level VN after reset (first potential) and the noise level during reset VNR (second potential). .

  A column selection signal CSL (m) generated by the horizontal scanning circuit 119 is provided to the gates of the switch transistors 407 and 408 of the m-th column readout circuit 200. The switch transistors 407 and 408 provide the differential amplifier 409 with the signal VN or VNR accumulated in the capacitor 405 and the signal VS accumulated in the capacitor 406 when the column selection signal CSL (m) is at a high level.

  In the photoelectric conversion device 100 of this embodiment, the row to be read is selected by controlling the potential of the gate of the amplification transistor 105. Specifically, the row selection is performed by lowering the gate potential so that the amplification transistor 105 in the non-selected row is turned off and raising the gate potential so that the amplification transistor 105 in the selected row is turned on. . The pixel output line 130 is an output node of the source follower circuit formed by the amplification transistor 190 and the constant current load 109 in the selected row. The pixel output line 130 has a potential according to the potential of the charge-voltage conversion unit 104 in the selected row. In the following description, “n” means the nth row of the photoelectric conversion device 100, and “n + 1” means the (n + 1) th row of the photoelectric conversion device 100.

  In the pixel non-selection operation period during the pixel readout period of the n-th row, the reset signals pres (0),..., Pres (n), pres (n + 1),. To the level. As a result, the charge / voltage converters 104 of all the pixels are reset to the low level via the drain line VD and the reset transistor 106. At this time, the drain line VD is at a low level.

  Subsequently, in the pixel selection operation period, the reset signal of the rows other than the selected row (n-th row) becomes low level, and the drain line VD of the selected row (n-th row) becomes high level. As a result, the charge-voltage conversion unit 104 in the selected row (nth row) is reset to a high level. Thereafter, the reset signal pres (n) of the selected row (n-th row) also becomes low level. At this time, an output corresponding to the pixel reset state (that is, N output or noise level) is read to the pixel output line 130.

  Hereinafter, the operation of the photoelectric conversion apparatus 100 shown in FIGS. 1 and 2 will be described in more detail with reference to FIG. In the following description, it is assumed that the selected row is the nth row. The signal shown in FIG. 3 can be generated by a control circuit (not shown).

  First, when the reset pulse pres (n) for resetting the charge-voltage converter 104 is at a high level, the column amplifier reset pulse pamp_res is set to a high level, and the column amplifier 401 is reset. Thereafter, the transfer pulse ptn is activated to a high level, and the reset noise level VNR is written to the capacitor 405 via the transfer transistor 403. At this time, the reset pulse pres (n) for resetting the charge-voltage converter 104 is at a high level, and the reset transistor 106 is turned on, so that the charge-voltage converter 104 is continuously reset. Therefore, even if high-intensity light is incident on the pixel 101 when the noise level VNR during reset is written in the capacitor 405, the noise level VNR during reset does not fluctuate.

  Next, while the reset pulse pres is set to the low level, the column amplifier reset pulse pamp_res is set to the high level to reset the column amplifier 402.

  Thereafter, the transfer pulse pSW is activated to a high level, and the transfer transistor 410 is turned on. Thus, the reset noise level VN is provided from the column amplifier 401 to the first input terminal of the comparator 411, and the reset noise level VNR written in the capacitor 405 is provided to the second input terminal of the comparator 411. The

  The comparator 412 outputs a logic level, in this case, a low level, that turns on the switch transistor 412 when the difference between the noise level VN after reset and the noise level VNR during reset is equal to or less than an allowable value. The comparator 412 outputs a logic level, in this case, a high level, that turns off the switch transistor 412 when the difference between the reset noise level VN and the reset noise level VNR exceeds an allowable value.

  When the switch transistor 412 is turned on, the VNR held in the capacitor 405 is rewritten by VN. That is, the noise level VN after reset is written in the capacitor 405. When the switch transistor 412 maintains the OFF state, the noise level VNR during reset written in the capacitor 405 is maintained.

  Thereafter, the transfer pulse ptx (n) of the selected row is activated to a high level. As a result, the transfer gate 103 is activated and charges are transferred from the photoelectric conversion unit 102 to the charge-voltage conversion unit 104, and a potential corresponding to the amount of incident light appears on the pixel output line 130 by the source follower operation by the amplification transistor 105. This potential is amplified by the column amplifier 401 and output as the data level VS. Thereafter, the transfer pulse pts is activated to a high level, and the data level VS is written into the capacitor 406 via the transfer transistor 404.

  Thereafter, the horizontal scanning circuit 119 sequentially turns on the plurality of column selection pulses CSL, thereby scanning a plurality of columns. For example, when the column selection pulse CSL (m) of the m-th column is set to a high level, the switch transistors 407 and 408 of the m-th column reading circuit 200 are turned on. As a result, the noise level (VN or VNR) and the data level (VS) of the m-th column are provided to the input terminal of the differential amplifier 120. The differential amplifier 120 sequentially amplifies the noise level (VN or VNR) and the data level (VS) and outputs a pixel signal. The operation in which the differential amplifier 120 differentially amplifies the noise level (VN or VNR) and the data level (VS) is called a CDS (Correlated Double Sampling) operation.

  Here, at the normal time when strong light that enters the charge-voltage converter 104 when the noise level is read does not enter the pixel, the noise level vn1 due to the entry of the charge into the charge-voltage converter 104 is zero. . Therefore, the output of the differential amplifier 120 is VS−VN = (vs + vn) − (vn + vn1) = vs.

  On the other hand, when strong light that charges into the charge-voltage converter 104 is incident on the pixel at the time of reading out the noise level, the switch transistor 412 is turned on, and the VNR held in the capacitor 405 is rewritten by VN. . Therefore, the output of the differential amplifier 120 is VS−VNR = (vs + vn) −vn = vs.

  As described above, according to this embodiment, even if strong light is locally incident on the pixel array formed of the plurality of pixels 101, the pixel in that portion is being reset as the noise level for CDS operation. A noise level VNR is used. Therefore, the black sun is effectively suppressed. Furthermore, according to this embodiment, when strong light is incident on a pixel in the pixel array, the noise level read from the pixel during resetting of the pixel is used as the noise level for CDS operation. Therefore, it is difficult to be affected by variations in transistor characteristics between pixels, and deterioration in image quality is suppressed.

  Furthermore, for example, when high-speed pixel readout is required, such as during moving image shooting, the noise level during resetting of the floating diffusion unit is always used as the noise level for CDS by omitting the period during which pSW is set to the high level. May be.

  FIG. 4 is a diagram illustrating a configuration of a photoelectric conversion device (solid-state imaging device) according to the second embodiment of the present invention. A photoelectric conversion device (solid-state imaging device) 100 ′ as shown in FIG. 4 has a readout circuit 200 replaced with 200 ′ and a differential amplifier 120 replaced with an amplifier 120 ′. Note that matters not mentioned here can follow the description of the first embodiment.

  FIG. 5 is a diagram illustrating a configuration example of the read circuit 200 ′ illustrated in FIG. Column amplifiers 601a and 601b are connected to the pixel output line 130 via input capacitors 615 and 616, respectively. The column amplifier 601a amplifies the signal on the pixel signal line 130 with an inversion gain determined by the ratio of the input capacitor 615 and the feedback capacitor 617. The column amplifier 601b amplifies the signal on the pixel signal line 130 with an inversion gain determined by the ratio between the input capacitor 616 and the feedback capacitor 618.

  The transfer transistor 603 transfers the noise level VN after the reset of the charge-voltage converter 104 is released to the capacitor 605 according to the transfer pulse ptn. The transfer transistor 604 transfers the data level VS to the capacitor 606 according to the activation of the transfer pulse pts.

  The column amplifier 601a is reset by the reset pulse pamp_res_a, and then amplifies the potential appearing on the pixel output line 130 and outputs the first difference calculation potential. The first difference calculation potential is calculated by the column amplifier 601a by calculating the difference between the potential appearing on the pixel output line 130 during reset of the charge-voltage converter 104 and the potential appearing on the pixel output line 130 after activation of the transfer gate 1-3. It is a result.

  The differential amplifier 609 calculates a difference between the data level VS written in the capacitor 606 and the noise level VN written in the capacitor 605 and outputs a second difference calculation voltage. The second difference calculation voltage is a difference between the potential appearing on the pixel output line 130 after the reset of the charge voltage conversion unit 104 and before the activation of the transfer gate 103 and the potential appearing on the pixel output line 130 after the activation of the transfer gate 130. Is a result obtained by calculating with the differential amplifier 609.

  The output of the differential amplifier 609 and the output of the column amplifier 601a are provided to the input terminal of the comparator 611. The comparator 611 compares the output of the column amplifier 601a with the output of the differential amplifier 609. The switch transistors 612 and 613 are exclusively controlled by the comparison result by the comparator 611. The comparison result by the comparator 611 indicates whether or not the difference between the output of the column amplifier 601a and the output of the differential amplifier 609 is less than or equal to an allowable value. Here, as a case where the difference between the output of the column amplifier 601 a and the output of the differential amplifier 609 exceeds an allowable value, a case where strong light is incident on the pixel 101 can be considered. When strong light is incident on the pixel, the charge enters the charge-voltage conversion unit 104 when the noise level is read, and the potential of the charge-voltage conversion unit 104 is lowered. As a result, the output of the differential amplifier 609 that calculates the difference between the data level and the noise level decreases.

  When the difference between the output of the column amplifier 601a and the output of the differential amplifier 609 is less than the allowable value, the switch transistor 612 is turned on, the switch transistor 613 is turned off, and the output of the differential amplifier 609 is sent to the amplifier 120 ′. Provided. When the difference between the output of the column amplifier 601a and the output of the differential amplifier 609 exceeds the allowable value, the switch transistor 613 is turned on, the switch transistor 612 is turned off, and the output of the column amplifier 601a is sent to the amplifier 120 ′. Provided.

  Therefore, the readout circuit 200 ′ is a pixel to be read out by a method determined based on the difference between the first difference calculation potential output from the column amplifier 601a and the second difference calculation potential output from the differential amplifier 609. A pixel signal is read from 101.

  Hereinafter, the operation of the photoelectric conversion device 100 ′ shown in FIGS. 4 and 5 will be described in more detail with reference to FIG. In the following description, it is assumed that the selected row is the nth row. The signal shown in FIG. 6 can be generated by a control circuit (not shown).

  First, the reset pulse pamp_res_a is set to a high level while the charge voltage conversion unit 104 of the pixel 101 is being reset (period in which pres is at a high level), and the column amplifier 601a is reset. After the reset is released, the column amplifier 601a outputs the first difference calculation potential vsr (= vs) obtained by amplifying the variation from the potential of the charge voltage conversion unit 104 during the reset of the charge voltage conversion unit 104.

  After the reset of the charge-voltage converter 104 is completed, the reset pulse pamp_res_b is set to the high level, and the column amplifier 601b is reset.

  Thereafter, the transfer pulse ptx (n) of the selected row is set to the high level. As a result, the transfer gate 103 is turned on and charges are transferred from the photoelectric conversion unit 102 to the charge-voltage conversion unit 104, and a potential corresponding to the amount of incident light appears on the pixel output line 130 by the source follower operation by the amplification transistor 105. This potential is amplified by the column amplifier 601b and output as the data level VS. Thereafter, the transfer pulse pts is set to the high level, and the data level VS is written to the capacitor 606 via the transfer transistor 604.

  Thereafter, the switch transistors 607 and 608 are turned on. As a result, VS (= vs + vn) held in the capacitor 606 and VN (= vn + vn1) held in the capacitor 605 are provided to the differential amplifier 609. The differential amplifier 609 outputs a second difference calculation potential (vs−vn1).

  The comparator 611 compares the first difference calculation potential vsr (= vs) output from the column amplifier 601a with the second difference calculation potential (vs−vn1) output from the differential amplifier 609. When the difference (vn1) between the first difference calculation potential vsr (= vs) and the second difference calculation potential (vs−vn1) is equal to or less than an allowable value, it is determined that no black sun has occurred, and the comparator 611 As a result, the switch transistor 612 is turned on and the 613 is turned off. On the other hand, if the difference (vn1) between the first difference calculation potential vsr (= vs) and the second difference calculation potential (vs−vn1) exceeds an allowable value, it is determined that black sun has occurred, The comparator 611 turns off the switch transistor 612 and turns on 613. In this way, the output of the column amplifier 601a or the output of the differential amplifier 609 is a pixel according to the difference (vn1) between the first difference calculation potential vsr (= vs) and the second difference calculation potential (vs−vn1). Selected as a signal.

  Thereafter, the horizontal scanning circuit 119 sequentially turns on the plurality of column selection pulses CSL, thereby scanning a plurality of columns. For example, when the column selection pulse CSL (m) of the m-th column is set to the high level, the switch transistor 619 of the readout circuit 200 ′ of the m-th column is turned on. Thereby, the pixel signal of the m-th column is provided to the amplifier 120 ′.

  As described above, according to this embodiment, even if strong light is locally incident on the pixel array including the plurality of pixels 101, the noise level is not subtracted from the data level for the pixels in that portion. Output. Therefore, black sun is suppressed. Here, for pixels that are output without subtracting the noise level from the data level, variations in the characteristics of the column amplifier 601a (for example, offset variations) may remain. However, this offset variation of the column amplifier can be corrected using the output of the optical black pixel arranged around the effective pixel.

  According to the first and second embodiments of the present invention, when locally intense light is incident on a pixel of the photoelectric conversion device, the level obtained from the pixel itself is set as the noise level of the pixel to which the intense light is incident. Since the CDS operation is performed using this, variation between pixels can be suppressed. Therefore, a low noise image can be obtained.

  FIG. 7 is a diagram illustrating a schematic configuration of an imaging apparatus according to a preferred embodiment of the present invention. The imaging device 400 includes a solid-state imaging device 1004 typified by the photoelectric conversion devices 100 and 100 ′ of the first and second embodiments.

  An optical image of the subject is formed on the imaging surface of the solid-state imaging device 1004 by the lens 1002. On the outside of the lens 1002, a barrier 1001 serving both as a protection function of the lens 002 and a main switch can be provided. The lens 1002 can be provided with a diaphragm 1003 for adjusting the amount of light emitted therefrom. The imaging signal output from the solid-state imaging device 1004 through a plurality of channels is subjected to various corrections, clamping, and the like by the imaging signal processing circuit 1005. Imaging signals output from the imaging signal processing circuit 1005 through a plurality of channels are analog-digital converted by the A / D converter 6. The image data output from the A / D converter 1006 is subjected to various corrections, data compression, and the like by the signal processing unit 1007. The solid-state imaging device 1004, the imaging signal processing circuit 1005, the A / D converter 1006, and the signal processing unit 1007 operate according to the timing signal generated by the timing generation unit 1008.

  The blocks 1005 to 1008 may be formed on the same chip as the solid-state image sensor 1004. Each block of the imaging apparatus 400 is controlled by the overall control / arithmetic unit 1009. In addition, the imaging apparatus 400 includes a memory unit 1010 for temporarily storing image data and a recording medium control interface unit 1011 for recording or reading an image on a recording medium. The recording medium 1012 includes a semiconductor memory or the like and can be attached and detached. The imaging apparatus 400 may include an external interface (I / F) unit 1013 for communicating with an external computer or the like.

  Next, the operation of the imaging apparatus 400 illustrated in FIG. 7 will be described. When the barrier 1001 is opened, the main power source, the control system power source, and the power source of the imaging system circuit such as the A / D converter 1006 are sequentially turned on. Thereafter, the overall control / calculation unit 1009 opens the aperture 1003 in order to control the exposure amount. A signal output from the solid-state imaging device 1004 passes through the imaging signal processing circuit 1005 and is provided to the A / D converter 1006. The A / D converter 1006 A / D converts the signal and outputs it to the signal processing unit 1007. The signal processing unit 1007 processes the data and provides it to the overall control / arithmetic unit 1009, and the overall control / arithmetic unit 1009 performs an operation for determining the exposure amount. The overall control / calculation unit 1009 controls the aperture based on the determined exposure amount.

  Next, the overall control / calculation unit 1009 extracts a high frequency component from the signal output from the solid-state imaging device 1004 and processed by the signal processing unit 1007, and calculates the distance to the subject based on the high frequency component. Thereafter, the lens 1002 is driven to determine whether or not it is in focus. When it is determined that the subject is not in focus, the lens 1002 is driven again to perform distance measurement.

  Then, after the in-focus state is confirmed, the main exposure starts. When the exposure is completed, the imaging signal output from the solid-state imaging device 1004 is corrected and the like in the imaging signal processing circuit 1005, A / D converted by the A / D converter 1006, and processed by the signal processing unit 1007. The image data processed by the signal processing unit 1007 is accumulated in the memory unit 1010 by the overall control / calculation 1009.

  Thereafter, the image data stored in the memory unit 1010 is recorded on the recording medium 1012 via the recording medium control I / F unit under the control of the overall control / calculation unit 9. The image data can be provided to a computer or the like through the external I / F unit 1013 and processed.

It is a figure which shows the structure of the photoelectric conversion apparatus (solid-state imaging device) of 1st Embodiment of this invention. FIG. 2 is a diagram illustrating a configuration example of a readout circuit illustrated in FIG. 1. FIG. 3 is a diagram illustrating drive pulses of the readout circuit shown in FIG. 2. It is a figure which shows the structure of the photoelectric conversion apparatus (solid-state imaging device) of 2nd Embodiment of this invention. FIG. 5 is a diagram illustrating a configuration example of a reading circuit illustrated in FIG. 4. FIG. 5 is a diagram illustrating drive pulses of the read circuit illustrated in FIG. 4. 1 is a diagram illustrating a schematic configuration of an imaging apparatus according to a preferred embodiment of the present invention.

Claims (6)

Pixels,
A pixel output line driven by the pixel;
A readout circuit that reads out a pixel signal from the pixel via the pixel output line,
The pixel includes a photoelectric conversion unit, a charge voltage conversion unit, a transfer gate that is activated to transfer the charge of the photoelectric conversion unit to the charge voltage conversion unit, a reset unit that resets the charge voltage conversion unit, and An amplifying unit that drives the pixel output line based on the potential of the charge-voltage conversion unit;
The readout circuit reads the first potential read from the pixel to the readout circuit during the reset of the charge-voltage conversion unit and the readout from the pixel after the reset of the charge-voltage conversion unit is released and before the transfer gate is activated. Reading a pixel signal from the pixel in a manner determined based on a difference from a second potential read into the circuit;
A photoelectric conversion device characterized by that. The readout circuit reads out a pixel signal from the pixel by a CDS operation using the second potential as a noise level when a difference between the first potential and the second potential is an allowable value or less;
The photoelectric conversion device according to claim 1. The readout circuit is
A capacitor for holding the first potential;
A path through which the second potential is read;
A switch transistor that connects the path to the capacitor when a difference between the first potential and the second potential is less than or equal to the allowable value;
The photoelectric conversion device according to claim 2.   The readout circuit further includes a comparator that compares the first potential with the second potential and turns on the switch transistor when a difference between the first potential and the second potential is equal to or less than the allowable value. The photoelectric doorway device according to claim 3. Pixels,
A pixel output line driven by the pixel;
A readout circuit that reads out a pixel signal from the pixel via the pixel output line,
The pixel includes a photoelectric conversion unit, a charge voltage conversion unit, a transfer gate that is activated to transfer the charge of the photoelectric conversion unit to the charge voltage conversion unit, a reset unit that resets the charge voltage conversion unit, and An amplifying unit that drives the pixel output line based on the potential of the charge-voltage conversion unit;
The read circuit includes a first difference calculation potential obtained by performing a difference calculation between a potential appearing on the pixel output line during reset of the charge-voltage conversion unit and a potential appearing on the pixel output line after activation of the transfer gate; A second difference obtained by calculating a difference between a potential appearing on the pixel output line after reset release of the charge-voltage conversion unit and before activation of the transfer gate and a potential appearing on the pixel output line after activation of the transfer gate A pixel signal is read from the pixel in a method determined based on a difference from the calculation potential.
A photoelectric conversion device characterized by that. The photoelectric conversion device according to any one of claims 1 to 5,
A processing circuit for processing a signal provided from the photoelectric conversion device;
An imaging apparatus comprising:

Images