JP2008035065A - Matching unit and antenna matching circuit - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a matching unit and an antenna matching circuit for performing circuit impedance matching in a wider range by magnifying the variable capacity range of a variable capacity diode. <P>SOLUTION: A high pass filter circuit HPF is connected to an input terminal N1, and configured to interrupt DC components included in a pulse signal PWM received from a control signal source. A pulse signal observed at an observation point MP2 after passing through the high pass filter circuit HPF, is provided with time waveform in which an "H" level set as a positive potential and an "L" level set as a negative potential are alternately repeated according to carrier frequency. A rectifier circuit RCT1 rectifies the pulse signal PWM after the DC components are interrupted by the high pass filter circuit HPF in a negative potential direction, and generates the negative potential of direct currents by boosting the peak value by three times, and applies it to the anode terminal of the variable capacity diode VD. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to a matching unit for matching circuit impedance using a variable capacitance diode and an antenna matching circuit using the same, and more particularly to a technique for expanding the variable capacitance range of the variable capacitance diode.

  In general wireless communication, impedance matching (impedance matching) is performed between an antenna and a reception circuit in accordance with the reception frequency of a wireless signal to improve reception efficiency. As one method for performing such impedance matching, a matching unit including a variable capacitance diode is disposed between the antenna element and the receiving circuit.

  Further, in a tuning circuit (tuning circuit) that extracts only a target frequency component from a radio signal including a plurality of frequency components received by an antenna element, in order to change the tuning frequency (resonance frequency) viewed from the receiving circuit. A variable capacitance diode is used.

  The variable capacitance diode is also referred to as a varicap diode or a varactor diode, and generates a capacitance according to the width of a depletion layer generated inside the variable capacitance diode. The variable capacitance diode is applied with a control voltage that becomes a reverse bias voltage, thereby changing the width of the depletion layer therein, and as a result, the capacitance is varied.

  For example, in Japanese Patent Laid-Open No. 10-336055 (Patent Document 1), an antenna having an inductance element and a tuning variable unit that sets a resonance frequency of the inductance element according to the control voltage, and a control voltage is supplied to the antenna. And an antenna tuning control device having a control means. The tuning variable unit connects the fixed capacitance element and the variable capacitance element connected in series to the inductance element in parallel.

Japanese Patent Application Laid-Open No. 11-0175580 (Patent Document 2) includes an antenna matching unit having a variable capacitance element, and a constant output from a constant generation unit by performing adjustment processing according to the frequency characteristics of the antenna matching unit. An antenna matching device is disclosed that includes an arithmetic unit to add, and a DA converter that converts the output data of the arithmetic unit into an analog signal and outputs it as a control voltage for the variable capacitance element.
Japanese Patent Laid-Open No. 10-336055 Japanese Patent Laid-Open No. 11-17580

  As described above, in the variable capacitance diode, the capacitance changes according to the magnitude of the applied reverse bias voltage. That is, the variable capacitance range of the variable capacitance diode is the change width of the control voltage applied to both ends thereof. It depends on.

  On the other hand, especially in mobile receivers (communication devices) such as small wireless devices and mobile phones, the driving used in the matching unit is accompanied by the higher density and lower power consumption of semiconductor integrated circuits used in the circuits. The power supply is lower in voltage (for example, about 1.8V). Along with this, the change width of the control voltage that can be applied to both ends of the variable capacitance diode is also reduced, and the variable capacitance range is more limited.

  Although it is conceivable to boost the drive power supply using a charge pump circuit, a DC-DC converter, etc., this is practically adopted because another problem arises that the circuit configuration becomes complicated and the weight increases. It is not possible.

  For this reason, there has been a problem that the variable capacitance range of the variable capacitance diode is limited, and the performance as a matching unit is degraded.

  Accordingly, the present invention has been made to solve such a problem, and an object of the present invention is to expand the variable capacitance range of the variable capacitance diode, and to perform matching of the circuit impedance in a wider range and antenna matching. To provide a circuit.

  According to the present invention, a control signal including a variable capacitance diode configured to change a circuit impedance including an external element, an AC component whose polarity is changed with time, and a DC component having a positive potential is input. And a positive potential generator that generates a positive DC potential from the control signal, and is connected to the terminal and blocks a DC component included in the control signal. A DC blocking unit, and a negative potential generating unit that is connected between the anode end of the variable capacitance diode and the DC blocking unit and generates a DC negative potential from a control signal after the DC component is blocked by the DC blocking unit. It is a matching device provided.

  According to the present invention, after the DC blocking unit blocks the DC component included in the control signal, the negative potential generating unit generates a negative potential from the AC component included in the control signal. Then, the negative potential generated by the negative potential generation unit is applied to the anode end of the variable capacitance diode, while the positive potential generated by the positive potential generation unit is applied to the cathode end of the variable capacitance diode. As a result, the range of the reverse bias voltage applied to the variable capacitance diode can be expanded by the negative potential generated by the negative potential generation unit, compared to the case where the ground potential is applied to the anode end of the variable capacitance diode. Therefore, the variable capacitance range of the variable capacitance diode can be expanded.

Preferably, the direct current cut-off unit includes a high-pass filter.
Preferably, the negative potential generation unit includes a voltage doubler rectifier circuit.

Preferably, the positive potential generation unit includes a low pass filter.
Preferably, the positive potential generation unit includes a voltage doubler rectifier circuit.

Preferably, the control signal is generated by pulse width modulation.
Further, according to the present invention, the antenna includes the matching unit according to the present invention described above and a control signal source for generating a control signal input to a terminal of the matching unit, and the external element is an antenna element. It is a matching circuit.

  According to the present invention, it is possible to realize a matching device and an antenna matching circuit capable of matching the circuit impedance over a wider range by expanding the variable capacitance range of the variable capacitance diode.

  Embodiments of the present invention will be described in detail with reference to the drawings. Note that the same or corresponding parts in the drawings are denoted by the same reference numerals and description thereof will not be repeated.

[Embodiment 1]
FIG. 1 is a diagram showing a main part of a mobile receiver including matching unit 1 according to Embodiment 1 of the present invention.

  The mobile receiver according to the first embodiment of the present invention is directed to reception of terrestrial digital broadcasting (so-called “one segment broadcasting” or “one segment (registered trademark)”) for mobile devices as an example.

  Referring to FIG. 1, matching device 1 according to the first embodiment of the present invention is connected to antenna element ANT and control signal source 6 to form antenna matching circuit 100.

  The antenna matching circuit 100 receives a channel selection command SEL from a channel selection unit (not shown) or the like, and changes the capacitance so that the circuit impedance viewed from the reception circuit 8 is matched according to the reception frequency of the channel. . Then, the antenna matching circuit 100 outputs the radio signal received by the antenna to the receiving circuit 8. The reception circuit 8 amplifies the radio signal received from the antenna matching circuit 100 and outputs it as a reception signal RF. Then, the reception circuit 8 outputs the restored reception signal RF to a mixer unit, a decoder unit, or the like (not shown).

  The antenna matching circuit 100 includes a control signal source 6, a matching unit 1 including a variable capacitance diode VD, and an antenna element ANT.

  The control signal source 6 supplies the matching unit 1 with a control signal for changing the capacitance of the variable capacitance diode VD to a value corresponding to the channel selection command SEL in response to the channel selection command SEL. In the first embodiment of the present invention, as an example, the control signal source 6 generates a pulse width modulation (PWM: Pulse Width Modulation; hereinafter referred to simply as “PWM modulation”) from a driving potential Vcc (for example, 1.8 [V]). The pulse signals PWM respectively generated by the above are supplied to the matching unit 1. In such a pulse signal PWM, “H” level (high potential state) and “L” set between 0 [V] (ground potential) and drive potential Vcc [V] according to the carrier frequency. ”Level (low potential state) is repeated alternately. Therefore, the pulse signal PWM includes an AC component that changes its polarity in time according to the carrier frequency and a DC component having a positive potential corresponding to the duty ratio.

  Therefore, in order to change the capacitance of the variable capacitance diode VD according to the channel selection command SEL, the control signal source 6 changes the duty ratio of the pulse signal PWM according to the channel selection command SEL.

  The matching device 1 generates a DC positive potential from a part of the pulse signal PWM input by the control signal source 6 and applies it to the cathode terminal of the variable capacitance diode VD. In addition, the matching unit 1 cuts off the direct current component from a part of the input pulse signal PWM, generates a direct current negative potential from the pulse signal after the direct current component is cut off, and outputs the anode terminal of the variable capacitance diode VD. Apply to. In accordance with the potential difference (applied voltage) between the positive potential and the negative potential applied in this way, the variable capacitance diode VD changes its capacitance, that is, the output impedance of the matching circuit including the antenna element ANT, that is, the receiving circuit. The circuit impedance seen from 8 is changed.

  The variable capacitance diode VD is also referred to as a varicap diode or a varactor diode, and generates a capacitance according to the width of a depletion layer generated inside the variable capacitance diode VD. The variable capacitance diode is applied with a reverse bias voltage, thereby changing the width of the depletion layer inside the variable capacitance diode and changing the capacitance.

FIG. 2 is a circuit configuration diagram of the matching unit 1, the antenna element ANT, and the receiving circuit 8.
Referring to FIG. 2, matching unit 1 includes an input terminal N1 that receives pulse signal PWM from control signal source 6 (FIG. 1), an antenna terminal N2 that is connected to antenna element ANT, and a receiving circuit 8. An output terminal N3 for connection is formed. The matching device 1 includes a variable capacitance diode VD, a low pass filter circuit LPF, a high pass filter circuit HPF, a rectifier circuit RCT1, inductors L1 and L2, and a capacitor C3. Become.

  The variable capacitance diode VD is connected at its cathode end to the control signal line LN1 and the antenna element ANT, and at its anode end is connected to the control signal line LN2 and the capacitor C3.

  The low-pass filter circuit LPF is connected between the cathode terminal of the variable capacitance diode VD and the input terminal N1, and generates a DC positive potential Vp from the pulse signal PWM received from the control signal source 6 (FIG. 1). More specifically, the low-pass filter circuit LPF is a one-stage RC type low-pass filter including a resistor R1 and a capacitor C1. The resistor R1 is inserted in series in the transmission path of the pulse signal PWM, and the capacitor C1 is connected between the transmission path of the pulse signal PWM and the ground potential. The pulse signal PWM input to the low-pass filter circuit LPF has an AC component cut off by the capacitor C1, and a DC positive potential Vp is generated between the ground potential and the capacitor C1. The positive potential Vp generated by the low-pass filter circuit LPF is applied to the cathode terminal of the variable capacitance diode VD via the control signal line LN1. As described above, the positive potential Vp appearing at both ends of the capacitor C1 is determined according to the duty ratio of the pulse signal PWM.

  High-pass filter circuit HPF is connected to input terminal N1 and blocks a DC component included in pulse signal PWM received from control signal source 6 (FIG. 1). More specifically, the high-pass filter circuit HPF is a one-stage CR type high-pass filter including a capacitor C2 and a resistor R2. The capacitor C2 is inserted in series in the transmission path of the pulse signal PWM, and the resistor R2 is connected between the transmission path of the pulse signal PWM and the ground potential. The pulse signal PWM input to the high-pass filter circuit HPF has its DC component cut off by the capacitor C2, and a pulse signal from which the DC component has been removed appears between the ground potential and the resistor R2.

  As shown in FIG. 2, the pulse signal PWM observed at the observation point MP1 has an “H” level and an “L” level set to potentials higher than 0 [V] (ground potential) according to the carrier frequency. It has a time waveform that repeats alternately. On the other hand, in the pulse signal observed at the observation point MP2 after passing through the high-pass filter circuit HPF, the “H” level set to the positive potential and the “L” level set to the negative potential are alternately repeated according to the carrier frequency. Has a time waveform. That is, the high-pass filter circuit HPF generates a pulse signal whose amplitude alternately changes between a positive potential and a negative potential by removing the offset component of the pulse signal PWM received from the control signal source 6 (FIG. 1).

  The rectifier circuit RCT1 is connected between the anode end of the variable capacitance diode VD and the high pass filter circuit HPF, and generates a DC negative potential from the pulse signal PWM after the DC component is cut off by the high pass filter circuit HPF. The negative potential Vn generated by the rectifier circuit RCT1 is applied to the anode end of the variable capacitance diode VD via the control signal line LN2. More specifically, the rectifier circuit RCT1 is a three-stage voltage doubler rectifier circuit including diodes D11, D12, and D13 and capacitors C11, C12, and C13. The rectifier circuit RCT1 rectifies the pulse signal after passing through the high-pass filter circuit HPF in the negative potential direction, and triples the peak value to generate the negative potential Vn.

  In the rectifier circuit RCT1, the diodes D11, D12, and D13 are connected in series. One end of the capacitor C11 is connected to the anode end of the diode D13, and the other end of the capacitor C11 is connected to the cathode end of the diode D12 in common with one end of the capacitor C12. The other end of the capacitor C12 is connected to the ground potential. One end of the capacitor C13 is connected to the cathode end of the diode D11, and the other end of the capacitor C13 is connected to a connection point between the cathode end of the diode D13 and the anode end of the diode D12.

  Hereinafter, the voltage doubler operation of the rectifier circuit RCT1 will be described. When the pulse signal output from the high-pass filter circuit HPF becomes a negative potential, the diode D13 becomes conductive, so that the capacitor C13 is charged to the peak value of the pulse signal. Next, when the pulse signal output from the high-pass filter circuit HPF becomes a positive potential, the diode D12 becomes conductive. Therefore, a voltage obtained by superimposing the charging voltage of the capacitor C13 on the peak value of the pulse signal is applied to the capacitor C12. Applied. Therefore, the capacitor C12 is charged up to twice the peak value of the pulse signal. Further, when the pulse signal output from the high pass filter circuit HPF becomes a negative potential, a voltage obtained by superimposing the charging voltage of the capacitor C12 on the peak value of the pulse signal is applied to the capacitor C13. Therefore, a negative potential Vn obtained by multiplying the peak value of the pulse signal by three is output from the capacitor C11.

  As described above, the control signal source 6 (FIG. 1) changes the duty ratio of the pulse signal PWM according to the channel selection command SEL, so that the positive potential Vp generated by the low-pass filter circuit LPF and the rectifier circuit RCT1. Any of the generated negative potentials Vn changes. As a result, the reverse bias voltage (positive potential Vp + negative potential Vn) applied to the variable capacitance diode VD changes, and the circuit impedance including the antenna element ANT is matched. The radio signal received by the antenna element ANT having impedance matching in this way is output to the receiving circuit 8 via the control signal line LN1. The received radio signal is efficiently output to the receiving circuit 8 because backflow to the control signal source 6 is prevented by the inductors L1 and L2 inserted in the control signal lines LN1 and LN2, respectively.

  The receiving circuit 8 includes a capacitor C4 and a low noise amplifier LNA (Low Noise Amplifier).

  The capacitor C4 is inserted in series between the matching unit 1 and the low noise amplifier LNA, and after removing a DC component (offset component) included in the radio signal output from the matching unit 1, the capacitor C4 is supplied to the low noise amplifier LNA. Output.

  The low noise amplifier LNA includes, for example, a field effect transistor (FET) amplifier made of GaAs or the like, or a high electron mobility transistor (HEMT) made of GaAs or the like, Amplifies high-frequency radio signals while maintaining a relatively low noise level. Then, the radio signal amplified by the low noise amplifier LNA is output as a reception signal RF.

  As described above, in matching device 1 according to the first embodiment of the present invention, high-pass filter circuit HPF and rectifier circuit RCT1 generate negative potential Vn from pulse signal PWM that does not have a negative potential amplitude. Applied to the anode end of VD. As a result, the reverse bias voltage applied to the variable capacitance diode VD is expanded by the negative potential Vn as compared with the case where 0 [V] (ground potential) is applied to the anode end of the variable capacitance diode VD. As a result, the variable capacitance range of the variable capacitance diode VD can be expanded.

  FIG. 3 is a diagram for explaining expansion of the variable capacitance range of the variable capacitance diode VD by applying the negative potential Vn to the anode end of the variable capacitance diode VD.

  FIG. 3A shows a case where a ground potential is applied to the anode end of the variable capacitance diode VD.

  FIG. 3B shows a case where a negative potential Vn is applied to the anode end of the variable capacitance diode VD.

  Referring to FIG. 3A, as described above, the variable capacitance diode VD is a circuit element that functions as a capacitor only when a reverse bias voltage is applied, and generally applies a forward bias voltage. Never used. Specifically, the variable capacitance diode VD generates a maximum capacitance in a state where no control voltage is applied. In addition, as the reverse bias voltage is applied, the capacitance gradually decreases.

  Therefore, when a positive potential Vp is applied to the cathode end of the variable capacitance diode VD and 0 [V] is applied to the anode end of the variable capacitance diode VD, the variable capacitance range of the variable capacitance diode is 0 to −Vp [V. ] Range.

  The low-pass filter circuit LPF (FIG. 2) generates a DC positive potential Vp from the DC component of the pulse signal PWM received from the control signal source 6 (FIG. 1). Therefore, the positive potential Vp generated by the low-pass filter circuit LPF does not exceed the peak value of the pulse signal PWM. Here, since the pulse signal PWM is generated from the drive potential Vcc by PWM modulation, the positive potential Vp generated by the low-pass filter circuit LPF does not exceed the drive potential Vcc after all.

  Referring to FIG. 3B, when a negative potential Vn is applied to the anode terminal of the variable capacitance diode VD by the rectifier circuit RCT1, the range of the reverse bias voltage that can be applied to the variable capacitance diode VD is 0 [V ] To-(Vp + Vn) [V]. As a result, the variable capacitance range of the variable capacitance diode is expanded to a region corresponding to the range of 0 [V] to − (Vp + Vn) [V].

  Note that the variable-capacitance diode VD generally has an excessively large slope of the voltage-capacitance curve in the vicinity of 0 [V], so that 0 [V] is rarely applied. For the sake of convenience, the applied reverse bias voltage is set to 0 [V] or more.

  According to the circuit simulation of matching device 1 according to the first embodiment of the present invention, pulse signal PWM input to matching device 1 is 0 [V] (“L” level) and 2 [V] (“H” level). When the duty ratio is changed in the range of 0.5 [%] to 95 [%], the reverse is in the range of −0.1 [V] to −3.2 [V]. It was confirmed that a bias voltage was applied.

  In the first embodiment of the present invention, the pulse signal PWM input to the matching unit 1 needs to include an alternating current component that changes its polarity in time and a positive potential direct current component. Therefore, when the duty ratio of the pulse signal PWM is 0 [%] or 100 [%], the AC signal is not included in the pulse signal PWM, and thus the rectifier circuit RCT1 cannot generate the negative potential Vn. Therefore, in order to exert the effect in the first embodiment of the present invention, it is necessary to limit the duty ratio of the pulse signal PWM to a predetermined range (for example, 5 [%] to 95 [%], etc.). It should be noted that there is no practical problem caused by the performance degradation due to the limitation of the duty ratio.

  In the first embodiment of the present invention, the configuration using a three-stage voltage doubler rectifier circuit as the rectifier circuit RCT1 is exemplified, but the present invention is not limited to this configuration. In other words, the required change range of the negative potential Vn, that is, the number of stages of the voltage doubler rectifier circuit may be determined in accordance with a desired variable capacitance range for the variable capacitance diode VD.

  In the first embodiment of the present invention, the low-pass filter circuit LPF corresponds to a “positive potential generation unit”, the low-pass filter circuit LPF corresponds to a “DC blocking unit”, and the rectifier circuit RCT1 serves as a “negative potential generation unit”. Equivalent to.

  According to Embodiment 1 of the present invention, after the low-pass filter circuit cuts off the direct current component included in the pulse signal, the rectifier circuit RCT1 generates a negative potential from the alternating current component included in the pulse signal. The negative potential generated by the rectifier circuit RCT1 is applied to the anode end of the variable capacitance diode, while the positive potential generated by the low-pass filter circuit is applied to the cathode end of the variable capacitance diode. As a result, the range of the reverse bias voltage applied to the variable capacitance diode can be expanded by the negative potential generated by the rectifier circuit, compared to the case where the ground potential is applied to the anode end of the variable capacitance diode. Therefore, the variable capacitance range of the variable capacitance diode can be expanded. Therefore, a matching device and an antenna matching circuit that can perform impedance matching over a wider range can be realized.

  Further, according to the first embodiment of the present invention, it is possible to generate a positive potential and a negative potential to be applied to the variable capacitance diode using a common pulse signal (control signal) input to the matching unit. Therefore, it is not necessary to input different control signals to generate potentials to be applied to the cathode end and the anode end of the variable capacitance diode. Therefore, the control signal source for generating the pulse signal can be further simplified, and cost competitiveness can be enhanced.

  According to Embodiment 1 of the present invention, since the voltage doubler rectifier circuit is used as the rectifier circuit for generating the negative potential, the amplitude value of the negative potential to be generated can be further increased. Thereby, the range of the reverse bias voltage applied to the variable capacitance diode can be expanded by the amplitude value of the doubled negative voltage as compared with the case where the AC component included in the pulse signal is simply rectified. Therefore, the variable capacitance range of the variable capacitance diode can be expanded. Therefore, a matching device and an antenna matching circuit that can perform impedance matching over a wider range can be realized.

[Embodiment 2]
In the first embodiment described above, the configuration in which the positive potential is generated by the low-pass filter circuit has been described. On the other hand, in Embodiment 2, a configuration in which a positive potential is generated by a rectifier circuit will be described.

  Since the main part of the mobile receiver according to the second embodiment of the present invention is the same as that of FIG. 1, detailed description will not be repeated.

  FIG. 4 is a circuit configuration diagram of matching device 2, antenna element ANT, and receiving circuit 8 according to the second embodiment of the present invention.

  Referring to FIG. 4, matching device 2 is obtained by arranging rectifier circuit RCT2 in place of low-pass filter circuit LPF in matching device 1 according to the first embodiment of the present invention shown in FIG.

  The rectifier circuit RCT2 is connected between the cathode terminal of the variable capacitance diode VD and the input terminal N1, and generates a DC positive potential Vp from the pulse signal PWM received from the control signal source 6 (FIG. 1). The positive potential Vp generated by the rectifier circuit RCT2 is applied to the cathode terminal of the variable capacitance diode VD via the control signal line LN1. More specifically, the rectifier circuit RCT2 is a half-wave rectifier circuit including a diode D4 and a capacitor C8. The diode D4 is inserted in series in the transmission path of the pulse signal PWM, and the capacitor C8 is connected between the transmission path of the pulse signal PWM and the ground potential. Since the diode D4 conducts only during the period when the pulse signal PWM input to the rectifier circuit RCT2 is positive potential, the half-wave component (positive potential side) of the pulse signal PWM is smoothed by the capacitor C8, and the ground potential and the capacitor C8 A DC positive potential Vp is generated between them. Then, the positive potential Vp generated by the rectifier circuit RCT2 is applied to the cathode terminal of the variable capacitance diode VD via the control signal line LN1.

  Since the rest is the same as that of matching unit 1 described above, detailed description will not be repeated. Since antenna element ANT and receiving circuit 8 are also the same as in the first embodiment of the present invention shown in FIG. 2, detailed description will not be repeated.

  According to the second embodiment of the present invention, it is possible to obtain the same effect as that of the first embodiment of the present invention described above. Furthermore, according to the second embodiment of the present invention, since a positive potential is generated by a rectifier circuit instead of a low-pass filter circuit, a higher potential range can be applied to the cathode end of the variable capacitance diode. That is, in the rectifier circuit, resistance loss at the time of discharging (discharging) the capacitor can be reduced as compared with the RC type low-pass filter, so that a higher positive potential can be applied to the cathode end of the variable capacitance diode. . Thereby, the range of the reverse bias voltage applied to the variable capacitance diode can be further expanded as compared with the first embodiment of the present invention. Therefore, the variable capacitance range of the variable capacitance diode can be expanded, and a matching device and an antenna matching circuit that can perform impedance matching over a wider range can be realized.

[Embodiment 3]
In the first and second embodiments described above, the configuration in which the DC component of the input pulse signal PWM is extracted to generate the positive potential Vp has been described. On the other hand, in the third embodiment, a configuration that further doubles the DC component of the input pulse signal PWM will be described.

  The main part of the mobile receiver according to the third embodiment of the present invention is the same as that in FIG. 1, and therefore detailed description will not be repeated.

  FIG. 5 is a circuit configuration diagram of matching device 3, antenna element ANT, and receiving circuit 8 according to the third embodiment of the present invention.

  Referring to FIG. 5, matching device 3 is obtained by arranging rectifier circuit RCT3 in place of low-pass filter circuit LPF in matching device 1 according to the first embodiment of the present invention shown in FIG.

  The rectifier circuit RCT3 is connected between the cathode terminal of the variable capacitance diode VD and the input terminal N1, and generates a DC positive potential Vp from the pulse signal PWM received from the control signal source 6 (FIG. 1). The positive potential Vp generated by the rectifier circuit RCT3 is applied to the cathode terminal of the variable capacitance diode VD via the control signal line LN1. More specifically, the rectifier circuit RCT3 is a three-stage voltage doubler rectifier circuit including diodes D21, D22, and D23 and capacitors C21, C22, and C23. The rectifier circuit RCT3 rectifies the pulse signal PWM in the positive potential direction and triples the peak value to generate the positive potential Vp.

  In the rectifier circuit RCT3, the diodes D21, D22, D23 are connected in series. One end of the capacitor C21 is connected to the cathode end of the diode D23, and the other end of the capacitor C21 is connected to the connection point between the anode end of the diode D22 and the cathode end of the diode D21 in common with one end of the capacitor C22. The The other end of the capacitor C22 is connected to the ground potential. One end of the capacitor C23 is connected to the anode end of the diode D21, and the other end of the capacitor C23 is connected to a connection point between the anode end of the diode D23 and the cathode end of the diode D22.

  Hereinafter, the voltage doubler operation of the rectifier circuit RCT3 will be described. When the pulse signal PWM input to the rectifier circuit RCT3 becomes a positive potential, the diode D23 becomes conductive, so that the capacitor C23 is charged to the peak value of the pulse signal. Next, when the pulse signal PWM becomes a negative potential, the diode D22 is turned on, and thus a voltage obtained by superimposing the charging voltage of the capacitor C23 on the peak value of the pulse signal is applied to the capacitor C22. Therefore, the capacitor C22 is charged up to twice the peak value of the pulse signal. Further, when the pulse signal PWM becomes a positive potential, a voltage obtained by superimposing the charging voltage of the capacitor C22 on the peak value of the pulse signal is applied to the capacitor C21. For this reason, a positive potential Vp obtained by multiplying the peak value of the pulse signal by 3 is output from the capacitor C21.

  Since the rest is the same as that of matching unit 1 described above, detailed description will not be repeated. Since antenna element ANT and receiving circuit 8 are also the same as in the first embodiment of the present invention shown in FIG. 2, detailed description will not be repeated.

  According to the third embodiment of the present invention, it is possible to obtain the same effect as that of the first embodiment of the present invention described above. Furthermore, according to the third embodiment of the present invention, since a positive potential is generated by a voltage doubler rectifier circuit instead of a low-pass filter circuit, a higher potential range can be applied to the cathode end of the variable capacitance diode. . That is, since the voltage doubler rectifier circuit doubles and outputs the input pulse signal (control signal), a higher positive potential can be applied to the cathode end of the variable capacitance diode. Thereby, the range of the reverse bias voltage applied to the variable capacitance diode can be further expanded as compared with the first embodiment of the present invention. Therefore, the variable capacitance range of the variable capacitance diode can be expanded, and a matching device and an antenna matching circuit that can perform impedance matching over a wider range can be realized.

  Note that the circuit configurations of the high-pass filter circuit, the low-pass filter circuit, and the rectifier circuit shown in the first to third embodiments of the present invention are only examples, and any circuit configuration can be used as long as the corresponding function can be realized. May be used. That is, in the above description, a single-stage RC type low-pass filter or a single-stage CR type high-pass filter is illustrated, but a plurality of stages of low-pass filters, high-pass filters, or the like may be used.

  In the first to third embodiments of the present invention described above, the case where the pulse signal PWM generated by PWM modulation is used as the control signal is exemplified. However, the AC component that changes polarity with time and the positive potential are used. Any signal may be used as long as it includes a DC component. For example, a pulse signal generated by pulse amplitude modulation (PAM), pulse frequency modulation (PFM), or a sine wave signal including a DC component may be used. Furthermore, the time waveform of the pulse signal may be either rectangular or sawtooth.

  The embodiment disclosed this time should be considered as illustrative in all points and not restrictive. The scope of the present invention is defined by the terms of the claims, rather than the description above, and is intended to include any modifications within the scope and meaning equivalent to the terms of the claims.

It is a figure which shows the principal part of the receiver for a movement provided with the matching device according to Embodiment 1 of this invention. It is a circuit block diagram of a matching device, an antenna element, and a receiving circuit. It is a figure for demonstrating the expansion of the variable capacitance range of a variable capacitance diode by the application of the negative potential to the anode end of a variable capacitance diode. It is a circuit block diagram of the matching device, antenna element, and receiving circuit according to Embodiment 2 of this invention. It is a circuit block diagram of the matching device, antenna element, and receiving circuit according to Embodiment 3 of this invention.

Explanation of symbols

  1, 2, 3 matching unit, 6 control signal source, 8 receiving circuit, 100 antenna matching circuit, ANT antenna element, C1, C2, C3, C4, C8, C11, C12, C13, C21, C22, C23 capacitor, D4 , D11, D12, D13, D21, D22, D23 Diode, HPF high-pass filter circuit, L1, L2 inductor, LN1, LN2 control signal line, LNA low noise amplifier, LPF low-pass filter circuit, MP1, MP2 observation point, N1 input terminal , N2 antenna terminal, N3 output terminal, PWM pulse signal, R1, R2 resistance, RCT1, RCT2, RCT3 rectifier circuit, RF reception signal, SEL channel selection command, Vcc drive potential, VD variable capacitance diode, Vn negative potential, Vp positive potential.

Claims (7)

A variable capacitance diode configured to change circuit impedance including an external element;
A terminal to which a control signal including an alternating current component that changes polarity in time and a positive potential direct current component is input;
A positive potential generator connected between the cathode end of the variable capacitance diode and the terminal, and generates a DC positive potential from the control signal;
A DC blocking unit connected to the terminal and blocking the DC component included in the control signal;
A negative potential generating unit that is connected between the anode end of the variable capacitance diode and the DC blocking unit, and generates a DC negative potential from the control signal after the DC component is blocked by the DC blocking unit; A matching device.   The matcher according to claim 1, wherein the DC blocking unit includes a high-pass filter.   The matcher according to claim 1, wherein the negative potential generation unit includes a voltage doubler rectifier circuit.   The matching device according to claim 1, wherein the positive potential generation unit includes a low-pass filter.   The matcher according to claim 1, wherein the positive potential generation unit includes a voltage doubler rectifier circuit.   The matching device according to claim 1, wherein the control signal is generated by pulse width modulation. Matching device according to any one of claims 1 to 6,
A control signal source for generating the control signal input to the terminal of the matching unit,
The antenna matching circuit, wherein the external element is an antenna element.

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