JP2008034884A - Ceramic multilayered substrate, and laminated electronic component using the same - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a ceramic multilayered substrate which prevents an increase in electric resistance caused by connection failure between thermal vias, and prevents deterioration of a heat transfer property, and to provide a ceramic multilayered electronic component using this. <P>SOLUTION: In the electronic component in which a semiconductor device is mounted on the ceramic multilayered substrate constituted by laminating a plurality of ceramic layers, the ceramic multilayered substrate includes: side faces which connect a first and a second main faces oppositely formed each other, and connect between the main faces; a first metallic conductor layer to mount the semiconductor device is provided on the first main face; nearly conical via holes are provided at the ceramic layers; and a second metallic conductor layer is provided at the second main face, wherein the second metallic conductor layer is electrically connected to the first metallic conductor layer through the nearly conical via holes. The nearly conical via holes of the ceramic multilayered substrate are laminated in a lamination direction to constitute the thermal vias for heat dissipation. Small openings of the nearly conical via holes are connected to each of the first metallic conductor layer and the second metallic conductor layer. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to a ceramic laminated substrate on which an electronic component having exothermic properties such as a semiconductor is mounted.

  2. Description of the Related Art Conventionally, a circuit board is known in which electronic components such as semiconductor elements such as transistors, FETs, diodes, and ICs, resistance elements, capacitor elements, and inductor elements are mounted on the surface of a circuit board made of plastic, ceramics, or the like. Such circuit boards are generally required to protect semiconductor elements and electronic components from mechanical stress, improve electrical characteristics, and provide thermal protection. Recently, however, semiconductor elements generate heat during operation. As the heat generation increases, the heat generation affects the operation of the semiconductor element itself and other electronic components. Therefore, it is one of the important issues of the circuit board to efficiently dissipate the heat generation. As a circuit board heat dissipation structure generally used, a heat transfer via hole (hereinafter referred to as a thermal via) is provided in a circuit board on which a semiconductor element is mounted, and the thermal via is extended to the mounting surface side of the circuit board. There is a structure in which heat is released to the mounting substrate having a large heat capacity by being soldered to the mounting substrate.

In circuit boards on which high-performance semiconductor elements such as those described above are mounted, ceramics that are comprehensively superior in terms of heat dissipation, electrical characteristics, reliability, etc., compared to resin materials such as other plastics, Al ₂ O ₃ has been mainly used as the ceramic material because it is widely used as a substrate material.
However, in recent years, in the mobile communication field such as mobile phones, there is a strong demand for downsizing of the circuit board, and some of the electronic components such as a capacitor element and an inductor element are used in LTCC (low temperature co-fired ceramics) technology. It has come to be built into the circuit board.
In such a circuit board, since a conductive paste such as Ag or Cu having a low resistance is used as will be described later, it is not possible to use Al ₂ O ₃ having a firing temperature of several thousand degrees. For this reason, it is comprised using the low-temperature sintering ceramic material which can be sintered at 1000 degrees C or less. A low-temperature sintered ceramic material is coated on a carrier film by a doctor blade or the like to form a ceramic green sheet, and a desired circuit pattern constituting a capacitor element or an inductance element is formed on the sheet cut into a desired shape, such as Ag or Cu. A via hole is formed using a conductive paste, and further penetrates the top and bottom of the sheet using a punching device.
Next, a conductor paste mainly composed of a metal such as Ag or Cu, which is the same as the conductor pattern on which the circuit pattern is formed, is printed and filled in the via hole formed in each sheet. The required number of ceramic green sheets formed in this way are stacked, laminated, and pressure bonded. Thereafter, the circuit board is obtained by cutting into necessary dimensions, degreasing, and simultaneous firing of the ceramic green sheet and the conductor paste. Hereinafter, a circuit board configured using such LTCC technology is referred to as a ceramic laminated board.

By the way, as the low-temperature sintered ceramic material, for example, an Al—Mg—Si—Gd—O-based dielectric material having a low dielectric constant (relative dielectric constant 5 to 10), a crystal phase made of Mg ₂ SO _4, and Si—Ba— La-B-O-based dielectric material made of glass, Al-Si-Sr-O-based dielectric material, Al-Si-Ba-O-based dielectric material, high dielectric constant (relative dielectric constant 50 or more) Various materials such as Bi-Ca-Nb-O-based dielectric materials have been developed. For ceramic multilayer substrates, these low-temperature sintered ceramic materials may be used alone, or low dielectric constant materials and high dielectric constant materials are selectively used according to the ceramic layers constituting the inductance element and capacitor element. It may be used for

In such a ceramic laminated substrate, as described above, heat dissipation has come to be regarded as particularly important as the amount of heat generated from the semiconductor element increases. However, these low-temperature-sintered ceramic materials have a thermal conductivity of only a few tenths compared to Al ₂ O _3, and therefore, a large amount of heat is radiated from the semiconductor element to the mounting substrate. It is necessary to provide thermal vias. The characteristics of the semiconductor element are greatly influenced by the ground inductance. For this reason, in order to realize sufficiently low ground inductance and high heat dissipation, it is necessary to form a large number of thermal vias.

  In this way, when the thermal via is thick and many are formed, due to the difference in thermal expansion coefficient between the low-temperature sintered ceramics during firing and a low-melting metal such as Ag or Cu which is a relatively low melting metal material of 1000 ° C. or lower. There have been problems such as warpage of the ceramic multilayer substrate and cracks around the thermal via.

  Further, when the thermal via diameter is more than 0.3 mm and less than 0.1 mm, there is a problem that poor filling of the conductor base to the thermal via tends to occur. Specifically, some of the thermal vias are not sufficiently filled with the conductive paste, or local voids are generated inside the therma via, resulting in poor connection between the thermal vias, increasing electrical resistance, Thermal properties also deteriorate.

  Furthermore, since the compressive deformability of the conductive paste filled in the thermal via and the ceramic green sheet is different, when the required number of ceramic green sheets are stacked, laminated, and crimped, the thermal via inhibits deformation and crimps. As a result, there is a problem that delamination occurs in the ceramic multilayer substrate, resulting in poor connection between thermal vias, an increase in electrical resistance, and a deterioration in heat conductivity. Accordingly, an object of the present invention is to cope with such a problem. Even in the case of a thermal via having a relatively small diameter, an increase in electrical resistance due to poor connection between thermal vias or a decrease in thermal conductivity. It is an object of the present invention to provide a ceramic multilayer substrate capable of preventing the above and a ceramic multilayer electronic component using the same.

According to a first aspect of the present invention, there is provided an electronic component in which a semiconductor element is mounted on a ceramic multilayer substrate formed by laminating a plurality of ceramic layers, and the ceramic multilayer substrate includes the first and second main surfaces facing each other and the main surface. A first metal conductor layer for mounting a semiconductor element on the first main surface, the ceramic layer having a substantially conical via hole, and a second main surface; Has a second metal conductor layer electrically connected to the first metal conductor layer through the substantially conical via hole, and the substantially conical via hole of the ceramic laminated substrate is stacked in the stacking direction to dissipate heat. A ceramic multilayer electronic component comprising a thermal via for a small size and a small opening of a substantially conical via hole connected to each of the first metal conductor layer and the second metal conductor layer. .
In the present invention, in the thermal via, it is preferable that only one layer is configured so that the stacking directions of the substantially conical via holes are different. It is also preferable that the semiconductor element is resin-sealed.

  2nd invention is a manufacturing method of the ceramic laminated substrate which piled up the substantially cone-shaped via hole in the lamination direction, and formed the thermal via for heat dissipation, Comprising: The ceramic green sheet side is used using the ceramic green sheet hold | maintained at the film Irradiating with a laser, forming a substantially conical via hole having a small opening on the film side, obtaining a film-integrated ceramic green sheet filled with a conductive paste in the via hole, and the film-integrated ceramic green sheet, A ceramic laminated substrate comprising: a step of placing a film in contact with a mold; and a step of placing and pressing a ceramic green sheet integrated with another film so that large openings of via holes face each other. It is a manufacturing method.

  Furthermore, it is preferable to provide a step of placing and crimping another ceramic green sheet integrated with another film so that the film is removed after crimping and faces the small opening of the exposed via hole.

  According to the present invention, it is possible to stably fill the conductor paste with respect to a large number of through-holes and to prevent a local filling density defect of the conductor paste inside the through-holes. It is possible to provide a ceramic laminated substrate having excellent reproducibility and low wiring resistance with good reproducibility.

Embodiments of the present invention will be specifically described below with reference to the drawings. FIG. 1 is a cross-sectional view showing a main structure of a ceramic laminated substrate according to an embodiment of the present invention. FIG. 2 is a perspective view of a multilayer ceramic electronic component according to an embodiment of the present invention.
A ceramic multilayer electronic component 100 shown in FIG. 2 includes a ceramic multilayer substrate 1 having first and second main surfaces opposed to each other and side surfaces connecting the main surfaces, and a recess formed in the first main surface. 10a, 10b, a semiconductor element 30 mounted on the first metal conductor layer 7 formed in the recess, and an electronic component 50 such as a chip inductor, chip capacitor, or chip resistor mounted on the first main surface. Is provided.
The ceramic multilayer substrate 1 includes a plurality of ceramic layers 20 integrated by firing, for example, six ceramic layers 20a to 20f, a first metal conductor layer 7 formed on the bottom surface of the recess and mounting a semiconductor, A plurality of thermal vias 5 continuously arranged to connect the second metal conductor layer 8 formed on the second main surface, the first metal conductor layer 7 and the second metal conductor layer 8; Internal metal conductor layers 6a to 6d formed in each ceramic layer, electrode patterns (not shown) constituting capacitor elements and inductance elements, connection lines and via holes (not shown) for electrically connecting them are provided. A connection pad (not shown) formed so as to mount an electronic component on the first main surface of the ceramic laminated substrate 1 and a connection pad (not shown) with a mounting board are appropriately electrically connected. There.

  The internal metal conductor layer 6 (6a to 6d) is formed with a spread so as to electrically connect a plurality of thermal vias formed in the ceramic layer 20 as shown in a partial plan view of the ceramic layer of FIG. ing. By configuring in this way, even when the conductor paste is not sufficiently filled, or even when the laminating deviation of the ceramic layer occurs and the connection between the thermal vias becomes unstable, the internal metal conductor layer 6 Since it is connected to another thermal via sufficiently filled with the conductive paste, the electrical and thermal connection between the thermal vias does not become defective. In addition, the first metal conductor layer 7 and the second metal conductor layer 8 are also formed so as to expand so as to electrically connect a plurality of thermal vias in the same manner as the inner metal conductor layer 6. The high-frequency current in the conductor layer 7 can be made uniform, the ground of the semiconductor element mounted in the concave portion of the ceramic multilayer substrate 1 can be stabilized, and the heat generated from the semiconductor element is not unevenly distributed, so that the operation of the semiconductor element can be performed. Stabilize.

  The ceramic laminated substrate 1 is composed of ceramic layers having a plurality of thicknesses. For example, the ceramic layer 20 on which the circuit pattern constituting the capacitor element is formed has a thickness of about 20 μm, and the ceramic layer on which the circuit pattern constituting the inductance element, the connection line connecting the circuit elements, and the like are formed. 20 has a thickness of about 200 μm. The ceramic layer 20 on which the circuit pattern constituting the capacitor element is formed may be formed thinner so as to constitute a larger capacity capacitor element. In such a ceramic green sheet that forms a thin ceramic layer, it is difficult to obtain a sufficient amount of deformation with respect to the pressure by pressure due to the inhibition of deformation by the thermal via. However, since the inner metal conductor layer 6 is disposed between the ceramic layers 20 as described above, the pressure can be applied to the ceramic layer 20 relatively uniformly, so that there is no delamination and there is no delamination between the thermal vias. Connection is also good.

  As shown in the enlarged sectional view of the thermal via portion in FIG. 4, the thermal via is preferably configured in a conical shape such that the area of one opening is larger than the area of the other opening. With this structure, by filling the conductive paste from the large-area opening side toward the small-area opening, the filling pressure is sufficiently transmitted to the small-area opening so that the conductive paste is densely packed in the through hole. Can be filled. In addition, when filling a thermal via using a squeegee, such as screen printing, with a conductive paste, for example, with a straight-shaped (cylindrical) thermal via, the conductive paste drips from the back side of the printed surface, and the thermal via is partially filled. Defects and local cavitation inside the through hole may occur. Although this phenomenon depends on the thixotropy of the conductor paste, in order to prevent this phenomenon, when the opening area of the large area opening is S2 and the opening area of the small area opening is S1, S2 ≧ 1.1S1 is satisfied. It is preferable. When S2 is less than 1.1 times S1, it is difficult to obtain the filling effect of the conductor paste, and the conductor paste is liable to sag.

In order to form a via hole having a substantially conical shape in each ceramic green sheet, it can be easily obtained by applying a drilling method as shown below. That is, as shown in FIG. 5, if a high-power laser beam such as a CO ₂ laser is used, a via hole can be accurately formed in the ceramic green sheet. The large-area opening of the thermal via is determined by the spot diameter of the laser, and the small-area opening can be appropriately changed by the output to the laser. The ceramic green sheet is perforated together with the carrier film (PET film). However, since the ceramic green sheet and the support film are flexible, the non-flexible support plate 202 is used for the perforation. It is preferable that the ceramic green sheet 200 integrated with the support film 201 is disposed on the support plate 202 and the laser is irradiated from the ceramic green sheet side.

  As the ceramic layer becomes thicker, it becomes difficult to fill the thermal via with the conductive paste. When the ceramic layer exceeds 150 μm, it is more preferable that the difference between the opening area S2 of the large area opening and the opening area S1 of the small area opening satisfies S2 ≧ 1.2S1. Further, the specific opening diameter of the thermal via 5 is set such that the opening area S1 of the small-area opening is 100 μm or more in order to ensure the filling property of the conductive paste, electrical connection, and sufficient heat transfer. Is preferred. The opening area S2 of the large-area opening is preferably 300 μm or less from the viewpoint of matching the thermal expansion coefficient with the ceramic layer and filling properties of the conductor paste.

  As described above, ceramic layers having various thicknesses are used, but the thinner the ceramic layer, the more easily the effect of the present invention can be achieved. In relation to the thermal via opening diameter S2, the thermal via aspect ratio (t / S1) determined by the thermal via opening diameter S2 and the thickness (t) of the ceramic layer 20 is preferably 3 or less. .

  Although FIG. 1 shows a multilayer ceramic substrate 1 composed of six ceramic layers, the ceramic laminated substrate of the present invention is not particularly limited to the number of ceramic layers, and has two or more thermal vias. What is necessary is just to be continuously formed in the several ceramic layer.

  A ceramic multilayer substrate 1 shown in FIG. 1 is a ceramic multilayer substrate on which electronic components such as semiconductor elements and capacitor elements are mounted, and a part of the ceramic multilayer substrate 1 has functions such as a high frequency amplifier, a low noise amplifier, a VCO, and an antenna switch. Configured as an electronic component. Of course, the ceramic laminated substrate 1 can be configured by combining the above functions.

  Next, the manufacturing method of the ceramic laminated substrate 1 described above will be described. A low-temperature sintered ceramic material was mixed with an appropriate amount of an organic binder and an organic solvent, and this was cast on a carrier film 201 by a doctor blade method to form a ceramic green sheet 200. The carrier film 201 is made of, for example, polyester or polyethylene terephthalate and has excellent thermal stability and mechanical strength, and is suitable for holding a soft ceramic green sheet. An Al—Si—Ba—O-based dielectric material was used as the low-temperature sintered ceramic material. When the capacitor element is formed, the ceramic green sheet has a ceramic layer thickness of 25 μm, and the other layers have a thickness of 100 to 150 μm.

The cast ceramic green sheet 200 is cut along with the carrier film 201, and the via hole 5 is formed along with the carrier film 201 on the ceramic green sheet 200. As shown in FIG. 5, the via hole 5 is a via hole having a substantially conical shape that is 0.1 mm to 0.3 mm when the ceramic green sheet side is irradiated with a CO2 laser and the hole diameter on the irradiated surface side is a ceramic layer. Formed.
When the via hole is a thermal via, thermal vias are arranged at an equal pitch d of 0.15 mm to 0.35 mm as shown in FIG. Next, a conductor paste is embedded in the via hole formed in the ceramic green sheet 200. Silver, copper, or the like is used as the conductor paste, and is buried in the via hole portion by screen printing using a metal mask. Next, a circuit pattern constituting an inductance element and a capacitor element, a connection electrode for connecting the inductance element and the capacitor element, and the like are formed on the surface of the ceramic green sheet 200. An internal metal conductor layer is formed so as to electrically connect a plurality of via holes 5 serving as vias. The conductor paste material for forming the conductor pattern of the signal wiring and the power supply wiring is the same as the via hole portion.

The ceramic green sheet on which via holes are formed, conductor paste is embedded, and conductor pattern is printed as described above is placed in a mold as shown in FIG. 7, and another ceramic with the carrier film 201 attached thereto. The green sheet 200 is laminated, thermocompression bonded, and the carrier film 201 is removed. This was repeated several times to obtain a laminate. Subsequently, what printed the conductor paste on the carrier film 201 was prepared, this was laminated | stacked and crimped | bonded to the said laminated body, the carrier film 201 was removed, and the 1st metal conductor layer 7 was transcribe | transferred. The second metal conductor layer 8 is also formed by the same construction method and will not be described.
Further, a ceramic green sheet 200 cut out or punched out from the ceramic multilayer substrate 1 is laminated and thermocompression bonded, whereby the ceramic green sheets are integrated to form a ceramic green sheet laminate.
And it arrange | positioned on baking jigs, such as a setter, and baked in air | atmosphere. In addition, when using Cu as a conductor paste, it bakes in a predetermined gas atmosphere. In this way, the ceramic laminated sheet 1 of the present invention was obtained by simultaneously firing the ceramic green sheet and the conductor paste. Furthermore, a semiconductor element is mounted in a concave portion of the ceramic multilayer substrate and sealed with resin, and electronic components such as a chip capacitor, a chip inductor, and a chip resistor are mounted on the first main surface. A high-frequency amplifier shown in the circuit was created.

  The ceramic multilayer substrate 1 of the present invention can prevent an increase in electrical resistance and a decrease in heat transfer due to poor connection between thermal vias. A ceramic multilayer electronic component using the ceramic multilayer substrate 1 is a semiconductor element or the like. It exhibits excellent electrical characteristics without degrading the characteristics of the circuit elements.

  As described above, according to the present invention, it is possible to stably fill the conductor paste with respect to a large number of through-holes, and to prevent a defective filling density of the local conductor paste inside the through-holes. Therefore, it is possible to provide a ceramic multilayer substrate having excellent connection reliability and low wiring resistance with good reproducibility.

It is principal part sectional drawing which shows one Example of the ceramic laminated substrate of this invention. It is a perspective view which shows one structural example of the ceramic multilayer electronic component produced using the ceramic multilayer substrate of this invention. It is a partial top view of the internal metal conductor layer in one Example of the ceramic laminated substrate of this invention. It is principal part sectional drawing explaining the via-hole formation method of the ceramic laminated substrate of this invention. It is sectional drawing which expands and shows the via-hole part of the ceramic laminated substrate of this invention. The partial top view for demonstrating arrangement | positioning of the thermal via in the ceramic laminated substrate of this invention. It is principal part sectional drawing explaining the formation method of the ceramic laminated substrate of this invention. It is an equivalent circuit which shows one Example of the ceramic multilayer electronic component comprised using the ceramic multilayer substrate of this invention.

Explanation of symbols

1 Ceramic laminated substrate 5 Via hole (thermal via)
6 Internal metal conductor 7 First metal conductor 8 Second metal conductor 10 Recess 20 Ceramic layer 30 Semiconductor element 50 Electronic component 200 Ceramic green sheet 201 Carrier film

Claims (5)

An electronic component in which a semiconductor element is mounted on a ceramic laminated substrate formed by laminating a plurality of ceramic layers,
The ceramic laminated substrate includes first and second main surfaces facing each other and side surfaces connecting the main surfaces, and has a first metal conductor layer for mounting a semiconductor element on the first main surface. The ceramic layer has a substantially conical via hole, and the second main surface has a second metal conductor layer electrically connected to the first metal conductor layer via the substantially conical via hole. Have
The substantially cone-shaped via hole of the ceramic multilayer substrate is stacked in the stacking direction to constitute a thermal via for heat dissipation,
A ceramic multilayer electronic component, wherein a small opening of a substantially conical via hole is connected to each of the first metal conductor layer and the second metal conductor layer.   2. The ceramic multilayer electronic component according to claim 1, wherein in the thermal via, only one layer has a different stacking direction of substantially conical via holes.   The electronic component according to claim 1, wherein the semiconductor element is resin-sealed. A method for producing a ceramic laminated substrate in which thermal vias for heat dissipation are formed by stacking substantially conical via holes in the laminating direction,
Using a ceramic green sheet held by a film, a laser is irradiated from the ceramic green sheet side, a substantially conical via hole having a small opening on the film side is formed, and a conductive paste is filled in the via hole. A step of obtaining a green sheet, a step of arranging the film-integrated ceramic green sheet so that the film is in contact with the mold, and a case of arranging another film-integrated ceramic green sheet so that the large openings of the via holes face each other. A method for producing a ceramic laminated substrate comprising a step of crimping and pressing.   5. The ceramic laminate according to claim 4, further comprising a step of arranging and crimping another film-integrated ceramic green sheet so that the film is removed after crimping and faces the small opening of the via hole that appears. A method for manufacturing a substrate.

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