JP2008032898A - Liquid crystal display - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To enhance display quality without reducing an aperture ratio of each pixel in a liquid crystal display wherein the alignment direction of liquid crystal molecules is controlled by an electric field between electrodes on the same substrate. <P>SOLUTION: A thin film transistor TR which is connected to a gate line GL to be supplied with a pixel selection signal and is not shown in Fig. is disposed on a TFT substrate 10. The thin film transistor TR is covered by an interlayer insulating film 14, a passivation film 17 and a flattening film 18. Pixel electrode layers 19A and 19B of pixels 1A and 1B are extended to both ends or the vicinity of the both ends of the gate line GL on the flattening film 18. The pixel electrode layers 19A and 19B are covered by an insulating film 20. A common electrode part 21C covers regions partially superposed on the pixel electrode layers 19A and 19B, a region superposed on the gate line GL and regions which are not superposed on the gate line GL and extended to both sides of the gate line GL on the insulating film 20 in the vicinity of the gate line GL. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to a liquid crystal display device, and more particularly to a liquid crystal display device in which the alignment direction of liquid crystal molecules is controlled by an electric field between electrodes on the same substrate.

  As one of the means to increase the viewing angle of liquid crystal display devices, optical switching is performed by generating a horizontal electric field between electrodes on the same substrate and rotating the liquid crystal molecules in a plane parallel to the substrate by this electric field. A method for providing functions has been developed. As this technique, an in-plane switching (hereinafter abbreviated as “IPS”) method or a fringe field switching (hereinafter abbreviated as “FFS”) improved from the IPS method. The method is known.

  An FFS type liquid crystal display device according to a conventional example will be described with reference to the drawings. FIG. 4 is a plan view showing a conventional FFS mode liquid crystal display device. Although a plurality of pixels are regularly arranged in this liquid crystal display device, FIG. 4 shows only six pixels 1C and 1D adjacent to each other across a gate line GL described later. FIG. 5 is a cross-sectional view along the YY line, showing the vicinity of the boundary between the pixels 1C and 1D.

  Referring to FIG. 4, the TFT substrate 10 which is a transparent substrate such as a glass substrate has a gate line GL to which a pixel selection signal is supplied and a display signal line DL to which a display signal is supplied. It is arranged to intersect.

  A pixel 1C formed on the TFT substrate 10 is provided with a pixel selection thin film transistor TR connected to the gate line GL and connected to the display signal line DL through the contact hole CH1.

  Above the thin film transistor TR, a pixel electrode layer 19A made of a transparent metal such as ITO (Indium Tin Oxide) is connected to the thin film transistor TR through the contact holes CH2 and CH3 and supplied with a display signal. In the pixel electrode layer 19A, a common electrode layer 51 connected to a common potential line (not shown) to which a common potential is supplied is further disposed via an insulating film. The common electrode layer 51 is made of a transparent metal such as ITO. In the common electrode layer 51, a plurality of common electrode portions 51A and slit portions S are arranged. The configuration of the pixel 1C described above is the same for the pixel 1D, and a plurality of common electrode portions 51B and slit portions S are arranged there. In addition, on the gate line GL, a common electrode portion 51C that is overlapped with the gate line GL and has a width smaller than the width is arranged.

  Further, the cross-sectional configuration will be described. As shown in FIGS. 4 and 5, a first polarizing plate 11 that linearly polarizes light from the light source BL is formed on the side of the TFT substrate 10 facing the light source BL. Yes. On the side of the TFT substrate 10 not facing the light source BL, a thin film transistor TR (not shown) is arranged via a buffer film (not shown) made of a silicon oxide film or a silicon nitride film. A thin film transistor TR (not shown) includes an active layer PS made of polysilicon or the like, a gate insulating film 13 covering the active layer PS, and a gate line GL disposed thereon. The thin film transistor TR switches according to the pixel selection signal supplied to the gate line GL. These layers are covered with an interlayer insulating film 14. A display signal line DL (not shown) connected to the drain region of the active layer PS is disposed on the interlayer insulating film 14. A passivation film 17 and a planarizing film 18 are further disposed thereon. On the planarizing film 18, pixel electrode layers 19A and 19B of the pixels 1C and 1D, an insulating film 20 made of a silicon oxide film or a silicon nitride film and covering the pixel electrode layers 19A and 19B, and common electrode portions 51A and 51B are provided. They are stacked in order. Note that the end portions of the pixel electrode layers 19A and 19B do not overlap with the gate line GL. An alignment film (not shown) that covers the pixel electrode layers 19A and 19B is formed on the insulating film 20.

  A color filter substrate (hereinafter abbreviated as “CF substrate”) 30, which is a transparent substrate such as a glass substrate, is disposed facing the TFT substrate 10. On the CF substrate 30 facing the TFT substrate 10, a black matrix BM facing the display signal lines DL, a color filter (not shown), and an alignment film are formed. In addition, a second polarizing plate 31 arranged in crossed Nicols with the first polarizing plate 11 is formed on the CF substrate 30 on the side not facing the TFT substrate 10. A liquid crystal layer LC is sealed between the TFT substrate 10 and the CF substrate 30. The liquid crystal molecules of the liquid crystal layer LC are, for example, nematic liquid crystals having positive dielectric anisotropy. The average alignment direction of the major axes of the liquid crystal molecules (hereinafter simply referred to as “alignment direction”) is parallel to the polarization axis of the first polarizing plate 11 depending on the rubbing direction of the alignment film. The rubbing direction is tilted by about 3 to 20 degrees with respect to the longitudinal direction of the slit portion S. Further, a transparent electrode film such as ITO (not shown) is formed on the observation side surface of the CF substrate 30 serving as the observation side so that damage such as static electricity from the outside of the liquid crystal display device does not reach the liquid crystal layer LC. Alternatively, in order to obtain the same effect, the second polarizing plate 31 on the observation side is made conductive.

  In the liquid crystal display device, in the state where no voltage is applied to the pixel electrode layers 19 </ b> A and 19 </ b> B, the alignment direction of the liquid crystal molecules in the liquid crystal layer LC is inclined parallel to the polarization axis of the first polarizing plate 11. At this time, the linearly polarized light transmitted through the liquid crystal layer LC is not emitted from the second polarizing plate 31 because its polarization axis is orthogonal to the polarizing axis of the second polarizing plate 31. That is, the display state is black display.

  On the other hand, when a voltage is applied to the pixel electrode layers 19A and 19B and an electric field is generated between the pixel electrode layers 19A and 19B and the common electrode portions 51A and 51B, the alignment direction of the liquid crystal molecules follows the electric lines of force of the electric field. Rotate. At this time, the linearly polarized light incident on the liquid crystal layer LC becomes elliptically polarized light due to birefringence, but has a linearly polarized light component transmitted through the second polarizing plate 31, and the display state in this case is white display.

In addition, the following patent documents are mentioned as technical documents relevant to the present application.
JP 2003-57670 A

  In the above-described liquid crystal display device, as shown in FIG. 5, in the adjacent pixels 1 </ b> C and 1 </ b> D across the gate line GL, a so-called burn-in defect (hereinafter abbreviated as “burn-in”) occurs due to an electric field leaking from the gate line GL. There was a problem that occurred. The burn-in in the adjacent pixels 1C and 1D means that in most of one display frame period, the potential of the gate line GL to which a pixel selection signal which is a direct current signal (DC current) is supplied is common to the pixel electrode layers 19A and 19B. This is caused by affecting the liquid crystal layer LC between the electrode layers 51.

  As an example, the pixel selection signal supplied to the gate line GL is low level (−5V), the common potential of the common electrode layer 51 is the ground potential (0V), and the pixel electrode layers 19A and 19B of the pixels 1C and 1D are supplied. Let us consider a case where the display signal is a black display level (0 V).

  At this time, no electric field is generated between the pixel electrode layers 19A and 19B at the black display level and the common electrode portions 51A, 51B, and 51C in the pixels 1C and 1D. However, between the gate line GL and the pixel electrode layers 19A and 19B, or between the gate line GL and the common electrode portions 51A, 51B, and 51C, the pixel electrode layers 19A and 19B and the common electrode portion 51C are connected. A leakage electric field is generated between them. The leakage electric field due to the potential of the gate line GL is frequently applied to the liquid crystal molecules at the same location in the vicinity of the gate line GL, thereby causing burn-in due to the movement of ionic impurities in the liquid crystal layer LC. That is, the display quality was lowered.

  Further, in addition to this problem, when the pixel electrode layer 19A of one pixel 1C is at a white display level and the pixel electrode layer 19B of the other pixel 1D is at a black display level, the pixel electrode layer 19A between the adjacent pixel electrode layers 19A and 19B An unnecessary electric field was generated. Due to this unnecessary electric field, a part of the liquid crystal molecules of the pixel 1D that should normally display black is rotated, and accordingly, there is a portion where white display is performed, that is, a portion where light is lost. When adjacent pixels 1C and 1D have color filters corresponding to different display colors, display quality is deteriorated due to color mixture.

  To deal with such a problem, it is conceivable to cover the area where image sticking or the like occurs with the black matrix BM. In this case, however, the area where the black matrix BM is formed widens, and the aperture ratio of each pixel 1C, 1D decreases. As a result, there has been a problem that the luminance is lowered.

  Therefore, the present invention aims to improve display quality without reducing the aperture ratio of each pixel in a liquid crystal display device in which the orientation direction of liquid crystal molecules is controlled by an electric field between electrodes on the same substrate.

  That is, the liquid crystal display device of the present invention has a plurality of pixels, each pixel being connected to a gate line to which a pixel selection signal is supplied and switching in accordance with the pixel selection signal, and a pixel connected to the thin film transistor An electrode layer; an insulating film covering the pixel electrode layer; a common electrode layer disposed on the insulating film; and a liquid crystal layer disposed on the common electrode layer, wherein the common electrode layer includes a plurality of common electrode portions. The common electrode portion covers a region extending from the gate line to both sides of the gate line. In addition to the above structure, the liquid crystal display device of the present invention is characterized in that regions extending on both sides of the gate line overlap with part of the pixel electrode layer in the common electrode portion.

  With such a configuration, in a pixel adjacent to the gate line, image sticking or the like due to an electric field leaking from the gate line is suppressed, and thus display quality is improved. In addition, since it is not necessary to shield a region where burn-in or the like occurs, the black matrix region is reduced, and the aperture ratio of each pixel can be improved.

  According to the present invention, in a liquid crystal display device in which the alignment direction of liquid crystal molecules is controlled by an electric field between electrodes on the same substrate, display quality can be improved without reducing the aperture ratio of each pixel.

  A configuration of a display device according to an embodiment of the present invention will be described with reference to the drawings. FIG. 1 is a plan view showing a liquid crystal display device according to an embodiment of the present invention. In this liquid crystal display device, a plurality of pixels are arranged in a matrix. In FIG. 1, only six pixels 1A and 1B adjacent to each other across the gate line GL are shown. FIG. 2 is a cross-sectional view taken along the line XX, and shows the vicinity of the boundary between the pixels 1A and 1B. In FIGS. 1 and 2, the same components as those shown in FIGS. 4 and 5 are referred to with the same reference numerals.

  The liquid crystal display device of the present embodiment is characterized by the configuration of the common electrode layer 21 described later. Other configurations are the same as the components shown in FIGS. 4 and 5, and thus description thereof is omitted.

  As shown in FIGS. 1 and 2, adjacent pixels 1 </ b> A and 1 </ b> B are arranged across the gate line GL. The common electrode layer 21 covering these pixels 1A, 1B is made of a transparent metal such as ITO, and has a plurality of common electrode portions 21A, 21B, 21C and a slit portion S. The common electrode portion 21A is disposed on one pixel 1A, and the common electrode portion 21B is disposed on the other pixel 1B. Further, a common electrode portion 21C is disposed on the gate line GL so as to cover it. The longitudinal direction of the slit portion S extends along the gate line GL. The longitudinal direction of the slit portion S may have an inclination of, for example, about 3 degrees to 30 degrees with respect to the gate line GL.

  The common electrode layer 21 will be described in more detail. The common electrode portion 21C covering the gate line GL covers a region overlapping with the gate line GL and a region extending on both sides of the gate line GL without overlapping with the gate line GL. . Further, in the common electrode portion 21C, regions extending on both sides of the gate line GL overlap with part of the pixel electrode layers 19A and 19B, that is, the end region on the side facing the gate line GL.

  Here, in the common electrode portion 21A, the width of the region overlapping with the gate line GL is Wg, and the width of each region extending on both sides of the gate line GL is Ws. However, of the width Ws, the width of the region overlapping with a part of the pixel electrode layers 19A and 19B is L1, and the distance between the end of the gate line GL and the end of the pixel electrode layers 19A and 19B facing the same is L2. To do. Further, the cell gap of the pixels 1A and 1B is H, and the thickness of the insulating film 20 sandwiched between the pixel electrode layers 19A and 19B and the common electrode portions 21A, 21B, and 21C is D.

  At this time, it is preferable to satisfy (Wg + Ws)> H. Furthermore, it is preferable that (Wg + Ws)> about 4.5 μm. Moreover, it is preferable that L1> D. The width of the gate line is about 2.0 to 10 μm, the cell gap H is about 2.0 to 5.0 μm, and the thickness D of the insulating film 20 is 0.1 to 1.0 μm.

  According to the above configuration, the common electrode portion 21C covers not only the gate line GL but also a region reaching both sides of the gate line GL, and overlaps part of the pixel electrode layers 19A and 19B. Therefore, between the gate line GL and the pixel electrode layers 19A, 19B, or between the gate line GL and the common electrode portions 51A, 51B, 51C, between the pixel electrode layers 19A, 19B and the common electrode portion 21C, Generation of a leakage electric field due to the potential of the gate line GL is suppressed. That is, burn-in in the vicinity of the gate line GL is suppressed, and display defects associated therewith are suppressed.

  Further, even when voltages having different display levels (for example, white display level 4V and black display level 0V) are applied to the adjacent pixel electrode layers 19A and 19B across the gate line GL, the pixel electrode layers 19A. And the pixel electrode layer 19B cannot reach the lines of electric force that connect each other. Therefore, in an adjacent pixel, an electric field that rotates liquid crystal molecules unnecessarily, that is, an electric field that causes light leakage does not occur.

  The operation of the liquid crystal display device is the same as that of the related art in controlling the liquid crystal molecules by the electric field. However, as described above, burn-in and light leakage occur between the adjacent pixels 1A and 1B across the gate line GL. Therefore, the display quality is improved as compared with the conventional example. When the adjacent pixels 1A and 1B have color filters corresponding to different display colors, it is possible to suppress the occurrence of color mixing caused by image sticking and light leakage.

  In addition, since it is not necessary to shield a region where burn-in or the like occurs, the region of the black matrix BM can be reduced, and the aperture ratio of each of the pixels 1A and 1B can be improved. That is, the luminance at the time of display does not decrease. Further, from the viewpoint of design, since it is not necessary to shield a region where burn-in or the like occurs, it is not necessary to strictly consider the deviation in the formation position of the black matrix BM due to a limitation in the manufacturing process.

  As another embodiment in which a part of the above embodiment is changed, as shown in FIG. 3, the longitudinal direction of the common electrode portions 41A and 41B and the slit portion S is the gate line GL instead of the common electrode layer 21. A common electrode layer 41 extending along the orthogonal direction may be disposed. The longitudinal direction of the slit portion S may have an inclination of, for example, about 3 degrees to 30 degrees with respect to the direction orthogonal to the gate line GL.

  In FIG. 1, the arrangement relationship between the pixels 1A and 1B is a delta arrangement in which the pixels 1A and 1B are arranged so as to be shifted from each other along the gate line GL, but the pixels 1A and 1B are not shifted from each other. Alternatively, a stripe arrangement may be used.

It is a top view which shows the liquid crystal display device which concerns on embodiment of this invention. It is sectional drawing along the XX line of FIG. It is a top view which shows the liquid crystal display device which concerns on other embodiment of this invention. It is a top view which shows the liquid crystal display device which concerns on a prior art example. FIG. 5 is a cross-sectional view taken along line YY in FIG. 4.

Explanation of symbols

1A, 1B, 1C, 1D Pixel 10 TFT substrate 11 First polarizing plate
13 Gate insulation film 14 Interlayer insulation film
17 Passivation film 18 Planarization film 19A, 19B Pixel electrode layer 20 Insulating film 21, 41, 51 Common electrode layer 21A, 21B, 41A, 41B, 51A, 51B Common electrode portion 30 CF substrate 31 Second polarizing plate LC Liquid crystal layer BL light source TR thin film transistor PS active layer
GL gate line DL display signal line
S Slit BM Black matrix CH1 to CH3 Contact hole

Claims (6)

Having a plurality of pixels,
Each pixel includes a thin film transistor that is connected to a gate line to which a pixel selection signal is supplied and switches according to the pixel selection signal, a pixel electrode layer connected to the thin film transistor, an insulating film that covers the pixel electrode layer, A common electrode layer disposed on the insulating film, and a liquid crystal layer disposed on the common electrode layer,
The liquid crystal display device, wherein the common electrode layer has a plurality of common electrode portions and slit portions, and the common electrode portion covers a region extending from the gate line to both sides of the gate line. 2. The liquid crystal display device according to claim 1, wherein in the common electrode portion, regions extending on both sides of the gate line overlap with a part of the pixel electrode layer. In the common electrode portion, assuming that the width of the region overlapping with the gate line is Wg, the width of each region extending on both sides of the gate line is Ws, and the cell gap of the pixel is H, (Wg + Ws)> H The liquid crystal display device according to claim 1, wherein the liquid crystal display device is satisfied. The liquid crystal display device according to claim 3, wherein (Wg + Ws)> 4.5 μm is satisfied. The liquid crystal display device according to claim 1, wherein a longitudinal direction of the slit portion extends along the gate line. The liquid crystal display device according to claim 1, wherein a longitudinal direction of the slit portion extends along a direction orthogonal to the gate line.

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