JP2008028530A - Wireless receiver provided with variation correction circuit - Google Patents

Wireless receiver provided with variation correction circuit Download PDF

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JP2008028530A
JP2008028530A JP2006196767A JP2006196767A JP2008028530A JP 2008028530 A JP2008028530 A JP 2008028530A JP 2006196767 A JP2006196767 A JP 2006196767A JP 2006196767 A JP2006196767 A JP 2006196767A JP 2008028530 A JP2008028530 A JP 2008028530A
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frequency
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JP2008028530A5 (en
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Makoto Miki
誠 三木
Akio Sasaki
章夫 佐々木
Kenji Iwai
健二 岩井
Shigeto Matsuno
成人 松野
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Fujitsu Ltd
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Abstract

<P>PROBLEM TO BE SOLVED: To provide a wireless receiver provided with a correction function for correcting variations in a cut-off frequency of an anti aliasing filter for eliminating an aliasing noise at a pre-stage of an ADC (Analog-Digital Converter) and a channel filter for limiting the band to eliminate the effect of a received signal on adjacent channels particularly with respect to the wireless receiver in a wireless communication system. <P>SOLUTION: A wireless receiving circuit of the wireless receiver wherein an orthogonal demodulator comprising multipliers, an oscillator, and a phase shifter separates a received signal into I and Q phases and thereafter analog filters (anti aliasing filter, channel filter), the ADC next to them, and digital filters next to the ADC apply processing to the signal, includes: a means for directly inputting an output of the oscillator to the analog filters; and a monitor/control section that monitors outputs of the analog filters converted into digital by the ADC and controls parameters such as coefficients of the digital filters depending on a result of the outputs to correct a frequency/phase characteristic of the analog filters. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

本発明は無線通信システムの無線受信機に関し、特にADC(Analog−Digital Converter)前段で折り返し雑音を除去するアンチ・エリアシング・フィルタや、帯域を制限して受信信号の隣接チャネルへの影響を除去するチャネル・フィルタの、カットオフ周波数のばらつきを補正する補正回路を備えた無線受信機に関するものである。   The present invention relates to a wireless receiver of a wireless communication system, and in particular, an anti-aliasing filter that removes aliasing noise before an ADC (Analog-Digital Converter), and an influence on an adjacent channel of a received signal by limiting a band. The present invention relates to a radio receiver including a correction circuit that corrects variation in cutoff frequency of a channel filter.

図1は、従来の無線通信システムにおける無線受信機(携帯端末無線部1)の基本構成例を示したものである。
図1において、アンテナ(ANT)11で受信された無線信号は、低雑音増幅器(LNA;Low Noise Amplifier)12で増幅され、I系の受信パス(乗算器I(13)、LPFI(17)、ADCI(19)、DTFI(DTF;DigiTal Filter(21))及びQ系の受信パス(乗算器Q(14)、LPFQ(18)、ADCQ(20)、DTFQ(22))でそれぞれI系の受信信号及びそれとは位相が90度ずれたQ系の受信信号として復調される。
FIG. 1 shows a basic configuration example of a radio receiver (portable terminal radio unit 1) in a conventional radio communication system.
In FIG. 1, a radio signal received by an antenna (ANT) 11 is amplified by a low noise amplifier (LNA) 12 and received in an I-system reception path (multiplier I (13), LPFI (17), ADCI (19), DTFI (DTF; DigiTal Filter (21)) and Q-system reception paths (multiplier Q (14), LPFQ (18), ADCQ (20), DTFQ (22)) receive the I-system respectively. The signal and the signal are demodulated as a Q-system received signal whose phase is shifted by 90 degrees.

図1に示すように、受信機1の前段部(RFLSI)にはアナログ・フィルタ(LPFI(17)及びLPFQ(18))が用いられていた。ここでは、1)信号が隣接チャネルに影響を与えないよう帯域を制限するチャネル・フィルタ、2)受信AD変換器前段で折り返し雑音を除去するアンチ・エリアシング・フィルタの機能を有する。   As shown in FIG. 1, analog filters (LPFI (17) and LPFQ (18)) are used in the front stage (RFLSI) of the receiver 1. Here, 1) a channel filter that limits a band so that a signal does not affect adjacent channels, and 2) an anti-aliasing filter function that removes aliasing noise before the reception AD converter.

フィルタのカットオフ周波数のばらつきは、妨害波耐力の劣化や、折り返し雑音によるS/Nの劣化を引き起こす。またフィルタの群遅延は、復調精度に直接影響を与えることから、無線通信システムが高速・高精度化する昨今、フィルタへ要求されるスペックは非常に厳しいものとなっている。   Variations in the cut-off frequency of the filter cause deterioration of the immunity to interference waves and S / N deterioration due to aliasing noise. In addition, since the group delay of the filter directly affects the demodulation accuracy, the specifications required for the filter have become very strict in recent years when the wireless communication system is increased in speed and accuracy.

前記フィルタ(LPFI(17)及びLPFQ(18))をアナログ回路で構成した場合、素子のプロセスばらつきや相対誤差により、フィルタ特性に個体ばらつきが生じてしまうが、上記のような理由より、そのばらつきを補正する手段が必要となる。   When the filters (LPFI (17) and LPFQ (18)) are constituted by analog circuits, individual variations occur in filter characteristics due to process variations and relative errors of elements. It is necessary to provide a means for correcting the above.

図2は、従来のばらつき補正回路(フィルタレプリカ回路)の一構成例(従来回路1と呼ぶ)を示したものである。ここでは、I系の構成のみを示しており、Q系についてはI系と同様である。図3及び4に、ばらつき補正用の積分器(フィルタレプリカ回路)の一実現例を示す。
従来は、主信号のフィルタ(LPFI(17)又はLPFQ(18))とは別に前記フィルタと同じ回路構成の積分器(フィルタレプリカ回路)を設けておき、フィルタレプリカ回路の時定数を測定することで素子のプロセス状態を把握し、基準値との比較によりその時定数がある一定値範囲内となるようにレプリカ回路の素子をフィードバック制御する。同時にその制御信号で主信号フィルタの素子も制御することで、フィルタのカットオフ周波数が許容設計値内になるように補正を行う。
FIG. 2 shows a configuration example (referred to as a conventional circuit 1) of a conventional variation correction circuit (filter replica circuit). Here, only the configuration of the I system is shown, and the Q system is the same as the I system. FIGS. 3 and 4 show one implementation example of an integrator (filter replica circuit) for variation correction.
Conventionally, an integrator (filter replica circuit) having the same circuit configuration as the filter is provided separately from the main signal filter (LPFI (17) or LPFQ (18)), and the time constant of the filter replica circuit is measured. Thus, the process state of the element is grasped, and the element of the replica circuit is feedback-controlled so that the time constant falls within a certain range by comparison with the reference value. At the same time, by controlling the elements of the main signal filter with the control signal, correction is performed so that the cutoff frequency of the filter is within the allowable design value.

動作原理としては、図3に示すように、積分器の時定数τを外部クロック周波数fexに一致させるように動作させる。すなわちクロック一周期間の、参照電圧Vrefから抵抗Rを介した容量C0への電荷移動量ΔQ1(充電電荷量)と、容量C0から参照電圧−Vref量Cへの電荷移動量ΔQ2(放電電荷量)とが等しくなるよう、抵抗Rの値を調整する。 As an operation principle, as shown in FIG. 3, the integrator is operated so that the time constant τ of the integrator coincides with the external clock frequency f ex . That is, the charge transfer amount ΔQ 1 (charge charge amount) from the reference voltage Vref to the capacitor C 0 via the resistor R and the charge transfer amount ΔQ 2 from the capacitor C 0 to the reference voltage −Vref amount C during one clock cycle ( The value of the resistance R is adjusted so that the discharge charge amount becomes equal.

初期状態では抵抗値は最大レベル(RMAX)、積分器は電荷蓄積値”0”状態にリセットされる。Vrefからの電荷は正、−Vrefからの電荷は負として比較され、一定回数その到達レベル差を積分する。積分結果VoがSGを上回っていれば補正は完了となるが、下回っていれば抵抗値を一段階下げて再び差分積分動作を行う(図4参照)。抵抗制御信号は主信号のフィルタ(LPFI17)と共有されており、最適時定数が主信号のフィルタにおいても実現されることになる。素子値の調整は例えば抵抗の場合、抵抗とスイッチ素子を並列に接続したものを直列に接続しておき、そのスイッチ素子のON/OFFを切り替えることでトータルの抵抗値を変化させることが出来る。 In the initial state, the resistance value is reset to the maximum level (R MAX ), and the integrator is reset to the charge accumulation value “0” state. The charge from Vref is compared as positive, the charge from −Vref is compared as negative, and the arrival level difference is integrated a certain number of times. If the integration result Vo is higher than SG, the correction is completed, but if it is lower, the resistance value is lowered by one step and the differential integration operation is performed again (see FIG. 4). The resistance control signal is shared with the main signal filter (LPFI 17), and the optimum time constant is also realized in the main signal filter. For example, in the case of a resistor, the element value can be adjusted by connecting a resistor and a switch element connected in parallel and switching the switch element ON / OFF to change the total resistance value.

他にも(従来回路2と呼ぶ)、アナログ・フィルタのばらつきを抑える手段として、ADC前段のフィルタは折り返し雑音の除去のみを目的としたカットオフ周波数<fs/2を満足する緩めのフィルタとし、チャンネルセパレーション用のフィルタをディジタルで構成するという方法が開示されている(特許文献1参照)。   As another means (referred to as the conventional circuit 2), as a means for suppressing the variation of the analog filter, the filter in front of the ADC is a loose filter that satisfies the cutoff frequency <fs / 2 only for the purpose of removing the aliasing noise, A method of digitally configuring a filter for channel separation is disclosed (see Patent Document 1).

特許第3032268号公報Japanese Patent No. 3032268

しかしながら、上述した従来回路1は、アナログ回路においてスイッチ素子をON/OFFする調整であり、通常は抵抗素子の切り替えのみで抵抗、容量のばらつきを補正するため、容量のばらつき分は補正出来ないという問題があった。また、アナログスイッチ素子のON抵抗にもばらつきが存在するため、抵抗の補正精度にも限界があるという問題があった。さらに、本例は主信号フィルタとレプリカ回路のプロセス状態が同じであるという前提の下に成り立つものであるため、主信号フィルタとレプリカ回路の相対誤差があるとそのばらつき分は補正できないという問題があった。   However, the above-described conventional circuit 1 is an adjustment for turning ON / OFF the switch element in the analog circuit, and normally, since the resistance and capacity variations are corrected only by switching the resistance elements, the capacity variations cannot be corrected. There was a problem. In addition, since there is a variation in the ON resistance of the analog switch element, there is a problem that there is a limit to the correction accuracy of the resistance. Furthermore, since this example is based on the premise that the process state of the main signal filter and the replica circuit is the same, if there is a relative error between the main signal filter and the replica circuit, the variation cannot be corrected. there were.

一方、図5の従来回路2の動作例に示すように、従来回路2では、ADC前段のアナログ・フィルタは折り返し雑音の除去のみを目的としたアンチ・エリアシングフィルタ(AAF)であり、このようなフィルタでは希望波に隣接する妨害波を除去し切れないことから、ADCには妨害波を歪ませないだけのダイナミックレンジが必要となり、入力ダイナミックレンジの広い高価なADCが必要となるという問題があった。   On the other hand, as shown in the operation example of the conventional circuit 2 in FIG. 5, in the conventional circuit 2, the analog filter in the previous stage of the ADC is an anti-aliasing filter (AAF) only for the purpose of removing aliasing noise. In such a filter, since the interference wave adjacent to the desired wave cannot be completely removed, the ADC needs a dynamic range that does not distort the interference wave, and requires an expensive ADC having a wide input dynamic range. there were.

そこで本発明の目的は、上記問題点に鑑み、通常は乗算器に直接入力されるか、又は位相を90度シフトした後に乗算器に入力される直交復調器用の発振器の出力信号を、直接フィルタに入力してフィルタの周波数特性を測定し、その結果に応じてアナログ・フィルタ及びディジタル・ベース・バンド(DBB;Digital Base Band)側にあるディジタル・フィルタの係数を最適値に再設定する手段を設けておき、測定したバラツキ結果を基に最適なディジタル・フィルタに設定することでアナログ回路のばらつきをアナログ+ディジタルのトータルで補正するばらつき補正機能を備えた無線受信機を提供することにある。   In view of the above problems, an object of the present invention is to directly filter an output signal of an oscillator for a quadrature demodulator that is normally input directly to a multiplier or input to a multiplier after a phase shift of 90 degrees. To measure the frequency characteristics of the filter and to reset the coefficient of the digital filter on the analog filter and digital base band (DBB) side to the optimum value according to the result. An object of the present invention is to provide a radio receiver having a variation correction function for correcting a variation of an analog circuit in a total of analog + digital by setting an optimum digital filter based on the measured variation result.

本発明によれば、乗算器、 発振器、 位相シフト器からなる直交復調器により受信信号をI相とQ相に分離した後、 アナログ・フィルタ、それに続くAD変換器、それに続くディジタル・フィルタにて信号を処理する無線受信回路において、前記発振器の出力を前記アナログ・フィルタに直接入力する手段と、前記AD変換器でディジタルに変換された前記アナログ・フィルタの出力をモニタし、その出力結果に応じて前記ディジタル・フィルタの係数等のパラメータを制御することで前記アナログ・フィルタの周波数/位相特性を補正するモニタ/制御部を有することを特徴とする無線受信機が提供される。   According to the present invention, a received signal is separated into an I phase and a Q phase by a quadrature demodulator composed of a multiplier, an oscillator, and a phase shifter, and then an analog filter, an AD converter that follows it, and a digital filter that follows the analog filter. In a radio reception circuit for processing a signal, the means for directly inputting the output of the oscillator to the analog filter and the output of the analog filter converted into digital by the AD converter are monitored, and the output result is determined according to the output result. Thus, there is provided a radio receiver comprising a monitor / control unit for correcting the frequency / phase characteristics of the analog filter by controlling parameters such as coefficients of the digital filter.

前記アナログ・フィルタは、さらにそのアナログ周波数特性を補正する手段を内包しており、前記モニタ/制御部は、前記アナログ・フィルタの出力モニタによる周波数特性の測定結果に応じて前記補正する手段を制御して該アナログ周波数特性を補正する。また、前記直接入力する手段は、パス切り換えスイッチからなり、前記モニタ/制御部は、前記パス切り換えスイッチを制御して、該無線受信機の受信動作時における通常接続状態と前記周波数/位相特性をモニタ測定する特性測定状態とを切替える。さらに、前記モニタ/制御部は、前記特性測定状態において前記発振器からの発振出力周波数を測定レンジ内でスイープさせる。   The analog filter further includes means for correcting the analog frequency characteristic, and the monitor / control unit controls the correction means according to the measurement result of the frequency characteristic by the output monitor of the analog filter. Then, the analog frequency characteristic is corrected. The direct input means includes a path changeover switch, and the monitor / control unit controls the path changeover switch to determine the normal connection state and the frequency / phase characteristics during the reception operation of the radio receiver. Switches between the characteristic measurement states to be monitored. Furthermore, the monitor / control unit sweeps the oscillation output frequency from the oscillator within the measurement range in the characteristic measurement state.

また、本発明によれば、乗算器, 発振器, 位相シフト器からなる直交復調器により受信信号をI相とQ相に分離した後、第1のアナログ・フィルタ、それに続くAD変換器、それに続くディジタル・フィルタでI相信号を、第2のアナログ・フィルタ、それに続くAD変換器、それに続くディジタル・フィルタでQ相信号を処理する無線受信回路において、前記発振器の出力を前記第1又は第2の何れかのアナログ・フィルタに直接入力する手段と、前記発振器の出力を前記第2又は第1の何れかのAD変換器に直接入力する手段と、前記第1及び第2のAD変換器においてディジタルに変換された前記第1又は第2のアナログ・フィルタの出力と、前記第1又は第2のAD変換器の出力を比較し、その差に応じて前記第1及び第2のディジタル・フィルタの係数等のパラメータを制御するモニタ/制御部と、を有する無線受信機が提供される。   Further, according to the present invention, the received signal is separated into the I phase and the Q phase by the quadrature demodulator including the multiplier, the oscillator, and the phase shifter, and then the first analog filter, the subsequent AD converter, and the subsequent signal. In a radio reception circuit that processes an I-phase signal with a digital filter, a second analog filter, an AD converter that follows it, and a Q-phase signal with a digital filter that follows, the output of the oscillator is changed to the first or second output. In the first and second AD converters, means for directly inputting to any one of the analog filters, means for directly inputting the output of the oscillator to either the second or first AD converter, The output of the first or second analog filter converted to digital is compared with the output of the first or second AD converter, and the first and second digital filters are compared according to the difference. There is provided a wireless receiver having a monitor / control unit for controlling parameters such as a filter coefficient.

本発明によれば、直交復調器用の発振器の出力信号を直接フィルタに入力してフィルタの周波数特性を測定し、その結果に応じてディジタル・ベース・バンド(DBB)側にあるディジタル・フィルタの係数を最適値に再設定する手段を設けておき、測定したバラツキ結果を基に最適なディジタル・フィルタに設定することでアナログ回路のばらつきをアナログ+ディジタルのトータルで補正することが可能となる。なお、アナログ・フィルタ単独での補正も可能である。   According to the present invention, the output signal of the oscillator for the quadrature demodulator is directly input to the filter, the frequency characteristic of the filter is measured, and the coefficient of the digital filter on the digital base band (DBB) side according to the result By providing a means for resetting to the optimum value and setting the optimum digital filter based on the measured variation result, it is possible to correct the analog circuit variation in a total of analog + digital. It is also possible to perform correction with an analog filter alone.

なお、これら一連の補正動作は、システムの電源が投入されてから通信が開始されるまでの間に最低一回行われるものであるが、例えばTD−CDMAのようなバースト動作を行うシステムでは、受信動作開始前のタイミングで行うことも可能である。   These series of correction operations are performed at least once after the system power is turned on until communication is started. In a system that performs a burst operation such as TD-CDMA, for example, It is also possible to perform it at a timing before the reception operation starts.

また、本発明によれば、測定器や携帯端末外部からの制御を必要とすることなく、アナログ回路のばらつきをアナログ+ディジタルのトータルで補正出来、補正精度を一層向上させることが可能となる。   Further, according to the present invention, analog circuit variations can be corrected in a total of analog + digital without requiring control from the outside of a measuring instrument or portable terminal, and correction accuracy can be further improved.

さらに、本発明によれば、I相とQ相の相対的な特性比較をすることにより、フィルタ利得の周波数特性だけでなく、位相特性についても測定可能となる。   Furthermore, according to the present invention, not only the frequency characteristic of the filter gain but also the phase characteristic can be measured by comparing the relative characteristics of the I phase and the Q phase.

図6は、本発明によるばらつき補正回路の一実施例を示したものである。
図6において、発振器15と乗算器13の間にスイッチS1(41)、乗算器13とLPF17の間にスイッチS2(43)、発振器15とLPF17の間にスイッチS3(42)を設けておき、通常の通信時はスイッチS1、S2がON、スイッチS3がOFFとなり、発信器15の出力が乗算器13に接続され、受信信号の周波数変換が行われる。なお、本例では説明の容易のためにI系のみを示している。
FIG. 6 shows an embodiment of a variation correction circuit according to the present invention.
In FIG. 6, a switch S1 (41) is provided between the oscillator 15 and the multiplier 13, a switch S2 (43) is provided between the multiplier 13 and the LPF 17, and a switch S3 (42) is provided between the oscillator 15 and the LPF 17. During normal communication, the switches S1 and S2 are turned on and the switch S3 is turned off, the output of the transmitter 15 is connected to the multiplier 13, and the frequency conversion of the received signal is performed. In this example, only the I system is shown for ease of explanation.

LPF17の周波数特性を測定するには、スイッチS1、S2をOFF、スイッチS3をONとし、発振器の出力を直接LPF17に入力して、発振器15出力信号周波数を数KHz〜数十MHz程度までスイープさせる。そして、AD変換器19によりディジタル信号に変換されたLPF出力信号をモニタすることでフィルタLPF17の周波数特性を知ることが出来る。その周波数特性と設計値との差に応じて、DBB側にあるディジタル・フィルタDTF21の係数を制御回路(CONT44)によって最適値に再設定する。   In order to measure the frequency characteristics of the LPF 17, the switches S1 and S2 are turned OFF and the switch S3 is turned ON, and the output of the oscillator is directly input to the LPF 17, and the output signal frequency of the oscillator 15 is swept to several KHz to several tens of MHz. . The frequency characteristics of the filter LPF 17 can be known by monitoring the LPF output signal converted into a digital signal by the AD converter 19. In accordance with the difference between the frequency characteristic and the design value, the coefficient of the digital filter DTF 21 on the DBB side is reset to an optimum value by the control circuit (CONT 44).

なお、DTF21に代えて、図4に示した抵抗調整器等を用いて、LPF17の周波数特性を直接調整するようにしてもよい。これにより、ADC19は希望波のみを含むダイナミックレンジでよく、妨害波を含む入力ダイナミックレンジの広い高価なADCは不要となる(図5参照)。また、本例におけるスイッチS1〜S3の制御,発信器15の周波数スイープ制御,抵抗調整器の抵抗選択、及びLPF出力信号のモニタは、全て制御回路CONT44が実施する。この制御回路CONT44は、例えばDSP(Digital Signal Processor)等を用いることで他の部品と同様に携帯端末上に実装することが可能であり、それにより測定器や携帯端末外部からの制御を必要とすることなく、フィルタ特性の測定、及び、最適なフィルタ定数の設定をすることが可能となる。   Note that the frequency characteristics of the LPF 17 may be directly adjusted using the resistance adjuster shown in FIG. 4 instead of the DTF 21. As a result, the ADC 19 may have a dynamic range including only a desired wave, and an expensive ADC having a wide input dynamic range including an interference wave is not necessary (see FIG. 5). In addition, the control circuit CONT44 performs the control of the switches S1 to S3, the frequency sweep control of the transmitter 15, the resistance selection of the resistance adjuster, and the monitoring of the LPF output signal in this example. This control circuit CONT44 can be mounted on a portable terminal in the same manner as other components by using, for example, a DSP (Digital Signal Processor), and thus requires control from the outside of the measuring instrument or portable terminal. Therefore, it is possible to measure the filter characteristics and set the optimum filter constants.

図7は、図6の実施例における、フィルタのカットオフ周波数測定方法を示したものである。
抵抗調整器の抵抗選択した後、最初に十分周波数の低い信号を発信器15より出力し、それをLPF17に入力する。LPF17の出力信号をADC19でディジタル信号に変換した後、その信号の振幅を測定しそれを0dBとする(図7の(a))。次に周波数を上げながら同様の測定を繰り返し、入力信号周波数とADC出力信号振幅減衰量の関係を測定する(図7の(b))。
FIG. 7 shows a filter cutoff frequency measurement method in the embodiment of FIG.
After selecting the resistance of the resistance adjuster, a signal having a sufficiently low frequency is first output from the transmitter 15 and input to the LPF 17. After the output signal of the LPF 17 is converted to a digital signal by the ADC 19, the amplitude of the signal is measured and set to 0 dB ((a) in FIG. 7). Next, the same measurement is repeated while increasing the frequency, and the relationship between the input signal frequency and the ADC output signal amplitude attenuation is measured (FIG. 7B).

図8は、 本発明によるばらつき補正回路の別の実施例を示したものである。
図8では、I相とQ相から構成される無線受信機において、発信器15とI相側の乗算器I(13)の間にスイッチS1I(41)、乗算器I(13)とフィルタLPFI(17)の間にスイッチS2I(42)、発振器15とフィルタLPFI(17)の間にスイッチS3I(43)、LPFI(17)とAD変換器ADCI(19)の間にS4I(45)、発信器15とAD変換器ADCI(19)の間にS5I(46)を設けておく。
FIG. 8 shows another embodiment of the variation correcting circuit according to the present invention.
In FIG. 8, in a radio receiver composed of an I phase and a Q phase, a switch S1I (41), a multiplier I (13), and a filter LPFI are provided between the transmitter 15 and the I phase multiplier I (13). Switch S2I (42) during (17), switch S3I (43) between oscillator 15 and filter LPFI (17), S4I (45) between LPFI (17) and AD converter ADCI (19), transmission S5I (46) is provided between the converter 15 and the AD converter ADCI (19).

同様に、発信器15とQ相側の乗算器Q(14)の間に90度位相器(16)及びスイッチS1Q(51)、乗算器Q(14)とフィルタLPFQ(18)の間にスイッチS2Q(52)、発振器15とLPFQ(18)の間にスイッチS3Q(53)、LPFQ(18)とAD変換器ADCQ(20)の間にS4Q(55)、発信器15とAD変換器ADCQ(20)の間にS5Q(56)を設けておく。   Similarly, a 90-degree phase shifter (16) and a switch S1Q (51) are provided between the transmitter 15 and the Q-phase side multiplier Q (14), and a switch is provided between the multiplier Q (14) and the filter LPFQ (18). S2Q (52), switch S3Q (53) between the oscillator 15 and the LPFQ (18), S4Q (55) between the LPFQ (18) and the AD converter ADCQ (20), the transmitter 15 and the AD converter ADCQ ( S5Q (56) is provided during 20).

通常の通信時はスイッチS1I(41)、S2I(42)、S4I(45)、S1Q(51)、S2Q(52)、S4Q(55)がON、スイッチS3I(43)、S5I(46)、S3Q(53)、S5Q(56)がOFFとなり、発信器15の出力が乗算器I(12)及び90度位相器(16)を介して乗算器Q(14)に接続され、受信信号の周波数変換が行われる。   During normal communication, the switches S1I (41), S2I (42), S4I (45), S1Q (51), S2Q (52), S4Q (55) are ON, and the switches S3I (43), S5I (46), S3Q (53), S5Q (56) is turned OFF, and the output of the transmitter 15 is connected to the multiplier Q (14) via the multiplier I (12) and the 90-degree phase shifter (16) to convert the frequency of the received signal. Is done.

I相側フィルタLPFI(17)の特性を測定する場合には、スイッチS1I(41)、S2I(42)、S5I(46)をOFF、スイッチS3I(43)、S4I(45) をONとし、発信器15の出力信号を直接フィルタLPFI(17)に入力する。また同時に、S1Q(51)、S2Q(52)、S3Q(53)、S4Q(55)をOFF、S5Q(56)をONとすることで、Q側のAD変換器ADCQ(20)出力にはフィルタLPFQ(18)を通過していない信号を得ることが出来る。   When measuring the characteristics of the I-phase side filter LPFI (17), the switches S1I (41), S2I (42) and S5I (46) are turned OFF, the switches S3I (43) and S4I (45) are turned ON, and transmission is performed. The output signal of the device 15 is directly input to the filter LPFI (17). At the same time, S1Q (51), S2Q (52), S3Q (53), and S4Q (55) are turned off and S5Q (56) is turned on, so that the output of the AD converter ADCQ (20) on the Q side is filtered. A signal not passing through the LPFQ (18) can be obtained.

ここで、図6と同様の方法により、発信器15の出力信号周波数をスイープしAD変換器ADCI(19)の出力信号をモニタすることにより、フィルタLPFI(17)の周波数特性を知ることが出来る。また、I/Q相それぞれのAD変換器出力信号の位相差を測定することにより、I相側フィルタLPFI(17)の位相特性を併せて測定することが出来る。   Here, the frequency characteristic of the filter LPFI (17) can be known by sweeping the output signal frequency of the transmitter 15 and monitoring the output signal of the AD converter ADCI (19) by the same method as in FIG. . Further, by measuring the phase difference between the AD converter output signals of the I / Q phases, the phase characteristics of the I-phase side filter LPFI (17) can be measured together.

同様に、Q 相側フィルタLPFQ(18)の特性を測定する場合には、スイッチS1Q(51)、S2Q(52)、S5Q(56)をOFF、スイッチS3Q(53)、S4Q(55)をONとし、発信器15の出力信号を直接フィルタIPFQ(18)に入力する。また同時に、S1I(41)、S2I(42)、S3I(43)、S4I(45)をOFF、S5I(46)をONとすることで、I側のAD変換器ADCI(19)出力にはフィルタLPFI(17)を通過していない信号を得ることが出来る。   Similarly, when measuring the characteristics of the Q-phase side filter LPFQ (18), the switches S1Q (51), S2Q (52), and S5Q (56) are turned off, and the switches S3Q (53) and S4Q (55) are turned on. The output signal of the transmitter 15 is directly input to the filter IPFQ (18). At the same time, S1I (41), S2I (42), S3I (43), and S4I (45) are turned off and S5I (46) is turned on, so that the output of the AD converter ADCI (19) on the I side is filtered. A signal not passing through the LPFI (17) can be obtained.

ここで、図6と同様の方法により、発信器15の出力信号周波数をスイープしAD変換器ADCQ(20)の出力信号をモニタすることにより、フィルタLPFQ(18)の周波数特性を知ることが出来る。また、I/Q相それぞれのAD変換器出力信号の位相差を測定することにより、Q相側フィルタの位相特性を測定することが出来る。   Here, the frequency characteristic of the filter LPFQ (18) can be known by sweeping the output signal frequency of the transmitter 15 and monitoring the output signal of the AD converter ADCQ (20) by the same method as in FIG. . Moreover, the phase characteristic of the Q-phase side filter can be measured by measuring the phase difference between the AD converter output signals of the I / Q phases.

上記の実施例においても図6と同様に、スイッチS1I〜S4I、S1Q〜S4Qの制御,発信器の周波数スイープ,フィルタLPFI、LPFQ出力信号のモニタは、全て制御回路CONT44が実施する。この制御回路CONT44は、例えばDSP等を用いることで他の部品と同様に携帯端末上に実装することが可能であり、それにより測定器や携帯端末外部からの制御を必要とすることなく、フィルタ特性の測定、及び、最適なフィルタ定数の設定をすることが可能となる。   Also in the above embodiment, as in FIG. 6, the control circuit CONT44 performs control of the switches S1I to S4I and S1Q to S4Q, frequency sweep of the oscillator, and monitoring of the filter LPFI and LPFQ output signals. This control circuit CONT44 can be mounted on a portable terminal in the same manner as other components by using, for example, a DSP, thereby allowing a filter without requiring control from the outside of the measuring instrument or portable terminal. It is possible to measure characteristics and set an optimum filter constant.

図9には、本発明による図8の実施例におけるフィルタのカットオフ周波数と位相特性の測定方法を示している。
先ず十分に周波数の低い信号を発信器より出力し、それをQ相のフィルタLPFQ18とI相のAD変換器ADCI19に入力する。Q相フィルタLPFQ18の出力信号をAD変換器ADCQ20でディジタル信号に変換した後、その信号の振幅を測定しそれを0dBとする。また同様にI相のAD変換器ADCI19の出力信号の振幅も測定すると、I/Q相で相対誤差が無い場合、その振幅は同じく0dBである。
FIG. 9 shows a method for measuring the cutoff frequency and phase characteristic of the filter in the embodiment of FIG. 8 according to the present invention.
First, a sufficiently low frequency signal is output from the transmitter, and is input to the Q-phase filter LPFQ18 and the I-phase AD converter ADCI19. After the output signal of the Q-phase filter LPFQ18 is converted into a digital signal by the AD converter ADCQ20, the amplitude of the signal is measured and set to 0 dB. Similarly, when the amplitude of the output signal of the I-phase AD converter ADCI 19 is also measured, if there is no relative error in the I / Q phase, the amplitude is also 0 dB.

次に、発信器15の周波数を上げながら同様の測定を繰り返し、入力信号周波数と、I相側AD変換器ADCIの出力信号振幅に対するQ相側AD変換器ADCQ20の出力信号振幅減衰量の関係を測定する。同時に、各周波数におけるI相信号に対するQ相信号の遅延時間をQ相フィルタLPFQ20の位相特性とする。   Next, the same measurement is repeated while increasing the frequency of the transmitter 15, and the relationship between the input signal frequency and the output signal amplitude attenuation amount of the Q-phase side AD converter ADCQ20 with respect to the output signal amplitude of the I-phase side AD converter ADCI is shown. taking measurement. At the same time, the delay time of the Q-phase signal with respect to the I-phase signal at each frequency is set as the phase characteristic of the Q-phase filter LPFQ20.

I相フィルタLPFI17の特性を測定するには、I相のフィルタLPFI17とQ相のAD変換器ADCQ20に発信器15の出力信号を入力し、同様の測定を行えば良い。   In order to measure the characteristics of the I-phase filter LPFI 17, the output signal of the transmitter 15 may be input to the I-phase filter LPFI 17 and the Q-phase AD converter ADCQ20 and the same measurement may be performed.

図8の方法では、I相とQ相の相対的な利得や位相の変化を測定しているため、例えば発信器の出力信号振幅が周波数に応じて変化するような場合においても、フィルタの周波数特性を測定することが可能である。なお、上記の測定を抵抗調整器の抵抗選択した後に行うようにしてもよい。   In the method of FIG. 8, since the relative gain and phase change of the I phase and the Q phase are measured, for example, even when the output signal amplitude of the transmitter changes according to the frequency, the frequency of the filter It is possible to measure properties. The above measurement may be performed after selecting the resistance of the resistance adjuster.

図10に、ディジタル・フィルタ(DTF)の構成例と、その特性補正方法を示している。
図10のフィルタは一般的なFIRフィルタであり、タップ段数n段で構成されている。FIRフィルタは係数(h0〜hn)を変化させることで応答特性が変化する。
FIG. 10 shows a configuration example of a digital filter (DTF) and a characteristic correction method thereof.
The filter in FIG. 10 is a general FIR filter, and is configured with n tap stages. The response characteristic of the FIR filter changes by changing the coefficient (h 0 to h n ).

図11に示すように、ディジタル・フィルタの特性は先に測定したアナログ・フィルタ特性と理想フィルタ特性の差の特性となるよう、係数を調整すれば良い。アナログ・フィルタの特性に応じた最適な係数の値は、予めテーブルに格納しておいたものを呼び出しても良いし、その都度算出するようにしても良い。ディジタル・フィルタの係数の調整も、図6及び8の実施例で説明したように、制御回路CONT44が実施する。本例では、ADC出力のバラツキ特性1及び2の各々に対して理想特性が得られるようにDTFでバラツキ補正特性1及び2を作成してアナログ+ディジタルのトータルで補正する例を示している。なお、抵抗調整器の抵抗選択(図4参照)により先ずアナログ回路(LPF)の大まかな補正(アンチ・エリアシング・フィルタ補正及びチャネル・フィルタ補正)を行い、DTFでアナログ+ディジタルのトータル且つ正確な補正を行うようにしてもよい。   As shown in FIG. 11, the coefficient may be adjusted so that the characteristic of the digital filter becomes the difference between the analog filter characteristic measured earlier and the ideal filter characteristic. The optimum coefficient value corresponding to the characteristics of the analog filter may be retrieved from a table stored in advance or may be calculated each time. Adjustment of the digital filter coefficient is also performed by the control circuit CONT 44 as described in the embodiment of FIGS. In this example, the variation correction characteristics 1 and 2 are created by DTF so that ideal characteristics can be obtained for each of the ADC output variation characteristics 1 and 2, and the total of analog + digital correction is performed. In addition, the analog circuit (LPF) is first corrected roughly (anti-aliasing filter correction and channel filter correction) by selecting the resistance of the resistance adjuster (see FIG. 4), and the analog + digital total and accurate by DTF. May be corrected.

従来の無線通信システムにおける無線受信機の基本構成例を示した図である。It is the figure which showed the basic structural example of the radio receiver in the conventional radio | wireless communications system. 従来のばらつき補正回路(フィルタレプリカ回路)の一構成例を示した図である。It is the figure which showed one structural example of the conventional dispersion | variation correction circuit (filter replica circuit). ばらつき補正用の積分器(フィルタレプリカ回路)の一実現例を示した図である。FIG. 5 is a diagram illustrating an example of realizing an integrator (filter replica circuit) for variation correction. ばらつき補正用の積分器(フィルタレプリカ回路)の別の実現例を示した図である。FIG. 10 is a diagram showing another example of realizing an integrator (filter replica circuit) for variation correction. 従来回路の問題点を図式的に説明した図である。It is the figure which illustrated the problem of the conventional circuit schematically. 本発明によるばらつき補正回路の一実施例を示した図である。It is the figure which showed one Example of the dispersion | variation correction circuit by this invention. 図6におけるカットオフ周波数測定方法を示した図である。It is the figure which showed the cut-off frequency measuring method in FIG. 本発明によるばらつき補正回路の別の実施例を示した図である。It is the figure which showed another Example of the dispersion | variation correction circuit by this invention. 図8におけるフィルタのカットオフ周波数と位相特性の測定方法を示した図である。It is the figure which showed the measuring method of the cut-off frequency and phase characteristic of the filter in FIG. ディジタル・フィルタ(DTF)の構成例と、その特性補正方法を示した図である。It is the figure which showed the structural example of the digital filter (DTF), and its characteristic correction method. 本発明によるアナログ・フィルタ特性の係数調整例を示した図である。It is the figure which showed the coefficient adjustment example of the analog filter characteristic by this invention.

符号の説明Explanation of symbols

11 アンテナ
12 低雑音増幅器
13、14 乗算器
15 発振器
16 90度位相器
17、18 アナログ・フィルタ
19、20 ADコンバータ
21、22 デジタル・フィルタ
41〜43、45〜46 スイッチ
51〜53、55〜56 スイッチ
44 制御部
DESCRIPTION OF SYMBOLS 11 Antenna 12 Low noise amplifier 13, 14 Multiplier 15 Oscillator 16 90 degree phase shifter 17, 18 Analog filter 19, 20 AD converter 21, 22 Digital filter 41-43, 45-46 Switch 51-53, 55-56 Switch 44 control unit

Claims (5)

乗算器、 発振器、 位相シフト器からなる直交復調器により受信信号をI相とQ相に分離した後、 アナログ・フィルタ、それに続くAD変換器、それに続くディジタル・フィルタにて信号を処理する無線受信回路において、
前記発振器の出力を前記アナログ・フィルタに直接入力する手段と、
前記AD変換器でディジタルに変換された前記アナログ・フィルタの出力をモニタし、その出力結果に応じて前記ディジタル・フィルタの係数等のパラメータを制御することで前記アナログ・フィルタの周波数/位相特性を補正するモニタ/制御部を有することを特徴とする無線受信機。
Wireless reception that separates the received signal into I and Q phases by a quadrature demodulator consisting of a multiplier, oscillator, and phase shifter, and then processes the signal with an analog filter, followed by an AD converter, and then a digital filter In the circuit
Means for directly inputting the output of the oscillator to the analog filter;
The output of the analog filter converted into digital by the AD converter is monitored, and the frequency / phase characteristics of the analog filter are controlled by controlling parameters such as the coefficient of the digital filter according to the output result. A radio receiver comprising a monitor / control unit for correction.
前記アナログ・フィルタは、さらにそのアナログ周波数特性を補正する手段を内包しており、
前記モニタ/制御部は、前記アナログ・フィルタの出力モニタによる周波数特性の測定結果に応じて前記補正する手段を制御して該アナログ周波数特性を補正すること、を特徴とする請求項1記載の無線受信機。
The analog filter further includes means for correcting the analog frequency characteristic,
2. The radio according to claim 1, wherein the monitor / control unit corrects the analog frequency characteristic by controlling the correcting unit according to a measurement result of the frequency characteristic by an output monitor of the analog filter. Receiving machine.
前記直接入力する手段は、パス切り換えスイッチからなり、
前記モニタ/制御部は、前記パス切り換えスイッチを制御して、該無線受信機の受信動作時における通常接続状態と前記周波数/位相特性をモニタ測定する特性測定状態とを切替える、ことを特徴とする請求項1記載の無線受信機。
The means for direct input comprises a path switch.
The monitor / control unit controls the path changeover switch to switch between a normal connection state during a reception operation of the wireless receiver and a characteristic measurement state for monitoring and measuring the frequency / phase characteristic. The wireless receiver according to claim 1.
前記モニタ/制御部は、前記特性測定状態において前記発振器からの発振出力周波数を測定レンジ内でスイープさせる、ことを特徴とする請求項3記載の無線受信機。   4. The radio receiver according to claim 3, wherein the monitor / control unit sweeps the oscillation output frequency from the oscillator within the measurement range in the characteristic measurement state. 乗算器, 発振器, 位相シフト器からなる直交復調器により受信信号をI相とQ相に分離した後、第1のアナログ・フィルタ、それに続くAD変換器、それに続くディジタル・フィルタでI相信号を、第2のアナログ・フィルタ、それに続くAD変換器、それに続くディジタル・フィルタでQ相信号を処理する無線受信回路において、
前記発振器の出力を前記第1又は第2の何れかのアナログ・フィルタに直接入力する手段と、
前記発振器の出力を前記第2又は第1の何れかのAD変換器に直接入力する手段と、
前記第1及び第2のAD変換器においてディジタルに変換された前記第1又は第2のアナログ・フィルタの出力と、
前記第1又は第2のAD変換器の出力を比較し、その差に応じて前記第1及び第2のディジタル・フィルタの係数等のパラメータを制御するモニタ/制御部と、を有することを特徴とする無線受信機。
The quadrature demodulator consisting of a multiplier, oscillator, and phase shifter separates the received signal into I and Q phases, and then the I-phase signal is output by the first analog filter, the subsequent AD converter, and the subsequent digital filter. , A second analog filter, followed by an AD converter, followed by a digital receiver that processes the Q-phase signal,
Means for directly inputting the output of the oscillator to either the first or second analog filter;
Means for directly inputting the output of the oscillator to the second or first AD converter;
The output of the first or second analog filter digitally converted in the first and second AD converters;
A monitor / control unit that compares outputs of the first and second AD converters and controls parameters such as coefficients of the first and second digital filters in accordance with a difference between the outputs. And wireless receiver.
JP2006196767A 2006-07-19 2006-07-19 Wireless receiver provided with variation correction circuit Pending JP2008028530A (en)

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2014068116A (en) * 2012-09-25 2014-04-17 Sumitomo Electric Networks Inc Compensation device and radio communication device
JP5835508B1 (en) * 2015-02-24 2015-12-24 沖電気工業株式会社 Evaluation method of low-pass filter
KR101625965B1 (en) 2012-04-20 2016-05-31 후아웨이 테크놀러지 컴퍼니 리미티드 Device and method for communications correction

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JP2004007818A (en) * 2003-08-08 2004-01-08 Toshiba Corp Wireless apparatus
JP2005348195A (en) * 2004-06-04 2005-12-15 Toshiba Corp Digital receiver and reception method
JP2006101388A (en) * 2004-09-30 2006-04-13 Renesas Technology Corp Receiver, receiving method and mobile radio terminal

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JP2004007818A (en) * 2003-08-08 2004-01-08 Toshiba Corp Wireless apparatus
JP2005348195A (en) * 2004-06-04 2005-12-15 Toshiba Corp Digital receiver and reception method
JP2006101388A (en) * 2004-09-30 2006-04-13 Renesas Technology Corp Receiver, receiving method and mobile radio terminal

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101625965B1 (en) 2012-04-20 2016-05-31 후아웨이 테크놀러지 컴퍼니 리미티드 Device and method for communications correction
JP2014068116A (en) * 2012-09-25 2014-04-17 Sumitomo Electric Networks Inc Compensation device and radio communication device
JP5835508B1 (en) * 2015-02-24 2015-12-24 沖電気工業株式会社 Evaluation method of low-pass filter

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