JP2008004891A - Spin transistor - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a spin transistor which can control currents well. <P>SOLUTION: In the spin transistor, a double ferromagnetic tunnel junction is formed by a source layer 1 constituted by half metal, an insulating layer 2, a gate layer 3 constituted by half metal, an insulating layer 4 and a drain layer 5 constituted by half metal, and further, a source electrode 6, a gate electrode 7 and a drain electrode 8 are provided. By constituting the gate layer 3 with the half metal, a rate of change of resistance of the spin transistor due to an external magnetic field becomes large, so that a current ratio provided by on/off of gate voltage is large. As a result, the currents flowing through the spin transistor can be controlled well. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to a spin transistor used for a nonvolatile magnetic memory (MRAM), a microwave oscillator, a magnetic sensor, a light emitting element, a spin battery, and the like.

  Conventionally, a spin transistor in which a source layer and a drain layer are made of a ferromagnetic material has been proposed using a semiconductor or a nonmagnetic metal as an intermediate gate layer (for example, Patent Document 1).

JP-A-2005-197271

  However, in the conventional spin transistor, since the rate of change of the resistance of the spin transistor due to an external magnetic field is small, the current ratio due to on / off of the gate voltage is small, and as a result, it is difficult to control the current flowing through the spin transistor well. .

  An object of the present invention is to provide a spin transistor in which current can be controlled well.

The spin transistor according to the present invention comprises:
A source layer and a drain layer made of a ferromagnetic material;
A gate layer made of half metal,
A first insulating layer interposed between the source layer and the gate layer;
And a second insulating layer interposed between the gate layer and the drain layer.

  According to the present invention, since the rate of change in resistance of the spin transistor due to the external magnetic field is increased by configuring the gate layer with a half metal, the current ratio due to on / off of the gate voltage is increased, and as a result, the spin transistor flows. The current can be controlled well.

In order to increase the rate of change in resistance of the spin transistor due to an external magnetic field, the ferromagnetic material is preferably a half metal, and more preferably the half metal is Co ₂ MnSi.

An embodiment of a spin transistor according to the present invention will be described in detail with reference to the drawings.
FIG. 1 is a cross-sectional view of a spin transistor according to the present invention. In this spin transistor, a double ferromagnetic tunnel junction is formed by a source layer 1 made of half metal, an insulating layer 2, a gate layer 3 made of half metal, an insulating layer 4 and a drain layer 5 made of half metal. The source electrode 6, the gate electrode 7, and the drain electrode 8 are provided. In the present embodiment, the half metal is made of Co ₂ MnSi, the insulating layer 2 is made of AlO, and the source electrode 6, the gate electrode 7 and the drain electrode 8 are made of Cr.

  FIG. 2 is a diagram for explaining the operating principle of the spin transistor according to the present invention. The present invention utilizes a half-metal gap in which one electron spin is not in a Fermi surface and a band gap exists. FIGS. 2A and 2B show a state in which the gate voltage is off. 2C and 2D show a state where the gate voltage is on.

  2 (a) and 2 (c), the magnetization state of the source layer 1 and the drain layer 5 is upward and the magnetization state of the gate layer 3 is downward. In FIGS. 2 (b) and 2 (d), the source layer 1 1, the magnetization state of the gate layer 3 and the drain layer 5 is downward.

  The magnitude of the current flowing through the tunnel junction is proportional to the product of the state density of the Fermi surface of the electrode. Electrons also preserve the spin direction during the tunneling process. In consideration of these, in the state of FIG. 2A, even if upward spin electrons of the source layer 1 attempt to tunnel to the gate layer 3, no upward spin exists on the Fermi surface of the gate layer 3, so tunneling is not possible. Further, since downward spin does not exist on the Fermi surface of the source layer 1, it does not contribute to tunneling. Therefore, no current flows in the state of FIG.

  In the state of FIG. 2B, the magnetization direction of the drain layer 5 is opposite to the state of FIG. 2A, but no current flows for the same reason as described in the state of FIG. . In the state of FIG. 2C, a gate voltage is applied, and the height of the Fermi surface of the gate layer 3 is changed. When the magnitude of the gate voltage is greater than or equal to the band gap of the gate layer 3, as shown in FIG. 2C, upward spin can be tunneled from the source layer 1 to the gate layer 3, and a current flows. In the state of FIG. 2D, the magnetization direction of the drain layer 5 is opposite to the state of FIG. 2C. In this case, tunneling from the gate layer 3 to the drain layer 5 becomes impossible, and current flows. Absent.

  The spin transistor according to the present invention is operated using the four states of FIGS. 2 (a) to 2 (d). In other words, it has a function (switching function) that does not or does not flow current when the gate voltage is turned on and off, and a function (memory function) that does not flow or flow current depending on the magnetization direction of the drain layer 5. Therefore, when the MRAM is configured by using the spin transistor according to the present invention, the switching transistor can be omitted, so that the MRAM can be made very compact, and the influence of the wiring delay is not exerted.

FIG. 3 is a diagram showing voltage dependence of tunnel conductance caused by a half metal gap in a Co ₂ MnSi / AlO / Co ₂ MnSi end tunnel junction of a spin transistor according to the present invention. FIG. 4 corresponds to FIG. It is a figure which shows tunneling. In Figure 3 and 4, the Parallel, means when the magnetization of the magnetization and the other _Co 2 MnSi of one _Co 2 MnSi are parallel to each other, and the Anti-parallel, magnetized and the other one of _Co 2 MnSi This means that the magnetizations of Co ₂ MnSi are antiparallel to each other. Also, (i) to (v) in FIG. 3 correspond to (i) to (v) in FIG. 4, respectively.

  As shown in FIG. 3, when a bias voltage is applied in the anti-parallel state, the conductance increases abruptly when the bias voltage is 100 to 200 mV, and is about five times that when the bias voltage is zero. Therefore, it can be seen that the rate of change of the resistance of the spin transistor due to the external magnetic field is increased.

The present invention is not limited to the above-described embodiment, and many changes and modifications can be made.
For example, in the above embodiment, the case where the source layer and the drain layer are made of half metal has been described. However, the source layer and the drain layer may be made of a ferromagnetic material other than the half metal.

Although the case where the half metal is Co ₂ MnSi has been described, other half metals such as Co ₂ MnAl can be used, and the insulating layer has an amorphous structure other than AlO or a crystalline structure such as MgO. Can be. Furthermore, the electrode can be made of an electrode material other than Cr.

1 is a cross-sectional view of a spin transistor according to the present invention. It is a figure for demonstrating the principle of operation of the spin transistor by this invention. FIG. 5 is a diagram showing voltage dependence of tunnel conductance caused by a half metal gap in a Co ₂ MnSi / AlO / Co ₂ MnSi end tunnel junction of a spin transistor according to the present invention. It is a figure which shows the tunneling corresponding to FIG.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Source layer 2, 4 Insulating layer 3 Gate layer 5 Drain layer 6 Source electrode 7 Gate electrode 8 Drain electrode

Claims (3)

A source layer and a drain layer made of a ferromagnetic material;
A gate layer made of half metal,
A first insulating layer interposed between the source layer and the gate layer;
A spin transistor comprising a second insulating layer interposed between the gate layer and the drain layer.   2. The spin transistor according to claim 1, wherein the ferromagnetic material is a half metal. The spin transistor according to claim 1, wherein the half metal is Co ₂ MnSi.

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