JP2007324649A - Imaging apparatus and imaging control method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide an imaging apparatus capable of performing good flash photographing when time difference sequential reading is executed for an imaging element. <P>SOLUTION: The imaging apparatus has an imaging element 14 for executing photoelectric conversion for an object image; an accumulation control means 50 for starting and finishing electric charge accumulation in a plurality of pixel lines from a first pixel line to a second pixel line in the imaging element, while providing a time difference per predetermined number of pixel lines; a light emission control means 50 for causing an illumination unit for illuminating an object to execute first light emission, and then, causing it to execute second light emission for photographing a recording image; and a light quantity setting means 50 for setting the light quantity in the second light emission, on the basis of information corresponding to accumulated electric charges in the plurality of pixel lines in the first light emission. The light emission control means causes the illumination unit to continuously execute the first light emission from start of electric charge accumulation in the first pixel line, until completion of electric charge accumulation in the second pixel line. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

The present invention relates to an imaging apparatus that captures a subject image by performing photoelectric conversion with an imaging element, and more particularly to an imaging apparatus that performs imaging using flash light.

  In an imaging apparatus equipped with a CCD image sensor, a technique is known in which a flash is pre-lighted prior to flash photography, and the amount of flash light emission at the time of main photographing, that is, the amount of light emission of main light emission, is obtained from image information obtained at that time. (See Patent Document 1).

  In addition, there is a CMOS image sensor as an image pickup element that replaces the CCD image sensor. The CMOS image sensor is characterized in that its circuit is composed of MOS transistors, so that it consumes very little power and does not require multiple power supplies including negative voltages for charge transfer like the CCD sensor. Have.

  FIG. 12 shows the structure of the CMOS sensor. In the figure, reference numeral 601 denotes a photodiode (hereinafter referred to as PD), which has a function of converting light into electric charge, and accumulates electric charge according to the exposure amount. Reference numeral 602 denotes a floating diffusion (hereinafter referred to as FD). Reference numeral 603 denotes a transfer gate (hereinafter referred to as TX), which transfers the charge to the next stage FD 602 for reading out the charge as charge accumulation ends.

  Reference numeral 604 denotes a reset gate (hereinafter referred to as RS), which is used to reset the FD 602 and the PD 601. Reference numeral 605 denotes a floating diffusion amplifier (hereinafter referred to as FD amplifier), which converts the amount of charge accumulated in the PD 601 into a voltage. Reference numeral 606 denotes a selection gate (hereinafter referred to as SEL), which functions as a selection switch for reading a signal from the FD 602.

  One pixel is formed by a circuit including the PD 601, FD 602, TX 603, RS 604, FD amplifier 605, and SEL 606, and the CCD image sensor has this circuit for the number of pixels.

  Next, the operation of the thus configured CMOS sensor will be described. First, the TX 603 and the RS 604 are turned on before the charge accumulation is started. As a result, the PD 601 and the FD 602 are reset.

  Next, TX 603 and RS 604 are turned off. Thereby, charge accumulation is started. The charge of the FD 602 at the start of charge accumulation is zero, the SEL 606 is turned on, this zero charge is read to the vertical output line 625, and reset to the capacitor 608 of the circuit module existing in the number of columns (columns) in the SN circuit. Remember as a level.

  Next, when a predetermined exposure time (charge accumulation time) has elapsed, the TX 603 is turned on, and the charge stored in the PD 601 is transferred to the FD 602 through the TX 603. Then, the SEL 606 is turned on for reading, the output voltage corresponding to the accumulated charge is read to the vertical output line 625, and the output voltage (signal level) is stored in the capacitor 609 via the switch 611.

  Thus, the reset level and the signal level are stored in the capacitors 608 and 609, respectively, and these are input to the differential amplifier 623 when the read switches 615 and 616 are turned on. In this way, an accumulated charge signal from which the noise level has been deleted is obtained.

  Further, a read operation of the accumulated charge signal from the CMOS sensor will be described with reference to FIG. In the figure, A indicates a CMOS sensor, and S indicates a light emission waveform of a flash. C indicates the reset release timing of the CMOS sensor, and the photoelectric conversion (charge accumulation) of incident light is started simultaneously with the reset release. D is the charge accumulation end timing, and the period from C to D corresponds to the charge accumulation time.

  FIG. 13 shows charge accumulation and readout operations in a so-called time difference sequential readout system. In this time difference sequential readout method, for example, charge accumulation in each pixel line from the uppermost pixel line to the lowermost pixel line in the CMOS sensor is started and ended with a time difference for each pixel line. That is, charge accumulation is started while shifting the time by one pixel line in order from the top pixel line from time t0, and charge accumulation for the same time is performed in each pixel line.

  When the charge accumulation of the uppermost pixel line is completed at time t2, the pixel data of each pixel line is sequentially read out at the timing indicated by E. Here, “time difference (shift time)” corresponds to the readout time of one pixel line of the CMOS sensor.

Here, as shown in FIG. 13, in order to synchronize with the flash emission, it is necessary to secure a time during which all the pixel lines are exposed at the same time from time t1 to time t2. During this time, as shown by S, the flash is synchronized and emits light, and an image by reflected light from the illuminated subject can be obtained. Then, using this image, overexposure or underexposure is calculated, and the light emission amount of the main light emission is calculated. Thus, flash photography with appropriate exposure can be performed.
JP-A-10-301173 (paragraphs 0017 to 0027, FIG. 3 etc.)

  However, when trying to obtain a flash-tuned image by the method described with reference to FIG. 13 using a CMOS sensor, there is a problem that if the external light is bright, the pixel is saturated and measurement cannot be performed. .

  For example, in the time-sequential readout method described with reference to FIG. 13, the CMOS sensor has a horizontal pixel count of 1500 pixels, a vertical pixel count of 1000 pixels, a total of 1.5 million pixels, and a readout clock of 48 MHz. explain.

In FIG. 13, the readout time TH of one pixel line in the horizontal direction in the CMOS sensor is
TH = 1/4800000 × 1500 = 31.25 [usec]
It is.

Therefore, the time TR required to read all the pixel lines is
TR = 31.25 [usec] × 1000
= 31.25 [msec]
It becomes. This TR corresponds to the time between times t2 and t3 in FIG. 13, and also substantially corresponds to the time between times t0 and t1.

  When the all-pixel exposure times t1 to t2 for flash tuning are set to 2 [msec], and this is added to the time TR, the time t0 to t2 required for one line of charge accumulation is 33.25 [ msec].

When this charge accumulation time is converted into an Avex value TV,
TV = −log ₂ (0.03325) = 5
It becomes. For this reason, if the open F value of the photographic lens is 2.8,
AV = log ₂ (2.8) × 2 = 3
Thus, the appropriate exposure amount EV = AV + TV = 8.

  Since the subject brightness in the cloudy sky is about BV = 3 to 7, if the ISO sensitivity of the CMOS sensor is 100 = SV5, the appropriate exposure amount in the cloudy sky is BV + SV = EV8-11. That is, if it is brighter than cloudy, the pixels are saturated only with natural light, and the subject brightness cannot be obtained from the acquired image.

  The present invention provides an image pickup apparatus and an image pickup control method capable of performing good flash photography without causing pixel saturation even for a subject having relatively high luminance when time-sequential readout is performed on an image pickup device. Is one of the purposes.

  An image pickup apparatus according to an aspect of the present invention includes an image pickup device that photoelectrically converts a subject image, and charge accumulation in a plurality of pixel lines from a first pixel line to a second pixel line in the image pickup device. Storage control means for starting and ending with a time difference for each pixel line, and light emission for causing the illumination unit that illuminates the subject to perform the first light emission and then the second light emission for photographing the recording image A control unit; and a light emission amount setting unit configured to set a light emission amount of the second light emission based on information corresponding to the accumulated charges in the plurality of pixel lines during the first light emission. The light emission control means is characterized in that the first light emission is continuously performed from the start of charge accumulation in the first pixel line to the end of charge accumulation in the second pixel line.

  According to another aspect of the present invention, there is provided an imaging control method that performs charge accumulation in a plurality of pixel lines from a first pixel line to a second pixel line in an imaging element that photoelectrically converts a subject image. An accumulation control step that starts and ends with a time difference for each pixel line, and a light emission that causes the illumination unit that illuminates the subject to perform the first light emission, and then performs the second light emission for photographing the recording image. A control step, and a light emission amount setting step for setting a light emission amount of the second light emission based on information corresponding to the accumulated charges in the plurality of pixel lines during the first light emission. In the light emission control step, the first light emission is continuously performed from the start of charge accumulation in the first pixel line to the end of charge accumulation in the second pixel line.

  According to the present invention, when time-sequential readout is performed with respect to an image sensor, pixel saturation is less likely to occur even for a subject having relatively high luminance when performing the first light emission. Therefore, an appropriate light emission amount of the second light emission can be set based on the information obtained by the first light emission, and a good flash photography can be performed.

  Embodiments of the present invention will be described below with reference to the drawings.

  FIG. 1 shows a configuration of a camera system including a single-lens reflex digital camera as an imaging apparatus that is Embodiment 1 of the present invention and an interchangeable lens attached to the camera. In FIG. 1, reference numeral 100 denotes a single-lens reflex digital camera (camera body).

  Reference numeral 1 denotes a main mirror, which is disposed in a photographing optical path from a photographing lens 201 (to be described later) in the finder observation state, and retracts out of the photographing optical path in the photographing state. Further, the main mirror 1 is a half mirror, and when arranged in the photographing optical path, transmits about half of the light beam from the subject to a focus detection optical system described later.

  Reference numeral 2 denotes a focusing plate, on which a subject image formed by a photographing lens 201 described later is projected.

  A sub-mirror 3 is arranged (down) in the photographing optical path in the finder observation state together with the main mirror 1 and retracts (ups) out of the photographing optical path in the photographing state. The sub mirror 3 reflects light transmitted through the main mirror 1 downward in the viewfinder observation state, and guides it to a focus detection unit described later.

  Reference numerals 4 and 5 denote a pentaprism and an eyepiece constituting an optical viewfinder, and the photographer can observe the photographing screen (subject) by observing the focus plate 2 through the optical viewfinder. This state is referred to as an optical viewfinder mode (OVF mode).

  Reference numerals 6 and 7 denote an imaging lens and a photometric sensor for measuring the subject brightness in the viewfinder observation screen. The photometric sensor 7 has a logarithmic compression circuit, and its output is logarithmically compressed. Reference numeral 8 denotes a phase difference detection type focus detection unit.

  Reference numeral 9 denotes a focal plane shutter, and reference numeral 14 denotes an image sensor such as a CMOS image sensor. The image sensor used in this embodiment is a CMOS image sensor and has a configuration similar to that shown in FIG.

  Reference numeral 16 denotes an A / D converter that converts an analog signal output from the image sensor 14 into a digital signal.

  A timing generation circuit 18 supplies a clock signal and a control signal to the image sensor 14, the A / D converter 16 and the D / A converter 26, and is controlled by the memory control circuit 22 and the system controller 50.

  An image processing circuit 20 performs predetermined pixel interpolation processing and color conversion processing on the digital signal from the A / D converter 16 or the data from the memory control circuit 22 to generate photographed image data. Further, the image processing circuit 20 performs predetermined calculation processing using the captured image data, and also performs TTL (through-the-lens) type AWB (auto white balance) processing based on the obtained calculation result.

  A memory control circuit 22 controls the A / D converter 16, the timing generation circuit 18, the image processing circuit 20, the image display memory 24, the D / A converter 26, the memory 30, and the compression / decompression circuit 32.

  Data from the A / D converter 16 is written into the image display memory 24 or the memory 30 via the image processing circuit 20 and the memory control circuit 22 or via the memory control circuit 22.

  Reference numeral 24 denotes an image display memory, 26 denotes a D / A converter, and 28 denotes an image display unit constituted by a TFT-LCD or the like. The display image data written in the image display memory 24 is displayed by the image display unit 28 via the D / A converter 26. If the captured image data is sequentially displayed using the image display unit 28 in a state where the main mirror 1 and the sub mirror 3 are up, an electronic viewfinder function can be realized. A state in which the electronic viewfinder function is enabled is referred to as an electronic viewfinder (EVF) mode.

  Reference numeral 30 denotes a memory for storing still images and moving images, which are captured image data, and has a sufficient storage capacity for storing a predetermined number of still images and moving images for a predetermined time. The memory 30 can also be used as a work area for the system controller 50.

  A compression / decompression circuit 32 compresses and decompresses image data by adaptive discrete cosine transform (ADCT) or the like, reads an image stored in the memory 30 and performs compression processing or decompression processing. Then, the processed data is written into the memory 30.

  An exposure control circuit 40 controls the focal plane shutter 9. Reference numeral 41 denotes a mirror control circuit including a motor and a drive circuit for moving the main mirror 1 and the sub mirror 3 up and down.

  The system controller 50 includes a CPU and the like, and controls the entire camera 100. A memory 52 stores constants, variables, computer programs, and the like for operating the system controller 50. The system controller 50 has functions as accumulation control means, light emission control means, and light emission amount setting means.

  Reference numeral 54 denotes a display unit including an LCD, an LED, and a speaker that output characters, images, sounds, and the like representing the operating state of the camera 100, messages, and the like in accordance with the execution of a program in the system controller 50. The display unit 54 is disposed at a position where it is easy to visually recognize, such as in the vicinity of the operation switch. A part of the display unit 54 is installed in the optical viewfinder.

  Reference numeral 56 denotes a nonvolatile memory capable of electrically erasing and recording data, for example, an EEPROM.

  Reference numerals 60, 62, 64, 66, 68 and 70 are operation switches for inputting various operation instructions of the system controller 50. The operation switches include a push switch, a dial, a touch panel, a pointing device based on line-of-sight detection, a voice recognition device, and the like. Is done.

  Reference numeral 60 denotes a mode dial switch which is operated to turn on / off the power and select various shooting modes.

  Reference numeral 62 denotes a shooting preparation switch (SW1) which is turned on by a half-press operation (first stroke operation) of a shutter button (not shown). When the shooting preparation switch 62 is turned on, shooting preparation operations such as AF processing, AE processing, and AWB processing are started.

  Reference numeral 64 denotes a photographing switch (SW2) which is turned on when the shutter button is fully pressed (second stroke operation). When the photographing switch 64 is turned on, photographing processing is executed. In the photographing process, a signal read from the image sensor 14 is passed through the A / D converter 16, the image processing circuit 20, and the memory control circuit 22, or directly from the A / D converter through the memory control circuit 22. The image data is written in the memory 30. Further, the photographing process includes a developing process using a calculation in the image processing circuit 20 and the memory control circuit 22. Further, subsequent to the photographing process, image data is read from the memory 30 and a recording process for writing the image data compressed by the compression / decompression circuit 32 to the recording medium 102 or the memory 210 is also executed.

  Reference numeral 66 denotes a finder mode setting switch, which is a switch for switching between the OVF mode and the EVF mode. When the EVF mode is set, the main mirror 1 and the sub mirror 3 are raised, the shutter 9 is opened, and an image (through image) obtained using the image sensor 14 is displayed on the image display 28.

  Reference numeral 68 denotes a quick review switch, which is operated to display a photographed image on the image display 28.

  An operation unit 70 includes various buttons, a touch panel, and the like, and includes a menu button, a set button, an image quality selection button, an exposure correction button, a date / time setting button, and the like.

  Reference numeral 80 denotes a power supply control circuit that detects the presence or absence of the power supply 86 and the remaining capacity, controls the DC-DC converter based on the detection result and an instruction from the system controller 50, and records a necessary voltage for a necessary period. This is supplied to each block including the medium 102.

  82 is a connector on the power control circuit 80 side, and 84 is a connector on the power source side. A power source 86 includes a primary battery such as an alkaline battery or a lithium battery, a secondary battery such as a NiCd battery, a NiMH battery, or a Li battery, an AC adapter, or the like.

  Reference numeral 90 denotes an interface with a recording medium 120 such as a memory card or a hard disk. Reference numeral 92 denotes a connector for connecting to the recording medium 120. A recording medium detection circuit 98 detects whether or not the connector 92 and the recording medium 120 are attached to the camera 100. The recording medium 120 includes a memory card, a hard disk, and the like, and includes a recording unit 122 that includes a semiconductor memory, a magnetic disk, and the like, an interface 124 with the camera 100, and a connector 126 that connects the camera 100.

  A communication circuit 72 has various communication functions such as RS232C, USB, IEEE1394, P1284, SCSI, modem, LAN, and wireless communication.

  Reference numeral 73 denotes a connector for connecting the camera 100 to another device by the communication circuit 72 or an antenna for wireless communication.

  399 is a communication line for performing communication between the interchangeable lens 200 described later and the system controller 50 on the camera side, and 499 is a communication line for performing communication between the external flash unit 400 described later and the system controller 50.

  Next, the interchangeable lens 200 will be described. The interchangeable lens 200 is detachably attached to the camera 100 via a lens mount 209. Electrically, it is connected to the camera 100 by a connector 210 having a serial communication line and a power supply line.

  Reference numeral 201 denotes a focus lens, and 202 denotes a focus drive actuator that drives the focus lens 201 in the optical axis direction. A focus control circuit 211 controls the focus drive actuator 202 based on a command from the lens controller 206.

  Reference numeral 203 denotes a subject distance detection circuit having an encoder that detects the subject distance from the position of the focus lens 201. A diaphragm 204 adjusts the amount of light, and a diaphragm driving actuator 250 drives the diaphragm 204. Reference numeral 205 denotes an aperture control circuit that controls the aperture drive actuator 250 based on a command from the lens controller 206.

  Reference numeral 207 denotes a zooming lens for zooming, and reference numeral 208 denotes a zoom drive actuator that drives the zooming lens 207 in the optical axis direction. A zoom control circuit 212 controls the zoom drive actuator 207.

  The lens controller 206 is configured by a CPU or the like, and controls focus drive, aperture drive, and the like, and controls communication with the system controller 50 on the camera 100 side.

  Next, the external flash unit 400 as an illumination unit will be described. The flash unit 400 is connected to the camera 100 via a hot shoe 410 and a contact 411 for performing communication with the camera 100.

  FIG. 2 shows an electrical circuit inside the flash unit 400. A battery 401 serves as a power source. A DC-DC converter 402 boosts the battery voltage to a predetermined high voltage level.

  Reference numeral 403 denotes a main capacitor for accumulating light emission energy. Reference numerals 404 and 405 denote resistors, which divide the voltage of the main capacitor 403 into a predetermined ratio.

  Reference numeral 406 denotes a coil for limiting the light emission current, reference numeral 407 denotes a diode for absorbing a counter electromotive voltage generated when light emission is stopped, and reference numeral 410 denotes an Xe (xenon) tube. Reference numeral 421 denotes a trigger generation circuit, and 422 denotes a light emission control circuit such as an IGBT.

  A data selector 430 selects D0, D1, and D2 and outputs them to Y by a combination of two inputs Y0 and Y1. Reference numeral 431 denotes a flat light emission level control comparator, and reference numeral 432 denotes a flash light emission amount control comparator.

  Reference numeral 435 denotes a photodiode as a light receiving sensor for flat light emission control, which monitors the light output of the Xe tube 410. A photometric circuit 434 amplifies a minute current flowing through the photodiode 435 and converts the photocurrent into a voltage.

  Reference numeral 438 denotes a photodiode which is a light receiving sensor for controlling flash emission, and monitors the light output of the Xe tube 410. Reference numeral 436 denotes an integral photometry circuit for logarithmically compressing the photocurrent flowing through the photodiode 438 and compressing and integrating the light emission amount of the Xe tube 410.

  A flash controller 440 is configured by a CPU or the like that controls the operation of the entire flash unit 400.

  Next, the terminals of the flash controller 440 will be described. CNT is a control output terminal for controlling charging of the DC / DC converter 402, and CLK is an input terminal to which a synchronous clock for serial communication with the camera 100 is input. DO is a serial output terminal for transferring serial data from the flash unit 400 to the camera 100 in synchronization with the synchronization clock. DI is a serial data input terminal for transferring serial data from the camera 100 to the flash unit 400 in synchronization with the synchronization clock.

  INT is an integration control output terminal of the integral photometry circuit 436, and AD0 is an A / D conversion input terminal for reading an integral voltage indicating the light emission amount of the integral photometry circuit 436. DA0 is a D / A output terminal for outputting the comparator voltage of the comparators 431 and 432.

  Y0 and Y1 are output terminals for outputting signals according to the selection state of the data selector 430 described above, and TRIG is an output terminal for a light emission trigger.

  Next, the operation of the camera 100 (mainly the system controller 50) of this embodiment will be described with reference to FIGS. 3 to 8 are flowcharts showing the contents of the computer program stored in the memory 52, and the system controller 50 operates according to the program.

  First, FIGS. 3 and 4 are flowcharts of the main routine. The parts with the same circled alphabetical characters in FIGS. 3 and 4 indicate that they are connected to each other. “S” indicates a step.

  The system controller 50 initializes various control flags, control parameters, and the like in response to power-on of the camera 100 (S101), and initializes the display of the image display unit 28 to OFF (S102).

  Next, the system controller 50 determines the setting position of the mode dial 60 (S103). When the mode dial 60 is set to power OFF, the process proceeds to S105, and a predetermined end process is performed. Specifically, the display of each display unit is terminated, and various control flags, control parameters, setting values, setting modes, and the like are recorded in the nonvolatile memory 56. Further, unnecessary power supply is cut off through the power control circuit 80. Then, the process returns to S103.

  If the mode dial 60 is set to the shooting mode in S103, the process proceeds to S106. If the mode dial 60 is set to another mode in S103, the system controller 50 executes processing according to the selected mode (S104), and returns to S103 when the processing is completed.

  In S <b> 106, the system controller 50 determines whether the remaining capacity and operating state of the power supply 86 have a problem with the operation of the camera 100 by the power supply control circuit 80, and if there is a problem, the display unit 54 is used. After giving a predetermined warning by image or sound (S108), the process returns to S103.

  When there is no problem with the power supply 86 (S106), the system controller 50 determines whether the operation state of the recording medium 120 has a problem with the recording / reproducing operation of the image data (S107). If there is a problem, a predetermined warning is given by an image or sound using the display unit 54 (S108), and the process returns to S103. When the display of the image display unit 28 is on, various setting states of the camera 100 are displayed using the image display unit 28 (S109).

  Next, the system controller 50 checks the setting state of the quick review ON / OFF switch 68 (S110). If the quick review flag is set to ON, the quick review flag is set (S111). If the quick review flag is set to OFF, the quick review flag is canceled (S112). The state of the quick review flag is stored in the internal memory of the system controller 50 or the memory 52.

  Subsequently, the system controller 50 checks the setting state of the finder mode setting switch 66 (S113), and if it is set to display ON, sets the EVF flag. If the EVF state is not established at this time, that is, if the main mirror 1 and the sub mirror 3 are down and the shutter 9 is closed, the main mirror 1 and the sub mirror 3 are driven up via the mirror control circuit 41. Further, the shutter 9 is opened via the shutter control circuit 40, and the subject image can be captured by the image sensor 14 (S114). Further, the display of the image display unit 28 is set to ON (S115), the through display state in which the captured images are sequentially displayed is set (S116), and the process proceeds to S119.

  In the through display state, the image data sequentially written in the image display memory 24 via the image sensor 14, the A / D converter 16, the image processing circuit 20, and the memory control circuit 22 are converted into the memory control circuit 22 and the D / D. The data is input to the image display unit 28 via the A converter 26. Thereby, an electronic viewfinder function is realized.

  If the image display ON / OFF switch 66 is set to display OFF (S113), the EVF flag is canceled. If the state is not the OVF state, that is, if the main mirror 1 and the sub mirror 3 are up and the shutter 9 is open, the main mirror 1 and the sub mirror 3 are driven down through the mirror control circuit 41. Further, the shutter 9 is closed via the shutter control circuit 40, and the subject can be observed by the optical viewfinder (S117). Further, the display of the image display unit 28 is set to the OFF state (S118), and the process proceeds to S119. The state of the EVF flag is stored in the internal memory of the system controller 50 or the memory 52.

  If the shooting preparation switch (SW1) 62 is off in S119, the process returns to S103. On the other hand, when the photographing preparation switch (SW1) 62 is on, the system controller 50 determines the state of the EVF flag stored in the internal memory or the memory 52 (S120). If the EVF flag is set, the image display unit 28 is set to a freeze display state (S121), and the process proceeds to S122.

  In the freeze display state, rewriting of image data in the image display memory 24 via the image sensor 14, A / D converter 16, image processing circuit 20 and memory control circuit 22 is prohibited. Then, the last written image data is displayed on the image display unit 28 via the memory control circuit 22 and the D / A converter 26. As a result, the frozen image is displayed on the electronic viewfinder.

  If the EVF flag has been canceled (S120), the process proceeds to S122, where the system controller 50 performs AF processing to focus on the subject, and further performs photometry processing to determine the aperture value and shutter time (S122). . Details of the photometry / AF processing will be described later with reference to FIG.

  When the photometry / AF process (S122) is completed, the system controller 50 determines the state of the EVF flag stored in the internal memory or the memory 52 (S123). If the EVF flag is set, the image display unit 28 is set to the through display state (S124), and the process proceeds to S125. The through display state in S124 has the same operation content as the through display state in S116.

  Next, in S125, the system controller 50 determines whether or not the photographing switch (SW2) 64 is on. If the photographing switch 64 is off and the photographing preparation switch (SW1) 62 is also off (S126), the process returns to S103. On the other hand, when the photographing switch 64 is on, the system controller 50 determines the state of the EVF flag stored in the internal memory or the memory 52 (S127). If the EVF flag is set, the image display unit 28 is set to the fixed color display state (S128), and the process proceeds to S129.

  In the fixed color display state, instead of the captured image data written in the image display memory 24 via the image sensor 14, the A / D converter 16, the image processing circuit 20 and the memory control circuit 22, fixed color image data Is displayed on the image display unit 28. Thereby, a fixed color image is displayed on the electronic viewfinder. The display of fixed color image data is performed via the memory control circuit 22 and the D / A converter 26.

  If the EVF flag has been canceled (S127), the process proceeds to S129.

  In S129, the system controller 50 performs the above-described shooting process. Details of this photographing process will be described later with reference to FIG. Then, the process proceeds to S130.

  In S <b> 130, the system controller 50 determines the state of the quick review flag stored in the internal memory or the memory 52. If the quick review flag is set, a quick review display is performed (S133). In this case, the image display unit 28 is always displayed as an electronic viewfinder even during shooting, and quick review display immediately after shooting is also performed.

  Even when the EVF flag is released, the system controller 50 determines the state of the quick review flag (S130), and when the quick review flag is set, the display of the image display unit 28 is set to the ON state (S131). ), Quick review display is performed (S133). Then, the process proceeds to S134.

  In S134, the system controller 50 performs the recording process described above. Details of this recording process will be described later with reference to FIG.

  If the shooting switch (SW2) 64 is on when the recording process is finished (S135), the system controller 50 determines the state of the continuous shooting flag stored in the internal memory or the memory 52 (S136). If the continuous shooting flag is set, the flow returns to S129 to perform continuous shooting, and the next shooting is performed. If the continuous shooting flag is not set, the current processing is repeated until the shooting switch 64 is turned off in S135.

  As described above, when the quick review display is set immediately after shooting and the shooting switch 64 is turned on when the recording process (S134) is completed, the image is displayed until the shooting switch 64 is turned off. The quick review display on the display unit 28 is continued. As a result, the photographer can carefully check the photographed image.

  When the recording switch 64 is turned off when the recording process is completed (S135), the captured image is displayed on the image display unit 28 until a predetermined minimum review time has elapsed (S137), and then the process proceeds to S138. The same applies to the case where the shooting switch 64 is turned off after the recording process is completed, and the shooting switch 64 is subsequently turned off when the quick review display is continued.

  In S138, the system controller 50 determines whether or not the EVF flag is set. If the EVF flag is set, the system controller 50 sets the display state of the image display unit 28 to the through display state (S139). The process proceeds to S141. In this case, after confirming the photographed image by the quick review display on the image display unit 28, it is possible to enter a through display state for the next photographing.

  If the EVF flag is not set (cancelled) in S138, the display of the image display unit 28 is terminated (S140), and the process proceeds to S141. In this case, after confirming the photographed image by the quick review display on the image display unit 28, the function of the image display unit 28 is stopped for power saving, and the image display unit 28 or D / A conversion with large power consumption is stopped. It is possible to reduce the power consumption of the device 26 and the like.

  If the shooting preparation switch 62 is turned on in S141, the system controller 50 returns to S125 to prepare for the next shooting. If the shooting preparation switch 62 is turned off, the system controller 50 ends the series of shooting operations and returns to S103.

  Next, the operation in the photometry / AF process performed in S122 of FIG. 3 will be described with reference to FIG. If the EVF flag is set in S200, the system controller 50 reads the charge signal from the image sensor 14 and sequentially reads the captured image data into the image processing circuit 20 via the A / D converter 16 (S201). Using the sequentially read image data, the image processing circuit 20 performs predetermined calculations used for the TTL AE processing and AF processing.

  Note that each processing here extracts a specific pixel number area as necessary from the total number of pixels of the photographed image and uses it for the calculation. This makes it possible to perform optimum calculations for each mode such as the center-weighted mode, the average mode, and the evaluation mode in the TTL method AE, AWB, and AF processes.

  Using the calculation result in the image processing circuit 20, the system controller 50 performs AE control by combining the aperture control circuit 305 and the electronic shutter of the image sensor 14 until it is determined that the exposure is appropriate (S202) (S203). . A diaphragm drive command to the interchangeable lens 200 is made by known serial communication via a camera-lens communication line 399. Further, the system controller 50 determines whether or not flashing is necessary using measurement data obtained by AE control. If flash is necessary, a flash flag is set and stored in the internal memory of the system controller 50 or the memory 52.

  When it is determined in S202 that the exposure is appropriate, the system controller 50 stores measurement data and setting parameters in the internal memory or the memory 52 of the system controller 50.

  Next, the system controller 50 uses the image processing circuit 20 until the white balance is determined to be appropriate using the calculation result in the image processing circuit 20 and the measurement data obtained by the AE control (S206). The AWB control is performed by adjusting the processing parameters (S207).

  When it is determined that the white balance is appropriate (S206), the measurement data and setting parameters are stored in the internal memory of the system controller 50 or the memory 52.

  Next, the system controller 50 performs AF control using the AF control circuit 42 (S209) until it is determined to be in focus using the measurement data obtained by the AE control and the AWB control (S208). At this time, the lens controller 206 drives the focus lens 201 in the optical axis direction by controlling the focus drive actuator 202 through the focus control circuit 211 according to the focus drive amount or the focus drive speed commanded from the camera 100.

  In this embodiment, as the AF control here, a so-called scan type contrast AF (TV-AF) method is adopted. The system controller 50 extracts a high frequency component from a specific pixel number region in the image data (video signal) generated by the image processing circuit 20 using the image sensor 14. Then, an AF evaluation value signal is generated using the high frequency component. The AF evaluation value signal represents the contrast state of the image, that is, the focus state of the photographing lens, and the position of the focus lens 201 at which the AF evaluation value signal reaches the peak (maximum) is the in-focus position.

  If it is determined in S208 that the subject is in focus, the measurement data and setting parameters are stored in the internal memory of the system controller 50 or the memory 52, and the photometry / AF processing routine (S122) is terminated.

  On the other hand, if the EVF flag is not set in S200, that is, if the optical finder mode is set, the system controller 50 proceeds to S210 and performs photometry with the photometric sensor 7. Then, the exposure value is calculated according to the photometric result and the set ISO sensitivity (S211).

  Next, the system controller 50 detects the amount of focus deviation by the focus detection unit 8 of the TTL phase difference detection method, and determines whether or not the amount of focus deviation is within a predetermined focusing range (S212). If it is out of focus range, the process proceeds to S213, and the focus driving actuator 202 is controlled through the focus control circuit 211 to drive the focus lens 201. The driving amount at this time is an amount corresponding to the amount of focus deviation detected by the focus detection unit 8. Then, the process returns to S212 to perform in-focus determination again.

  If it is determined in S212 that the amount of focus deviation is within the in-focus range, the photometry / AF processing is terminated.

  Next, the operation of the photographing process performed in S129 of FIG. 4 will be described using FIG. When the EVF flag is set (stored) in the internal memory or the memory 52 in S300, that is, in the EVF mode, the system controller 50 proceeds to S301.

  In S301, the system controller 50 determines whether or not the flash flag is set (stored) in the internal memory or the memory 52. If the flash flag is set, the system controller 50 enters the flash photographing mode, and proceeds to S302.

  In S <b> 302, the system controller 50 performs subject photometry using the image sensor 14 before preliminary light emission. In other words, image data of a subject image formed on the image sensor 14 is obtained in a state where the subject is illuminated only with steady light without flash emission. The image data at this time is photometric (brightness) data under normal light.

  Next, the system controller 50 causes the flash unit 400 to perform preliminary light emission for a predetermined light emission time at a predetermined substantially constant light emission intensity level (S304). Hereinafter, a form of light emission that is continuously performed for a predetermined light emission time at the substantially constant light emission intensity level is referred to as flat light emission.

  The preliminary light emission command is transmitted from the system controller 50 to the flash controller 440 through serial communication via the communication line 499. In the flash unit 400, a power switch (not shown) of the flash unit 400 is turned on, and the voltage of the battery 401 is boosted by the charging circuit 404. Upon receiving the preliminary light emission command, the flash controller 440 controls the light emission control circuit 403 to cause the Xe tube 401 to emit light flat.

  The operation of this preliminary light emission (flat light emission) will be described with reference to FIG. The flash controller 440 outputs a control voltage corresponding to the light emission intensity level designated by the system controller 50 of the camera 100 to the DA0 terminal.

  Next, Hi and Lo are output to SEL1 and SEL0, and the input D2 is selected. At this time, since the Xe tube 31 has not yet emitted light, the photocurrent of the light receiving element 435 hardly flows, and the output of the monitor circuit 434 input to the inverting input terminal of the comparator 431 does not occur. For this reason, the output of the comparator 431 is Hi. Therefore, the light emission control circuit 412 becomes conductive.

  Next, when a trigger signal is output from the TRIG terminal, the trigger circuit 411 excites the Xe tube 410 that has generated a high voltage to start light emission.

  When light emission from the Xe tube 410 starts, the flash controller 440 instructs the integration circuit 436 to start integration. The integration circuit 432 starts integration of the output of the monitor circuit 436, that is, the logarithmically compressed photoelectric output of the light receiving element 438 for integrating the light amount. At the same time, a timer for counting the light emission time instructed by the system controller 50 is started.

  When the preliminary light emission is started, the photocurrent from the light receiving element 435 increases, and the output of the monitor circuit 434 increases. When the output of the monitor circuit 434 becomes higher than a predetermined comparator voltage set as the non-inverting input of the comparator 431, the output of the comparator 431 is inverted to Lo. Thereby, the light emission control circuit 412 cuts off the supply of the light emission current to the Xe tube 410. Although the discharge loop is interrupted by the interruption of the light emission current, since the circulation loop circuit is formed by the diode 409 and the coil 406, the light emission current gradually decreases after the overshoot due to the delay of the circulation loop circuit is settled. .

  When the light emission level of the Xe tube 410 decreases with the decrease of the light emission current, the photocurrent of the light receiving element 435 decreases and the output of the monitor circuit 434 also decreases. When the voltage falls below a predetermined comparison level, the output of the comparator 431 is inverted to Hi again, the light emission control circuit 412 is turned on again, and a discharge loop of the Xe tube 410 is formed. Thereby, the light emission current increases and the light emission intensity level also increases.

  In this way, the comparator 431 repeatedly increases and decreases the emission intensity level in a short cycle around the predetermined comparator voltage set to DA0. As a result, flat light emission control for continuing light emission at a substantially constant light emission intensity level is performed.

  When a predetermined light emission time elapses due to the timer count described above, the flash controller 440 sets the SEL1 and SEL0 terminals to Lo and Lo, respectively. As a result, the input of the data selector 430 is selected as D0, that is, the Lo level input, and the output is forced to the Lo level. Thereby, the light emission control circuit 412 interrupts the discharge loop of the Xe tube 410. In this way, preliminary light emission by flat light emission control is performed for a predetermined light emission time.

  Next, the system controller 50 captures (photoelectrically converts) the subject image formed by the reflected light from the subject while the flash unit 400 is performing preliminary light emission with the imaging device 14 (S304). The charge accumulation operation and read operation of the accumulated charge in the image sensor 14 at this time will be described with reference to FIG.

  In FIG. 7, A indicates the image sensor 14 and S indicates the light emission waveform of the flash. S and P are emission waveforms of preliminary emission, and S and M are emission waveforms of main emission described later. S1 indicates the operation of the front curtain of the shutter 9, and S2 indicates the operation of the rear curtain of the shutter 9. S1 and S2 both indicate that the Lo level is open and the Hi level is closed. C and D are drive waveforms applied to the image sensor 14 through the timing generation circuit 18. C is the reset release timing of the image sensor 14, and the accumulation of electric charges is started together with the release of the reset. D is the charge accumulation end timing. The period from C to D corresponds to the charge accumulation time in the image sensor 14.

  In the time difference sequential readout method employed in the present embodiment, charge accumulation is started while providing a time difference for each pixel line in order from the uppermost pixel line of the image sensor 14 to the lower pixel line. Time t0 indicates the charge accumulation start time of the uppermost pixel line. In each pixel line, charge accumulation is performed for a time corresponding to a period from C to D, and then the charge accumulation is finished. As a result, even when the charge accumulation is completed, a time difference is generated for each pixel line in order from the uppermost pixel line to the lower pixel line. t1 indicates the end time of charge accumulation in the uppermost pixel line. Time t2 indicates the end time of charge accumulation in the lowest pixel line.

  Preliminary light emission is the same as t0, which is the charge accumulation start time in the uppermost pixel line of the image sensor 14, or slightly before t0 in consideration of the light emission delay, as shown as light emission waveforms S and P in the figure. Starts from. The charge accumulation time for the preliminary light emission is approximately half to ¼ of the exposure time for the stationary light based on the photometric result obtained without flash emission (illuminated by the stationary light) obtained in S302 of FIG. Is set. This is because when preliminary light emission is performed in a state where appropriate exposure can be obtained only with constant light, the constant light and the light from the preliminary light emission are added, resulting in overexposure, exceeding the dynamic range of the image sensor 14, and good imaging. This is to prevent the inability to perform.

  From each pixel line, pixel data is sequentially read out one pixel line at a time when the charge accumulation of the pixel line is completed. This read timing is E. The time required to read out charges from each pixel line is TH, and the time corresponding to the read time TH is the time difference.

  In this way, when the reading of the image data from all the pixel lines is completed (time t2), the preliminary light emission is stopped. Note that the time t2 is precisely the time when charge accumulation in the lowermost pixel line ends, but the time TH required to read out charges from one pixel line is very short, so the time t2 It may be regarded as an end time for reading image data from the pixel line.

  Then, the system controller 50 causes the image processing circuit 20 to generate image data, that is, photometric data (photometric or luminance information) under preliminary light emission based on the pixel data read from each pixel line.

  As described above, in this embodiment, the preliminary light emission is continued from the start of the charge accumulation of the uppermost pixel line until the charge accumulation of the lowermost pixel line is completed, in other words, until the time-sequential reading is completed. In addition, the charge accumulation of the next pixel line is started before the charge accumulation of the pixel line that has started the charge accumulation is completed.

  As a result, the subject luminance (reflected light from the subject) during preliminary light emission can be measured without increasing the charge accumulation time as in the conventional case described with reference to FIG. Due to the short charge accumulation time, pixel saturation in the image sensor 14 can be made difficult to occur even in a relatively high luminance state such as so-called daytime synchro. For this reason, even in such a high luminance state, the light emission amount control of the main light emission performed thereafter can be appropriately performed based on the image data obtained under the preliminary light emission.

  In FIG. 6, in S305, only the subject reflected light component due to the flash light in the preliminary light emission is obtained by subtracting the photometry data in the steady light obtained in S302 from the image data obtained in the preliminary light emission obtained in S304. Extracted. Based on the difference between the extracted subject reflected light component and the photometric data obtained when the image sensor 14 is used as a photometric sensor, which is obtained by subject reflected light at an appropriate amount of light according to the ISO sensitivity of the image sensor 14, A light emission amount (main light emission amount) at the time of main light emission to be performed is obtained (S305). Photometric data at an appropriate light amount corresponding to the ISO sensitivity is stored in advance in an internal memory of the system controller 50 or the like.

  Next, in S306, the system controller 50 temporarily closes the opened shutter 9 through the shutter control circuit 40 in preparation for photographing (time t3 in FIG. 7). Then, the front curtain of the shutter 9 is opened again (S307), and the main exposure of the image sensor 14, that is, the main photographing for acquiring the recording image data is started (S308, time t4 in FIG. 7).

  Next, the system controller 50 determines whether or not the flash mode is set (S309). If the flash controller is in the flash mode, the system controller 50 transmits a command for the main flash amount obtained in S305 to the flash controller 440. The flash controller 440 performs main light emission with the commanded main light emission amount (S310, time t5 in FIG. 7).

  The system controller 50 closes the rear curtain of the shutter 9 as the predetermined exposure time elapses (S311, time t6 in FIG. 7). Then, the charge accumulation in the image sensor 14 is terminated, and pixel data is sequentially read from the pixels on the image sensor 14 (S312). At this time, as shown in FIG. 7, the charge accumulation of the uppermost pixel line is finished at time t7, and then the charge accumulation is finished sequentially for each pixel line at the timing of G. Then, pixel data is read from the uppermost pixel line one pixel line at a time of H.

  In the present embodiment, as described in S307, S308, and S311, in the actual shooting, the electronic shutter function by the time-sequential readout of the image sensor 14 is not used, and exposure control is performed by the focal plane shutter 9 that is a mechanical shutter. . This is to prevent deterioration in image quality due to high brightness smear.

  On the other hand, if it is determined in S300 that the EVF mode is not selected, the process proceeds to S321. If the flash mode is set, the photometry sensor 7 is used to measure the subject under steady light before preliminary light emission (S322). At this time, the subject image is formed on the focusing plate 2 through the interchangeable lens 200, and the image is also formed on the photometric sensor 7 through the photometric lens 6. Then, the photometric sensor 7 photoelectrically converts the subject image and integrates it for a predetermined time to obtain photometric data under steady light.

  Next, the system controller 50 causes the flash unit 400 to perform preliminary light emission in the same manner as in S304 (S323). Then, the reflected light from the subject due to preliminary light emission is measured by the photometric sensor 7, and photometric data under preliminary light emission is generated (S324).

  Next, the system controller 50 subtracts the photometric data under steady light obtained in S322 from the photometric data during preliminary light emission obtained in S324. Thereby, only the subject reflected light component by the flash light in the preliminary light emission is extracted. Then, based on the difference between the extracted subject reflected light component and the photometric data obtained by the photometric sensor 7 with the subject reflected light at the appropriate amount of light according to the ISO sensitivity of the image sensor 14, at the time of the main emission performed later. A light emission amount (main light emission amount) is obtained (S325). Photometric data at an appropriate light amount corresponding to the ISO sensitivity is stored in advance in an internal memory of the system controller 50 or the like.

  As described above, since the output of the photometric sensor 7 is logarithmically compressed, the calculation can be performed by addition / subtraction.

  Next, when preparation for photographing is completed, the system controller 50 raises the main mirror 1 and the sub mirror 3 and retracts them from the photographing optical path. Further, it instructs the lens controller 206 to reduce the aperture 204 to a predetermined aperture value via the camera-lens communication line 399 (S326). The lens controller 206 controls the aperture driving actuator 250 through the aperture control circuit 205 to reduce the aperture 204 to a predetermined aperture value.

  Next, the system controller 50 controls the shutter control circuit 40 to open the shutter 9 (S327), and starts main exposure of the image sensor 14, that is, main photographing for acquiring recording image data (S328). .

  The system controller 50 determines whether or not the flash mode is selected (S329). If the flash controller is in the flash mode, the system controller 50 transmits a command for the main light emission amount obtained in S325 to the flash controller 440. The flash controller 440 performs main light emission with the commanded main light emission amount (S330).

  Then, after the predetermined exposure time is finished, the shutter 9 is closed (S331), and the charge accumulation in the image sensor 14 is finished (S332). Further, the main mirror 1 and the sub mirror 3 are returned to the down position, and a command to open the diaphragm 204 is transmitted to the lens controller 206 (S333).

  From S312 and S333, the process proceeds to the process shown in FIG. The system controller 50 reads the accumulated charge from the image sensor 14 and passes through the A / D converter 16, the image processing circuit 20 and the memory control circuit 22, or directly from the A / D converter 16 through the memory control circuit 22. The photographed image data is written in the memory 30 (S340).

  Next, the system controller 50 reads the image data written in the memory 30 using the memory control circuit 22 (the image processing circuit 20 if necessary), performs color processing, and then outputs the processed image data. Write to the memory 30 (S341). Further, the display image data is transferred to the image display memory 24 via the memory control circuit 22 (S342).

  When a series of processing is thus completed, the photographing processing routine is terminated.

  FIG. 9 shows the operation of the recording process performed in S134 of FIG. The system controller 50 reads the image data written in the memory 30 and performs image compression processing according to the set shooting mode by the compression / decompression circuit 32 (S401). Thereafter, the compressed image data is written to the recording medium 120 via the interface 90 or 94 and the connector 92 or 96 (S402).

  When the writing to the recording medium 120 is completed, the recording processing routine is ended.

  In the second embodiment of the present invention, compared with the first embodiment, the flash unit 400 has a shorter light emission time for the preliminary light emission to eliminate wasteful energy consumption, and the charge accumulated in the image sensor 14 under the preliminary light emission is read. Reduce time.

  The hardware configuration in this embodiment is the same as that in the first embodiment. However, the drive waveform applied from the timing generation circuit 18 to the image sensor 14 is different.

  In Embodiment 1, since the charge accumulation time during preliminary light emission can be increased, good flash photography can be performed even under high brightness such as daytime synchro. However, it is necessary to perform preliminary light emission until the charge accumulation of all the pixel lines from the uppermost pixel line to the lowermost pixel line in the image sensor 14 is completed (until time-sequential readout is completed).

  Here, in Example 1 (FIG. 7), the imaging device 14 having 1500 pixels in the horizontal direction and 1000 pixels in the vertical direction and a total of 1.5 million pixels is used, and the pixel data readout clock is 48 MHz. A case will be described as an example.

The readout time TH for one pixel line in the horizontal direction of the image sensor 14 is
TH = 1/4800000 × 1500 = 31.25 [usec]
It is.

Therefore, the readout time TR for all pixel lines is
TR = 31.25 [usec] × 1000 = 31.25 [msec]
Necessary.

When the charge accumulation time in one pixel line is 1 [msec], the preliminary light emission time is as follows:
31.35 + 1 = 32.35 [msec]
is necessary.

That is, preliminary light emission is performed for 32.35 [msec] for 1 [msec] required for actual exposure. In this case, the usage efficiency of flash light is
1 / 32.35 ≒ 3%
However, there is room for improving usage efficiency.

  For this reason, in this embodiment, the charge time and the preliminary light emission time are shortened by discretely performing charge accumulation and charge reading in the image sensor 14.

  FIG. 10 is a diagram for explaining charge accumulation and readout operations of the image sensor in the present embodiment. In the figure, A indicates the image sensor 14 and S indicates the light emission waveform of the flash. S · P is a light emission waveform of preliminary light emission. C ′ and D ′ are drive waveforms applied to the image sensor 14 through the timing generation circuit 18. C ′ is the reset release timing of the image sensor 14, and charge accumulation is started at the time of reset release. D 'is the charge accumulation end timing. The period from C ′ to D ′ corresponds to the charge accumulation time in the image sensor 14.

  C and D are the reset release timing and charge accumulation end timing (charge read timing) of the image sensor 14 in the first embodiment, respectively.

  In the present embodiment, during preliminary light emission, charge accumulation and charge readout are not performed on pixel lines shown in black in the image sensor A, and charge accumulation and charge readout are performed only on pixel lines shown in white. That is, charge accumulation and charge readout are performed only on some of the pixel lines on the image sensor A. Therefore, the readout time can be shortened to (number of pixel lines from which charges are read) / (total number of pixel lines) compared to the first embodiment.

  Note that the operation of the shutter 9 and the operation after the preliminary light emission in this embodiment are the same as those in the first embodiment, and thus the description thereof is omitted here.

  In the third embodiment of the present invention, similarly to the second embodiment, the flash unit 400 has a shorter light emission time for preliminary light emission than in the first embodiment, thereby eliminating wasteful energy consumption. The readout time of the charges accumulated in the memory is shortened.

  The hardware configuration in this embodiment is the same as that in the first embodiment. However, the drive waveform applied from the timing generation circuit 18 to the image sensor 14 is different.

  In this embodiment, by partially performing charge accumulation and charge readout in the image sensor 14, the readout time and the preliminary light emission time are shortened.

  FIG. 11 is a diagram illustrating charge accumulation and readout operations of the image sensor in the present embodiment. In the figure, A indicates the image sensor 14 and S indicates the light emission waveform of the flash. S · P is a light emission waveform of preliminary light emission. C ″ and D ″ are drive waveforms applied to the image sensor 14 through the timing generation circuit 18. C ″ is a reset release timing of the image sensor 14, and charge accumulation is started at the same time as reset release. D ″ is a charge accumulation end timing. The period from C ″ to D ″ corresponds to the charge accumulation time in the image sensor 14.

  C and D are the reset release timing and charge accumulation end timing (charge read timing) of the image sensor 14 in the first embodiment, respectively.

  In the present embodiment, during preliminary light emission, charge accumulation and charge readout are not performed in the peripheral area indicated by black in the image sensor A, and charge accumulation and charge readout are performed only in the central area B indicated by white. That is, charge accumulation and charge readout are performed only on pixel lines included in a part of all the pixel regions existing on the image sensor A. In other words, charge accumulation and charge readout are performed only in pixel lines included in an area smaller than the pixel area used for capturing the recording image in the image sensor A.

  Therefore, compared with the first embodiment, the readout time is (number of pixel lines partially included in the region B) / (total number of pixel lines) × (number of pixels for each pixel line in the region B) / (each The number of pixels in the pixel line).

  Furthermore, in the region B, as described in the second embodiment, by performing discrete charge accumulation and charge readout only on some pixel lines, it is possible to further shorten the charge readout time.

  Note that the operation of the shutter 9 and the operation after the preliminary light emission in this embodiment are the same as those in the first embodiment, and thus the description thereof is omitted here.

  In each of the above embodiments, the case where the charge accumulation starts and ends with a time difference for each pixel line has been described. However, the case where the charge accumulation starts and ends with a time difference for each of the plurality of pixel lines is also described. The present invention can be applied.

1 is a block diagram showing a configuration of a camera system including a single-lens reflex camera that is Embodiment 1 of the present invention, an interchangeable lens mounted on the camera, and a flash unit. FIG. FIG. 2 is a block diagram illustrating a configuration of a flash unit according to the first embodiment. 3 is a flowchart showing the operation (main routine) of the camera of Embodiment 1. 3 is a flowchart showing the operation (main routine) of the camera of Embodiment 1. 6 is a flowchart illustrating the operation (photometry / AF processing) of the camera according to the first exemplary embodiment. 6 is a flowchart illustrating the operation (imaging processing) of the camera according to the first exemplary embodiment. 3A and 3B illustrate a relationship between charge accumulation and charge readout of the image sensor and flash light emission in the first embodiment. 6 is a flowchart illustrating the operation (imaging processing) of the camera according to the first exemplary embodiment. 6 is a flowchart illustrating the operation (recording process) of the camera according to the first exemplary embodiment. FIG. 6 is a diagram illustrating a relationship between charge accumulation and charge readout of an image sensor and flash emission in a camera system that is Embodiment 2 of the present invention. FIG. 6 is a diagram for explaining a relationship between charge accumulation and charge readout of an image sensor and flash light emission in a camera system that is Embodiment 3 of the present invention. The figure explaining the structure of a CMOS image sensor. The figure explaining the charge storage of the conventional CMOS image sensor, the charge read-out, and the relationship between flash light emission.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Main mirror 3 Sub mirror 7 Photometric sensor 9 Focal plane shutter 14 Image pick-up element 20 Image processing circuit 50 System controller 100 Camera 200 Interchangeable lens 400 External flash unit 410 Xe tube 435,438 Light receiving element 440 Flash controller

Claims (11)

An image sensor that photoelectrically converts a subject image;
Accumulation control means for starting and ending charge accumulation in a plurality of pixel lines from the first pixel line to the second pixel line in the image sensor with a time difference for each predetermined number of pixel lines;
A light emission control means for causing the illumination unit that illuminates the subject to perform the first light emission, and then causing the second light emission for photographing the recording image;
A light emission amount setting means for setting a light emission amount of the second light emission based on information according to accumulated charges in the plurality of pixel lines during the first light emission;
The imaging apparatus, wherein the light emission control unit causes the first light emission to be continuously performed from the start of charge accumulation in the first pixel line to the end of charge accumulation in the second pixel line.   2. The charge control unit according to claim 1, wherein the storage control unit starts charge storage of a next pixel line before charge storage of a pixel line that has started to start charge storage of the plurality of pixel lines ends. 3. Imaging device.   The imaging device according to claim 1, wherein the plurality of pixel lines are a part of all pixel lines existing from the first pixel line to the second pixel line.   4. The image pickup apparatus according to claim 1, wherein the plurality of pixel lines are pixel lines included in a part of all the pixel regions of the image pickup device. 5.   5. The imaging apparatus according to claim 1, wherein a light emission intensity in the first light emission is lower than a light emission intensity in the second light emission.   6. The imaging apparatus according to claim 1, wherein the imaging element is a CMOS image sensor. The imaging device according to any one of claims 1 to 6,
An imaging system comprising: an illumination unit that is detachably attached to the imaging apparatus.   The imaging system according to claim 7, further comprising an interchangeable lens attached to the imaging device.   An illumination unit, wherein the illumination unit is detachably attached to the imaging device according to any one of claims 1 to 6.   An interchangeable lens, which is attached to the imaging device according to any one of claims 1 to 6. Accumulation control step for starting and ending charge accumulation in a plurality of pixel lines from the first pixel line to the second pixel line in the image sensor that photoelectrically converts the subject image with a time difference for each predetermined number of pixel lines When,
A light emission control step of causing the illumination unit that illuminates the subject to perform the first light emission, and then performing the second light emission for photographing the recording image;
A light emission amount setting step for setting a light emission amount of the second light emission based on information according to accumulated charges in the plurality of pixel lines during the first light emission;
In the light emission control step, the first light emission is continuously performed from the start of charge accumulation in the first pixel line to the end of charge accumulation in the second pixel line. .