JP2007316779A - Nonvolatile memory system - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To solve problems in utilizing only one piece of information such as the number of times of elimination in each block of a nonvolatile memory as reliability (degradation level) of each block, that one piece of held information itself may be eliminated by some accident, and reliability based on dispersion in characteristic of each block already existing in producing a memory, cannot be measured from the information indicating use performance such as the number of times of elimination. <P>SOLUTION: This nonvolatile memory system includes a nonvolatile memory device capable of eliminating data only by a unit of block, acquires plural kinds of operational information of the nonvolatile memory device by the unit of block, and holds the acquired operational information. That is, not single information such as the number of times of elimination but plural kinds of operational information are acquired on each block. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to a nonvolatile memory system including a nonvolatile memory device capable of erasing data only in units of blocks.

One type of non-volatile memory is a flash memory. When data is written to the flash memory, data is erased in units of blocks and then written. In addition, the flash memory has a limit on the number of times data can be written, and is generally about 100,000 times. For this reason, for example, if writing is repeated only for a specific block, there is a problem that the entire memory will be exhausted even if the number of times of writing to other blocks is small. In view of such a problem, a technique for extending the lifetime of the entire memory by managing the number of times of writing in each block and controlling so that writing to each block is performed on the entire memory on average. Are disclosed (for example, Patent Document 1, Patent Document 2, Patent Document 3, and Patent Document 4).
JP-A-8-45287 Japanese Patent Laid-Open No. 9-306186 Japanese Patent Laid-Open No. 5-282880 Japanese Patent Laid-Open No. 5-46359

  However, in Patent Document 1, Patent Document 2, Patent Document 3, and Patent Document 4, only one piece of information such as the number of erasures in each block is used as the reliability (degradation degree) of each block. In such a case, there is a possibility that the stored information itself may be lost due to some accident. In addition, the reliability in consideration of the variation in the characteristics of each block that already exists at the time of memory production cannot be measured from information indicating the use record such as the number of erasures.

  Therefore, in the present invention, a nonvolatile memory system including a nonvolatile memory device capable of erasing data only in units of blocks, wherein a plurality of types of operation information of the nonvolatile memory devices are acquired in units of blocks, and the acquired operation information is acquired. A non-volatile memory system characterized by holding That is, for each block, by acquiring multiple types of operation information instead of single information such as only the number of times of erasure, even if one operation information is lost, other operation information is used to It becomes possible to measure reliability. In addition, as the operation information, error correction information indicating successful or unsuccessful read error correction at the time of data read, data storage time (write time), data erase time, data erase count, data read count, The number of times data is stored (number of times of writing), etc. may be acquired. Since the NAND flash memory has a characteristic that it deteriorates only by reading data, the number of times of reading is useful as information for measuring reliability. Further, as a characteristic of the flash memory, there is a characteristic that when it deteriorates, the data erasing time and the writing time become longer. Moreover, even if information such as data erasure time and write time is lost due to some accident, it can be measured again each time, so it is effective to use it as information for measuring reliability. is there. It is also possible to take into account variations in the characteristics of each block that already exist at the time of memory production (as described above, it cannot be taken into account in the number of erasures, etc.). Further, when a plurality of types of operation information are held in the nonvolatile memory device, error correction codes may be included in a plurality of blocks and distributedly recorded. Thereby, for example, even if the operation information cannot be read from one block, the reliability of each block can be measured from the operation information recorded in another block.

  According to the nonvolatile memory system of the present invention, by acquiring a plurality of types of operation information in units of blocks, it is possible to cope with the loss of the operation information itself and to measure the reliability in a multifaceted manner. In addition, by acquiring the data erasing time and writing time as operation information, it is possible to re-measure even if the operation information itself is lost, and also consider variations in the characteristics of each block during memory production It is possible.

The best mode for carrying out the present invention will be described in detail with reference to the drawings. Note that the present invention is not limited to these embodiments, and can be implemented in various modes without departing from the spirit of the present invention. The first embodiment will mainly describe claims 1, 10, and 12. The second embodiment will mainly describe claims 2 and 13. In the third embodiment, claims 3 and 14 will be mainly described. The fourth embodiment will mainly describe claim 4 and the like. In the fifth embodiment, claims 5 and 15 will be mainly described. In the sixth embodiment, claims 6 and 16 will be mainly described. The seventh embodiment will mainly describe claim 7 and the like. The eighth embodiment will mainly describe Claim 8 and the like. The ninth embodiment will mainly describe claim 9 and the like. The tenth embodiment will mainly describe claims 10, 11, 17 and the like.
(Embodiment 1)

  (Embodiment 1: Overview) This embodiment is a non-volatile memory system including a non-volatile memory device capable of erasing data only in block units, and acquires a plurality of types of operation information of the non-volatile memory device in block units. A non-volatile memory system that holds the obtained operation information will be described.

  (Embodiment 1: Configuration) FIG. 1 illustrates a functional block diagram of a nonvolatile memory system according to this embodiment. The nonvolatile memory system includes an “operation information acquisition unit” (0101) and an “operation information holding unit” (0102). The nonvolatile memory system includes a nonvolatile memory device (not shown) that can erase data only in units of blocks. “Including non-volatile memory device” means that the non-volatile memory device may be included as part of the non-volatile memory system, or the non-volatile memory system may be the non-volatile memory device itself. is there. The nonvolatile memory device corresponds to, for example, a NAND flash memory or a NOA flash memory.

  Note that each unit, which is a component of the present invention described in detail below, is configured by either hardware, software, or both hardware and software. For example, as an example for realizing these, when a computer is used, there are hardware constituted by a CPU, a bus, a memory, an interface, a peripheral device, and the like, and software that can be executed on the hardware. As software, the functions of each unit are realized by sequentially executing a program developed on the memory, and processing, storing, and outputting data on the memory and data input via the interface. More specifically, FIG. 34 is a diagram illustrating the configuration of a general computer. The computer mainly includes a CPU (3410), an input / output interface (I / O) (3420), an HDD (3430), and a temporary storage memory. (RAM) (3440), ROM (3450), etc. are shown, but the nonvolatile memory system according to the present invention can be realized by the same configuration as that of FIG. (The same applies throughout the specification.)

  The “operation information acquisition unit” (0101) has a function of acquiring a plurality of types of operation information of the nonvolatile memory device in units of blocks. “Multiple species” means two or more. “Operation information” refers to information related to erasing, writing, reading, etc. in a block. Specifically, for example, the number of times of erasure, the number of times of writing, the number of times of reading, the erasing time, the writing time, the reading time, etc. are applicable. Further, for example, when error correction is performed at the time of data reading, the presence / absence of error correction or the success / failure of error correction may be used.

  FIG. 2 shows a specific example of the operation information. The operation information illustrated in FIG. 2 indicates that the block of block number 10 has the number of erases of 15700 and the number of reads of 22300. More specifically, the operation information is represented by data such as “block_num = 10, erase_count = 15700, read_count = 22300”. Here, “block_num”, “erase_count”, and “read_count” are program variables representing the block number, the erase count, and the read count, respectively. In addition, in FIG. 2, the operation information for only the block of block number 10 is shown, but the operation information is acquired in the same manner for each of the other blocks. As the acquisition source of the operation information, a management unit to be described later is assumed. For example, the operation information is acquired from a memory controller or the like.

  The “operation information holding unit” (0102) has a function of holding the acquired operation information. “Acquired operation information” refers to the operation information acquired by the operation information acquisition unit (0101). Further, the operation information holding unit may be disposed in the nonvolatile memory device. That is, the operation information itself may be recorded in the block of the nonvolatile memory device according to the present invention. In that case, a plurality of operation information may be recorded in one block, or a plurality of operation information may be separately recorded in a plurality of blocks. In addition, if a plurality of operation information is separately recorded in a plurality of blocks, even if the operation information cannot be read from a certain block, each operation information recorded in another block is used. Since it is possible to measure the reliability of the block, it is safer.

  FIG. 3 shows a specific example of the operation information held in the operation information holding unit. The “block number” is a block in which operation information is held, and is a block number indicated by the aforementioned variable block_num. The “erase count” is the erase count indicated by the variable erase_count, and the “read count” is the read count indicated by the variable read_count. In the operation information holding unit, for example, such information is stored as a database or the like in a predetermined storage area such as a RAM or an HDD.

  (Embodiment 1: Process Flow) FIG. 4 illustrates a flowchart showing a process flow in the nonvolatile memory system according to the present embodiment.

  First, in step S0401, plural types of operation information of the nonvolatile memory device are acquired in units of blocks. This process is mainly executed by the operation information acquisition unit. Next, the operation information acquired in step S0402 is held. This process is mainly executed by the operation information holding unit.

  Note that the flowchart of FIG. 4 can also be regarded as a processing flowchart of a program executed by a computer. Further, such a program can be recorded on a medium such as a flexible disk. (The same applies throughout the specification.)

  (Embodiment 1: Detailed Specific Example) FIG. 36 shows a case where an operation information acquisition unit (3601) and an operation information holding unit (3602) are configured in the memory in addition to the configuration of a general flash memory. FIG. In such a case, for example, the operation information acquisition unit (3601) may acquire operation information from the control circuit (3603). Further, the memory cell array (3604) may be used as an operation information holding unit.

(Embodiment 1: Effect) Since the nonvolatile memory system according to this embodiment can acquire and hold a plurality of types of operation information of the nonvolatile memory device, for example, one operation information is lost due to some accident, etc. Even if it does, it is possible to measure the reliability of each block, for example, using other operation information. Further, by using a plurality of types of operation information, it is possible to measure the reliability in a multifaceted manner.
(Embodiment 2)

  (Embodiment 2: Overview) In this embodiment, a nonvolatile memory system capable of generating block-unit reliability information using a plurality of operation information will be described.

  (Embodiment 2: Configuration) FIG. 5 illustrates a functional block diagram of a nonvolatile memory system according to this embodiment. The nonvolatile memory system includes an “operation information acquisition unit” (0501), an “operation information holding unit” (0502), and a “reliability information generation unit” (0503).

  The “reliability information generation unit” (0503) has a function of generating block-unit reliability information by calculation using a plurality of operation information as parameters. The “plurality of operation information” corresponds to the operation information held in the operation information holding unit (0502). “Generate reliability information in units of blocks” means to generate reliability information for each block. The “reliability information” is information indicating the reliability (degradation degree) of each block, and specifically, may be expressed by a numerical value such as reliability, for example. It may be represented by a level such as a degree rank. "Calculation using a plurality of operation information as parameters" means, for example, when calculating reliability by a calculation formula using a plurality of operation information as parameters, or assigning a rank according to the value for each operation information, This applies to the case where the reliability rank of the corresponding block is determined in consideration of the assigned rank of each operation information.

  FIG. 6 illustrates a case where the reliability information generation unit calculates the reliability as the reliability information. First, it is assumed that the operation information holding unit (0601) holds the same operation information (0603) as the operation information illustrated in FIG. In the reliability information generation unit (0602), as a calculation formula for calculating the reliability, the number of times of erasure and the number of times of reading are used as parameters, and “reliability = number of times of erasure × 0.8 + number of times of reading × 0.2” Assume that the calculation formula is determined in advance. Then, for example, in block number 10, since the number of erasures is 15700 and the number of readings is 22300, 15700 × 0.8 + 22300 × 0.2 = 172020 is calculated, and the reliability of the block of block number 10 is 17020. Is calculated. The same applies to the other blocks (0604).

  FIG. 7 illustrates a case where a reliability rank is determined as reliability information in the reliability information generation unit. Similarly to FIG. 6, it is assumed that the operation information holding unit (not shown) holds the same operation information as the operation information illustrated in FIG. 3. Further, the rank given to the erase count and the read count in the reliability information generation unit is rank 1 when 0 or more and less than 10,000 times, rank 2 or 30,000 when it is 10,000 or more and less than 30,000 times If the number is less than 50,000 times, rank 3 is determined in advance as rank 3, 50,000 times or more and less than 70,000 times, rank 4 and 70,000 times or more are determined as rank 5 (0701). That is, rank 1 has the highest reliability and rank 5 has the lowest reliability. Further, the rank with the lower reliability of the ranks of the erase count and the read count is determined as the reliability rank of the corresponding block. In this case, for example, in block number 11, the erase count is 53100, so the rank of the erase count is determined as rank 4, and the read count is determined as 75,000. Further, the reliability rank of the block with the block number 11 is determined to be rank 5 based on the rank of the erase count of 4 and the rank of the read count of 5 (0702).

  Further, as a specific process of the reliability information generation unit, for example, operation information stored in a predetermined storage area such as a RAM or HDD is read out as a database or the like in an operation information holding unit, and further illustrated in FIG. Such a calculation formula is read from a predetermined storage area such as a RAM or HDD. In accordance with the read calculation formula, the reliability is calculated from the read operation information, and the calculated reliability is stored in a predetermined storage area such as a RAM or HDD. In addition, the reliability information generation unit may include a program for causing the CPU to execute such processing.

  (Embodiment 2: Process Flow) FIG. 8 illustrates a flowchart showing a process flow in the nonvolatile memory system according to the present embodiment.

  First, in step S0801, a plurality of types of operation information of the nonvolatile memory device are acquired in units of blocks. This process is mainly executed by the operation information acquisition unit. Next, the operation information acquired in step S0802 is held. This process is mainly executed by the operation information holding unit. In step S0803, block unit reliability information is generated by calculation using a plurality of pieces of operation information as parameters. This process is mainly executed by the reliability information generation unit.

  (Embodiment 2: Detailed Specific Example) FIG. 37 shows an operation information acquisition unit (3701), an operation information holding unit (3702), and a reliability information generation unit (3705) in addition to the configuration of a general flash memory. It is a figure which illustrates the case where is comprised inside a memory. In such a case, for example, the operation information acquisition unit (3701) may acquire operation information from the control circuit (3703). Further, the memory cell array (3704) is used as an operation information holding unit, and the reliability information generation unit (3705) generates reliability information from the operation information held in the memory cell array (3704). It may be.

(Embodiment 2: Effect) Since the nonvolatile memory system according to the present embodiment can generate reliability information in units of blocks using a plurality of operation information, the reliability of each block can be measured in many ways. .
(Embodiment 3)

  (Embodiment 3: Overview) In this embodiment, a nonvolatile memory system capable of managing storage / relocation of data for each block using reliability information of each block will be described.

(Embodiment 3: Configuration) FIG. 9 illustrates a functional block diagram of a nonvolatile memory system according to this embodiment. The nonvolatile memory system includes an “operation information acquisition unit” (0901), an “operation information holding unit” (0902), a “reliability information generation unit” (0903), and a “management unit” (0904). Have. That is, the nonvolatile memory system according to the present embodiment has a configuration in which the “management unit” (0904) is added to the configuration of the nonvolatile memory system according to the second embodiment.

  The “management unit” (0904) has a function of managing storage / relocation of data for each block using reliability information in units of blocks. “Reliability information in units of blocks” refers to reliability information in units of blocks generated by the reliability information generation unit (0903). “Using block-unit reliability information to manage data storage and relocation for each block” means that, for example, data storage (write) and relocation commands are output to the nonvolatile memory system. In this case, data is stored or rearranged in a more reliable block. For example, taking the reliability of block numbers 8 to 12 calculated in FIG. 6 as an example, since the block number 8 has the highest reliability (value is low), the data is written in the nonvolatile memory system. When performing the above, processing such as writing to the block of block number 8 is performed. In addition, when data is written using a plurality of blocks, it is preferable that the blocks with the block numbers 8, 9, 10, 12, 11 are used in descending order of reliability. . Specifically, the management unit corresponds to, for example, a memory controller. As illustrated in FIG. 32, the memory controller has a function of mediating data between the memory and the CPU. For example, when a data write command is executed from the application (3201) to the memory (3203). First, data is written to the memory (3203) via the memory controller (3202).

  As specific processing of the management unit, for example, the reliability information generation unit reads out the reliability information of each block stored in a predetermined storage area such as a RAM or an HDD, and uses the read reliability information of each block. The block number of the block showing the smallest value among the expressed reliability is stored in a predetermined storage area such as a RAM. Further, the block number of the block having the lowest reliability is read from a predetermined storage area such as a RAM, and data is stored (written) in the block having the read block number. The management unit may include a program for causing the CPU to execute such processing.

  (Third Embodiment: Process Flow) FIG. 10 exemplifies a flowchart showing a process flow in the nonvolatile memory system according to the present embodiment.

  First, in step S1001, a plurality of types of operation information of the nonvolatile memory device are acquired in units of blocks. This process is mainly executed by the operation information acquisition unit. Next, the operation information acquired in step S1002 is held. This process is mainly executed by the operation information holding unit. In step S1003, block unit reliability information is generated by calculation using a plurality of pieces of operation information as parameters. This process is mainly executed by the reliability information generation unit. In step S1004, storage / relocation of data for each block is managed using reliability information in units of blocks. This process is mainly executed by the management unit. Next, in step S1005, it is determined whether to end the process. If it is determined that the determination here ends, the process ends. If it is determined that the determination here does not end, the process returns to step S1001.

  (Third Embodiment: Detailed Specific Example) FIG. 38 shows an operation information acquisition unit (3801), an operation information holding unit (3802), and a reliability information generation unit (3805) in addition to a general flash memory configuration. It is a figure which illustrates the case where the management part (3803) is comprised inside the memory. In such a case, for example, the control circuit (3803) may serve as a management unit. For example, the operation information acquisition unit (3801) may acquire operation information from the control circuit (3803). The memory cell array (3804) is used as an operation information holding unit, and the reliability information generation unit (3805) generates reliability information from the operation information held in the memory cell array (3804). It may be.

(Embodiment 3: Effect) Since the nonvolatile memory system according to this embodiment can store and rearrange data based on the reliability information of each block, for example, the deterioration is less and the reliability is higher. Data can be stored in a block.
(Embodiment 4)

  (Embodiment 4: Overview) In this embodiment, when data is stored for each block, an error correction code is added and stored, and when reading is performed, the reading error is corrected. A non-volatile memory system that acquires error correction information indicating the success or failure of correction will be described.

(Embodiment 4: Configuration) FIG. 11 illustrates a functional block diagram of a nonvolatile memory system according to this embodiment. The nonvolatile memory system includes an “operation information acquisition unit” (1101), an “operation information holding unit” (1102), a “reliability information generation unit” (1103), and a “management unit” (1104). Have. Further, the management unit (1104) includes a “correction unit” (1105). The operation information acquisition unit (1101) includes an “error correction information acquisition unit” (1106). That is, the nonvolatile memory system according to the present embodiment is configured by adding “correction means” (1105) and “error correction information acquisition means” (1106) to the configuration of the nonvolatile memory system according to the third embodiment. ing.

  "Correction means" (1105) has a function of storing an error correction code for reading error correction when storing data for each block, and correcting a reading error when reading. Specifically, the “error correction code” corresponds to, for example, ECC (Error-Coding Code), Hamming code, and the like. For example, in the case of ECC, as shown in FIG. 33, if 64 bits (3301) of data have 8 bits of error correction check bits (3302), errors up to 2 bits are detected and errors up to 1 bit are corrected. can do. Further, “storage including error correction code” means that, in the example of FIG. 33, all 72 bits are stored by adding 8 bits of error correction check bits to 64 bits of data.

  The “error correction information acquisition means” (1106) has a function of acquiring, as operation information, error correction information indicating success / failure of correction of a read error for each block. "Success / unsuccessful correction of read error" may mean whether or not an error has been corrected by checking the read error and corrected as a result of error correction. It may mean whether or not it was possible.

  FIG. 12 shows a specific example of error correction information. The error correction information illustrated in FIG. 12 indicates that the block of block number 12 has been successfully read error corrected. More specifically, the error correction information is represented by data such as “block_num = 12, error_correct =‘ success ’”, for example. Here, “block_num” is a program variable representing a block number as described above. “Error_correct” is a program variable indicating the success or failure of the read error correction. If the value is “success”, it indicates that the read error has been successfully corrected, and the value is “unsuccess”. If there is, it indicates that the correction of the read error was unsuccessful. Further, FIG. 12 shows error correction information for only the block of block number 12, but error correction information is also acquired for each of the other blocks. Since the error correction information is acquired as operation information, the correction means (1105) or the like is assumed as the acquisition source of the error correction information.

  (Embodiment 4: Process Flow) FIG. 13 illustrates a flowchart showing a process flow in the nonvolatile memory system according to this embodiment.

  First, in step S1301, error correction information indicating successful / unsuccessful reading error correction is acquired as operation information as operation information. This process is mainly executed by the error correction information acquisition unit. Next, the operation information acquired in step S1302 is held. This process is mainly executed by the operation information holding unit. In step S1303, block unit reliability information is generated by calculation using a plurality of pieces of operation information as parameters. This process is mainly executed by the reliability information generation unit. Next, in step S1304, storage including an error correction code is performed for reading error correction in storing data for each block, and reading error is corrected in reading. This process is mainly executed by correction means. Next, in step S1305, it is determined whether to end the process. If it is determined that the determination here ends, the process ends. If it is determined that the determination here does not end, the process returns to step S1301.

  (Embodiment 4: Detailed Specific Example) FIG. 39 shows an operation information acquisition unit (error correction information acquisition means) (3901), an operation information holding unit (3902), and reliability in addition to the configuration of a general flash memory. It is a figure which illustrates the case where the information generation part (3905) and the management part (correction means) (3903) are comprised inside the memory. In such a case, for example, the control circuit (3903) may serve as a management unit (correction means). For example, the operation information acquisition unit (error correction information acquisition means) (3901) may acquire operation information (error correction information) from the control circuit (3903). Further, the memory cell array (3904) is used as an operation information holding unit, and the reliability information generation unit (3905) uses the reliability information from the operation information (error correction information) held in the memory cell array (3904). May be generated.

  Further, in the correction means, the “storage including an error correction code for reading error correction when storing data for each block” is executed outside the memory, and the “correction of reading error when reading” is performed in the memory. (Control circuit 3903) may be executed.

(Embodiment 4: Effect) Since the nonvolatile memory system according to this embodiment can acquire error correction information as operation information for each block, for example, avoid blocks that cannot perform error correction, Storage and the like can be performed.
(Embodiment 5)

  (Embodiment 5: Overview) This embodiment will describe a nonvolatile memory system characterized in that storage time information indicating the time required to store data is obtained as operation information for each block.

(Embodiment 5: Configuration) FIG. 14 illustrates a functional block diagram of a nonvolatile memory system according to this embodiment. The nonvolatile memory system according to the present embodiment is configured by adding “storage time information acquisition means” (1407) to the configuration of the nonvolatile memory system according to the third or fourth embodiment. FIG. 14 illustrates a configuration in which a “storage time information acquisition unit” (1407) is added to the configuration of the nonvolatile memory system according to the third embodiment. The nonvolatile memory system includes an “operation information acquisition unit” (1401), an “operation information holding unit” (1402), a “reliability information generation unit” (1403), and a “management unit” (1404). Have. The operation information acquisition unit (1401) includes a “storage time information acquisition unit” (1407).

  The “storage time information acquisition unit” (1407) has a function of acquiring, as operation information, storage time information indicating the time required to store data for each block from the management unit (1404). The “time required for storage” may be a processing time from the memory controller (3501) to the control circuit (3502) in the configuration illustrated in FIG. 35, or from the control circuit (3502) to the memory cell (3503). ) Or a processing time obtained by adding both processing times. More specifically, FIG. 40 shows an operation information acquisition unit (storage time information acquisition means) (4001), an operation information holding unit (4002), and a reliability information generation unit (4005) in addition to a general flash memory configuration. Although it is a figure which illustrates the case where the management part (control circuit 4003) is comprised inside a memory, normally, stored data are given to DQ0-DQ15. In addition, when both of the addresses / CE and / WE are at the L level, the data is stored in memory at the timing when either one of the / WE and / CE rises to the L level and then changes to the H level. It will be taken into the cell array (4004). In the NOR flash memory, for example, the stored data can be written (stored) by following a command sequence in which specific data is written three times to a specific address and then stored data is written once. However, the storage time corresponds to a time during which a series of storage processes are performed.

  FIG. 15 shows a specific example of storage time information. The storage time information illustrated in FIG. 15 indicates that the block of block number 12 took 200 μs (microseconds) to store data. More specifically, the storage time information is represented by data such as “block_num = 12, write_time = 200”. Here, “block_num” is a program variable representing a block number as described above. Further, “write_time” is a program variable that represents the time required to store the data, and in FIG. 15, the unit is expressed in microseconds. Further, in FIG. 15, the storage time information for only the block of block number 12 is shown, but the storage time information is similarly acquired for each of the other blocks. Since the storage time information is acquired as operation information, the management unit (1404) or the like is assumed as an acquisition source of the storage time information.

  (Embodiment 5: Process Flow) FIG. 16 illustrates a flowchart showing a process flow in the nonvolatile memory system according to the present embodiment.

  First, in step S1601, storage time information indicating the time required to store data for each block is acquired as operation information. This process is mainly executed by the storage time information acquisition unit. Next, the operation information acquired in step S1602 is held. This process is mainly executed by the operation information holding unit. In step S1603, block unit reliability information is generated by calculation using a plurality of pieces of operation information as parameters. This process is mainly executed by the reliability information generation unit. In step S 1604, storage / relocation of data for each block is managed using reliability information in units of blocks. This process is mainly executed by the management unit. Next, in step S1605, it is determined whether to end the process. If it is determined that the determination here ends, the process ends. If it is determined that the determination here does not end, the process returns to step S1601.

  (Embodiment 5: Detailed Specific Example) FIG. 40 shows an operation information acquisition unit (storage time information acquisition means) (4001), an operation information holding unit (4002), and reliability in addition to a general flash memory configuration. It is a figure which illustrates the case where the information generation part (4005) and the management part (4003) are comprised in the memory. In such a case, for example, the control circuit (4003) may serve as a management unit. Further, for example, the operation information acquisition unit (storage time information acquisition means) (4001) may acquire operation information (storage time information) from the control circuit (4003). Further, the memory cell array (4004) is used as an operation information holding unit, and the reliability information generation unit (4005) uses the reliability information from the operation information (storage time information) held in the memory cell array (4004). May be generated.

(Embodiment 5: Effect) Since the nonvolatile memory system according to this embodiment can acquire storage time information as operation information, the flash memory has a characteristic that the storage time of data becomes longer when it deteriorates. By using it, data can be stored while avoiding blocks with low reliability (deteriorated). In addition, even if the storage time information itself disappears, it is possible to measure again, and it is also possible to consider variations in the characteristics of each block during memory production.
(Embodiment 6)

  (Embodiment 6: Overview) This embodiment will describe a nonvolatile memory system characterized in that erase time information indicating the time required for erasing data is acquired as operation information for each block.

(Embodiment 6: Configuration) FIG. 17 illustrates a functional block diagram of a nonvolatile memory system according to this embodiment. The nonvolatile memory system according to the present embodiment is configured by adding “erasing time information acquisition means” (1708) to the configuration of the nonvolatile memory system according to any one of Embodiments 3 to 5. FIG. 17 illustrates a configuration in which “erase time information acquisition unit” (1708) is added to the configuration of the nonvolatile memory system according to the third embodiment. The nonvolatile memory system includes an “operation information acquisition unit” (1701), an “operation information holding unit” (1702), a “reliability information generation unit” (1703), and a “management unit” (1704). Have. Further, the operation information acquisition unit (1701) includes “erase time information acquisition unit” (1708).

  The “erase time information acquisition unit” (1708) has a function of acquiring, from the management unit (1704), erase time information indicating the time required for erasing data for each block as operation information. The “time required for erasing” may be a processing time from the memory controller (3501) to the control circuit (3502) in the configuration illustrated in FIG. 35, or from the control circuit (3502) to the memory cell (3503). ) Or a processing time obtained by adding both processing times. More specifically, FIG. 41 shows an operation information acquisition unit (erasing time information acquisition unit) (4101), an operation information holding unit (4102), and a reliability information generation unit (4105) in addition to a general flash memory configuration. FIG. 10 is a diagram illustrating a case where the management unit (control circuit 4103) is configured in the memory. As in the case of data storage, the address is the data when both / CE and / WE are at the L level. After both / WE and / CE become L level, one of them rises and is taken into the memory cell array (4104) at the timing when it changes to H level. In a NOR flash memory, for example, data can be erased by following a command sequence of writing specific data six times at a specific address, but the erase time is a series of these erase processes. Applies time.

  FIG. 18 shows a specific example of the erase time information. The erasure time information illustrated in FIG. 18 indicates that the block with block number 12 took 2 ms (milliseconds) to erase data. More specifically, the erasure time information is represented by data such as “block_num = 12, erase_time = 2”. Here, “block_num” is a program variable representing a block number as described above. “Erase_time” is a program variable that represents the time required for erasing data. In FIG. 18, the unit is expressed in milliseconds. Further, FIG. 18 shows the erase time information for only the block with the block number 12, but the erase time information is similarly obtained for the other blocks. Since the erasure time information is acquired as operation information, the management unit (1704) or the like is assumed as the acquisition source of the erasure time information.

  (Sixth Embodiment: Process Flow) FIG. 19 exemplifies a flowchart showing a process flow in the nonvolatile memory system according to the present embodiment.

  First, in step S1901, erase time information indicating the time required for erasing data is acquired as operation information for each block. This process is mainly executed by the erase time information acquisition means. Next, the operation information acquired in step S1902 is held. This process is mainly executed by the operation information holding unit. In step S1903, block unit reliability information is generated by calculation using a plurality of pieces of operation information as parameters. This process is mainly executed by the reliability information generation unit. In step S1904, storage / relocation of data for each block is managed using reliability information in units of blocks. This process is mainly executed by the management unit. Next, in step S1905, it is determined whether to end the process. If it is determined that the determination here ends, the process ends. If it is determined that the determination here does not end, the process returns to step S1901.

  (Sixth Embodiment: Detailed Specific Example) FIG. 41 shows an operation information acquisition unit (erase time information acquisition unit) (4101), an operation information holding unit (4102), and reliability in addition to a general flash memory configuration. It is a figure which illustrates the case where the information generation part (4105) and the management part (4103) are comprised inside the memory. In such a case, for example, the control circuit (4103) may serve as a management unit. Further, for example, the operation information acquisition unit (erase time information acquisition means) (4101) may acquire operation information (erase time information) from the control circuit (4103). Further, the memory cell array (4104) is used as an operation information holding unit, and the reliability information generation unit (4105) uses the reliability information from the operation information (erasure time information) held in the memory cell array (4104). May be generated.

(Embodiment 6: Effect) Since the nonvolatile memory system according to this embodiment can acquire the erasing time information as the operation information, the flash memory has a characteristic that the erasing time of the data becomes longer when it deteriorates. By using it, data can be stored while avoiding blocks with low reliability (deteriorated). In addition, even if the erase time information itself disappears, it is possible to measure again, and it is also possible to take into account variations in the characteristics of each block during memory production.
(Embodiment 7)

  (Embodiment 7: Overview) This embodiment will describe a nonvolatile memory system characterized in that erase count information indicating the erase count of data is acquired as operation information for each block.

(Embodiment 7: Configuration) FIG. 20 illustrates a functional block diagram of a nonvolatile memory system according to this embodiment. The nonvolatile memory system according to the present embodiment is configured by adding “erase count information acquisition means” (2009) to the configuration of the nonvolatile memory system according to any one of Embodiments 3 to 6. FIG. 20 illustrates a configuration in which “erase count information acquisition unit” (2009) is added to the configuration of the nonvolatile memory system according to the third embodiment. The nonvolatile memory system includes an “operation information acquisition unit” (2001), an “operation information holding unit” (2002), a “reliability information generation unit” (2003), and a “management unit” (2004). Have. The operation information acquisition unit (2001) includes “erase count information acquisition unit” (2009).

  The “erase count information acquisition unit” (2009) has a function of acquiring, as operation information, erase count information indicating the number of erases of data for each block from the management unit (2004). FIG. 42 shows an operation information acquisition unit (erase count information acquisition unit) (4201), an operation information holding unit (4202), a reliability information generation unit (4205), and a management unit (in addition to a general flash memory configuration). The control circuit 4203) is a diagram exemplifying a case where the memory is configured inside the memory. For example, the number of erasures can be acquired by incrementing the counter of the erase command permitted to be executed by the control circuit (4203). it can.

  FIG. 21 shows a specific example of the erase count information. The erase count information illustrated in FIG. 21 indicates that the block with the block number 12 has 32,000 data erase cycles. More specifically, the erase count information is represented by data such as “block_num = 12, erase_count = 32000”, for example. Here, “block_num” is a program variable representing a block number as described above, and “erase_count” is a program variable representing the number of times data is erased. FIG. 21 shows the erase count information for only the block with the block number 12, but the erase count information is similarly acquired for the other blocks. Since the erase count information is acquired as operation information, the management unit (2004) or the like is assumed as the acquisition source of the erase count information.

  (Embodiment 7: Process Flow) FIG. 22 illustrates a flow chart showing a process flow in the nonvolatile memory system according to the present embodiment.

  First, in step S2201, erase number information indicating the number of data erases for each block is acquired as operation information. This process is mainly executed by the erase count information acquisition means. Next, the operation information acquired in step S2202 is held. This process is mainly executed by the operation information holding unit. In step S2203, block unit reliability information is generated by calculation using a plurality of pieces of operation information as parameters. This process is mainly executed by the reliability information generation unit. In step S2204, storage / relocation of data for each block is managed using reliability information in units of blocks. This process is mainly executed by the management unit. Next, in step S2205, it is determined whether to end the process. If it is determined that the determination here ends, the process ends. If it is determined that the determination here does not end, the process returns to step S2201.

  (Seventh Embodiment: Detailed Specific Example) FIG. 42 shows an operation information acquisition unit (erase count information acquisition unit) (4201), an operation information holding unit (4202), and reliability in addition to a general flash memory configuration. It is a figure which illustrates the case where the information generation part (4205) and the management part (4203) are comprised inside the memory. In such a case, for example, the control circuit (4203) may serve as a management unit. Further, for example, the operation information acquisition unit (erase number information acquisition means) (4201) may acquire operation information (erase number information) from the control circuit (4203). Further, the memory cell array (4204) is used as an operation information holding unit, and the reliability information generation unit (4205) uses the reliability information from the operation information (erase count information) held in the memory cell array (4204). May be generated.

(Embodiment 7: Effect) Since the nonvolatile memory system according to the present embodiment can acquire the erase count information as the operation information, the block having a small erase count is preferentially used to store data, etc. Can be done.
(Embodiment 8)

  (Embodiment 8: Overview) In this embodiment, a non-volatile memory system is described in which read count information indicating the read count of data is acquired as operation information for each block.

(Embodiment 8: Configuration) FIG. 23 illustrates a functional block diagram of a nonvolatile memory system according to this embodiment. The nonvolatile memory system according to the present embodiment is configured by adding “reading number information acquisition means” (2310) to the configuration of the nonvolatile memory system according to any one of Embodiments 3 to 7. FIG. 23 illustrates a configuration in which a “reading number information acquisition unit” (2310) is added to the configuration of the nonvolatile memory system according to the third embodiment. The nonvolatile memory system includes an “operation information acquisition unit” (2301), an “operation information holding unit” (2302), a “reliability information generation unit” (2303), and a “management unit” (2304). Have. Further, the operation information acquisition unit (2301) includes “reading number information acquisition means” (2310).

  The “reading number information acquisition means” (2310) has a function of acquiring, as operation information, reading number information indicating the number of times data is read for each block from the management unit (2304). FIG. 43 shows an operation information acquisition unit (reading number information acquisition means) (4301), an operation information holding unit (4302), a reliability information generation unit (4305), and a management unit (in addition to a general flash memory configuration). The control circuit 4303) is a diagram exemplifying a case where the memory is configured inside the memory. For example, the number of reads can be obtained by incrementing a counter of a read command permitted to be executed by the control circuit (4303). it can.

  FIG. 24 shows a specific example of the read count information. The number-of-reads information illustrated in FIG. 24 indicates that the block with the block number 12 has the number of data read times of 53,000. More specifically, the read count information is represented by data such as “block_num = 12, read_count = 32000”, for example. Here, “block_num” is a program variable representing the block number as described above, and “read_count” is a program variable representing the number of times data is read. Further, in FIG. 24, the read count information for only the block of block number 12 is shown, but the read count information is similarly acquired for each of the other blocks. Since the number-of-reads information is acquired as the operation information, the management unit (2004) or the like is assumed as the source of the number-of-reads information.

  (Embodiment 8: Process Flow) FIG. 25 exemplifies a flowchart showing a process flow in the nonvolatile memory system according to this embodiment.

  First, in step S2501, the number-of-reads information indicating the number of times data is read for each block is acquired as operation information. This process is mainly executed by the read count information acquisition means. Next, the operation information acquired in step S2502 is held. This process is mainly executed by the operation information holding unit. In step S2503, block unit reliability information is generated by calculation using a plurality of pieces of operation information as parameters. This process is mainly executed by the reliability information generation unit. In step S2504, the storage / relocation of data for each block is managed using the reliability information in units of blocks. This process is mainly executed by the management unit. Next, in step S2505, it is determined whether to end the process. If it is determined that the determination here ends, the process ends. If it is determined that the determination here does not end, the process returns to step S2501.

  (Embodiment 8: Detailed Specific Example) FIG. 43 shows an operation information acquisition unit (reading number information acquisition means) (4301), an operation information holding unit (4302), and reliability in addition to a general flash memory configuration. It is a figure which illustrates the case where the information generation part (4305) and the management part (4303) are comprised inside the memory. In such a case, for example, the control circuit (4303) may serve as a management unit. Further, for example, the operation information acquisition unit (reading number information acquisition means) (4301) may acquire the operation information (reading number information) from the control circuit (4303). Further, the memory cell array (4304) is used as an operation information holding unit, and the reliability information generation unit (4305) uses the reliability information from the operation information (reading number information) held in the memory cell array (4304). May be generated.

(Embodiment 8: Effect) Since the nonvolatile memory system according to the present embodiment can acquire the read count information as the operation information, the block having the low read count is preferentially used to store data. In particular, the present invention is useful in a NAND flash memory or the like having a characteristic that deterioration occurs only by reading data.
(Embodiment 9)

  (Embodiment 9: Overview) In this embodiment, a non-volatile memory system characterized in that storage number information indicating the number of times data is stored for each block is acquired as operation information.

(Embodiment 9: Configuration) FIG. 26 illustrates a functional block diagram of a nonvolatile memory system according to this embodiment. The non-volatile memory system according to the present embodiment has a configuration obtained by adding “stored number information acquisition means” (2611) to the configuration of the non-volatile memory system according to any one of the third to eighth embodiments. FIG. 26 exemplifies a configuration in which a “storage number information acquisition unit” (2611) is added to the configuration of the nonvolatile memory system according to the third embodiment. The nonvolatile memory system includes an “operation information acquisition unit” (2601), an “operation information holding unit” (2602), a “reliability information generation unit” (2603), and a “management unit” (2604). Have. Further, the operation information acquisition unit (2601) includes a “stored number information acquisition unit” (2611).

  The “stored number information acquisition unit” (2611) has a function of acquiring, as operation information, stored number information indicating the number of stored data for each block from the management unit (2604). 44 shows an operation information acquisition unit (storage number information acquisition means) (4401), an operation information holding unit (4402), a reliability information generation unit (4405), and a management unit (in addition to a general flash memory configuration). The control circuit 4403) is a diagram exemplifying a case where the memory is configured inside the memory, but the number of times of storage can be acquired by incrementing a counter of a storage command permitted to be executed by the control circuit (4403), for example. it can.

  FIG. 27 shows a specific example of the storage count information. The number-of-storages information illustrated in FIG. 27 indicates that the block with the block number 12 has 30500 data storage times. More specifically, the storage count information is represented by data such as “block_num = 12, write_count = 32000”. Here, “block_num” is a variable on the program representing the block number as described above, and “write_count” is a variable on the program representing the number of times data is stored. In addition, in FIG. 27, the storage count information for only the block with the block number 12 is shown, but the storage count information is similarly acquired for each of the other blocks. Since the storage count information is acquired as operation information, the management unit (2004) or the like is assumed as the acquisition source of the storage count information.

  Ninth Embodiment: Process Flow FIG. 28 exemplifies a flowchart showing a process flow in the nonvolatile memory system according to the present embodiment.

  First, in step S2801, storage count information indicating the storage count of data for each block is acquired as operation information. This process is mainly executed by the storage count information acquisition unit. Next, the operation information acquired in step S2802 is held. This process is mainly executed by the operation information holding unit. In step S2803, block unit reliability information is generated by calculation using a plurality of pieces of operation information as parameters. This process is mainly executed by the reliability information generation unit. In step S2804, storage / relocation of data for each block is managed using reliability information in units of blocks. This process is mainly executed by the management unit. Next, in step S2805, it is determined whether to end the process. If it is determined that the determination here ends, the process ends. If it is determined that the determination here does not end, the process returns to step S2801.

  (Ninth Embodiment: Detailed Specific Example) FIG. 44 shows an operation information acquisition unit (stored number information acquisition means) (4401), operation information holding unit (4402), and reliability in addition to a general flash memory configuration. It is a figure which illustrates the case where the information generation part (4405) and the management part (4403) are comprised inside the memory. In such a case, for example, the control circuit (4403) may serve as a management unit. Further, for example, the operation information acquisition unit (storage number information acquisition means) (4401) may acquire the operation information (storage number information) from the control circuit (4403). Further, the memory cell array (4404) is used as an operation information holding unit, and the reliability information generation unit (4405) uses the reliability information from the operation information (storage count information) held in the memory cell array (4404). May be generated.

(Embodiment 9: Effect) Since the nonvolatile memory system according to the present embodiment can acquire the storage count information as the operation information, the block having the low storage count is preferentially used to store data, etc. Can be done.
(Embodiment 10)

  (Embodiment 10: Overview) This embodiment is a nonvolatile memory system in which an operation information holding unit is arranged in a nonvolatile memory system, and the operation information holding unit stores the operation information in the nonvolatile memory device. A non-volatile memory system, in which error correction codes are included in a plurality of blocks and distributedly recorded, will be described.

  (Embodiment 10: Configuration) FIG. 29 illustrates a functional block diagram of a nonvolatile memory system according to this embodiment. The nonvolatile memory system according to the present embodiment is configured by adding “redundant distributed recording means” (2912) to the configuration of the nonvolatile memory system according to any one of Embodiments 1 to 9. FIG. 29 illustrates a configuration obtained by adding “redundant distributed recording unit” (2912) to the configuration of the nonvolatile memory system according to the first embodiment. The nonvolatile memory system includes an “operation information acquisition unit” (2901) and an “operation information holding unit” (2902). Further, the operation information holding unit (2902) includes a “redundant distributed recording unit” (2912). Note that the operation information holding unit (2902) is arranged in a nonvolatile memory device. That is, in the nonvolatile memory system according to this embodiment, the operation information is held in the nonvolatile memory device.

  The “redundant distributed recording means” (2912) has a function of recording operation information in a distributed manner by including error correction codes for a plurality of blocks in the nonvolatile memory device. As described above, the “error correction code” corresponds to, for example, ECC, Hamming code, and the like. “Distributing and recording an error correction code” means adding a check bit for error correction to a plurality of pieces of operation information and recording the information in separate blocks. That is, even if a reading error occurs when reading the operation information, the reading error can be corrected by the error correction check bit or the like.

  FIG. 30 shows a specific example of processing in the redundant distributed recording means. FIG. 30 illustrates a case where three pieces of information, that is, storage time, erase time, and erase count, are recorded as the operation information of the block of block number 12. For example, the block number 13 records operation information “block_num = 12, write_time = 200”, and the block number 14 records operation information “block_num = 12, erase_time = 2”. In the block of block number 15, operation information “block_num = 12, erase_count = 32000” is recorded. That is, the storage time of the block 12 is stored in the block 13, the erase time of the block 12 is stored in the block 14, and the erase count of the block 12 is stored in the block 15.

  (Tenth Embodiment: Process Flow) FIG. 31 exemplifies a flow chart showing a process flow in the nonvolatile memory system according to the present embodiment.

  First, in step S3101, a plurality of types of operation information of the nonvolatile memory device are acquired in units of blocks. This process is mainly executed by the operation information acquisition unit. Next, in step S3102, operation information is distributed and recorded with error correction codes included in a plurality of blocks in the nonvolatile memory device. This process is mainly executed by redundant distributed recording means.

  (Embodiment 10: Detailed Specific Example) FIG. 45 shows an operation information acquisition unit (4501) and an operation information holding unit (redundant distributed recording means) (4502) in the memory in addition to a general flash memory configuration. It is a figure which illustrates the case where it is comprised. In such a case, for example, the operation information acquisition unit (4501) may acquire operation information from the control circuit (4503). Further, the memory cell array (4504) may be used as an operation information holding unit.

  (Embodiment 10: Effect) Since the nonvolatile memory system according to the present embodiment records the operation information including the error correction code, even if a read error occurs when reading the operation information, it is used for error correction. Read error correction can be performed by a check bit or the like. Also, since the operation information is distributed and recorded in a plurality of blocks, for example, even if the operation information cannot be read from one block, other operation information can be read from another block. Safer.

Functional block diagram of the nonvolatile memory system according to Embodiment 1 Example of operation information An example of the operation information held in the operation information holding unit FIG. 3 is a flowchart showing a flow of processing of the nonvolatile memory system according to the first embodiment. Functional block diagram of a nonvolatile memory system according to Embodiment 2 Example of processing in reliability information generator Example of processing in reliability information generator FIG. 7 is a flowchart showing a flow of processing of the nonvolatile memory system according to the second embodiment. Functional block diagram of nonvolatile memory system according to Embodiment 3 FIG. 7 is a flowchart showing a flow of processing of the nonvolatile memory system according to the third embodiment. Functional block diagram of nonvolatile memory system according to Embodiment 4 Example of error correction information FIG. 7 is a flowchart showing a flow of processing of the nonvolatile memory system according to the fourth embodiment. Functional block diagram of nonvolatile memory system according to Embodiment 5 Example of storage time information FIG. 7 is a flowchart showing a process flow of the nonvolatile memory system according to the fifth embodiment. Functional block diagram of nonvolatile memory system according to Embodiment 6 Example of erase time information FIG. 7 is a flowchart showing a processing flow of the nonvolatile memory system according to the sixth embodiment. Functional block diagram of nonvolatile memory system according to Embodiment 7 Example of erase count information FIG. 9 is a flowchart showing a processing flow of the nonvolatile memory system according to the seventh embodiment. Functional block diagram of a nonvolatile memory system according to Embodiment 8 Example of read count information FIG. 9 is a flowchart showing a processing flow of the nonvolatile memory system according to the eighth embodiment. Functional block diagram of nonvolatile memory system according to Embodiment 9 Example of storage count information FIG. 10 is a flowchart showing a process flow of the nonvolatile memory system according to the ninth embodiment. Functional block diagram of a nonvolatile memory system according to Embodiment 10 Specific example of processing in redundant distributed recording means FIG. 12 is a flowchart showing a process flow of the nonvolatile memory system according to the tenth embodiment. Specific example of memory controller Illustration explaining ECC Example of general computer configuration The figure explaining the processing mechanism inside a memory device 1 is a diagram illustrating an example of a configuration of a nonvolatile memory system according to a first embodiment. FIG. 4 is a diagram illustrating an example of a configuration of a nonvolatile memory system according to a second embodiment. FIG. 4 is a diagram illustrating an example of the configuration of a nonvolatile memory system according to a third embodiment. FIG. 7 is a diagram illustrating an example of a configuration of a nonvolatile memory system according to a fourth embodiment. FIG. 10 is a diagram illustrating an example of a configuration of a nonvolatile memory system according to a fifth embodiment. FIG. 10 is a diagram illustrating an example of a configuration of a nonvolatile memory system according to a sixth embodiment. FIG. 10 is a diagram illustrating an example of a configuration of a nonvolatile memory system according to a seventh embodiment. FIG. 10 is a diagram illustrating an example of the configuration of a nonvolatile memory system according to an eighth embodiment. FIG. 10 is a diagram showing an example of the configuration of a nonvolatile memory system according to Embodiment 9. FIG. 10 is an example of a configuration of a nonvolatile memory system according to the tenth embodiment.

Explanation of symbols

0101 Operation information acquisition unit 0102 Operation information holding unit 0503 Reliability information generation unit 0904 Management unit

Claims (17)

A nonvolatile memory system including a nonvolatile memory device capable of erasing data only in block units,
An operation information acquisition unit that acquires a plurality of types of operation information of the nonvolatile memory device in units of blocks;
An operation information holding unit for holding the acquired operation information;
A non-volatile memory system.   The nonvolatile memory system according to claim 1, further comprising a reliability information generation unit configured to generate reliability information in units of blocks by calculation using a plurality of operation information as parameters.   The nonvolatile memory system according to claim 2, further comprising a management unit that manages storage / relocation of data for each block using reliability information in units of blocks. The management unit has a correction means for correcting the read error at the time of reading while storing the error correction code for reading error correction at the time of storing the data for each block,
The non-volatile memory system according to claim 3, wherein the operation information acquisition unit includes error correction information acquisition means for acquiring error correction information indicating the success / failure of correction of the read error as operation information for each block.   5. The nonvolatile memory system according to claim 3, wherein the operation information acquisition unit includes storage time information acquisition means for acquiring, as operation information, storage time information indicating a time required to store data for each block from the management unit.   The non-volatile information according to any one of claims 3 to 5, wherein the operation information acquisition unit includes erase time information acquisition means for acquiring, as operation information, erase time information indicating a time required for erasing data for each block from the management unit. Memory system.   The nonvolatile memory system according to any one of claims 3 to 6, wherein the operation information acquisition unit includes an erase number information acquisition unit that acquires, from the management unit, erase number information indicating the number of data erases for each block as the operation information. .   The non-volatile memory system according to claim 3, wherein the operation information acquisition unit includes a read number information acquisition unit that acquires read number information indicating the number of times of reading data for each block from the management unit as operation information. .   9. The nonvolatile memory system according to claim 3, wherein the operation information acquisition unit includes storage number information acquisition means for acquiring, as operation information, storage number information indicating the number of data storage for each block from the management unit. .   The nonvolatile memory system according to any one of claims 1 to 9, wherein the operation information holding unit is arranged in the nonvolatile memory device.   11. The nonvolatile memory system according to claim 10, wherein the operation information holding unit includes redundant distributed recording means that records the operation information in a distributed manner by including error correction codes for a plurality of blocks in the nonvolatile memory device. A method of operating a nonvolatile memory system including a nonvolatile memory device capable of erasing data only in block units,
An operation information acquisition step of acquiring a plurality of types of operation information of the nonvolatile memory device in units of blocks;
An operation information holding step for holding the acquired operation information;
A method of operating a non-volatile memory system comprising:   The operation method of the nonvolatile memory system according to claim 12, further comprising a reliability information generation step of generating reliability information in units of blocks by calculation using a plurality of operation information as parameters.   14. The method of operating a nonvolatile memory system according to claim 13, further comprising a management step of managing storage / relocation of data for each block using reliability information in units of blocks.   The operation of the nonvolatile memory system according to claim 14, wherein the operation information acquisition step includes a storage time information acquisition substep of acquiring storage time information indicating the time required for storing data for each block in the management step as operation information. Method.   15. The operation information acquisition step according to claim 12, further comprising an erasure time information acquisition substep of acquiring, as operation information, erasure time information indicating a time required for erasing data for each block in the management step. A method of operating a non-volatile memory system. In the operation information holding step, the operation information is held in the nonvolatile memory device, and the operation method of the nonvolatile memory system is characterized in that:
The operation information holding step includes a redundant distributed recording substep for recording the operation information in a distributed manner including error correction codes for a plurality of blocks in the nonvolatile memory device. A method of operating the described non-volatile memory system.

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