JP2007311989A - Liquid crystal display controller - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a liquid crystal display controller that reduces a feeling of an afterimage of display of an interlaced type video signal of a liquid crystal display device and improves a feeling of resolution. <P>SOLUTION: The liquid crystal display controller includes a memory for odd-numbered fields where image data of odd-numbered fields of the interlaced type video signal are written and read, a memory for even-numbered fields where image data of even-numbered fields are written and read, a luminance gain control section which attenuates image data read out of the memories for odd-numbered/even-numbered fields to a suitable luminance value, and a memory switching section which switches the image data from the memories for odd-numbered/even-numbered fields. The memory switching section includes a switch which alternates image data from the luminance gain control section for every horizontal display line in the fields. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to a liquid crystal display control device that generates and outputs a drive signal for displaying an interlaced video signal on a liquid crystal display device that performs display by a progressive scanning method.

  The scanning method for television broadcasting is performed by an interlace method in which a plurality of horizontal display lines constituting a screen are scanned at regular intervals. Therefore, a cathode ray tube type display device widely used in television receivers displays images in an interlaced manner.

  For example, taking the current NTSC (National Television System Committee) system as an example, in the NTSC system, one image composed of 525 horizontal display lines is composed of two fields. Therefore, there are 262.5 horizontal display lines in one field.

  In the NTSC system, first, every other horizontal display line is scanned from the top of the screen to the bottom in the first field (odd field), and then back to the next field (even field). That is, every other horizontal display line that has been skipped in the first field is scanned to the bottom.

  The reason why the video is displayed by the interlace method is to reduce the flicker of the video due to the display principle of the cathode ray tube type display device. In a cathode ray tube type display device, an electron beam is emitted from an electron gun, and the electron beam is bent by an electromagnet called a polarization yoke, and irradiated on a phosphor on the front surface of the device constituting a screen to emit light. The electron beam is first irradiated on the upper left of the screen, moves parallel to the right, and when reaching the right end, it goes down one step and is irradiated from left to right again. This operation is repeated to the lowest level to complete one screen scan.

  When the scanning of one screen is completed, the same scanning is repeated again from the upper left of the screen. Since the time required to reach from the upper left to the lower right is 1/60 to 1/30 seconds, an image can be formed on the entire screen by the afterglow of the phosphor and the visual afterimage.

  However, phosphors are bright immediately after the irradiation of the electron beam stops, and the amount of emitted light gradually decreases. Therefore, when drawing slowly (scanning), when the lower part of the screen is drawn, The upper part becomes dark and the image flickers.

  Therefore, by scanning the screen with the interlace method, the scanning of the next video signal starts before the first drawn part becomes dark, thereby increasing the number of times the apparent screen is updated and flickering the entire screen. It is mitigating.

  By the way, in recent years, with the spread of liquid crystal display devices, liquid crystal display devices have come to be used as display devices in television receivers. In a liquid crystal display device, there is no flickering of the image caused by a phosphor unlike a cathode ray tube type display device, so a progressive method (sequential scanning) that sequentially scans a plurality of horizontal display lines constituting a screen one by one. System). Therefore, when displaying an interlaced video signal on a liquid crystal display device, it is necessary to convert the interlaced video signal into a progressive video signal.

  As a conversion method for converting an interlaced video signal into a progressive video signal, a conversion method using a field memory can be realized with the simplest configuration.

  A conversion method using a field memory is described in Patent Document 1 described below, for example.

  As described above, one screen of the interlace video signal is composed of the odd field and the even field, and is input in the order of the odd field and the even field.

  First, when odd-field image data is input, an IP (interlace / progressive) conversion circuit sequentially writes the odd-field image data into an odd-number field memory made of SDRAM. Subsequently, when the even field image data is input, the IP conversion circuit sequentially writes the even field image data in the even field memory.

  As a result, image data for one screen is written in the odd and even field memories. The IP conversion circuit alternately reads image data for each horizontal display line from the odd and even field memories in which image data for one screen is written, and supplies the image data to the liquid crystal display device.

  The IP conversion circuit reads, for example, the written image data at a speed twice the writing speed after the writing of one horizontal scanning line from the odd field memory in which the image data is currently written, Image data is supplied to the liquid crystal display device so that the even-numbered line is read from the even-numbered field memory to the next even-numbered line at the same reading speed.

  In this way, the liquid crystal display device displays one screen while displaying each horizontal display line in accordance with a necessary drive control signal.

  A display configuration using a line memory instead of a field memory is described in Patent Document 2, for example.

In the above-mentioned Patent Document 2, horizontal display line driving is sequentially performed in the interlaced video signal order (odd / even field), and a black video is inserted into a scanning line that is not the current field. A technique for supplying a necessary drive signal and displaying one screen on the liquid crystal display device is disclosed.
JP-A-11-164231 JP 2005-286746 A

  However, in the display by the technique disclosed in Patent Document 1, there is a problem that combing occurs and the display quality is low as shown in FIG. 5 (combing location 50).

  In addition, the combing removal process has a problem that the resolution in the horizontal direction is reduced as shown in FIG. 6 (resolution reduction portion 60).

  The display method described in Patent Document 2 does not require a field memory and can be reduced in size, so that the cost can be reduced. On the other hand, as shown in FIG. 40, black image 41 in even field, and black image are inserted and displayed in odd and even fields, respectively. Therefore, flicker is seen when the liquid crystal response speed is increased, and afterimage is seen when the liquid crystal response speed is lowered.

  Therefore, the present invention has been made in view of such problems in the prior art, and realizes a reduction in afterimage feeling and an improvement in resolution in displaying an interlaced video signal for a liquid crystal display device. An object of the present invention is to provide a liquid crystal display control device capable of achieving the above.

  In order to solve the above problems, a liquid crystal display control device according to the present invention has the following features.

The liquid crystal display control device according to the present invention has a storage capacity for storing image data for one screen of each field in an interlaced video signal that constitutes one screen with odd fields and even fields. A field memory that performs reading as well as writing, image data output in the current field, and image data read from the field memory storing image data of a field immediately before the current field are 1 A non-interlaced memory switching unit that alternately switches and outputs each horizontal display line; and a timing generation unit that controls writing and reading of image data to and from the field memory and controlling the memory switching unit. For a liquid crystal display device that displays a video signal of the system. A liquid crystal display control device for generating a video signal for displaying a video signal of interlace type,
And a luminance level adjusting unit that inputs image data read from the field memory storing image data of the field immediately before the current field and adjusts the level so as to attenuate to a predetermined luminance level, The memory switching unit replaces the image data output from the brightness level adjusting unit and the image data output in the current field for each horizontal display line instead of the image data read from the field memory. It is characterized by alternately switching and outputting.

  Further, in the liquid crystal display control device according to the present invention, when the current field is an odd field, the memory switching unit converts the image data attenuated to the predetermined luminance level in the odd-numbered horizontal display line, In the case of an even field, the image data attenuated to the predetermined luminance level is switched to the even horizontal display line.

  Further, in the liquid crystal display control device according to the present invention, the timing generation unit includes a write clock signal for writing the image data output in the current field, and a frequency twice the write clock signal. And the read-out clock signal is generated, and the field memory is controlled so as to read out image data for one horizontal display line in a time ½ of one horizontal scanning time in the interlace video signal. Control is performed so that image data is read from the field memory by the read clock signal from the time when image data for horizontal display lines is written to the field memory.

  According to the present invention having the above configuration, the following effects can be obtained.

  According to the liquid crystal display control device of the present invention, in each field of the odd field and the even field, the image based on the image data of the field and the brightness-reduced image are alternately displayed on each horizontal display line of the liquid crystal display device. Therefore, an image obtained by reducing the luminance of the image is displayed on the horizontal display line where the image is displayed in the immediately preceding field.

  Thus, in a liquid crystal display device that is a hold-type display device in which a pixel maintains a light emission state for a certain period, an impulse type that causes a pixel to emit light instantaneously, such as a cathode ray tube type display device, by inserting a reduced-luminance image As with the display device, the afterimage is difficult to be recognized.

  Thereby, although the brightness of the image is somewhat reduced, the moving image can be clearly displayed when the moving image is displayed.

  Also, when displaying odd fields, images with appropriately reduced luminance of even field images are displayed together at intervals of one line of input images of odd field images, and even fields are displayed when even fields are displayed. An image in which the luminance of the odd field image is appropriately reduced is displayed for each line interval of the input image. Thereby, the combing reduction filter effect appears, and the combing of the interlaced moving image display can be reduced.

  Embodiments according to the present invention will be described below with reference to the accompanying drawings.

  1 to 3 are examples of embodiments for carrying out the invention, and in the drawings, parts denoted by the same reference numerals represent the same items.

  First, the configuration of the liquid crystal display control device according to the present invention will be described with reference to FIG.

  FIG. 1 is a block diagram showing a configuration of a liquid crystal display control device according to the present invention.

  As shown in FIG. 1, the liquid crystal display control device includes an odd field memory 10 for writing and reading odd field image data in an interlaced video signal, and an even memory for writing and reading even field image data. 11, luminance gain adjustment units 12 and 13 for attenuating image data read from the odd / even memory to an appropriate luminance value, a memory switching unit 15 for switching the image data from the odd / even memory, and And a timing generation unit 14 that generates a control signal such as a memory and a memory switching unit 15.

  In addition, the memory switching unit 15 includes a switch 16 for alternately switching the image data directly read from the odd field memory 10 and the image data from the luminance gain adjusting unit 12 for each horizontal display line in the field, and for the even field. A switch 17 for alternately switching image data read directly from the memory 11 and image data from the luminance gain adjusting unit 13 for each horizontal display line in the field, and switching the output image data of the switches 16 and 17 for each field. And switch 18.

  Next, the basic operation concept of the liquid crystal display control apparatus configured as described above will be briefly described in advance before explaining the operation of the present apparatus, using FIG.

  Conventionally, as shown in FIG. 4, the liquid crystal display control device according to the present invention is 1 for every odd horizontal display line for an odd field, and for every even horizontal display line for an even field. Instead of inserting the black image data (40, 41) of the horizontal display line, as shown in FIG. 3, the luminance level is appropriately adjusted by the luminance gain adjusting units 13, 14 for the image displayed in the previous field. By inserting the lowered image data (30, 31), the luminance level between the lines does not drop sharply. Therefore, when the response speed of the liquid crystal is lowered, the change in the image can be followed, and the afterimage feeling Can be reduced. When the response speed of the liquid crystal is lowered, the flickering feeling of the image can be reduced.

  Further, unlike the conventional case where the image data of one field before is inserted as it is, the luminance level between the lines is not maintained at almost the same luminance level, so that the effect of the combing reduction filter is obtained, and the combing phenomenon is alleviated. It is possible.

  Next, the operation of the liquid crystal display control device of the present invention that can achieve the above effect will be described with reference to the timing chart shown in FIG.

  As shown in FIG. 2, (a) shows a vertical synchronization signal of an interlaced input signal.

  Here, it is assumed that the valid period a and the blanking period b indicate the valid period and blanking period of the odd field. Therefore, the next vertical synchronizing signal field is an even field.

  (B) shows the vertical drive timing of the liquid crystal display device, and shows a case where the phase of the input signal is slightly delayed.

  (C) shows a write signal (W1) generated by the timing generator 14 for writing the image data of the input signal of the odd field into the odd field memory 10. The active period of the write signal W1 is A1 to B1, as shown in the figure, and coincides with the effective period.

  Further, (d) shows a write signal (W2) generated by the timing generator 14 for writing the image data of the input signal of the even field into the even field memory 11. The write period is a period equivalent to the write signal W1.

  (E) shows a read signal (R1) for reading the image data written in the odd field memory 10. As shown in the figure, the active periods C1 to C2 (time T) indicate one horizontal display line period.

  Here, if the total number of horizontal display lines in the vertical period is N, the total time ((N / 2) × T time) of the read signal R1 is one half of the effective period a (A1 to B1).

  Therefore, the speed for reading one horizontal display line from the odd field memory 10 should be at least twice as fast as the writing speed. Further, the timing of reading is not a problem if the vertical synchronizing signal of the driving signal of the liquid crystal display device is delayed by one horizontal display line time or more from the vertical synchronizing signal of the input signal, and the delay is one horizontal display line time. In the case of the following, reading is performed at least after the writing for one horizontal display line is completed.

  (F) shows a read signal (R2) for reading image data written in the even-field memory 10. As shown in (e) and (f), after the end of the read signal R1 in the active period (C1 to C2), the read signal in the period (C2 to C3) for reading the image data of one horizontal display line from the even field memory 11 R2.

  The total time (C1 to D1) of the read signal R1 and the read signal R2 is the effective period a.

  The read signals R1 and R2 are generated by the timing generator 14.

  In this way, the odd-numbered read signal R1 and the even-numbered read signal R2 are alternately switched to output image data of N horizontal display lines to the liquid crystal display device 19.

  At this time, the switch 16 of the memory switching unit 15 is alternately switched, and a control signal for controlling the switch 16 is generated by the timing generation unit 14.

  Further, the output of the luminance gain adjusting unit 13 that lowers the luminance level of the image data read from the even field memory 11 at a predetermined rate is sent to the switch 16.

  Note that the luminance gain may change depending on the type of video such as a movie or a news program.

  Even when the even-numbered field period shown in (d) is entered, similarly to the odd-numbered field period, the read signal R1 and the read signal R2 are alternately switched to output image data of N horizontal display lines to the liquid crystal display device 19. .

  At this time, the output of the luminance gain adjusting unit 12 for reducing the luminance of the image data read out from the odd-number field memory 10 is sent to the switch 17.

  Further, the odd number is the read signal R2, the even number is the read signal R1, and switching is performed by the switch 17.

  Finally, the switch for switching the outputs of the switch 16 and the switch 17 is the switch 18 of the memory switching unit 15, and the switching timing is performed, for example, at E (the same timing as A2) as shown in the figure.

  As described above, as described above, an afterimage is obtained by displaying an image obtained by reducing the image data of the field immediately before the currently displayed field to a predetermined luminance level on every other horizontal display line. It is possible to bring about effects such as reduction of feeling and relaxation of combing phenomenon.

  The liquid crystal display control device according to the present invention is not limited to the above-described embodiment, and various changes can be made without departing from the scope of the present invention.

It is a block diagram which shows the structure of the liquid crystal display device which concerns on this invention. 3 is a timing chart showing a schematic operation of the liquid crystal display device according to the present invention. It is a figure which shows each field image which inserted and displayed the image which reduced the luminance level of the input image for every line interval of the input image of the field image at the time of I / P conversion. It is a figure which shows each field image which inserted and displayed the black image for every line interval of the input image of the field image at the time of I / P conversion by a prior art. It is a figure which shows the combing phenomenon at the time of I / P conversion by a prior art. It is a figure which shows the resolution fall phenomenon at the time of I / P conversion by a prior art.

Explanation of symbols

10 memory for odd field 11 memory for even field 12, 13 luminance gain adjusting unit 14 timing generating unit 15 memory switching unit 16, 17, 18 SW
19 Liquid Crystal Panel 30 Reduced Luminance Image Line 31 in Odd Field Luminance Reduced Image Line 40 in Even Field Black Image Line 41 in Odd Field Black Image Line 50 in Even Field 50 Combing Location 60 Reduced Resolution Location

Claims (3)

A field memory having a storage capacity for storing image data for one screen of each field in an interlaced video signal that forms one screen with an odd field and an even field, and for reading and writing the image data; ,
The image data output in the current field and the image data read from the field memory storing the image data of the field immediately before the current field are alternately switched and output for each horizontal display line. A memory switching unit;
A timing generator for controlling writing and reading of image data to and from the field memory, and for controlling the memory switching unit;
With
A liquid crystal display control device for generating a video signal for displaying the interlaced video signal with respect to a liquid crystal display device that displays a non-interlaced video signal,
Further, the image processing apparatus further includes a luminance level adjustment unit that inputs image data read from the field memory storing image data of a field immediately before the current field and adjusts the level so as to attenuate to a predetermined luminance level.
The memory switching unit replaces the image data read from the field memory with the image data output from the brightness level adjusting unit and the image data output in the current field for each horizontal display line. A liquid crystal display control device, characterized in that the output is switched alternately.   When the current field is an odd field, the memory switching unit reduces the image data attenuated to the predetermined luminance level on the odd-numbered horizontal display line, and when the current field is an even-numbered field, 2. The liquid crystal display control apparatus according to claim 1, wherein the display line is switched to image data attenuated to the predetermined luminance level.   The timing generation unit generates a write clock signal for writing image data output in the current field, and a read clock signal having a frequency twice as high as the write clock signal. The field memory is controlled so that image data for one horizontal display line is read out in a time half of one horizontal scanning time in the video signal of the system, and at least one horizontal display line of image data is stored in the field memory. 3. The liquid crystal display control device according to claim 1, wherein image data is controlled to be read from the field memory with the read clock signal from the time of writing.