JP2008083457A - Liquid crystal display device and driving method thereof - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a method of driving a liquid crystal display device that can prevent deterioration in picture quality. <P>SOLUTION: A frame rate converter 3, after storing an image of one frame of an input video signal (60 Hz) in a frame memory unit 2, reads a first field and a second field of an image signal each twice repeatedly at a double frame rate (120 Hz). In synchronism with a vertical synchronizing signal time-base compressed to 1/120 second, a pseudo-interlacing unit 4 inserts a black signal into the first field time-base compressed to 1/120 second by setting a gain coefficient of odd-numbered lines to 0 and also inserts a black signal into the second field by setting a gate coefficient of even-numbered lines to 0. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to a liquid crystal display device and a driving method thereof, and more particularly to a technique for preventing image quality deterioration.

  LCDs provide high-definition display and have features such as low power consumption and space saving, and their replacement from CRTs is accelerated in various applications such as computer monitors and television display devices. However, since the image quality in moving image display is not sufficient in LCD compared with CRT, improvement in moving image quality is required.

  One problem with LCD moving image display is that the LCD is hold-type drive that continues to display until it is rewritten with the image information of the next frame. In a TFT-LCD that is often used as an LCD, charges stored by applying an electric field to liquid crystal are held at a relatively high rate until the next electric field is applied. Therefore, each pixel of the LCD continues to be displayed until it is rewritten by applying an electric field based on pixel information of the next frame. On the other hand, in a CRT display device that performs display by manipulating an electron beam to emit light from a phosphor, the light emission of each pixel has an impulse shape. Accordingly, the LCD has a lower time frequency characteristic of image display light than a CRT, and the spatial frequency characteristic is also lowered accordingly, resulting in motion blur of moving picture display.

  As a conventional technique for dealing with this problem, Patent Document 1 discloses that the frame rate of an input video signal is converted to N times, and black display is performed in at least one vertical display period within one frame period of the input video signal. By inserting a gain adjustment signal in which the amplitude of a signal or video signal is adjusted, a means for improving motion blur by bringing it closer to an impulse response is disclosed.

JP 2002-215111 A

  However, in Patent Document 1, when the black display signal is inserted, the image signal and the black signal are switched and output in units of the vertical display period, so that the number of light emitting pixels in the image display period is on the time axis. Unlikely, image quality deterioration due to flickering occurs.

  Further, in Patent Document 1, when a gain adjustment signal in which the amplitude of a video signal is adjusted is inserted, the luminance is deteriorated when the gain control coefficient is decreased, and the deterioration of the luminance is suppressed when the gain control coefficient is increased. , The effect of improving the motion blur is reduced.

  Regardless of whether a black display signal or a gain adjustment signal (with the amplitude of the video signal adjusted) is inserted, by reducing the time axis by 1 frame to 1 / N, the liquid crystal is at least N in the case where the time axis is not reduced. Double response speed is required, but the liquid crystal generally has poor response characteristics with respect to the change from the intermediate gradation to the intermediate gradation, and when this cannot be achieved, the change of the liquid crystal according to the gradation voltage is not sufficient. As a result, image quality degradation such as motion blur and contrast reduction occurs.

  That is, there is a problem that image quality degradation may occur when either a black display signal or a gain adjustment signal (with the amplitude of the video signal adjusted) is inserted.

  The present invention has been made to solve the above problems, and an object of the present invention is to provide a liquid crystal display device capable of preventing image quality deterioration and a driving method thereof.

  In the liquid crystal display device according to the present invention, the input first video signal having the first display cycle is time-axis compressed by a factor of 1/2 and each frame is repeated twice as the first or second field. Frame rate conversion means for converting to a second video signal having a second display period that is ½ times the first display period, and the luminance represented by the second video signal, which corresponds to the first half of the first display period In the first field, the luminance at a predetermined pixel in the screen is selectively reduced to M (M is a decimal number greater than 0 and smaller than 1) times, and in the second field corresponding to the second half of the first display period, First luminance control means for selectively reducing the luminance of the remaining pixels by M times.

  According to the liquid crystal display device of the present invention, in the first display cycle of the input first video signal, the luminance in a predetermined pixel is set in the first field corresponding to the first half and the remaining luminance is set in the second field corresponding to the second half. Since the luminance in each pixel is selectively lowered, image quality deterioration can be prevented as compared with the case where the image signal and the black signal are switched and output for all the pixels.

<Embodiment 1>
Embodiment 1 of the present invention will be described in detail with reference to FIGS. FIG. 1 is a main block diagram of the liquid crystal display device according to the present embodiment, FIG. 2 is a timing chart for explaining each operation in the driving method of the liquid crystal display device according to the present embodiment, and FIG. It is a schematic explanatory drawing which shows an example of the liquid crystal response with respect to the gamma conversion in the drive method of the liquid crystal display device which concerns.

  As shown in FIG. 1, the liquid crystal display device according to the present embodiment includes a synchronization detection unit 1 that detects the frequency of an input synchronization signal, and a frame memory unit 2 that stores a video signal in units of frames, for example, one frame. The CPU 5 that controls the operation of each unit based on the synchronization signal detected by the synchronization detection unit 1, the frame rate conversion unit 3 that converts the frame frequency of the input video signal to double based on the control signal from the CPU 5, and the CPU 5 A pseudo-interlace generating unit 4 that generates an interlaced image based on a control signal from a video signal, a gamma converting unit 7 that converts a gamma curve of a video signal based on a control signal from a CPU 5, and an LUT (lookup) that stores a gamma curve. A table) portion 8 and a liquid crystal panel 6.

  The CPU 5 generates a frame rate conversion control signal based on the vertical synchronization signal, horizontal synchronization signal, and the like detected by the synchronization detection unit 1.

  The frame rate conversion unit 3 stores an image of one frame of the input video signal (60 Hz) in the frame memory unit 2 based on a control signal from the CPU 5, as shown in FIG. As shown in (b), the vertical period with respect to the liquid crystal panel 6 is reduced to 1/120 seconds by repeatedly reading out the image signal twice at the frame rate (120 Hz) of the first field and the second field. The compressed image is output continuously.

  That is, the frame rate conversion unit 3 functions as a frame rate conversion unit according to the present invention, and a first video signal (input video) having a first display period (1/60 seconds) input to the liquid crystal display device. Signal) is time-compressed by a factor of 1/2 and each frame is repeated twice as the first or second field, thereby providing a second display period (1/120 seconds) that is 1/2 the first display period. The second video signal is converted.

  As shown in FIG. 2B, the pseudo-interlace generation unit 4 synchronizes with the vertical synchronization signal time-compressed to 1/120 second based on the control signal from the CPU 5, and takes time to 1/120 second. A black signal is inserted by setting the gain coefficient of odd-numbered lines of 1, 3, 5,... To 0 in the first field that is axially compressed, and an even number of 2, 4, 6,. A black signal is inserted by setting the line gain coefficient to 0, and so-called pseudo-interlacing is performed. By paying attention to one pixel in the liquid crystal screen by such control, a black insertion operation is performed in which the video signal and black are repeatedly displayed every 1/120 second. On the other hand, when attention is focused on the entire liquid crystal screen, flicker does not occur because fluctuations in screen brightness on the time axis are suppressed. Note that the gain coefficient is for amplifying the second video signal output from the frame rate conversion unit 3, and the luminance can be lowered by lowering the gain coefficient.

  That is, the pseudo-interlace generating unit 4 functions as the first luminance control unit according to the present invention, and the luminance represented by the second video signal is in the first field corresponding to the first half of the first display cycle. The brightness of the pixels constituting the odd lines of the plurality of display lines is lowered, and the brightness of the pixels constituting the even lines of the plurality of display lines is lowered in the second field corresponding to the second half of the first display cycle.

  The LUT unit 8 connected to the gamma conversion unit 7 stores a gamma curve for converting the halftone of the video signal. The gamma conversion unit 7 calls a gamma curve from the LUT unit 8 based on a control signal from the CPU 5 and performs halftone conversion.

  Here, as shown in FIG. 3 (a), the liquid crystal needs to reach the target gradation within a vertical period that is time-axis compressed from 1/60 seconds to 1/120 seconds. Need response speed. That is, as shown in FIG. 3B, the LUT unit 8 stores in advance a conversion table that has a higher gradation than the desired gradation so that the liquid crystal reaches the target gradation within 1/120 seconds. is there.

  Normally, such an overdrive function requires gradation conversion by comparing the gradation data of the previous frame with the gradation data of the current frame, and requires a frame memory. In this embodiment, the video signal Since a black signal is inserted between the video signals, the video signal changes from black, and can be realized only by the LUT without the frame memory.

  Further, even when the liquid crystal cannot fully respond from the video signal to the black signal within 1/120 seconds, the conversion table stored in the LUT unit 8 should be created on the assumption that the gray signal is changed to the video signal. good.

  In the present embodiment, the CPU 5 is configured to control the operation of each unit based on the synchronization signal detected by the synchronization detection unit 1. However, as shown in FIG. Based on this, each unit may be configured to operate without going through the CPU 5.

  In this embodiment, the gain coefficient is set to 0 every other line. However, the gain coefficient may be set to 0 every N lines (N is an integer), and attention is paid to a certain pixel. In this case, as long as the combination of the first field and the second field is a combination of a video signal and a black signal, anything such as a vertical line pattern, a staggered pattern, or the like may be used instead of a horizontal line pattern. In this embodiment, the gain coefficient is set to 0, but it may be realized by the above-described pattern and alpha blending of the video signal.

  As described above, in the liquid crystal display device and the driving method thereof according to the present embodiment, the first field corresponding to the first half of the first display cycle with respect to the luminance represented by the second video signal using the pseudo-interlace generation unit 4. In the second field corresponding to the second half of the first display cycle, the luminance in the predetermined pixels constituting the odd lines or the like is selectively reduced to M times, and the luminance in the pixels constituting the even lines or the like is selectively selected in the second field corresponding to the latter half of the first display cycle. It is lowered to M times. Therefore, image quality deterioration can be prevented as compared with Patent Document 1 in which image signals and black signals are switched and output for all pixels.

  In the above description, the case where the luminance in the pixels forming the odd lines is reduced in the first field and the luminance in the pixels forming the even lines is decreased in the second field is not limited to this. Then, the luminance in the pixels constituting the even lines may be lowered, and the luminance in the pixels constituting the odd lines may be lowered in the second field.

<Embodiment 2>
In the first embodiment, the case where a black signal with a gain coefficient of 0 is inserted into the video signal has been described. However, the luminance of the video may be deteriorated by inserting the black signal. In order to prevent this, a gain adjustment signal obtained by adjusting the amplitude of the video signal (in a range where the gain coefficient is larger than 0) may be inserted into the video signal instead of the black signal.

  A second embodiment of the present invention will be described in detail with reference to FIGS. Note that the description of the same parts in FIG. 1 as those of the first embodiment described above is omitted. FIG. 5 is a timing chart for explaining each operation in the driving method of the liquid crystal display device according to the present embodiment.

  The frame rate conversion unit 3 stores an image of one frame of the input video signal (60 Hz) in the frame memory unit 2 based on the control signal from the CPU 5 as shown in FIG. As shown in (b), the vertical period with respect to the liquid crystal panel 6 is reduced to 1/120 seconds by repeatedly reading out the image signal twice at the frame rate (120 Hz) of the first field and the second field. The compressed image is output continuously.

  As shown in FIG. 5B, the pseudo-interlace generation unit 4 synchronizes with the vertical synchronization signal time-compressed to 1/120 seconds based on the control signal from the CPU 5, and takes time to 1/120 seconds. A video signal with a reduced contrast is inserted in the first field with axial compression by setting the odd line gain coefficient to M (decimal number greater than 0 and smaller than 1), and the even field gain coefficient in the second field. A video signal with reduced contrast is inserted by setting M. The gain coefficient M is determined by an external gain adjustment value. The first embodiment corresponds to the case where M = 0 in the present embodiment.

  According to the present embodiment, it is possible to prevent luminance degradation that occurs in the first embodiment. However, in this case, the effect of improving the motion blur is lower than that in the first embodiment, but the gain adjustment value can be changed depending on the characteristics of the liquid crystal panel, the input video type, and the user's preference. realizable.

  The LUT unit 8 connected to the gamma conversion unit 7 stores a gamma curve for converting the halftone of the video signal. The gamma conversion unit 7 calls a gamma curve from the LUT unit 8 based on a control signal from the CPU 5 and performs halftone conversion. The LUT unit 8 stores a conversion table optimized for each gain adjustment value. That is, the gamma characteristic changes when the target gradation cannot be reached within the vertical period time-compressed to 1/120 seconds due to insufficient response speed of the liquid crystal. The LUT unit 8 corrects this characteristic change. The conversion table to be stored is stored.

  In the present embodiment, similarly to FIG. 4 of the first embodiment, each unit may operate without using the CPU 5 based on the synchronization signal detected by the synchronization detection unit 1.

  In this embodiment, the gain coefficient is set to M every other line, but the gain coefficient may be set to M every N lines (N is an integer), and attention is paid to a certain pixel. In this case, as long as the combination of the first field and the second field is a combination of a video signal and a black signal, anything such as a vertical line pattern, a staggered pattern, or the like may be used instead of a horizontal line pattern. In the present embodiment, the gain coefficient is set to M, but it may be realized by the above-described pattern and alpha blending of the video signal.

  Further, the pseudo interlace generation unit 4 may be capable of independently adjusting the gains for the three colors of RGB.

  Thus, in the liquid crystal display device and the driving method thereof according to the present embodiment, the gain coefficient M is determined to be greater than 0 and less than 1. Therefore, in addition to the effect of the first embodiment in which the gain coefficient M = 0, there is an effect that luminance deterioration can be prevented.

<Embodiment 3>
In the first and second embodiments, the description has been given of the case where the control is performed to reduce the luminance of ½ of all the lines in each of the first field and the second field. However, the present invention is not limited to this. For example, control may be performed so that the brightness of all lines is reduced in the other field (for example, the second field) without reducing the brightness of the line in the first field.

  The third embodiment of the present invention will be described in detail with reference to FIGS. FIG. 6 is a block diagram of the main part of the liquid crystal display device according to the present embodiment, FIG. 7 is a timing chart for explaining each operation in the driving method of the liquid crystal display device according to the present embodiment, and FIG. FIG. 9 is a schematic explanatory diagram showing an example of an alternating current waveform with respect to the PWM waveform in the driving method of the liquid crystal display device according to the present embodiment.

  As shown in FIG. 6, the liquid crystal display device according to the present embodiment is a pseudo interlace generation unit that generates an interlaced image based on a control signal from CPU 5 in the liquid crystal display device of FIG. 1 according to the first embodiment. 4, a gain control unit 4 a that converts the gain value of the video signal based on the control signal from the CPU 5 is provided, and the backlight control that adjusts the PWM duty of the backlight drive signal based on the control signal from the CPU 5. A unit 9 and a backlight 10 whose luminance is controlled by PWM duty are provided. Note that the description of the same parts in FIG. 6 as those in FIG. 1 according to the first embodiment described above will be omitted.

  The frame rate conversion unit 3 stores an image of one frame of the input video signal (60 Hz) in the frame memory unit 2 based on the control signal from the CPU 5, as shown in FIG. As shown in (b), the vertical period with respect to the liquid crystal panel 6 is reduced to 1/120 seconds by repeatedly reading out the image signal twice at the frame rate (120 Hz) of the first field and the second field. The compressed image is output continuously.

  As shown in FIG. 7 (b), the gain control unit 4a is synchronized with the vertical synchronization signal time-compressed to 1/120 seconds based on the control signal from the CPU 5, and the time axis is 1/120 seconds. Time axis compression to 1/120 seconds within one frame period (1/60 seconds) of the input video signal by setting the gain coefficient of the compressed video signal of either the first field or the second field to 0 It is possible to insert and output a black signal following the video signal.

  As shown in FIG. 7C, the backlight control unit 9 synchronizes with the vertical synchronization signal that is time-axis-compressed in 1/120 seconds based on the control signal from the CPU 5, and performs PWM duty of the video signal field. Is 100%, and the PWM duty of the black signal field is 0%. Here, as shown in FIG. 8, the PWM duty when the gain is not adjusted, that is, the initial set value is always 50% regardless of the field.

  Usually, the tube current value of the cold cathode tube used for the backlight 10 is limited by the effective value. That is, when the upper limit value of the tube current value and the PWM duty have a relationship as shown in FIG. 9A, the tube current value is reduced by reducing the PWM duty by half as shown in FIG. 9B. As shown in FIG. 9C, the tube current value can be doubled (in other words, even if the tube current value is doubled, the upper limit is reached). Never exceed the value).

  Therefore, as described above, in the initial state, the PWM duty is set to 50% and the peak value of the tube current value is doubled compared with the time when the black signal is inserted, and the PWM duty of the video signal field is set when the black signal is inserted. If the PWM duty of the black signal field is set to 100% and the black signal field to 0%, the luminance deterioration due to the black signal insertion can be canceled by the backlight control without the tube current value of the cold cathode tube exceeding the upper limit value.

  That is, in FIG. 7, the brightness value in the period in which the black signal is not inserted is almost twice that in FIG. 8, but the time average of the luminance value including the period in which the black signal is inserted is almost the same as that in FIG. The same.

  In addition, even when the change from the video signal to the black signal is not sufficient due to the response speed characteristics of the liquid crystal as described above, the backlight of the black signal field is turned off by combining such backlight control. , The effect of improving video blur does not decrease.

  In the present embodiment, the CPU 5 is configured to control the operation of each unit based on the synchronization signal detected by the synchronization detection unit 1. However, as shown in FIG. Based on this, each unit may be configured to operate without going through the CPU 5.

  As described above, in the liquid crystal display device and the driving method thereof according to the present embodiment, the luminance control unit 4a is used to lower the luminance and the backlight control unit in either the first field or the second field. 9 is used to lower the PWM duty. In the other field, the PWM duty is increased without decreasing the luminance. Accordingly, it is possible to prevent image quality degradation without degrading the time average luminance value, as in the first embodiment.

  In the above description, the case where the gain coefficient in the first field is selectively set to 0 has been described. However, the present invention is not limited to this, and the gain coefficient in the second field may be set to 0 selectively.

<Embodiment 4>
In the third embodiment, as in the first embodiment, the case where a black signal with a gain coefficient of 0 is inserted into the video signal has been described. However, the luminance varies greatly on the time axis by inserting the black signal. Therefore, flickering may occur. In order to prevent this, a gain adjustment signal obtained by adjusting the amplitude of the video signal (in a range where the gain coefficient is larger than 0) may be inserted into the video signal instead of the black signal as in the second embodiment.

  Embodiment 4 of the present invention will be described in detail with reference to FIG. 11 and FIG. In FIG. 6, the description of the same parts as those of the third embodiment described above will be omitted. FIG. 11 is a timing chart for explaining each operation in the driving method of the liquid crystal display device according to the present embodiment.

  The frame rate conversion unit 3 stores an image of one frame of the input video signal (60 Hz) in the frame memory unit 2 based on the control signal from the CPU 5, as shown in FIG. As shown in (b), the vertical period for the liquid crystal panel 6 is time-compressed to 1/120 seconds by repeatedly reading out the image signal twice at the frame rate (120 Hz) of the first field and the second field. The output images are output continuously.

  As shown in FIG. 11 (b), the gain control unit 4a is synchronized with the vertical synchronization signal time-compressed to 1/120 seconds based on the control signal from the CPU 5, and the time axis is 1/120 seconds. By setting the gain coefficient of one of the compressed video signals of the first field and the second field to M (decimal number greater than 0 and smaller than 1), within one frame period of the input video signal (1/60 seconds) Thus, it is possible to insert and output a gain adjustment signal in which the contrast of the video signal is lowered following the video signal time-compressed to 1/120 seconds. The gain coefficient M is determined by an external gain adjustment value.

  As shown in FIG. 11 (c), the backlight control unit 9 synchronizes with the vertical synchronization signal that is time-axis-compressed in 1/120 seconds based on the control signal from the CPU 5, and performs PWM duty of the video signal field. Is 50 × (2-M)%, and the PWM duty of the gain adjustment signal field is 50 × M%. The third embodiment corresponds to the case where M = 0 in the present embodiment.

  In other words, the backlight control unit 9 adjusts the weighting of the luminance based on the gain adjustment value, suppresses the luminance deterioration due to the insertion of the gain adjustment signal as much as possible, and suppresses the luminance change on the time axis as much as possible. However, in this case, the effect of improving the motion blur is lower than that in the third embodiment, but the gain adjustment value can be changed according to the characteristics of the liquid crystal panel, the input video type, and the user's preference. realizable.

  That is, the gain control unit 4a functions as a second luminance control unit according to the present invention, and with respect to the luminance represented by the second video signal, the luminance is decreased M times in the second field without decreasing the luminance in the first field. Lower. The backlight control unit 9 functions as the backlight control means according to the present invention, and the PWM duty of the backlight drive signal is set to 50 × (2-M)% in the first field ( 50 × M)% and control. Alternatively, the order is reversed from the above, and the luminance is decreased M times in the first field so that the luminance is not decreased in the second field, and the PWM duty is set to (50 × M)% in the first field. In 2 fields, it may be 50 × (2-M)%.

  In the present embodiment, similarly to FIG. 10 of the third embodiment, each unit may operate without using the CPU 5 based on the synchronization signal detected by the synchronization detection unit 1.

  Further, the gain control unit 4a may be capable of adjusting the gains independently for the three colors of RGB.

  In this embodiment, the PWM duty setting value is related to the gain adjustment value by using the same coefficient M as that of the gain adjustment value. However, the present invention is not limited to this, or the PWM duty setting value is used as the gain adjustment value. May be set independently.

  Thus, in the liquid crystal display device and the driving method thereof according to the present embodiment, the gain coefficient M is determined to be greater than 0 and less than 1. Therefore, in addition to the effect of the third embodiment in which the gain coefficient M = 0, there is an effect that flicker can be prevented.

FIG. 3 is a main part block diagram of the liquid crystal display device according to the first embodiment. 4 is a timing chart for explaining operations in the method for driving the liquid crystal display device according to the first embodiment. 6 is a schematic explanatory diagram illustrating an example of a liquid crystal response to gamma conversion in the driving method of the liquid crystal display device according to Embodiment 1. FIG. FIG. 3 is a main part block diagram of the liquid crystal display device according to the first embodiment. 6 is a timing chart illustrating each operation in the method for driving the liquid crystal display device according to the second embodiment. FIG. 10 is a main part block diagram of a liquid crystal display device according to a third embodiment. 12 is a timing chart illustrating each operation in the driving method of the liquid crystal display device according to the third embodiment. 12 is a timing chart illustrating each operation in the driving method of the liquid crystal display device according to the third embodiment. 10 is a timing chart for explaining a PWM operation and a current waveform in the driving method of the liquid crystal display device according to the third embodiment. FIG. 10 is a main part block diagram of a liquid crystal display device according to a third embodiment. 10 is a timing chart illustrating each operation in the driving method of the liquid crystal display device according to the fourth embodiment.

Explanation of symbols

  1 synchronization detection unit, 2 frame memory unit, 3 frame rate conversion unit, 4 pseudo-interlace generation unit, 4a gain control unit, 5 CPU, 6 liquid crystal panel, 7 gamma conversion unit, 8 LUT unit, 9 backlight control unit, 10 Backlight.

Claims (11)

The input first video signal having the first display cycle is time-axis compressed by a factor of 1/2, and each frame is repeated twice as the first or second field to halve the first display cycle. Frame rate conversion means for converting to a second video signal having a second display period of
With respect to the luminance represented by the second video signal, the luminance at a predetermined pixel in the screen is selectively multiplied by M (M is a decimal number less than 1) in the first field corresponding to the first half of the first display period. And a first luminance control means for selectively reducing the luminance of the remaining pixels in the screen to M times in the second field corresponding to the second half of the first display period. The liquid crystal display device according to claim 1,
The predetermined pixel constitutes an odd line of a plurality of display lines,
The remaining pixels are liquid crystal display devices that constitute even lines of a plurality of display lines. The liquid crystal display device according to claim 1,
The predetermined pixel constitutes an even line of a plurality of display lines,
The remaining pixels are liquid crystal display devices constituting odd lines of a plurality of display lines. The input first video signal having the first display cycle is time-axis compressed by a factor of 1/2, and each frame is repeated twice as the first or second field to halve the first display cycle. Frame rate conversion means for converting to a second video signal having a second display period of
With respect to the luminance represented by the second video signal, the luminance does not decrease in the first field corresponding to the first half of the first display cycle, and the luminance in the second field corresponding to the second half of the first display cycle is M (M is A second luminance control means for lowering by a factor of 0 or more and less than 1),
A liquid crystal display device comprising backlight control means for controlling the PWM duty of the backlight drive signal to be 50 × (2-M)% in the first field and (50 × M)% in the second field. The input first video signal having the first display cycle is time-axis compressed by a factor of 1/2, and each frame is repeated twice as the first or second field to halve the first display cycle. Frame rate conversion means for converting to a second video signal having a second display period of
With respect to the luminance represented by the second video signal, the luminance is reduced to M (M is a decimal number greater than 0 and smaller than 1) times in the first field corresponding to the first half of the first display cycle. Second luminance control means for reducing the luminance in the corresponding second field;
A liquid crystal display device comprising backlight control means for controlling the PWM duty of the backlight drive signal to be (50 × M)% in the first field and 50 × (2-M)% in the second field. A liquid crystal display device according to any one of claims 1 to 5,
The liquid crystal display device, wherein the first or second luminance control means lowers the luminance by lowering a gain for amplifying the second video signal. The liquid crystal display device according to claim 6,
The liquid crystal display device in which the first or second luminance control means can adjust the gain independently for three colors of RGB. A liquid crystal display device according to any one of claims 1 to 7,
A liquid crystal display device further comprising a lookup table unit storing a gamma curve for converting a halftone of the second video signal. The input first video signal having the first display cycle is time-axis compressed by a factor of 1/2, and each frame is repeated twice as the first or second field to halve the first display cycle. A frame rate conversion step of converting into a second video signal having the second display period of
With respect to the luminance represented by the second video signal, the luminance at a predetermined pixel in the screen is selectively multiplied by M (M is a decimal number less than 1) in the first field corresponding to the first half of the first display period. And a first luminance control step of selectively reducing the luminance of the remaining pixels in the screen by a factor of M in the second field corresponding to the second half of the first display period. The input first video signal having the first display cycle is time-axis compressed by a factor of 1/2, and each frame is repeated twice as the first or second field to halve the first display cycle. A frame rate conversion step of converting into a second video signal having the second display period of
With respect to the luminance represented by the second video signal, the luminance does not decrease in the first field corresponding to the first half of the first display cycle, and the luminance in the second field corresponding to the second half of the first display cycle is M (M is A second luminance control step of decreasing the number by a factor of 0 or more and smaller than 1;
And a backlight control step for controlling the PWM duty of the backlight drive signal to be 50 × (2-M)% in the first field and (50 × M)% in the second field. The input first video signal having the first display cycle is time-axis compressed by a factor of 1/2, and each frame is repeated twice as the first or second field to halve the first display cycle. A frame rate conversion step of converting into a second video signal having the second display period of
With respect to the luminance represented by the second video signal, the luminance is reduced to M (M is a decimal number greater than 0 and smaller than 1) times in the first field corresponding to the first half of the first display cycle. A second luminance control step that does not lower the luminance in the corresponding second field;
And a backlight control step for controlling the PWM duty of the backlight drive signal to be (50 × M)% in the first field and 50 × (2-M)% in the second field.

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