JP2007311632A - Surface-emitting laser element - Google Patents

Surface-emitting laser element Download PDF

Info

Publication number
JP2007311632A
JP2007311632A JP2006140380A JP2006140380A JP2007311632A JP 2007311632 A JP2007311632 A JP 2007311632A JP 2006140380 A JP2006140380 A JP 2006140380A JP 2006140380 A JP2006140380 A JP 2006140380A JP 2007311632 A JP2007311632 A JP 2007311632A
Authority
JP
Japan
Prior art keywords
layer
dbr mirror
emitting laser
surface emitting
tunnel junction
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2006140380A
Other languages
Japanese (ja)
Inventor
Hitoshi Shimizu
均 清水
Tatsuo Kageyama
健生 影山
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Furukawa Electric Co Ltd
Original Assignee
Furukawa Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Furukawa Electric Co Ltd filed Critical Furukawa Electric Co Ltd
Priority to JP2006140380A priority Critical patent/JP2007311632A/en
Publication of JP2007311632A publication Critical patent/JP2007311632A/en
Pending legal-status Critical Current

Links

Images

Landscapes

  • Semiconductor Lasers (AREA)

Abstract

<P>PROBLEM TO BE SOLVED: To attain the low resistance and the high output power of a surface-emitting laser (VCSEL) device having tunnel junction. <P>SOLUTION: The VCSEL device 10 has a tunnel junction 17 between an n-type lower DBR mirror 12 and an n-type upper DBR mirror 19, and the tunnel junction 17 has a quantum dot layer 32 of 2.5 mono layer thickness between a p<SP>+</SP>-GaAs layer 31 and an n<SP>+</SP>-InGaAs layer 33. The quantum dot layer 32 has a small bandgap energy, and by raising the tunnel probability in the tunnel junction 17, the low resistivity and the high output power of the VCSEL device 10 are made to be possible. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

本発明は、面発光レーザ素子に関し、更に詳しくは、1.0μmから2.5μm帯の発振波長を有する長波長帯面発光レーザ(VCSEL)素子に関する。   The present invention relates to a surface emitting laser device, and more particularly to a long wavelength band surface emitting laser (VCSEL) device having an oscillation wavelength of 1.0 μm to 2.5 μm.

長波長帯面発光レーザ(VCSEL)素子は、10Gbps以上の伝送速度を可能とすることから、今後、光インターコネクションや光通信分野で大量に必要になると予測されている。現在利用されている長波長帯VCSEL素子は、高光出力化や高速化という面では、光インターコネクションや光通信分野で要求される仕様を満たしていない。   Long wavelength surface emitting laser (VCSEL) devices are expected to be required in large quantities in the future in the field of optical interconnection and optical communication because they enable transmission speeds of 10 Gbps or higher. Currently used long wavelength band VCSEL devices do not satisfy the specifications required in the field of optical interconnection and optical communication in terms of higher optical output and higher speed.

上記要因の一つとして、長波長帯では、DBRミラー層による吸収損失が大きいことが挙げられる。780−980nm帯の短い波長のVCSEL素子では、DBRミラー層として、p型半導体DBR層とn型半導体DBR層とが用いられている。しかし、1000nmよりも長い波長を持つ長波長帯では、p型層による価電子帯間吸収が大きくなるため、できるだけp型半導体DBR層を用いたくないという要請がある。その一つの解決手段としては、トンネル接合(T/J)を用いて、p型半導体層をn型半導体層に置換するという手法がある。この手法では、トンネル接合層には、10nm程度の量子薄膜が用いられている。 One of the factors is that the absorption loss due to the DBR mirror layer is large in the long wavelength band. In a VCSEL element with a short wavelength in the 780-980 nm band, a p-type semiconductor DBR layer and an n-type semiconductor DBR layer are used as the DBR mirror layer. However, in the long wavelength band having a wavelength longer than 1000 nm, the valence band absorption by the p-type layer is increased, and there is a demand for not using the p-type semiconductor DBR layer as much as possible. One solution is to replace the p-type semiconductor layer with an n-type semiconductor layer using a tunnel junction (T / J). In this method, a quantum thin film of about 10 nm is used for the tunnel junction layer.

従来のトンネル接合層を用いた1300nm帯VCSEL素子の積層構造の詳細を図3(a)及び(b)に示す。VCSEL素子10Aは、同図(a)に示すように、n型GaAs基板11上に順次に形成されたn型下部DBRミラー12、n−GaAsクラッド層13、3層の井戸層を持つ多重量子井戸(MQW)活性層14、酸化狭窄層15を内部に含むp−GaAs層16、T/J層23、n−GaAsクラッド層18、及び、n型上部DBRミラー19から成る積層構造を有する。また、n型DBRミラー19上には第1電極(電源電極)20が、n型GaAs基板11の裏面には第2電極(接地電極)21がそれぞれ形成される。   3A and 3B show details of the laminated structure of the 1300 nm band VCSEL device using the conventional tunnel junction layer. The VCSEL device 10A includes an n-type lower DBR mirror 12, an n-GaAs cladding layer 13, and three well layers formed sequentially on an n-type GaAs substrate 11 as shown in FIG. The p-GaAs layer 16, the T / J layer 23, the n-GaAs cladding layer 18, and the n-type upper DBR mirror 19 including the well (MQW) active layer 14, the oxide constriction layer 15 therein. A first electrode (power supply electrode) 20 is formed on the n-type DBR mirror 19, and a second electrode (ground electrode) 21 is formed on the back surface of the n-type GaAs substrate 11.

n−GaAsクラッド層13からn−GaAsクラッド層18までが2λ共振器構造30を構成する。なお、図示しないが、n型下部DBRミラー12の上部から上の積層はメサポスト構造に形成され、メサポストは、一般にポリイミド層により埋め込まれている。レーザ光は、第1電極20に開口した窓22から、図面上で上方に出射する。   The 2λ resonator structure 30 is composed of the n-GaAs cladding layer 13 to the n-GaAs cladding layer 18. Although not shown, the upper layer from the upper part of the n-type lower DBR mirror 12 is formed in a mesa post structure, and the mesa post is generally embedded with a polyimide layer. Laser light is emitted upward in the drawing from the window 22 opened in the first electrode 20.

T/J層23は、図3(b)に示すように、下層側から順次に、キャリア濃度1.5×1020cm−3で5nm厚みのp+-GaAs層31、キャリア濃度5×1019cm−3で5nm厚みのn+-In0.13GaAs層33、及び、キャリア濃度1×1019cm−3で20nm厚みのn+-GaAs層34から構成される。T/J層23を用いたVCSEL素子は、非特許文献1に記載がある。
“光インターコネクション用 1.1μm帯 InGaAs VCSEL” 鈴木 尚文ら、LQE2005-113 K. Otsubo N. Hatori, M. Ishida, S. Okumura, T. Akiyama, Y. Nakata, H. Ebe, M. Sugawara and Y. Arakawa, Jpn. J. Appl. Phys. 43, L1124 (2004).
As shown in FIG. 3B, the T / J layer 23 includes a p + -GaAs layer 31 having a carrier concentration of 1.5 × 10 20 cm −3 and a thickness of 5 nm, and a carrier concentration of 5 × 10 19 cm. -3 and a 5 nm thick n + -In 0.13 GaAs layer 33 and a carrier concentration of 1 × 10 19 cm −3 and a 20 nm thick n + -GaAs layer 34. A VCSEL element using the T / J layer 23 is described in Non-Patent Document 1.
“1.1μm InGaAs VCSEL for optical interconnection” Naofumi Suzuki et al., LQE2005-113 K. Otsubo N. Hatori, M. Ishida, S. Okumura, T. Akiyama, Y. Nakata, H. Ebe, M. Sugawara and Y. Arakawa, Jpn. J. Appl. Phys. 43, L1124 (2004).

トンネル接合を用いたVCSEL素子は、素子抵抗が大きいという問題点を有している。例えば、非特許文献1には、p-GaAs/n-In0.15GaAsトンネル接合を用いて、抵抗率が6.4×10-6ohm・cmであるという報告がある。Alの選択酸化で形成された酸化狭窄構造を有するVCSEL素子では、その電流開口径を6μmとすると、このトンネル接合層は直列抵抗20Ωに相当する抵抗値を有する。抵抗値の上昇は、CR時定数の増加と自己発熱とを引き起こし、変調帯域の減少を引き起こす。 A VCSEL element using a tunnel junction has a problem of high element resistance. For example, Non-Patent Document 1 reports that the resistivity is 6.4 × 10 −6 ohm · cm 2 using a p-GaAs / n-In 0.15 GaAs tunnel junction. In a VCSEL element having an oxide confinement structure formed by selective oxidation of Al, when the current opening diameter is 6 μm, this tunnel junction layer has a resistance value corresponding to a series resistance of 20Ω. An increase in resistance value causes an increase in CR time constant and self-heating, and a decrease in modulation band.

上記トンネル接合を用いるVCSEL素子を更に高速化するためには、トンネル接合の低抵抗化が不可欠である。抵抗が高いと、特に長波長帯に用いるVCSEL素子では、自己発熱による利得低下が激しく、光出力及び変調帯域を低下させてしまうからである。   In order to further increase the speed of the VCSEL element using the tunnel junction, it is essential to reduce the resistance of the tunnel junction. This is because when the resistance is high, especially in a VCSEL element used in a long wavelength band, the gain is greatly reduced due to self-heating, and the optical output and the modulation band are reduced.

ところで、3次元構造を有する半導体量子ドットを活性層に用いたレーザや半導体光増幅器(SOA)が研究開発されている。非特許文献2は、レーザの活性層に量子ドットを用いることにより、低閾値性を持つ旨が報告されている。しかしながら、これまでに、量子ドットをトンネル接合に用いた例はなかった。   Incidentally, lasers and semiconductor optical amplifiers (SOA) using semiconductor quantum dots having a three-dimensional structure as active layers have been researched and developed. Non-Patent Document 2 reports that the use of quantum dots in the active layer of a laser has a low threshold value. However, there have been no examples of using quantum dots for tunnel junctions.

本発明は、上記トンネル接合を有する従来のVCSEL素子における高抵抗の問題に鑑み、特に長波長帯での使用に好適なトンネル接合を有するVCSEL素子であって、広帯域性を有するVCSEL素子を提供することを目的とする。   In view of the problem of high resistance in the conventional VCSEL element having the above-described tunnel junction, the present invention provides a VCSEL element having a tunnel junction particularly suitable for use in a long wavelength band and having a broadband property. For the purpose.

上記目的を達成するために、本発明の面発光レーザ素子は、基板上に、高屈折率層と低屈折率層とを交互に形成した周期構造を有する下部DBRミラーと、高屈折率層と低屈折率層とを交互に形成した周期構造を有する上部DBRミラーと、前記下部DBRミラーと上部DBRミラーとに挟まれ、光を発生する活性層を含む共振器構造とを有する面発光レーザにおいて、
前記下部DBRミラーと上部DBRミラーとの間、又は、前記下部若しくは上部DBRミラー内に配設されたトンネル接合を有し、該トンネル接合の少なくとも一部の層が量子ドット層から構成されることを特徴とする。
In order to achieve the above object, a surface emitting laser device of the present invention includes a lower DBR mirror having a periodic structure in which a high refractive index layer and a low refractive index layer are alternately formed on a substrate, a high refractive index layer, In a surface emitting laser having an upper DBR mirror having a periodic structure in which low refractive index layers are alternately formed, and a resonator structure including an active layer that is sandwiched between the lower DBR mirror and the upper DBR mirror and generates light ,
A tunnel junction is provided between the lower DBR mirror and the upper DBR mirror or in the lower or upper DBR mirror, and at least a part of the tunnel junction is formed of a quantum dot layer. It is characterized by.

本発明に係る面発光レーザ素子では、バンドギャップエネルギーが小さな量子ドット層をトンネル接合層に用いることで、従来のトンネル接合の量子薄膜に比べてトンネル確率が増加するため、より低抵抗が得られる。   In the surface emitting laser device according to the present invention, the use of a quantum dot layer having a small band gap energy for the tunnel junction layer increases the tunnel probability as compared with the conventional tunnel junction quantum thin film, and thus a lower resistance can be obtained. .

前記量子ドット層としては、例えばInAs又はInGaAs層が好ましく、これらの層を採用する際には、GaAsSb下地層上に形成することが好ましい。格子整合が容易である。   As the quantum dot layer, for example, an InAs or InGaAs layer is preferable, and when these layers are employed, it is preferably formed on a GaAsSb underlayer. Lattice matching is easy.

量子ドット層の厚みは、例えば2〜4単原子層(モノレーヤ:ML)程度の厚みとする。このように、量子ドット層の体積を小さくすることにより、光吸収量を低く抑えることができ、高光出力化に有利である。低抵抗化及び高光出力化により、広帯域で利用可能な長波長帯VCSEL素子を得ることができる。   The thickness of the quantum dot layer is, for example, about 2 to 4 monoatomic layers (monolayer: ML). Thus, by reducing the volume of the quantum dot layer, the amount of light absorption can be kept low, which is advantageous for high light output. By reducing the resistance and increasing the optical output, it is possible to obtain a long wavelength band VCSEL device usable in a wide band.

前記トンネル接合層の不純物ドーピング量の最大値は5×1019cm−3に抑えることが好ましい。ドーピング量がこれよりも大きいと、価電子帯間吸収やフリーキャリア吸収による光損失が増加する。 The maximum value of the impurity doping amount of the tunnel junction layer is preferably suppressed to 5 × 10 19 cm −3 . If the doping amount is larger than this, light loss due to intervalence band absorption or free carrier absorption increases.

前記下部DBRミラー及び上部DBRミラー、又は、前記共振器構造の何れかには、前記活性層の近傍に選択酸化型の電流狭窄層を形成し、酸化狭窄構造を形成することが出来る。或いは、これに代えて、埋込み型へテロ構造によって電流狭窄構造を形成してもよい。   In any of the lower DBR mirror, the upper DBR mirror, and the resonator structure, a selective oxidation type current confinement layer may be formed in the vicinity of the active layer to form an oxide confinement structure. Alternatively, the current confinement structure may be formed by an embedded hetero structure.

前記上部DBRミラーは、半導体層で形成してもよく、或いは、その少なくとも一部の層を誘電体層で置き換えることも出来る。   The upper DBR mirror may be formed of a semiconductor layer, or at least a part of the layer may be replaced with a dielectric layer.

本発明の面発光レーザ素子は、特に発振波長が1000〜2500nmの長波帯で使用される面発光レーザ素子に適用することが好ましい。   The surface emitting laser element of the present invention is particularly preferably applied to a surface emitting laser element used in a long wave band having an oscillation wavelength of 1000 to 2500 nm.

実施形態1
図1は、本発明の一実施形態に係るVCSEL素子の構造を示す斜視図である。また、図2(a)及び(b)は、その積層構造の詳細を示す断面図である。なお、これらの図では、理解を容易にするために、図3に示した従来のVCSEL素子と同様な部分には同様な符号を付して示した。
Embodiment 1
FIG. 1 is a perspective view showing the structure of a VCSEL device according to an embodiment of the present invention. 2A and 2B are cross-sectional views showing details of the laminated structure. In these figures, for ease of understanding, the same parts as those of the conventional VCSEL element shown in FIG.

本実施形態のVCSEL素子は、本発明を1300nm帯で発振するGaInNAsSb活性層を有するVCSEL素子に適用した例である。本実施形態のVCSEL素子10は、図2(b)に示したトンネル接合17の構造を除いて、従来のVCSEL素子10Aと同様な構造を有する。   The VCSEL device of this embodiment is an example in which the present invention is applied to a VCSEL device having a GaInNAsSb active layer that oscillates in the 1300 nm band. The VCSEL element 10 of this embodiment has the same structure as the conventional VCSEL element 10A except for the structure of the tunnel junction 17 shown in FIG.

詳しくは、本実施形態例のVCSEL素子10は、n型GaAs基板11と、n型GaAs基板11上に順次に形成された、n型下部半導体DBRミラー12、n−GaAsクラッド層13、3層の井戸層を持つ多重量子井戸(MQW)活性層14、酸化狭窄層15を内部に含むp−GaAs層16、トンネル接合(T/J)17、n−GaAsクラッド層18、及び、n型上部半導体DBRミラー19から成る積層構造とを有する。また、n型上部半導体DBRミラー19上には第1電極20が、n型GaAs基板11の裏面には第2電極21が形成される。   Specifically, the VCSEL device 10 according to the present embodiment includes an n-type GaAs substrate 11, an n-type lower semiconductor DBR mirror 12, an n-GaAs cladding layer 13, and three layers that are sequentially formed on the n-type GaAs substrate 11. A multi-quantum well (MQW) active layer 14, a p-GaAs layer 16 including an oxide constriction layer 15 therein, a tunnel junction (T / J) 17, an n-GaAs cladding layer 18, and an n-type upper portion A stacked structure including a semiconductor DBR mirror 19. A first electrode 20 is formed on the n-type upper semiconductor DBR mirror 19, and a second electrode 21 is formed on the back surface of the n-type GaAs substrate 11.

n−GaAsクラッド層13からn−GaAsクラッド層18までが2λ共振器構造30を構成する。共振器構造30は、下部DBRミラー12と上部DBRミラー19とに挟まれている。n型下部DBRミラー12の上部から上の積層の全体はメサポスト構造に形成され、メサポストは、ポリイミド層24により埋め込まれている。レーザ光は、MQW活性層14で生成され、共振器構造30の作用によって共振し、第1電極側20に開口した窓22から、図面上で上方に出射する。   The 2λ resonator structure 30 is composed of the n-GaAs cladding layer 13 to the n-GaAs cladding layer 18. The resonator structure 30 is sandwiched between the lower DBR mirror 12 and the upper DBR mirror 19. The entire stack from the top to the top of the n-type lower DBR mirror 12 is formed in a mesa post structure, and the mesa post is embedded with a polyimide layer 24. The laser light is generated in the MQW active layer 14, resonated by the action of the resonator structure 30, and emitted upward in the drawing from the window 22 opened on the first electrode side 20.

トンネル接合17は、図2(b)に示すように、下層側から順次に、キャリア濃度1.5×1020cm−3で5nm厚みのp−GaAs層31、キャリア濃度5×1019cm−3で供給量が2.5モノレーヤ(ML)厚みのn−InAs量子ドット(QD)層32、キャリア濃度5×1020cm−3で5nm厚みのn−In0.13GaAs層33、及び、キャリア濃度1×1019cm−3で20nm厚みのn−GaAs層34から構成される。 As shown in FIG. 2B, the tunnel junction 17 includes a p + -GaAs layer 31 having a carrier concentration of 1.5 × 10 20 cm −3 and a thickness of 5 nm and a carrier concentration of 5 × 10 19 cm −3 sequentially from the lower layer side. And an n + -InAs quantum dot (QD) layer 32 having a supply amount of 2.5 monolayer (ML), a n + -In 0.13 GaAs layer 33 having a carrier concentration of 5 × 10 20 cm −3 and a thickness of 5 nm, and a carrier The n + -GaAs layer 34 has a concentration of 1 × 10 19 cm −3 and a thickness of 20 nm.

上記実施形態のVCSEL素子10は、以下のように作製される。まず、n型GaAs基板11の(100)面上に、λ/4膜厚から構成されるn型Al0.9Ga0.1As/GaAs層を35.5ペア有する下部DBRミラー12、MQW活性層14を含む2λ共振器、及び、n型Al0.9Ga0.1As/GaAs層を23ペア有する上部DBRミラー19を、この順番で成長する。これによって、2λの膜厚を有する共振器構造30の各積層が形成される。 The VCSEL device 10 of the above embodiment is manufactured as follows. First, on the (100) surface of the n-type GaAs substrate 11, the lower DBR mirror 12 and the MQW active layer 14 having 35.5 pairs of n-type Al 0.9 Ga 0.1 As / GaAs layers having a λ / 4 film thickness are formed. A 2λ resonator including the upper DBR mirror 19 having 23 pairs of n-type Al 0.9 Ga 0.1 As / GaAs layers is grown in this order. Thereby, each lamination of the resonator structure 30 having a film thickness of 2λ is formed.

2λ共振器構造30は、以下に述べるような配置に形成する。n型下部DBRミラー12の最上部から、λ/2だけ離れた部分を中心としてMQW活性層14を配置する。MQW活性層14は、例えば7.3nm厚みのGaIn0.37N0.012AsSb0.016量子井戸層と、20nm厚みのGaN0.017As障壁層とから構成され、その量子井戸層を3層含んでいる。p−AlAs選択酸化層から成る酸化狭窄層15は、膜厚が20nmであり、n型下部DBRミラー12の最上部から5λ/4離れた部分を中心として配置する。 The 2λ resonator structure 30 is formed in an arrangement as described below. An MQW active layer 14 is disposed around a portion separated from the top of the n-type lower DBR mirror 12 by λ / 2. The MQW active layer 14 is composed of, for example, a GaIn 0.37 N 0.012 AsSb 0.016 quantum well layer having a thickness of 7.3 nm and a GaN 0.017 As barrier layer having a thickness of 20 nm, and includes three quantum well layers. The oxide constriction layer 15 made of a p-AlAs selective oxide layer has a thickness of 20 nm, and is disposed around a portion away from the top of the n-type lower DBR mirror 12 by 5λ / 4.

トンネル接合17のp/n接合部は、n型下部DBRミラー12の最上部から7λ/4離れた部分を中心として配置する。トンネル接合17は、図2(b)に示すように、下層側から順次に配置された、キャリア濃度1.5×1020cm−3で5nmの膜厚を有するp+-GaAs層31、キャリア濃度5×1019cm−3で供給量2.5MLのn+-InAs量子ドット層32、キャリア濃度5×1019cm−3で膜厚が5nmのn+-In0.13GaAs層33、及び、キャリア濃度1×1019cm-3で、膜厚が20nmのn+-GaAs層34から構成する。 The p / n junction part of the tunnel junction 17 is arranged centering on a part away from the uppermost part of the n-type lower DBR mirror 12 by 7λ / 4. As shown in FIG. 2B, the tunnel junction 17 includes a p + -GaAs layer 31 having a carrier concentration of 1.5 × 10 20 cm −3 and a thickness of 5 nm, which is sequentially arranged from the lower layer side, and a carrier concentration of 5 × 10 19 cm -3 at a feed rate 2.5ML of n +-INAS quantum dot layer 32, a carrier concentration of 5 × 10 19 cm -3 film thickness is 5nm of n + -In 0.13 GaAs layer 33, the carrier concentration The n + -GaAs layer 34 is 1 × 10 19 cm −3 and has a thickness of 20 nm.

トンネル接合17の各層の成長は、分子線エピタキシー(MBE)、ガスソースMBE、化学的分子線エピタキシー(CBE)、有機金属化学気相成長(MOCVD)のいずれかで行う。メサポストの直径は30μmとし、選択酸化で形成する酸化狭窄層15の電流開口径は直径6μmとする。メサポスト以外の部分は、ポリイミド層24で埋め込んで平坦化する。   Each layer of the tunnel junction 17 is grown by any one of molecular beam epitaxy (MBE), gas source MBE, chemical molecular beam epitaxy (CBE), and metal organic chemical vapor deposition (MOCVD). The mesa post has a diameter of 30 μm, and the current opening diameter of the oxidized constriction layer 15 formed by selective oxidation is 6 μm. The portions other than the mesa post are filled with the polyimide layer 24 and flattened.

上記実施形態のVCSEL素子10を作成したところ、トンネル接合17の部分の抵抗率は3×10−6ohm・cmに減少した。電流開口径が6μmであるため、この部分は、直列抵抗で10Ωに相当する。全体の素子抵抗は、従来のトンネル接合を用いたVCSEL素子の素子抵抗が90Ωであったのに比して、80Ωに低下した。レーザ発振における静特性としては、しきい値電流が0.5mA、スロープ効率が0.3W/Aであり、100℃以上でCW発振が得られた。 When the VCSEL device 10 of the above embodiment was produced, the resistivity of the tunnel junction 17 portion was reduced to 3 × 10 −6 ohm · cm 2 . Since the current opening diameter is 6 μm, this portion corresponds to 10Ω in series resistance. The overall device resistance was reduced to 80Ω compared to the device resistance of a conventional VCSEL device using a tunnel junction of 90Ω. As static characteristics in laser oscillation, the threshold current was 0.5 mA, the slope efficiency was 0.3 W / A, and CW oscillation was obtained at 100 ° C. or higher.

本実施形態では、p+−GaAs層31上に量子ドット層32を成長したが、p−GaAsSb層上に量子ドット層32を成長しても良い。また、MQW活性層14は、GaInNAsSb系の活性層を例示したが、GaAs基板を使用する限り、GaAsSb量子井戸でもよく、或いは、InGaAs量子井戸でもよい。更には、本実施形態では、InAs量子ドット層32を成長したが、これに代えて、InGaAs量子ドット層でもよい。更に、MQW活性層が3層の例を示したが、例えば2層以上で15層以下であればよい。 In this embodiment, the quantum dot layer 32 is grown on the p + -GaAs layer 31, but the quantum dot layer 32 may be grown on the p-GaAsSb layer. The MQW active layer 14 is exemplified by a GaInNAsSb-based active layer, but may be a GaAsSb quantum well or an InGaAs quantum well as long as a GaAs substrate is used. Furthermore, in the present embodiment, the InAs quantum dot layer 32 is grown, but an InGaAs quantum dot layer may be used instead. Furthermore, although an example in which the MQW active layer is three layers has been shown, it may be, for example, two to 15 layers.

上部DBRミラー層として、全層がn型半導体層である例を示したが、上部DBRミラー層の全て、或いは、その一部を誘電体層で形成してもよい。また、トンネル接合17のn型半導体の量子ドット層を配置したが、p型半導体の量子ドット層を配置してもよい。更に、半導体層のドーピング量として、キャリア濃度が1.5×1020cm-3までのドーピングを行っているが、量子ドット層を用いてトンネル確率が増加しているので、その分だけドーピング量を制限してもよく、最大5×1019cm−3までにキャリア濃度を減らしてもよい。この場合には、トンネル接合部での光吸収が減少するというメリットがある。 Although an example in which all layers are n-type semiconductor layers has been shown as the upper DBR mirror layer, all or a part of the upper DBR mirror layer may be formed of a dielectric layer. Further, although the n-type semiconductor quantum dot layer of the tunnel junction 17 is arranged, a p-type semiconductor quantum dot layer may be arranged. Furthermore, as the doping amount of the semiconductor layer, doping is performed up to a carrier concentration of 1.5 × 10 20 cm −3, but since the tunnel probability is increased using the quantum dot layer, the doping amount is limited accordingly. Alternatively , the carrier concentration may be reduced to a maximum of 5 × 10 19 cm −3 . In this case, there is an advantage that light absorption at the tunnel junction is reduced.

上記実施形態では、GaAs基板上にVCSEL素子を形成する例を示したが、InP基板上にVCSEL素子を形成してもよい。その場合には、活性層は、GaInAsP系量子井戸、AlGaInAs系量子井戸、GaInNAsSb系量子井戸、In(Ga)As量子ドットのいずれかが選択される。   In the above embodiment, an example in which a VCSEL element is formed on a GaAs substrate has been described. However, a VCSEL element may be formed on an InP substrate. In that case, the active layer is selected from among GaInAsP quantum wells, AlGaInAs quantum wells, GaInNAsSb quantum wells, and In (Ga) As quantum dots.

トンネル接合17の材料は、p+-InP/n+-In(Ga)As量子ドット/n+-InGaAsや、p+-InP/p+Al(In)As/n+-In(Ga)As量子ト゛ット/n+-InGaAs等から構成する。更に、上記実施形態では、発振波長が1300nmの例を示したが、発振波長は例えば1000〜2500nmの内から選択される。 The material of the tunnel junction 17 is p + -InP / n + -In (Ga) As quantum dots / n + -InGaAs or p + -InP / p + Al (In) As / n + -In (Ga) As quantum dots. It is composed of / n + -InGaAs or the like. Furthermore, in the above-described embodiment, an example in which the oscillation wavelength is 1300 nm is shown, but the oscillation wavelength is selected from, for example, 1000 to 2500 nm.

量子ドットのバッファ層にGaAsSbバッファ層を用い、このバッファ層のSb組成が2%、膜厚7nmの構造についてVCSEL素子を作製した。このVCSEL素子では、フォトルミネッセンス(PL)強度を高く維持したままで、ドット密度を高くできる旨が確かめられた。PL強度を高く維持したままで量子ドットの密度を高めると、トンネル確率が高まり、更に抵抗値が減少する。このGaAsSbバッファ層のSb組成は、0.2%〜100%の範囲で任意に選択可能である。   A GaAsSb buffer layer was used as the quantum dot buffer layer, and a VCSEL device was fabricated for a structure having an Sb composition of 2% and a film thickness of 7 nm. In this VCSEL device, it was confirmed that the dot density can be increased while maintaining the high photoluminescence (PL) intensity. Increasing the density of quantum dots while maintaining a high PL intensity increases the tunnel probability and further decreases the resistance value. The Sb composition of this GaAsSb buffer layer can be arbitrarily selected within the range of 0.2% to 100%.

また、上記実施形態では、トンネル接合部を、共振器内に設けたが、共振器外に設けても良い。例えば、n−GaAsクラッド層18を設けず、p−GaAsクラッド層16の厚さを共振器長に合うように調整し、上部DBRミラー内にトンネル接合17を設けてもよい。その場合、クラッド層16とトンネル接合17の間に上部DBRミラーを構成する積層構造の一部を設ける場合には、その部分をp型半導体の積層体で構成し、トンネル接合17上の上部DBRミラーの部分はn型半導体の積層体で構成する。   Moreover, in the said embodiment, although the tunnel junction part was provided in the resonator, you may provide outside a resonator. For example, the n-GaAs cladding layer 18 may not be provided, and the thickness of the p-GaAs cladding layer 16 may be adjusted to match the resonator length, and the tunnel junction 17 may be provided in the upper DBR mirror. In that case, when providing a part of the laminated structure constituting the upper DBR mirror between the clad layer 16 and the tunnel junction 17, the part is constituted by a p-type semiconductor laminate, and the upper DBR on the tunnel junction 17 is formed. The mirror part is composed of a stack of n-type semiconductors.

以上、本発明をその好適な実施態様に基づいて説明したが、本発明の面発光レーザ素子は、上記実施態様の構成にのみ限定されるものではなく、上記実施態様の構成から種々の修正及び変更を施したものも、本発明の範囲に含まれる。また、本発明の好適な態様として記載した各構成や実施形態で記載した各構成については、本発明の必須の構成と共に用いることが好ましいが、単独であっても有益な効果を奏する構成については、必ずしも本発明の必須の構成として説明した全ての構成と共に用いる必要はない。   Although the present invention has been described based on the preferred embodiments, the surface emitting laser element of the present invention is not limited to the configuration of the above embodiments, and various modifications and changes can be made to the configurations of the above embodiments. Changes are also included in the scope of the present invention. In addition, each configuration described as a preferred aspect of the present invention or each configuration described in the embodiment is preferably used together with the essential configuration of the present invention, but about a configuration that exhibits a beneficial effect even when used alone. However, it is not always necessary to use all the configurations described as the essential configurations of the present invention.

本発明の一実施形態に係る面発光レーザ素子の斜視図。1 is a perspective view of a surface emitting laser element according to an embodiment of the present invention. 図1の面発光レーザ素子の積層構造を示す断面図。Sectional drawing which shows the laminated structure of the surface emitting laser element of FIG. 従来の面発光レーザ素子の積層構造を示す断面図。Sectional drawing which shows the laminated structure of the conventional surface emitting laser element.

符号の説明Explanation of symbols

10、10A:面発光レーザ(VCSEL)素子
11:n−GaAs基板
12:n型下部半導体DBRミラー
13:n−GaAsクラッド層
14:MQW活性層
15:酸化狭窄層
16:p−GaAs層
17:トンネル接合(T/J)
18:n−GaAsクラッド層
19:n型上部半導体DBRミラー
20:第1電極(電源電極)
21:第2電極(接地電極)
22:窓
23:トンネル接合(T/J)
24:ポリイミド層
30:2λ共振器構造
31:p+−GaAs層
32:量子ドット層
33:n+−InGaAs層
34:n+−GaAs層
10, 10A: Surface emitting laser (VCSEL) element 11: n-GaAs substrate 12: n-type lower semiconductor DBR mirror 13: n-GaAs cladding layer 14: MQW active layer 15: oxidized constriction layer 16: p-GaAs layer 17: Tunnel junction (T / J)
18: n-GaAs cladding layer 19: n-type upper semiconductor DBR mirror 20: first electrode (power supply electrode)
21: Second electrode (ground electrode)
22: Window 23: Tunnel junction (T / J)
24: polyimide layer 30: 2λ resonator structure 31: p + -GaAs layer 32: quantum dot layer 33: n + -InGaAs layer 34: n + -GaAs layer

Claims (9)

基板上に、高屈折率層と低屈折率層とを交互に形成した周期構造を有する下部DBRミラーと、高屈折率層と低屈折率層とを交互に形成した周期構造を有する上部DBRミラーと、前記下部DBRミラーと前記上部DBRミラーとに挟まれ、光を発生する活性層を含む共振器構造とを有する面発光レーザにおいて、
前記下部DBRミラーと上部DBRミラーとの間、又は、前記下部若しくは上部DBRミラー内に配設されたトンネル接合を有し、該トンネル接合の少なくとも一部の層が量子ドット層から構成されることを特徴とする面発光レーザ素子。
A lower DBR mirror having a periodic structure in which a high refractive index layer and a low refractive index layer are alternately formed on a substrate, and an upper DBR mirror having a periodic structure in which a high refractive index layer and a low refractive index layer are alternately formed And a surface emitting laser having a resonator structure including an active layer that is sandwiched between the lower DBR mirror and the upper DBR mirror and generates light,
A tunnel junction is provided between the lower DBR mirror and the upper DBR mirror or in the lower or upper DBR mirror, and at least a part of the tunnel junction is formed of a quantum dot layer. A surface emitting laser element characterized by the above.
前記量子ドット層がIn(Ga)As層である、請求項1に記載の面発光レーザ素子。   The surface emitting laser element according to claim 1, wherein the quantum dot layer is an In (Ga) As layer. 前記量子ドット層がGaAsSb下地層上に形成される、請求項2に記載の面発光レーザ素子。   The surface emitting laser element according to claim 2, wherein the quantum dot layer is formed on a GaAsSb underlayer. 量子ドット層の厚みが2〜4単原子層の範囲にある、請求項1〜3の何れか一に記載の面発光レーザ素子。   The surface emitting laser element according to claim 1, wherein the quantum dot layer has a thickness in the range of 2 to 4 monoatomic layers. 前記トンネル接合層の不純物ドーピング量の最大値が5×1019cm−3である、請求項1〜4の何れか一に記載の面発光レーザ素子。 The surface emitting laser element according to claim 1, wherein a maximum value of an impurity doping amount of the tunnel junction layer is 5 × 10 19 cm −3 . 前記下部DBRミラー及び上部DBRミラー、又は、前記共振器構造の何れかには、前記活性層の近傍に選択酸化型の電流狭窄層が形成される、請求項1〜5の何れか一に記載の面発光レーザ素子。   The selective oxidation type current confinement layer is formed in the vicinity of the active layer in any of the lower DBR mirror and the upper DBR mirror, or the resonator structure. Surface emitting laser element. 埋込み型へテロ構造により電流狭窄構造を形成する、請求項1〜5の何れか一に記載の面発光レーザ素子。   The surface emitting laser element according to claim 1, wherein a current confinement structure is formed by a buried type hetero structure. 前記上部DBRミラーの少なくとも一部の層が誘電体層で構成される、請求項1〜7の何れか一に記載の面発光レーザ素子。   The surface emitting laser element according to claim 1, wherein at least a part of the upper DBR mirror is formed of a dielectric layer. 発振波長が1000〜2500nmの範囲である、請求項1〜8の何れか一に記載の面発光レーザ素子。   The surface emitting laser element according to claim 1, wherein the oscillation wavelength is in the range of 1000 to 2500 nm.
JP2006140380A 2006-05-19 2006-05-19 Surface-emitting laser element Pending JP2007311632A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2006140380A JP2007311632A (en) 2006-05-19 2006-05-19 Surface-emitting laser element

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2006140380A JP2007311632A (en) 2006-05-19 2006-05-19 Surface-emitting laser element

Publications (1)

Publication Number Publication Date
JP2007311632A true JP2007311632A (en) 2007-11-29

Family

ID=38844196

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2006140380A Pending JP2007311632A (en) 2006-05-19 2006-05-19 Surface-emitting laser element

Country Status (1)

Country Link
JP (1) JP2007311632A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7577176B2 (en) 2007-03-01 2009-08-18 The Furukawa Electric Co., Ltd. Surface emitting laser device
KR101022568B1 (en) 2008-12-24 2011-03-16 경희대학교 산학협력단 Quantum-dot-based high-power light source for laser display applications
US8144742B2 (en) 2007-03-01 2012-03-27 Furukawa Electric Co., Ltd. Surface emitting laser device
JP2016092175A (en) * 2014-11-04 2016-05-23 三菱電機株式会社 Semiconductor optical element
JP2018201009A (en) * 2017-05-25 2018-12-20 昭和電工株式会社 Light-emitting diode and method for manufacturing tunnel junction layer

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02177490A (en) * 1988-12-28 1990-07-10 Res Dev Corp Of Japan Surface emitting type semiconductor laser device
JPH0983065A (en) * 1995-09-18 1997-03-28 Toshiba Corp Semiconductor light emitting element
US6369403B1 (en) * 1999-05-27 2002-04-09 The Board Of Trustees Of The University Of Illinois Semiconductor devices and methods with tunnel contact hole sources and non-continuous barrier layer
JP2002134835A (en) * 2000-10-20 2002-05-10 Nec Corp Tunnel junction surface emitting laser
JP2005252032A (en) * 2004-03-04 2005-09-15 Furukawa Electric Co Ltd:The Surface emitting laser element and laser module using it
JP2006080293A (en) * 2004-09-09 2006-03-23 Univ Of Electro-Communications Forming method of quantum dot
JP2006108641A (en) * 2004-09-08 2006-04-20 Advanced Telecommunication Research Institute International Semiconductor laser and semiconductor laser gyro using same

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02177490A (en) * 1988-12-28 1990-07-10 Res Dev Corp Of Japan Surface emitting type semiconductor laser device
JPH0983065A (en) * 1995-09-18 1997-03-28 Toshiba Corp Semiconductor light emitting element
US6369403B1 (en) * 1999-05-27 2002-04-09 The Board Of Trustees Of The University Of Illinois Semiconductor devices and methods with tunnel contact hole sources and non-continuous barrier layer
JP2002134835A (en) * 2000-10-20 2002-05-10 Nec Corp Tunnel junction surface emitting laser
JP2005252032A (en) * 2004-03-04 2005-09-15 Furukawa Electric Co Ltd:The Surface emitting laser element and laser module using it
JP2006108641A (en) * 2004-09-08 2006-04-20 Advanced Telecommunication Research Institute International Semiconductor laser and semiconductor laser gyro using same
JP2006080293A (en) * 2004-09-09 2006-03-23 Univ Of Electro-Communications Forming method of quantum dot

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7577176B2 (en) 2007-03-01 2009-08-18 The Furukawa Electric Co., Ltd. Surface emitting laser device
US8144742B2 (en) 2007-03-01 2012-03-27 Furukawa Electric Co., Ltd. Surface emitting laser device
KR101022568B1 (en) 2008-12-24 2011-03-16 경희대학교 산학협력단 Quantum-dot-based high-power light source for laser display applications
JP2016092175A (en) * 2014-11-04 2016-05-23 三菱電機株式会社 Semiconductor optical element
JP2018201009A (en) * 2017-05-25 2018-12-20 昭和電工株式会社 Light-emitting diode and method for manufacturing tunnel junction layer
JP7122119B2 (en) 2017-05-25 2022-08-19 昭和電工光半導体株式会社 light emitting diode

Similar Documents

Publication Publication Date Title
Healy et al. Active region design for high-speed 850-nm VCSELs
US7638792B2 (en) Tunnel junction light emitting device
US6570905B1 (en) Vertical cavity surface emitting laser with reduced parasitic capacitance
US20020025589A1 (en) Double intracavity contacted long-wavelength VCSELs and method of fabricating same
US20060268954A1 (en) Light emitting semiconductor device having an electrical confinement barrier near the active region
CN109716601B (en) Etched planarized vertical cavity surface emitting laser
JP2002299742A (en) Vertical cavity surface-emitting laser, manufacturing method therefor, and communication system
JP2014508420A5 (en)
US20120033699A1 (en) Surface-emitting laser, surface-emitting laser array, display apparatus including the surface-emitting laser array as a light source, printer head, and printer
JP2012044161A (en) Surface emission laser, light source, and optical module
JP2010027697A (en) Surface light emitting semiconductor laser
JP5304136B2 (en) Surface emitting laser and manufacturing method thereof
JP3189791B2 (en) Semiconductor laser
US7907653B2 (en) Vertical cavity surface emitting laser device and vertical cavity surface emitting laser array
CN114649742A (en) Novel efficient vertical cavity surface EML chip and preparation method thereof
JP2007311632A (en) Surface-emitting laser element
JP2008235574A (en) Surface-emitting semiconductor laser
US6728283B2 (en) Semiconductor laser and photo module using the same
US6931044B2 (en) Method and apparatus for improving temperature performance for GaAsSb/GaAs devices
JP4803992B2 (en) Light emitting device, optical transmission system, and vertical cavity surface emitting semiconductor laser element
JPWO2007135772A1 (en) Light emitting element
US20230020718A1 (en) Vcsel with increased wavelength dependence on driving current
JP2007087994A (en) Surface-emitting semiconductor laser element
JP2005051124A (en) Plane light emitting semiconductor element
JP2007194561A (en) Surface emitting laser

Legal Events

Date Code Title Description
A621 Written request for application examination

Effective date: 20090302

Free format text: JAPANESE INTERMEDIATE CODE: A621

RD05 Notification of revocation of power of attorney

Free format text: JAPANESE INTERMEDIATE CODE: A7425

Effective date: 20100409

RD02 Notification of acceptance of power of attorney

Effective date: 20100419

Free format text: JAPANESE INTERMEDIATE CODE: A7422

A131 Notification of reasons for refusal

Effective date: 20120511

Free format text: JAPANESE INTERMEDIATE CODE: A131

A521 Written amendment

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20120709

A02 Decision of refusal

Effective date: 20121026

Free format text: JAPANESE INTERMEDIATE CODE: A02