JP2007305823A - Memory using magnetoresistance effect element and its driving method - Google Patents

Memory using magnetoresistance effect element and its driving method Download PDF

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JP2007305823A
JP2007305823A JP2006133297A JP2006133297A JP2007305823A JP 2007305823 A JP2007305823 A JP 2007305823A JP 2006133297 A JP2006133297 A JP 2006133297A JP 2006133297 A JP2006133297 A JP 2006133297A JP 2007305823 A JP2007305823 A JP 2007305823A
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memory cell
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Yasusuke Irie
庸介 入江
Kiyoyuki Morita
清之 森田
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Panasonic Holdings Corp
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Matsushita Electric Industrial Co Ltd
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Abstract

<P>PROBLEM TO BE SOLVED: To solve the following problems that a crosspoint type MRAM requires a selective transistor and a diode within the cell to suppress a read error caused by a sneak current which makes it difficult to downsize the cell and to rewrite by one directional driving current. <P>SOLUTION: This cross-point type memory is provided with its memory cell of only a magnetoresistance effect element having asymmnetric diversity and nonlinearity, and with its cell area small. Further, a nonvolatile memory which can be rewritten by only one directional driving current is provided by making the constitution of the magnetoresitance effect element and a combination of the driving current direction appropriate. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

本発明は、情報通信端末などに使用される磁気ランダム・アクセスメモリなどに代表される磁気固体メモリおよびその駆動方法に関する。   The present invention relates to a magnetic solid-state memory represented by a magnetic random access memory used for an information communication terminal and the like, and a driving method thereof.

1998年に非磁性膜を介して交換結合した磁性膜よりなるFe/Cr人工格子膜が巨大磁気抵抗効果素子(GMR)を示すことが発見され(非特許文献1)、GMR膜を用いた高感度磁気センサーやハードディスク用再生磁気ヘッドが製品化された。また、新しいコンセプトのデバイスとしてGMR膜を用いたMRAM(Magnetic Randam Access Memory)の提案もなされた(非特許文献2)。続いて、非磁性層をAl2O3等の絶縁膜を用いたトンネル型磁気抵抗効果素子(TMR)が常温で大きな抵抗変化を示すことが実証され(非特許文献3)、次世代高密度記録を実現するためにハードディスク用再生磁気ヘッドおよびMRAMへの開発がなされている。また、高感度の観点から100%以上の磁気抵抗効果を示すものとして、2つの針状のニッケル(Ni)を突き合わせた「磁気微小接点」、あるいはマグネタイトを接触させた磁気微小接点がバリスティック型磁気抵抗効果素子(BMR)として公開されている(非特許文献4、非特許文献5)。 In 1998, it was discovered that an Fe / Cr artificial lattice film composed of a magnetic film exchange-coupled via a nonmagnetic film exhibits a giant magnetoresistive element (GMR) (Non-Patent Document 1). A sensitive magnetic sensor and a reproducing magnetic head for hard disks were commercialized. As a new concept device, MRAM (Magnetic Randam Access Memory) using a GMR film has also been proposed (Non-patent Document 2). Subsequently, it was demonstrated that the tunnel magnetoresistive effect element (TMR) using an insulating film such as Al 2 O 3 as the nonmagnetic layer exhibits a large resistance change at room temperature (Non-patent Document 3). In order to realize the recording, the reproduction magnetic head for hard disk and MRAM have been developed. In addition, from the viewpoint of high sensitivity, a magnetic microcontact with two needle-shaped nickel (Ni) abutting or a magnetic microcontact with magnetite in contact is a ballistic type. It is disclosed as a magnetoresistive effect element (BMR) (Non-Patent Document 4, Non-Patent Document 5).

このような磁気抵抗効果素子を用いた磁気メモリは、読み出し信号が比較的大きくとれ、金属のみで形成可能なため素子を配線のクロスポイントに配置するだけでメモリセルを形成できる。このような構造のMRAMはクロスポイント型のMRAMと呼ばれている。   A magnetic memory using such a magnetoresistive effect element has a relatively large read signal and can be formed of only metal, so that a memory cell can be formed simply by placing the element at a cross point of the wiring. An MRAM having such a structure is called a cross-point type MRAM.

しかしながら、従来のクロスポイント型のMRAMでは以下のような問題が生じていた。上記した磁気抵抗効果素子は、印加電圧に比例して電流も増加する線形素子であり、磁化方向により抵抗が変化する抵抗素子である。そのため図11に示すように、選択セルの磁気抵抗効果素子12に書き込まれたデータを読み出す場合、スイッチSW(a)、SW(b-1)をオンすることで、ビット線BL(b-1)及びワード線WL(a)が選択され、読み出し電流が実線の矢印方向に従って磁気抵抗効果素子12に流れる。クロスポイント型メモリの構造上、選択されたビット線BL(b-1)及びワード線WL(a)には選択された磁気抵抗効果素子12以外に複数個の素子が接続されているため、磁気抵抗効果素子12a、12b、12cに点線の矢印方向に電流が回り込んでしまう。この結果、実際の選択セルに流れる読み出し電流に対して、最短距離を通らない回り込み電流の割合が多くなり、誤読み出しが生じてしまうという問題がある。また、この問題は、メモリアレイの規模が大きくなるほど、顕在化してしまう。これらの問題を解決するために、非線形特性を有しない磁気抵抗効果素子と非線形特性を有するトランジスタやダイオードなどを一緒にセル内に配置する。例えば図12(a)、図12(b)に示されるように選択トランジスタ上に素子や、選択トランジスタの代わりにアモルファスシリコンダイオードを用いることで読み出し電流と逆向きに流れる回り込み電流を防止する対策がとられていた(特許文献1、特許文献2)。また、駆動方法としてスピン偏極電子のトルクによって磁性体の磁化方向を反転させることが可能なスピン注入磁化反転方法を用いたメモリ素子が提案されている(特許文献3)。
特開2004-303801号公報 特開2004-153248号公報 特開2003-204095号公報 M.N.Baibich et.at.,Phys.Rev.Lett.61(1988)2472. K.T.m.Ranmuthu et.al.,IEEE Trans.on Magn. 29(1993) 2593. T.Miyazaki et.al. JMMM 109,79 (1995) N.Garcia,M.Munoz,and Y.-W. Zhao,Physical Review Letters,Vol.82,p2923(1999) J.J.Versluijs,M.A.Bari and J.M.D.Coey,Physical Review Letters,vol.87,p26601-1(2001) S. Boussaad and N. J. Tao Applied Physics Letters80(2002)2398
However, the conventional crosspoint type MRAM has the following problems. The magnetoresistive effect element described above is a linear element whose current increases in proportion to the applied voltage, and is a resistance element whose resistance changes depending on the magnetization direction. Therefore, as shown in FIG. 11, when data written to the magnetoresistive effect element 12 of the selected cell is read, the bit line BL (b-1) is turned on by turning on the switches SW (a) and SW (b-1). ) And the word line WL (a) are selected, and a read current flows through the magnetoresistive effect element 12 in the direction of the solid line arrow. Due to the structure of the cross-point type memory, a plurality of elements other than the selected magnetoresistive effect element 12 are connected to the selected bit line BL (b-1) and word line WL (a). Current flows in the direction of the dotted arrow in the resistance effect elements 12a, 12b, and 12c. As a result, there is a problem that the ratio of the sneak current that does not pass through the shortest distance with respect to the read current flowing in the actual selected cell increases, and erroneous reading occurs. In addition, this problem becomes more apparent as the size of the memory array increases. In order to solve these problems, a magnetoresistive effect element having no non-linear characteristics and a transistor or a diode having non-linear characteristics are arranged together in a cell. For example, as shown in FIGS. 12 (a) and 12 (b), there is a measure to prevent a sneak current flowing in the direction opposite to the read current by using an element on the selection transistor or an amorphous silicon diode instead of the selection transistor. (Patent Document 1, Patent Document 2). As a driving method, a memory element using a spin injection magnetization reversal method capable of reversing the magnetization direction of a magnetic material by the torque of spin-polarized electrons has been proposed (Patent Document 3).
JP 2004-303801 A JP 2004-153248 A Japanese Patent Laid-Open No. 2003-204095 MNBaibich et.at., Phys.Rev.Lett.61 (1988) 2472. KTmRanmuthu et.al., IEEE Trans.on Magn. 29 (1993) 2593. T.Miyazaki et.al.JMMM 109,79 (1995) N. Garcia, M. Munoz, and Y.-W. Zhao, Physical Review Letters, Vol. 82, p2923 (1999) JJVersluijs, MABari and JMDCoey, Physical Review Letters, vol. 87, p26601-1 (2001) S. Boussaad and NJ Tao Applied Physics Letters 80 (2002) 2398

しかし、特許文献1および特許文献2に示されるように、選択トランジスタをメモリセル内に配置する方法については、素子に比べて選択トランジスタの面積が大きくなってしまいその結果セル面積の増大につながり、大容量メモリを実現するために大きな障害となってしまうという課題もあった。また、アモルファスシリコンダイオードを使用する場合には、選択トランジスタに比べダイオードの面積が小さいためメモリセルの面積を小さくすることは可能になるが、MRAMに使用する材料が300℃程度の熱処理で界面拡散が生じて特性が劣化するため、アモルファスシリコンやポリシリコンの堆積温度に耐える事ができないという課題もあった。   However, as shown in Patent Document 1 and Patent Document 2, for the method of arranging the selection transistor in the memory cell, the area of the selection transistor becomes larger than the element, resulting in an increase in the cell area. There was also a problem that it would be a major obstacle to realizing a large-capacity memory. When an amorphous silicon diode is used, the area of the memory cell can be reduced because the area of the diode is smaller than that of the select transistor. However, the material used for MRAM is interface diffused by heat treatment at about 300 ° C. As a result, the characteristics deteriorate, and there is a problem that it is impossible to withstand the deposition temperature of amorphous silicon or polysilicon.

また、メモリ駆動方法としては特許文献3に示されるようにスピン注入磁化反転を用い、電流の方向によって磁化の方向を反転させ、「1」、「0」の情報を書き込むことができる。駆動方法としてスピン注入磁化反転方法を用いると、メモリに情報「1」、「0」を書き込む際に、書き込み電流の方向を切り替える必要があり、1方向のみにしか電流を流さないアモルファスシリコンダイオードを用いるメモリセル構造は使用することが不可能である。従って、選択トランジスタを用いたメモリセル構造を使用する必要があり、メモリセル面積の増大により大容量化が困難であった。   Further, as a memory driving method, as shown in Patent Document 3, spin injection magnetization reversal can be used, and the direction of magnetization can be reversed by the direction of current to write information of “1” and “0”. When the spin injection magnetization reversal method is used as a driving method, when writing information “1” and “0” in the memory, it is necessary to switch the direction of the write current, and an amorphous silicon diode that allows current to flow only in one direction is used. The memory cell structure used cannot be used. Therefore, it is necessary to use a memory cell structure using a selection transistor, and it is difficult to increase the capacity due to an increase in the memory cell area.

前記課題を解決するため本発明は、少なくとも2つの磁性体と前記磁性体間に挟み込むように形成された少なくとも1つの磁気特性を有する伝導体から構成され、前記磁性体は前記伝導体と物理的に接しており、前記磁気特性を有する伝導体を挟み込むように形成された2つの磁性体の磁化相対角によって抵抗が変化することを特徴とし、スピンの伝送経路および磁化固定体となる磁気特性を有する伝導体とその伝導体を挟み込むように構成された磁性体の構成や配置、形状、大きさ、材料を適正に選択することで主に量子伝導であるバリスティック的な伝導を制御することを可能にする。更に、素子抵抗として示される量子コンダクタンスが0.01以上かつ0.3G0以下の範囲で非線形特性を有する磁気抵抗効果素子により選択トランジスタやダイオードをセル内に配置しなくとも回り込み電流を防止でき、前記磁気抵抗効果素子と、その磁気抵抗効果素子に書き込みもしくは読出しに必要な電流を流すための電極、前記電極に接合されるワード線およびビット線のみからメモリセルを構成することが可能となり、メモリセルの面積を小さくできるため大容量メモリを実現できる。量子コンダクタンスについて説明する。電子が伝導する伝導体が電子の平均自由工程よりも小さくなった場合に量子的な振る舞いを生じる。その量子的な振る舞いとは、電子が結晶内を散乱されること無く通過できる現象であり、バリスティック伝導状態と呼ばれている。この伝導状態では、物質の抵抗値はオームの法則に従わず、数1に示されるように、電子素量eとブランク定数hで示される飛び飛びのエネルギー順位で示される値をとる。この公式はランダウアーの公式と言われ、その値を量子コンダクタンスGで示され、本発明でも同様な定義で使用する。 In order to solve the above problems, the present invention comprises at least two magnetic bodies and a conductor having at least one magnetic property formed so as to be sandwiched between the magnetic bodies, and the magnetic body is physically connected to the conductors. The resistance changes depending on the relative magnetization angle of the two magnetic bodies formed so as to sandwich the conductor having the magnetic characteristics, and the magnetic characteristics of the spin transmission path and the magnetization fixed body are It is possible to control ballistic conduction, which is mainly quantum conduction, by properly selecting the configuration, arrangement, shape, size, and material of the magnetic material configured to sandwich the conductor and the conductor. enable. Furthermore, a sneak current can be prevented without arranging a selection transistor or a diode in the cell by a magnetoresistive effect element having a nonlinear characteristic in a range where the quantum conductance shown as the element resistance is 0.01 or more and 0.3 G 0 or less. A memory cell can be configured only from an effect element, an electrode for passing a current necessary for writing or reading to the magnetoresistive effect element, and a word line and a bit line joined to the electrode. Therefore, a large-capacity memory can be realized. The quantum conductance will be described. Quantum behavior occurs when the conductor through which electrons conduct becomes smaller than the mean free path of electrons. The quantum behavior is a phenomenon in which electrons can pass through the crystal without being scattered, and is called a ballistic conduction state. In this conduction state, the resistance value of the substance does not follow Ohm's law, and takes a value indicated by the jump energy rank indicated by the electron elementary quantity e and the blank constant h, as shown in Equation 1. This formula is called Landauer's formula, and its value is represented by quantum conductance G, and is used in the present invention in the same definition.

Figure 2007305823
Figure 2007305823

また、本発明は少なくとも2つの磁性体と前記磁性体間に挟み込むように形成された少なくとも1つの磁気特性を有する伝導体から構成され、前記磁性体は前記伝導体と物理的に接しており、前記磁気特性を有する伝導体を挟み込むように形成された2つの磁性体の磁化相対角によって抵抗が変化することを特徴とし、スピンの伝送経路および磁化固定体となる磁気特性を有する伝導体とその伝導体を挟み込むように構成された磁性体の構成や配置、形状、大きさ、材料を適正に選択することで主に量子伝導であるバリスティック的な伝導を制御することを可能にする。更に、素子抵抗として示される量子コンダクタンスが0.01以上かつ0.3G0以下の範囲で非線形特性を有する磁気抵抗効果素子であって、構成材料としては、Niをはじめとする金属材料で構成される。通常、素子が金属材料で構成される場合には、素子は線形特性を有する。しかし、本発明では量子コンダクタンスを0.01G0以上かつ0.3G0以下の範囲に適正化することにより金属材料だけの構成であっても非線形特性を有すことが見出された。その結果、選択トランジスタやダイオードをセル内に配置しなくても回り込み電流を防止でき、前記磁気抗効果素子と書き込みもしくは読出しに必要な電流を流すための電極、前記電極に接合されるワード線およびビット線のみからメモリセルを構成可能となり、メモリセルの面積を小さくできるため大容量メモリを実現できる。 Further, the present invention is composed of at least two magnetic bodies and a conductor having at least one magnetic property formed so as to be sandwiched between the magnetic bodies, and the magnetic body is in physical contact with the conductor, The resistance varies depending on the relative magnetization angle of two magnetic bodies formed so as to sandwich the conductor having magnetic characteristics, and a conductor having magnetic characteristics to be a spin transmission path and a magnetization fixed body, and its By appropriately selecting the configuration, arrangement, shape, size, and material of the magnetic body configured to sandwich the conductor, it is possible to control ballistic conduction which is mainly quantum conduction. Furthermore, it is a magnetoresistive effect element having non-linear characteristics in a range where the quantum conductance shown as element resistance is 0.01 or more and 0.3 G 0 or less, and the constituent material is made of a metal material such as Ni. Usually, when an element is comprised with a metal material, an element has a linear characteristic. However, in the present invention it was found to have a non-linear characteristic have a configuration of only a metal material by optimizing the range quantum conductance of 0.01 G 0 or more and 0.3 G 0 or less. As a result, a sneak current can be prevented without arranging a selection transistor or a diode in the cell, and an electrode for flowing a current necessary for writing or reading with the magnetoresistive element, a word line joined to the electrode, and A memory cell can be configured only from the bit line, and the area of the memory cell can be reduced, so that a large capacity memory can be realized.

また、本発明は少なくとも2つの磁性体と前記磁性体間に挟み込むように形成された少なくとも1つの磁気特性を有する伝導体から構成され、前記磁性体は前記伝導体と物理的に接しており、前記磁気特性を有する伝導体を挟み込むように形成された2つの磁性体の磁化相対角によって抵抗が変化することを特徴とし、スピンの伝送経路および磁化固定体となる磁気特性を有する伝導体とその伝導体を挟み込むように構成された磁性体の構成や配置、形状、大きさ、材料を適正に選択することで主に量子伝導であるバリスティック的な伝導を制御することを可能にする。更に、素子抵抗として示される量子コンダクタンスが0.01以上かつ0.3G0以下の範囲で非線形特性を有する磁気抵抗効果素子であって、前記磁気抵抗効果素子の磁化自由層は非磁性層を挟んで少なくとも2つの強磁性層から構成され、前記2つの強磁性層の磁化方向が反平行に配置かつ磁気的な結合を有するように配置する。この自由層の非磁性層を介して強磁性層が反平行状態に配置され、かつ磁気的な結合を有する構成によって、スピン偏極された電子は必ず非磁性層を介して配置された強磁性層のどちらかにトルクを加えることが可能となり、1方向の電流のみで自由層を反転させることができる。よって、前記磁気抗効果素子と書き込みもしくは読出しに必要な電流を流すための電極、前記電極に接合されるワード線およびビット線のみからメモリセルを構成可能となり、メモリセルの面積を小さくできるため大容量メモリを実現できる。 Further, the present invention is composed of at least two magnetic bodies and a conductor having at least one magnetic property formed so as to be sandwiched between the magnetic bodies, and the magnetic body is in physical contact with the conductor, The resistance varies depending on the relative magnetization angle of two magnetic bodies formed so as to sandwich the conductor having magnetic characteristics, and a conductor having magnetic characteristics to be a spin transmission path and a magnetization fixed body, and its By appropriately selecting the configuration, arrangement, shape, size, and material of the magnetic body configured to sandwich the conductor, it is possible to control ballistic conduction which is mainly quantum conduction. Furthermore, the magnetoresistive effect element has a nonlinear characteristic in a quantum conductance range of 0.01 or more and 0.3 G 0 or less shown as element resistance, and the magnetization free layer of the magnetoresistive effect element is at least 2 across the nonmagnetic layer. The two ferromagnetic layers are arranged such that the magnetization directions of the two ferromagnetic layers are antiparallel and have magnetic coupling. The ferromagnetic layer is arranged in an antiparallel state via the nonmagnetic layer of the free layer and has a magnetic coupling, so that spin-polarized electrons are always arranged through the nonmagnetic layer. Torque can be applied to either of the layers, and the free layer can be inverted with only one direction of current. Therefore, a memory cell can be configured only from the magnetoresistive element and an electrode for passing a current required for writing or reading, a word line and a bit line joined to the electrode, and the area of the memory cell can be reduced. A capacity memory can be realized.

また、本発明は少なくとも2つの磁性体と前記磁性体間に挟み込むように形成された少なくとも1つの磁気特性を有する伝導体から構成され、前記磁性体は前記伝導体と物理的に接しており、前記磁気特性を有する伝導体を挟み込むように形成された2つの磁性体の磁化相対角によって抵抗が変化することを特徴とし、スピンの伝送経路および磁化固定体となる磁気特性を有する伝導体とその伝導体を挟み込むように構成された磁性体の構成や配置、形状、大きさ、材料を適正に選択することで主に量子伝導であるバリスティック的な伝導を制御することを可能にする。更に、素子抵抗として示される量子コンダクタンスが0.01以上かつ0.3G0以下の範囲で非線形特性を有する磁気抵抗効果素子であって、前記磁気抵抗効果素子の磁化自由層は非磁性層を挟んで少なくとも2つの強磁性層から構成され、前記2つの強磁性層の磁化方向が反平行に配置かつ磁気的な結合を有するように配置する。その上、2つの強磁性層の厚みを異なるように配置することで、厚みが同じ場合と比べて小さな電流で磁化を反転できる。これら上記の構成を用いる前記磁気抗効果素子と書き込みもしくは読出しに必要な電流を流すための電極、前記電極に接合されるワード線およびビット線のみからメモリセルを構成可能となり、メモリセルの面積を小さくできるため大容量メモリを実現できる。 Further, the present invention is composed of at least two magnetic bodies and a conductor having at least one magnetic property formed so as to be sandwiched between the magnetic bodies, and the magnetic body is in physical contact with the conductor, The resistance varies depending on the relative magnetization angle of two magnetic bodies formed so as to sandwich the conductor having magnetic characteristics, and a conductor having magnetic characteristics to be a spin transmission path and a magnetization fixed body, and its By appropriately selecting the configuration, arrangement, shape, size, and material of the magnetic body configured to sandwich the conductor, it is possible to control ballistic conduction which is mainly quantum conduction. Furthermore, the magnetoresistive effect element has a nonlinear characteristic in a quantum conductance range of 0.01 or more and 0.3 G 0 or less shown as element resistance, and the magnetization free layer of the magnetoresistive effect element is at least 2 across the nonmagnetic layer. The two ferromagnetic layers are arranged such that the magnetization directions of the two ferromagnetic layers are antiparallel and have magnetic coupling. In addition, by arranging the two ferromagnetic layers to have different thicknesses, the magnetization can be reversed with a smaller current than when the thicknesses are the same. A memory cell can be configured only from the magnetoresistive element using the above-described configuration and an electrode for passing a current necessary for writing or reading, a word line and a bit line joined to the electrode, and the area of the memory cell can be reduced. Since it can be made small, a large-capacity memory can be realized.

また、本発明は少なくとも2つの磁性体と前記磁性体間に挟み込むように形成された少なくとも1つの磁気特性を有する伝導体から構成され、前記磁性体は前記伝導体と物理的に接しており、前記磁気特性を有する伝導体を挟み込むように形成された2つの磁性体の磁化相対角によって抵抗が変化することを特徴とし、スピンの伝送経路および磁化固定体となる磁気特性を有する伝導体とその伝導体を挟み込むように構成された磁性体の構成や配置、形状、大きさ、材料を適正に選択することで主に量子伝導であるバリスティック的な伝導を制御することを可能にする。更に、素子抵抗として示される量子コンダクタンスが0.01以上かつ0.3G0以下の範囲で非線形特性を有する磁気抵抗効果素子であって、前記磁気抵抗効果素子の磁化固定層は反強磁性層を有する。この構成を用いることで磁気抵抗変化が安定的に得られ、読み出し信号も安定的に得られる。これら上記の構成を用いる前記磁気抵抗効果素子と書き込みもしくは読出しに必要な電流を流すための電極、前記電極に接合されるワード線およびビット線のみからメモリセルを構成可能となり、メモリセルの面積を小さくできるため大容量メモリを実現できる。 Further, the present invention is composed of at least two magnetic bodies and a conductor having at least one magnetic property formed so as to be sandwiched between the magnetic bodies, and the magnetic body is in physical contact with the conductor, The resistance varies depending on the relative magnetization angle of two magnetic bodies formed so as to sandwich the conductor having magnetic characteristics, and a conductor having magnetic characteristics to be a spin transmission path and a magnetization fixed body, and its By appropriately selecting the configuration, arrangement, shape, size, and material of the magnetic body configured to sandwich the conductor, it is possible to control ballistic conduction which is mainly quantum conduction. Further, a magnetoresistance effect element having a nonlinear characteristic in a range quantum conductance of 0.01 or more and 0.3 G 0 or less, shown as element resistance, magnetization fixed layer of the magnetoresistive element having an antiferromagnetic layer. By using this configuration, a change in magnetoresistance can be obtained stably, and a read signal can also be obtained stably. A memory cell can be configured only from the magnetoresistive element using the above-described configuration and an electrode for passing a current necessary for writing or reading, a word line and a bit line joined to the electrode, and the area of the memory cell can be reduced. Since it can be made small, a large-capacity memory can be realized.

また、本発明は少なくとも2つの磁性体と前記磁性体間に挟み込むように形成された少なくとも1つの磁気特性を有する伝導体から構成され、前記磁性体は前記伝導体と物理的に接しており、前記磁気特性を有する伝導体を挟み込むように形成された2つの磁性体の磁化相対角によって抵抗が変化することを特徴とし、スピンの伝送経路および磁化固定体となる磁気特性を有する伝導体とその伝導体を挟み込むように構成された磁性体の構成や配置、形状、大きさ、材料を適正に選択することで主に量子伝導であるバリスティック的な伝導を制御することを可能にする。更に、素子抵抗として示される量子コンダクタンスが0.01以上かつ0.3G0以下の範囲で非線形特性を有する磁気抵抗効果素子であって、前記磁気抵抗効果素子の磁化固定層は反強磁性層を有する。この構成を用いることで磁気抵抗変化が安定的に得られ、読み出し信号も安定的に得られる。その上、非磁性層を挟んで少なくとも2つの強磁性層から構成され、前記2つの強磁性層は反強磁性結合を有する。この構成によって、素子が小さくなっても安定に磁化固定層の磁化方向を固定することが可能となり、磁気抵抗変化が安定的に得られ、読み出し信号も安定的に得られる。これら上記の構成を用いる前記磁気抵抗効果素子と書き込みもしくは読出しに必要な電流を流すための電極、前記電極に接合されるワード線およびビット線のみからメモリセルを構成可能となり、メモリセルの面積を小さくできるため大容量メモリを実現できる。 Further, the present invention is composed of at least two magnetic bodies and a conductor having at least one magnetic property formed so as to be sandwiched between the magnetic bodies, and the magnetic body is in physical contact with the conductor, The resistance varies depending on the relative magnetization angle of two magnetic bodies formed so as to sandwich the conductor having magnetic characteristics, and a conductor having magnetic characteristics to be a spin transmission path and a magnetization fixed body, and its By appropriately selecting the configuration, arrangement, shape, size, and material of the magnetic body configured to sandwich the conductor, it is possible to control ballistic conduction which is mainly quantum conduction. Further, a magnetoresistance effect element having a nonlinear characteristic in a range quantum conductance of 0.01 or more and 0.3 G 0 or less, shown as element resistance, magnetization fixed layer of the magnetoresistive element having an antiferromagnetic layer. By using this configuration, a change in magnetoresistance can be obtained stably, and a read signal can also be obtained stably. In addition, the non-magnetic layer is interposed between at least two ferromagnetic layers, and the two ferromagnetic layers have antiferromagnetic coupling. With this configuration, it is possible to stably fix the magnetization direction of the magnetization fixed layer even if the element is small, so that a change in magnetoresistance can be stably obtained, and a read signal can also be stably obtained. A memory cell can be configured only from the magnetoresistive element using the above-described configuration and an electrode for passing a current necessary for writing or reading, a word line and a bit line joined to the electrode, and the area of the memory cell can be reduced. Since it can be made small, a large-capacity memory can be realized.

また、本発明は少なくとも2つの磁性体と前記磁性体間に挟み込むように形成された少なくとも1つの磁気特性を有する伝導体から構成され、前記磁性体は前記伝導体と物理的に接しており、前記磁気特性を有する伝導体を挟み込むように形成された2つの磁性体の磁化相対角によって抵抗が変化し、かつ量子コンダクタンスが0.01以上かつ0.3G0以下の範囲である非線形特性を有する磁気抵抗効果素子を備え、前記磁気抵抗素子とその磁気手抵抗効果素子に書き込みもしくは読出しに必要な電流を流すための電極、前記電極に接合されるワード線およびビット線のみから構成されるメモリセルにおいて、前記メモリセルを構成する磁気抵抗効果素子に対して一方向のみに電流を流し磁化方向を変え、素子抵抗を変化させることを特徴とする。 Further, the present invention is composed of at least two magnetic bodies and a conductor having at least one magnetic property formed so as to be sandwiched between the magnetic bodies, and the magnetic body is in physical contact with the conductor, A magnetoresistive effect having a non-linear characteristic in which a resistance varies depending on a magnetization relative angle between two magnetic bodies formed so as to sandwich a conductor having the magnetic characteristics, and a quantum conductance is in a range of 0.01 to 0.3 G 0 In a memory cell comprising an element, the magnetoresistive element and an electrode for flowing a current required for writing or reading to the magnetoresistive effect element, a word line joined to the electrode, and a bit line, The magnetoresistive effect element constituting the memory cell is characterized in that a current is passed in only one direction to change the magnetization direction and change the element resistance.

また、本発明は少なくとも2つの磁性体と前記磁性体間に挟み込むように形成された少なくとも1つの磁気特性を有する伝導体から構成され、前記磁性体は前記伝導体と物理的に接しており、前記磁気特性を有する伝導体を挟み込むように形成された2つの磁性体の磁化相対角によって抵抗が変化し、かつ量子コンダクタンスが0.01以上かつ0.3G0以下の範囲である非線形特性を有する磁気抵抗効果素子を備え、前記磁気抵抗素子とその磁気手抵抗効果素子に書き込みもしくは読出しに必要な電流を流すための電極、前記電極に接合されるワード線およびビット線のみから構成されるメモリセルにおいて、前記メモリセルを構成する磁気抵抗効果素子に対して一方向のみに電流を流し磁化方向を変え、素子抵抗を変化させることを特徴とする。更に電流を膜面に対して垂直方向に電流を流す構成にすることにより、メモリセルの面積を小さくできるため大容量メモリを実現できる。 Further, the present invention is composed of at least two magnetic bodies and a conductor having at least one magnetic property formed so as to be sandwiched between the magnetic bodies, and the magnetic body is in physical contact with the conductor, A magnetoresistive effect having a non-linear characteristic in which a resistance varies depending on a magnetization relative angle between two magnetic bodies formed so as to sandwich a conductor having the magnetic characteristics, and a quantum conductance is in a range of 0.01 to 0.3 G 0 In a memory cell comprising an element, the magnetoresistive element and an electrode for flowing a current required for writing or reading to the magnetoresistive effect element, a word line joined to the electrode, and a bit line, The magnetoresistive effect element constituting the memory cell is characterized in that a current is passed in only one direction to change the magnetization direction and change the element resistance. Further, by adopting a configuration in which current flows in a direction perpendicular to the film surface, the area of the memory cell can be reduced, so that a large capacity memory can be realized.

また、本発明はワード線とビット線がマトリックス状に配置され、互いにクロスする位置に前記メモリセルが配置されるクロスポイント構造を有するメモリアレイ構成を有することを特徴とする。これら上記の構成を用いる前記磁気抵抗効果素子と書き込みもしくは読出しに必要な電流を流すための電極、前記電極に接合されるワード線およびビット線のみからメモリセルを構成可能となり、メモリセルの面積を小さくできるため大容量メモリを実現できる。   In addition, the present invention is characterized in that it has a memory array configuration having a cross point structure in which word lines and bit lines are arranged in a matrix and the memory cells are arranged at positions where they cross each other. A memory cell can be configured only from the magnetoresistive element using the above-described configuration and an electrode for passing a current necessary for writing or reading, a word line and a bit line joined to the electrode, and the area of the memory cell can be reduced. Since it can be made small, a large-capacity memory can be realized.

また、本発明のメモリアレイは絶縁層を介して3次元的に積層されていることを特徴とする。これら上記の構成を用いる前記磁気抵抗効果素子と書き込みもしくは読出しに必要な電流を流すための電極、前記電極に接合されるワード線およびビット線のみからメモリセルを構成可能となり、メモリセルの面積を小さくできる。更に前記メモリアレイを絶縁層を介して3次元的に積層することによって大容量メモリを実現できる。   In addition, the memory array of the present invention is characterized in that it is three-dimensionally stacked via an insulating layer. A memory cell can be configured only from the magnetoresistive element using the above-described configuration and an electrode for passing a current necessary for writing or reading, a word line and a bit line joined to the electrode, and the area of the memory cell can be reduced. Can be small. Furthermore, a large-capacity memory can be realized by three-dimensionally stacking the memory array via an insulating layer.

本発明のV-I特性が非対称で非線形を有する磁気抵抗効果素子を用いることで、誤読出しおよび誤書き込み動作を生じさせる回り込み電流を抑制することが可能となるため、前記磁気抵抗効果素子とその磁気抵抗効果素子に電流を流して書き込み、読出しを行うワード線およびビット線のみで構成可能なクロスポイント型のメモリセルを構成できる。更に前記構成によって、メモリセルの面積は小型化できるため高密度メモリを実現できる。   By using a magnetoresistive effect element having a non-linear and non-linear VI characteristic of the present invention, it becomes possible to suppress a sneak current that causes erroneous reading and erroneous writing operations. Therefore, the magnetoresistive effect element and its magnetoresistance A cross-point type memory cell that can be configured by only word lines and bit lines for writing and reading by passing current through the effect element can be configured. Further, with the above configuration, the area of the memory cell can be reduced, so that a high density memory can be realized.

(実施の形態1)
図1は本発明の磁気抵抗効果素子(以下、単に「素子」ということがある)の断面概略図である。素子は、2つの強磁性体1a、1a'とこれらの強磁性体間に挟み込むように形成された磁気特性を有する1つ以上の伝導体3、この伝導体3を包み込むように配置された絶縁層2から構成される。強磁性体1a、1a'は伝導体3と物理的に接しており、磁気特性を有する伝導体3を挟み込むように形成された2つの強磁性体1a、1a'の磁化相対角によって抵抗が変化し、かつ量子コンダクタンスが0.01以上かつ0.3G0以下である磁気抵抗効果素子1である。図2(a)、(b)は磁気特性を有する伝導体3を挟んで配置された2つの強磁性体1a、1a'の磁化相対角によって抵抗変化率がどのように変化するかを示した図である。図2(a)において、磁気特性を有する伝導体3を挟んで2つの強磁性体1a、1a' の磁化方向は平行である。この時、一方の強磁性体1a'から伝導体3を通ってもう一方の強磁性体1aに電流を流すと、2つの強磁性体の1a、1a'の磁化方向は平行なので電子が散乱されることなく通過する。一方、図2(b)において、磁気特性を有する伝導体3を挟んで2つの強磁性体1a、1a' の磁化方向は反平行である。この時、一方の強磁性体1a'から伝導体3を通ってもう一方の強磁性体1aに電流を流すと、2つの強磁性体の1a、1a'の磁化方向は反平行なので電子が散乱される。この結果、2つの強磁性体1a、1a' の磁化方向が平行時、抵抗は低くなり、反平行時、抵抗は大きくなる。磁気抵抗効果素子1の構成は、図1に示される構成に限らず、図3(a)、(b)に示されるように、2つの強磁性体1a、1a' 、1c、1c'と 伝導体3を構成する材料が異なっても良い。図4に本発明の磁気抵抗効果素子1のV-I特性を示す。電圧の印加方向および電流方向は、図2(a)、(b)に示されるように上から下方向が正(+)、下から上方向が負(−)である。図4に示されるV-I特性からも、この磁気抵抗効果素子1は非線形特性を示すと同時に非対称性を有する。非線形特性を示すだけでなく、この非対称性を有することで選択トランジスタやダイオードをセル内に設けなくとも回り込み電流を防止できる。本発明の磁気抵抗効果素子1を構成する磁化自由層6の磁化方向を反転させる方法としては、スピン偏極電子が磁化に与えるトルクによって磁化方向を回転させるスピン注入磁化反転方法を用いる。このスピン注入磁化反転方法を用いて、V−I特性で非対称および非線形性が得られた0.01G0〜0.3G0の範囲の量子コンダクタンスを有する磁気抵抗効果素子1の磁化自由層6の磁化を反転させるために必要とされた電流密度IはI>107A/cm2であった。この電流密度を各々の量子コンダクタンスで必要とされる電流値に換算し、その電流に対応する印加電圧を求めた値を表1に示す。この表からもわかるように、印加電圧(正方向)と印加電圧(負方向)の電圧差は0.1V以上確保できるため、情報の書き込みまたは読出し時に電流を流した場合、回り込み電流を抑制可能であるため、誤読出し、誤書き込みを低減できる。
(Embodiment 1)
FIG. 1 is a schematic cross-sectional view of a magnetoresistive element (hereinafter sometimes simply referred to as “element”) of the present invention. The element comprises two ferromagnets 1a, 1a 'and one or more conductors 3 having magnetic properties formed so as to be sandwiched between the ferromagnets, and an insulation arranged to enclose the conductors 3. Composed of layer 2. The ferromagnets 1a and 1a 'are in physical contact with the conductor 3, and the resistance changes depending on the relative magnetization angle of the two ferromagnets 1a and 1a' formed so as to sandwich the conductor 3 having magnetic properties. and, and quantum conductance is a magnetic resistance effect element 1 is 0.01 or more and 0.3 G 0 or less. 2 (a) and 2 (b) show how the rate of change in resistance changes depending on the relative magnetization angle of the two ferromagnets 1a and 1a 'arranged with the conductor 3 having magnetic properties in between. FIG. In FIG. 2 (a), the magnetization directions of the two ferromagnetic bodies 1a and 1a ′ are parallel to each other with the conductor 3 having magnetic characteristics in between. At this time, when a current is passed from one ferromagnet 1a ′ to the other ferromagnet 1a passing through the conductor 3, electrons are scattered because the magnetization directions of the two ferromagnets 1a and 1a ′ are parallel. Pass without. On the other hand, in FIG. 2B, the magnetization directions of the two ferromagnetic bodies 1a and 1a ′ are antiparallel across the conductor 3 having magnetic characteristics. At this time, when a current is passed from one ferromagnet 1a ′ to the other ferromagnet 1a passing through the conductor 3, the magnetization directions of the two ferromagnets 1a and 1a ′ are antiparallel, so that electrons are scattered. Is done. As a result, when the magnetization directions of the two ferromagnets 1a and 1a ′ are parallel, the resistance is low, and when the magnetization directions are antiparallel, the resistance is high. The configuration of the magnetoresistive effect element 1 is not limited to the configuration shown in FIG. 1, and as shown in FIGS. 3 (a) and 3 (b), the two ferromagnetic bodies 1a, 1a ′, 1c, and 1c ′ are conductive. The material constituting the body 3 may be different. FIG. 4 shows the VI characteristics of the magnetoresistive element 1 of the present invention. As shown in FIGS. 2A and 2B, the voltage application direction and the current direction are positive (+) from the top to the bottom, and negative (−) from the bottom to the top. Also from the VI characteristics shown in FIG. 4, the magnetoresistive effect element 1 exhibits non-linear characteristics and has asymmetry. In addition to exhibiting non-linear characteristics, this asymmetry can prevent a sneak current without providing a selection transistor or diode in the cell. As a method for reversing the magnetization direction of the magnetization free layer 6 constituting the magnetoresistive effect element 1 of the present invention, a spin injection magnetization reversal method is used in which the magnetization direction is rotated by a torque applied to magnetization by spin-polarized electrons. Using this induced magnetization switching method, the magnetization of the magnetization free layer 6 of the magneto-resistance effect element 1 having a quantum conductance ranging from V-I characteristic 0.01G 0 ~0.3G 0 to asymmetry and nonlinearity is obtained by The current density I required for reversal was I> 10 7 A / cm 2 . Table 1 shows values obtained by converting this current density into a current value required for each quantum conductance and obtaining an applied voltage corresponding to the current. As can be seen from this table, the voltage difference between the applied voltage (positive direction) and the applied voltage (negative direction) can be secured to 0.1 V or more, so if a current is passed during writing or reading of information, the sneak current can be suppressed. Therefore, erroneous reading and erroneous writing can be reduced.

Figure 2007305823
Figure 2007305823

メモリセル構造としては、図5に示されるように磁気抵抗効果素子1とワード線、ビット線のみで構成可能となり、セルの小型化が可能となる。なお、磁気抵抗効果素子1を構成する材料としては、電子が伝導する部分がNiを初めとする材料であれば問題ない。   As shown in FIG. 5, the memory cell structure can be configured only by the magnetoresistive effect element 1, the word line, and the bit line, and the size of the cell can be reduced. The material constituting the magnetoresistive element 1 is not a problem as long as the electron conducting portion is a material such as Ni.

次に、本発明の磁気抵抗効果素子1の作製方法を図6(a)〜(c)を用いて説明する。まず、
図6(a)に示すような強磁性層1a'/絶縁層2/強磁性層1aの多層膜をスパッタ装置で成膜する。多層膜をフォトリソグラフィーで素子形状にパターン化し、イオンミリング装置を用いて図6(b)に示すような形状に加工する。図6(b)は基板上に作成された素子を上から見た図である。素子パターンには、次の工程で伝導体3を作製するためにパターン化された素子の一部に突き出し部11を設けている。図6(b)に示されている矢印方向から見た素子の断面図を図6(c)に示す。伝導体3の作製には、Dr.Taoらが発明した原子スケールのポイントコンタクト作製方法である「self-terminated electrochemical method」を用いた(非特許文献6)。この方法は、電気化学法を用いた電気めっきを改良したものであり、簡単な説明図を図6(d)に示す。電源V0、ギャップ抵抗Rgap、そのギャップ電圧Vgap、外部抵抗Rext、その外部抵抗Vextとすると、ギャップ電圧Vgapは数2のように示される。
Next, a method for producing the magnetoresistive effect element 1 of the present invention will be described with reference to FIGS. First,
A multilayer film of ferromagnetic layer 1a ′ / insulating layer 2 / ferromagnetic layer 1a as shown in FIG. 6 (a) is formed by a sputtering apparatus. The multilayer film is patterned into an element shape by photolithography, and processed into a shape as shown in FIG. 6B using an ion milling apparatus. FIG. 6 (b) is a view of the element formed on the substrate as viewed from above. In the element pattern, a protruding portion 11 is provided in a part of the patterned element for producing the conductor 3 in the next step. FIG. 6 (c) shows a cross-sectional view of the element viewed from the direction of the arrow shown in FIG. 6 (b). For the production of the conductor 3, the “self-terminated electrochemical method” which is an atomic scale point contact production method invented by Dr. Tao et al. Was used (Non-patent Document 6). This method is an improvement of electroplating using an electrochemical method, and a simple explanatory diagram is shown in FIG. 6 (d). Power V 0, the gap resistance R GAP, the gap voltage V GAP, external resistor R ext, when its external resistor V ext, gap voltage V GAP is shown as the number 2.

Figure 2007305823
Figure 2007305823

ギャップの幅が広い場合には、ギャップ抵抗Rgapは非常に大きな109以上の抵抗を示し、Rg≫Rextであり、印加電源電圧V0とギャップ電圧Vgapの関係は数3で示される。 When the width of the gap is wide, the gap resistance R gap shows a very large resistance of 10 9 or more, R g >> R ext , and the relationship between the applied power supply voltage V 0 and the gap voltage V gap is expressed by Equation 3. It is.

Figure 2007305823
Figure 2007305823

その時、析出速度は最大である。析出が進み、ギャップの幅が狭まってくるとトンネル電流が流れ出し電圧降下が生じるためギャップ抵抗Rgapは減少し、ギャップ電圧Vgapも減少する。ギャップ抵抗Rgapが外部抵抗Rextに比べて非常に小さく、すなわちRgap<<Rextになるとギャップ電圧Vgap〜0になる。すなわち、外部抵抗Rextに依存してギャップ幅(ポイントコンタクト幅)を制御し作製可能となる。この作成方法を用いて今回はポイントコンタクトの作製を行った。図6(e)に示すように、フォトリソグラフィーで作製した素子に電源をつなぎ、外部抵抗12.7kΩで接合の制御を行った。電解液はpH3.3の硫酸ニッケル水溶液を用い、印加電圧-1.0V一定で作製した。電源に-1.0Vを印加すると徐々にニッケルが析出し、おおよそ数分で接合が完了し、図6(f)に示されるような伝導体3が作製される。今回は、突き出し部11を予め作製しておいて、素子側面に伝導体3を作製したが、絶縁層2にスルーホールなどを空けておいて、そのスルーホール内に同様な電気めっきで伝導体3を作製しても同様な効果が得られる。 At that time, the deposition rate is maximum. As precipitation proceeds and the gap width narrows, a tunnel current flows out and a voltage drop occurs, so that the gap resistance R gap decreases and the gap voltage V gap also decreases. When the gap resistance R gap is very small compared to the external resistance R ext , that is, when R gap << R ext , the gap voltage V gap ˜0. That is, the gap width (point contact width) can be controlled depending on the external resistance R ext . Using this production method, a point contact was produced this time. As shown in FIG. 6 (e), a power source was connected to an element manufactured by photolithography, and the junction was controlled with an external resistance of 12.7 kΩ. The electrolytic solution was a nickel sulfate aqueous solution with a pH of 3.3, and was prepared at a constant applied voltage of -1.0V. When -1.0 V is applied to the power source, nickel gradually precipitates, and the joining is completed in about several minutes, and the conductor 3 as shown in FIG. 6 (f) is manufactured. This time, the protruding part 11 was prepared in advance, and the conductor 3 was prepared on the side of the element. However, a through hole was made in the insulating layer 2, and the conductor was formed in the through hole by the same electroplating. The same effect can be obtained even if 3 is manufactured.

(実施の形態2)
図7(a)は本発明のメモリセルを構成する磁気抵抗効果素子1を示す図である。磁気抵抗効果素子1において、磁化固定層7はNiをはじめとする金属材料1a'と反強磁性材料5から構成される。磁化自由層6を構成する軟磁性材料4は、少なくともFe、Co、Niを含む軟磁性材料が好ましい。また、反強磁性材料5としては IrMn(イリジュ−ム・マンガン)などの低抵抗の金属反強磁性材料が好ましい。図7(a)に示す磁化固定層7に反強磁性体5を用いる構成にすることによって、磁化固定層7は熱などの外乱に対しても磁化方向を安定に固定可能となる。一方、磁化自由層6は、非磁性層8を介して2つの軟磁性層4、4'から構成され、2つの軟磁性層4、4'は磁化方向が反平行に配置かつ磁気的な結合を有していることを特徴とする。なお、磁化固定層7を反強磁性体の代わりに反強磁性結合を有する多層構造を用いた場合の磁気抵抗効果素子1の構成を図7(b)、(c)に示す。磁化固定層7としては、図7(b)に示されるように非磁性層8を介して少なくとも2つの強磁性層1a'から構成され、2つの強磁性層1a'は反強磁性結合を有していること徴とする。この反強磁性結合を有する多層構造にすることで、サイズが小さくなっても磁化固定層7を安定に保持することが可能となり、メモリセルの小型化を実現できる。さらに、磁化固定層7としては、図7(c)に示されるように強磁性層1a'の多層構造にするのではなく、強磁性層1a'とは別の強磁性層9、9'を多層構造にすることで更に磁化固定層の安定性を向上させ、メモリセルの小型化を実現できる。
(Embodiment 2)
FIG. 7 (a) is a diagram showing the magnetoresistive element 1 constituting the memory cell of the present invention. In the magnetoresistive effect element 1, the magnetization fixed layer 7 is composed of a metal material 1a ′ including Ni and an antiferromagnetic material 5. The soft magnetic material 4 constituting the magnetization free layer 6 is preferably a soft magnetic material containing at least Fe, Co, and Ni. The antiferromagnetic material 5 is preferably a low resistance metal antiferromagnetic material such as IrMn (iridium manganese). By using the antiferromagnetic material 5 for the magnetization fixed layer 7 shown in FIG. 7 (a), the magnetization fixed layer 7 can stably fix the magnetization direction against disturbances such as heat. On the other hand, the magnetization free layer 6 is composed of two soft magnetic layers 4 and 4 ′ with a nonmagnetic layer 8 interposed therebetween, and the two soft magnetic layers 4 and 4 ′ are arranged in anti-parallel directions and magnetically coupled. It is characterized by having. FIGS. 7B and 7C show the configuration of the magnetoresistive effect element 1 when the magnetization fixed layer 7 uses a multilayer structure having antiferromagnetic coupling instead of an antiferromagnetic material. As shown in FIG. 7B, the magnetization fixed layer 7 is composed of at least two ferromagnetic layers 1a ′ via a nonmagnetic layer 8, and the two ferromagnetic layers 1a ′ have antiferromagnetic coupling. It is a sign that you are doing. With this multilayer structure having antiferromagnetic coupling, the magnetization fixed layer 7 can be stably held even when the size is reduced, and the memory cell can be downsized. Further, as the magnetization fixed layer 7, as shown in FIG. 7 (c), the ferromagnetic layer 1a ′ is not a multilayer structure, but the ferromagnetic layers 9 and 9 ′ different from the ferromagnetic layer 1a ′ are used. The multi-layer structure can further improve the stability of the magnetization fixed layer and reduce the size of the memory cell.

(実施の形態3)
図8(a)、(b)、(c)は、本発明の磁気抵抗効果素子1の駆動方法を説明する図である。駆動方法としては、スピン偏極された電子のトルク効果により磁化を回転させるスピン注入磁化反転方法を用いる。図8(a) 、(b)、(c)において実線矢印は電流方向を示す。一方、点線矢印は電子の流れる方向を示す。電流方向は図8(a)、(b)、(c)において、図面の上から下方向を正(+)とし、電子については下から上へ移動する。この時、磁化固定層7の磁化方向と同じ向きのスピンをもつ電子をe-↑、磁化固定層7と逆向きのスピンをもつ電子をe-↓とする。
(Embodiment 3)
FIGS. 8A, 8B, and 8C are diagrams for explaining a method of driving the magnetoresistive effect element 1 of the present invention. As a driving method, a spin injection magnetization reversal method is used in which magnetization is rotated by the torque effect of spin-polarized electrons. In FIGS. 8 (a), (b), and (c), solid arrows indicate the current direction. On the other hand, the dotted arrow indicates the direction in which electrons flow. In FIGS. 8 (a), (b), and (c), the current direction is positive (+) from the top to the bottom of the drawing, and electrons move from bottom to top. At this time, an electron having a spin in the same direction as the magnetization direction of the magnetization fixed layer 7 is e- ↑, and an electron having a spin in the opposite direction to the magnetization fixed layer 7 is e- ↓.

図8(a)の構成において電流が上から下へ流れる(電子は下から上へ移動する)場合、磁化固定層7と同じ向きのスピンをもつ電子e-↑が伝導体3を通過し、磁化自由層6の一方の軟磁性層4'に対しトルクを与え、電流がある特定の臨界値を超えると磁化方向を磁化固定層7と同方向へ反転させる。磁化自由層6のもう一方の軟磁性層4は非磁性層8を介して軟磁性層4'と磁気的に弱い反強磁性結合しているため、軟磁性層4'が反転するともう一方の軟磁性層4も反転する。また、強磁性層1aも軟磁性層4に磁気的に誘導され軟磁性層4と同じ方向に反転し図8(b)に示すように変わる。図8(b)の状態において、もう一度同じ方向に電流を流すと磁化固定層7と同じ向きのスピンをもつ電子e-↑が伝導体3を通過し、磁化自由層6の一方の軟磁性層4と強磁性層1aに対しトルクを与え、電流がある特定の臨界値を超えると磁化方向を磁化固定層7と同方向へ反転させる。軟磁性層4は非磁性層8を介して軟磁性層4'と磁気的に弱い反強磁性結合しているため、軟磁性層4が反転するともう一方の軟磁性層4'も反転し図8(c)に示されるように磁化が反転する。以上の磁気抵抗効果素子の構成を用いることで、一方向のみの電流で駆動可能な不揮発メモリを実現できる。   In the configuration of FIG. 8 (a), when current flows from top to bottom (electrons move from bottom to top), an electron e- ↑ having a spin in the same direction as the magnetization fixed layer 7 passes through the conductor 3, Torque is applied to one soft magnetic layer 4 ′ of the magnetization free layer 6, and when the current exceeds a certain critical value, the magnetization direction is reversed in the same direction as the magnetization fixed layer 7. Since the other soft magnetic layer 4 of the magnetization free layer 6 is magnetically weakly antiferromagnetically coupled to the soft magnetic layer 4 ′ via the nonmagnetic layer 8, when the soft magnetic layer 4 ′ is reversed, the other soft magnetic layer 4 ′ The soft magnetic layer 4 is also reversed. Further, the ferromagnetic layer 1a is also magnetically induced in the soft magnetic layer 4 and reversed in the same direction as the soft magnetic layer 4, and changes as shown in FIG. 8 (b). In the state shown in FIG. 8 (b), when a current is passed again in the same direction, an electron e- ↑ having a spin in the same direction as the magnetization fixed layer 7 passes through the conductor 3, and one soft magnetic layer of the magnetization free layer 6 Torque is applied to 4 and the ferromagnetic layer 1a, and when the current exceeds a certain critical value, the magnetization direction is reversed in the same direction as the magnetization fixed layer 7. Since the soft magnetic layer 4 is magnetically weakly antiferromagnetically coupled to the soft magnetic layer 4 ′ via the nonmagnetic layer 8, when the soft magnetic layer 4 is inverted, the other soft magnetic layer 4 ′ is also inverted. As shown in 8 (c), the magnetization is reversed. By using the configuration of the magnetoresistive effect element described above, a nonvolatile memory that can be driven with a current in only one direction can be realized.

(実施の形態4)
図9(a)、(b)、(c)は、本発明の磁気抵抗効果素子1の駆動方法を説明する図である。駆動方法としては、実施の形態3と同様にスピン偏極された電子のトルク効果により磁化を回転させるスピン注入磁化反転方法を用いる。図9(a) 、(b)、(c)において実践矢印は電流方向を示す。一方、点線矢印は電子の流れる方向を示す。電流方向は図9(a)、(b)、(c)において、実施の形態3と同様に図面の上から下方向を正(+)とし、電子については下から上へ移動する。磁化固定層7の磁化方向と同じ向きのスピンをもつ電子をe-↑、磁化固定層7と逆向きのスピンをもつ電子をe-↓とする。実施例3と異なる点は、電流の方向と伝導体3のポイントコンタクトの接合方向である。
(Embodiment 4)
FIGS. 9 (a), (b), and (c) are diagrams for explaining a method of driving the magnetoresistive effect element 1 of the present invention. As a driving method, a spin-injection magnetization reversal method is used in which magnetization is rotated by the torque effect of spin-polarized electrons as in the third embodiment. In FIG. 9 (a), (b), and (c), the practice arrow indicates the current direction. On the other hand, the dotted arrow indicates the direction in which electrons flow. In FIGS. 9A, 9B and 9C, the current direction is positive (+) from the top to the bottom in the same manner as in the third embodiment, and electrons move from the bottom to the top. An electron having a spin in the same direction as the magnetization direction of the magnetization fixed layer 7 is denoted by e- ↑, and an electron having a spin opposite to the magnetization fixed layer 7 is denoted by e- ↓. The difference from the third embodiment is the direction of current and the junction direction of the point contact of the conductor 3.

図9(a)の構成において電流が下から上へ流れる(電子は上から下へ移動する)場合、磁化自由層6から流れ込む電子のうち、磁化固定層7と同じ向きのスピンをもつ電子e-↑は伝導体3を通過できるが、磁化固定層7と逆向きのスピンをもつ電子e-↓は伝導体3と磁化固定層7の強磁性層1a'の界面で反射される。この反射された電子電子e-↓が磁化自由層6の強磁性層1aおよび軟磁性層4の磁化と結合して、強磁性層1aおよび軟磁性層4の磁化が磁化固定層7の磁化と反平行になる。その結果、図9(b)で示される状態に変わる。図9(b)の状態において、もう一度同じ方向に電流を流すと磁化固定層7と同じ向きのスピンをもつ電子e-↑は伝導体3を通過できるが、磁化固定層7と逆向きのスピンをもつ電子e-↓は、磁化自由層6の軟磁性体4と非磁性層8の界面で反射される。この反射された電子電子e-↓が磁化自由層6の軟磁性層4'の磁化と結合して、軟磁性層4'の磁化が磁化固定層7の磁化と反平行になる。軟磁性層4'は非磁性層8を介して軟磁性層4と磁気的に弱い反強磁性結合しているため、軟磁性層4'が反転するともう一方の軟磁性層4も反転し図9(c)に示されるように磁化が反転する。以上の磁気抵抗効果素子の構成を用いることで、一方向のみの電流で駆動可能な不揮発メモリを実現できる。   In the configuration of FIG. 9 (a), when the current flows from bottom to top (electrons move from top to bottom), among the electrons flowing from the magnetization free layer 6, electrons having the spin in the same direction as the magnetization fixed layer 7e -↑ can pass through the conductor 3, but electrons e- ↓ having a spin opposite to that of the magnetization fixed layer 7 are reflected at the interface between the conductor 3 and the ferromagnetic layer 1a 'of the magnetization fixed layer 7. This reflected electron electron e- ↓ is combined with the magnetization of the ferromagnetic layer 1a and the soft magnetic layer 4 of the magnetization free layer 6, and the magnetization of the ferromagnetic layer 1a and the soft magnetic layer 4 is changed to the magnetization of the magnetization fixed layer 7. Antiparallel. As a result, the state changes to that shown in FIG. 9 (b). In the state shown in FIG. 9 (b), when a current is passed again in the same direction, an electron e- ↑ having a spin in the same direction as the magnetization fixed layer 7 can pass through the conductor 3, but a spin in the opposite direction to the magnetization fixed layer 7 The electron e- ↓ having is reflected at the interface between the soft magnetic body 4 and the nonmagnetic layer 8 of the magnetization free layer 6. The reflected electron electrons e− ↓ are combined with the magnetization of the soft magnetic layer 4 ′ of the magnetization free layer 6 so that the magnetization of the soft magnetic layer 4 ′ is antiparallel to the magnetization of the magnetization fixed layer 7. Since the soft magnetic layer 4 ′ is magnetically weakly antiferromagnetically coupled to the soft magnetic layer 4 via the nonmagnetic layer 8, when the soft magnetic layer 4 ′ is inverted, the other soft magnetic layer 4 is also inverted. The magnetization is reversed as shown in 9 (c). By using the configuration of the magnetoresistive effect element described above, a nonvolatile memory that can be driven with a current in only one direction can be realized.

なお、1方向の電流で駆動可能な磁気抵抗効果素子1の構成(伝導体3のポイントコンタクトの接合方向)と電流方向の組み合わせは実施の形態3、実施の形態4の他に図8(a)、(b)、(c)の磁気抵抗効果素子1の構成で電流方向が反対の組み合わせと、図9(a)、(b)、(c)の磁気抵抗効果素子1の構成で電流方向が反対の組み合わせの2通りがある。これら残りの2通りは一方向の電流で駆動可能であるが、しかし、図8、図9に示される構成と比べて磁化を反転させるために必要な電流密度が高く、また非線形特性を有するものの図4に示されるような非対称性の効果が小さいため回り込み電流を抑制することができないことがわかった。従って、図8および図9の磁気抵抗効果素子1の素子構成と電流方向の組み合わせが望ましい。   The combination of the configuration of the magnetoresistive effect element 1 that can be driven by a current in one direction (the junction direction of the point contact of the conductor 3) and the current direction is shown in FIG. 8 (a) in addition to the third and fourth embodiments. ), (B), and (c) in the configuration of the magnetoresistive effect element 1, and the current direction in the configurations of the magnetoresistive effect element 1 in FIGS. 9 (a), (b), and (c) There are two combinations of the opposite. These remaining two types can be driven with a current in one direction, but the current density required for reversing the magnetization is higher than that shown in FIGS. 8 and 9, and it has non-linear characteristics. It was found that the sneak current cannot be suppressed because the asymmetry effect as shown in FIG. 4 is small. Therefore, a combination of the element configuration and the current direction of the magnetoresistive effect element 1 of FIGS. 8 and 9 is desirable.

(実施の形態5)
図10は、本発明の磁気抵抗効果素子1を有するメモリセルを3×3のマトリックス状に配置した場合の構成を示す。図10に示されるように、ワード線とビット線がマトリックス状に配置され、互いにクロスする位置に磁気抵抗効果素子1のみが配置されるクロスポイント構造を有する。また、本発明のメモリセルは磁気抵抗効果素子1が図4に示すV−I特性において非対称性と非線形性を有する。その結果、クロスポイント型のMRAMで生じていた読み出し時あるいは書き込み時に回り込み電流を抑制でき、誤読出し、誤書き込みの低減を実現できる。また、選択トランジスタやダイオードをセル内に配置しなくてもよいため、セル面積の小型化も含めて実現できる。
(Embodiment 5)
FIG. 10 shows a configuration in the case where memory cells having the magnetoresistive effect element 1 of the present invention are arranged in a 3 × 3 matrix. As shown in FIG. 10, the word lines and the bit lines are arranged in a matrix and have a cross point structure in which only the magnetoresistive effect element 1 is arranged at a position where they cross each other. In the memory cell of the present invention, the magnetoresistive element 1 has asymmetry and nonlinearity in the VI characteristic shown in FIG. As a result, a sneak current at the time of reading or writing that has occurred in the cross-point type MRAM can be suppressed, and reduction of erroneous reading and erroneous writing can be realized. Further, since the selection transistor and the diode need not be arranged in the cell, it can be realized including the reduction of the cell area.

また、本発明のメモリセルを用いたメモリは、駆動方法としてスピン偏極電子を用いたスピン注入磁化反転方法を用いる。実施の形態4で示した図8および図9の磁気抵抗効果素子1の素子構成と電流を流す方向の組み合わせを適正にすることで1方向の電流によって磁化の方向を反転できることを見出した。その結果、駆動電源も多種類の電源を用いる必要が無く、非常に単純な駆動回路で構成できる。   Further, a memory using the memory cell of the present invention uses a spin injection magnetization reversal method using spin-polarized electrons as a driving method. It has been found that the direction of magnetization can be reversed by a current in one direction by optimizing the combination of the element configuration of the magnetoresistive effect element 1 in FIG. 8 and FIG. As a result, it is not necessary to use a variety of power sources for the driving power source, and the driving power source can be configured with a very simple driving circuit.

以上の結果、誤読出し、誤書き込みの少ないクロスポイント型の不揮発メモリであって、磁気抵抗効果素子1に対して1方向のみの電流で書き換え可能なメモリを実現できる。
なお、上記クロスポイント型のメモリアレイ構成を絶縁層を介して積層することによって、3次元メモリを実現できることは明らかである。
As a result, it is possible to realize a cross-point type nonvolatile memory that is less likely to be erroneously read or erroneously written and that can be rewritten with respect to the magnetoresistive effect element 1 by a current only in one direction.
It is obvious that a three-dimensional memory can be realized by stacking the cross-point type memory array configuration via an insulating layer.

本発明にかかるメモリ素子およびその駆動方法は、情報通信端末などに使用される磁気ランダム・アクセスメモリなどに代表される磁気固体メモリとして有用である。   The memory element and the driving method thereof according to the present invention are useful as a magnetic solid state memory represented by a magnetic random access memory used for an information communication terminal or the like.

本発明の磁気抵抗効果素子の構成を示す図The figure which shows the structure of the magnetoresistive effect element of this invention 本発明の磁気抵抗効果素子を構成する強磁性層の磁化相対角による抵抗変化を表す図The figure showing the resistance change by the magnetization relative angle of the ferromagnetic layer which comprises the magnetoresistive effect element of this invention 本発明の磁気抵抗効果素子の構成を示す図The figure which shows the structure of the magnetoresistive effect element of this invention 本発明の磁気抵抗効果素子のV-I特性を示す図The figure which shows the VI characteristic of the magnetoresistive effect element of this invention 本発明の磁気抵抗効果素子の結晶磁気異方性を示す図The figure which shows the magnetocrystalline anisotropy of the magnetoresistive effect element of this invention 本発明の磁気抵抗効果素子の作製方法を示す図The figure which shows the preparation methods of the magnetoresistive effect element of this invention 本発明の磁気抵抗効果素子の構成を示す図The figure which shows the structure of the magnetoresistive effect element of this invention 本発明の磁気抵抗効果素子の駆動原理を示す図The figure which shows the drive principle of the magnetoresistive effect element of this invention 本発明の磁気抵抗効果素子の駆動原理を示す図The figure which shows the drive principle of the magnetoresistive effect element of this invention 本発明のメモリのメモリアレイと駆動電流を示す図The figure which shows the memory array and drive current of the memory of this invention 従来のメモリのメモリアレイの駆動電流および回り込み電流を示す図The figure which shows the drive current and sneak current of the memory array of the conventional memory 従来のメモリセル構造を示す図A diagram showing a conventional memory cell structure

符号の説明Explanation of symbols

1 磁気抵抗効果素子
1a、1a' 、1c、1c' 強磁性層
2 絶縁層
3、3' 伝導体
4 軟磁性層
5 反強磁性層
6 自由層
7 固定層
8 非磁性層
9、9' 強磁性層
10 基板
11 突き出し部
12、12a、12b、12c 磁気抵抗効果素子
DESCRIPTION OF SYMBOLS 1 Magnetoresistance effect element 1a, 1a ', 1c, 1c' Ferromagnetic layer 2 Insulating layer 3, 3 'Conductor 4 Soft magnetic layer 5 Antiferromagnetic layer 6 Free layer 7 Fixed layer 8 Nonmagnetic layer 9, 9' Strong Magnetic layer 10 Substrate 11 Protruding portions 12, 12a, 12b, 12c Magnetoresistive effect element

Claims (11)

少なくとも2つの磁性体と前記磁性体間に挟み込むように形成された少なくとも1つの磁気特性を有する伝導体から構成され、前記磁性体の1つは前記伝導体と物理的に面で接しており、前記磁性体のもう1つは前記伝導体と物理的に点で接し、抵抗変化の量子コンダクタンスが0.01以上かつ0.3G0以下である磁気抵抗効果素子を備え、前記磁気抵抗素子とその磁気抵抗効果素子に書き込みもしくは読出しに必要な電流を流すための電極、前記電極に接合されるワード線およびビット線のみから構成されることを特徴とするメモリセル。 It is composed of at least two magnetic bodies and a conductor having at least one magnetic property formed so as to be sandwiched between the magnetic bodies, and one of the magnetic bodies is in physical contact with the conductor, wherein another of the magnetic material is in contact with the conductor and physically point, quantum conductance of the variable resistance comprises a magnetoresistive element is 0.01 or more and 0.3 G 0 or less, the magnetoresistive element and its magnetoresistance effect A memory cell comprising only an electrode for supplying a current necessary for writing or reading to an element, a word line and a bit line joined to the electrode. 前記メモリセルを構成する前記磁気抵抗効果素子は、非線形特性を有することを特徴とする請求項1記載のメモリセル。 2. The memory cell according to claim 1, wherein the magnetoresistive effect element constituting the memory cell has nonlinear characteristics. 前記メモリセルを構成する前記磁気抵抗効果素子は、金属材料から構成されることを特徴とする請求項1〜2記載のメモリセル。 3. The memory cell according to claim 1, wherein the magnetoresistive effect element constituting the memory cell is made of a metal material. 前記磁気抵抗効果素子の磁化自由層は非磁性層を介して少なくとも2つの強磁性層から構成され、前記2つの強磁性層の磁化方向が反平行に配置かつ磁気的な結合を有していることを特徴とする請求項1〜3記載のメモリセル。 The magnetization free layer of the magnetoresistive effect element is composed of at least two ferromagnetic layers via a nonmagnetic layer, and the magnetization directions of the two ferromagnetic layers are arranged in antiparallel and have magnetic coupling. 4. The memory cell according to claim 1, wherein: 前記磁気抵抗効果素子の磁化自由層は非磁性層を介して少なくとも2つの強磁性層から構成され、前記強磁性層の厚みが異なることを特徴とする請求項4記載のメモリセル。 5. The memory cell according to claim 4, wherein the magnetization free layer of the magnetoresistive effect element is composed of at least two ferromagnetic layers with a nonmagnetic layer interposed therebetween, and the thicknesses of the ferromagnetic layers are different. 前記磁気抵抗効果素子の磁化固定層は反強磁性層を有していることを特徴とする請求項1〜5記載のメモリセル。 6. The memory cell according to claim 1, wherein the magnetization fixed layer of the magnetoresistive effect element has an antiferromagnetic layer. 前記磁気抵抗効果素子の磁化固定層は非磁性層を介して少なくとも2つの強磁性層から構成され、前記2つの強磁性層は反強磁性結合を有していること徴とする請求項1〜5記載のメモリセル。 The magnetization fixed layer of the magnetoresistive effect element is composed of at least two ferromagnetic layers via a nonmagnetic layer, and the two ferromagnetic layers have antiferromagnetic coupling. 5. The memory cell according to 5. 少なくとも2つの磁性体と前記磁性体間に挟み込むように形成された少なくとも1つの磁気特性を有する伝導体から構成され、前記磁性体は前記伝導体と物理的に接しており、前記磁気特性を有する伝導体を挟み込むように形成された2つの磁性体の磁化相対角によって抵抗が変化し、かつ量子コンダクタンスが0.01以上かつ0.3G0以下である磁気抵抗効果素子を備え、前記磁気抵抗素子とその磁気抵抗効果素子に書き込みもしくは読出しに必要な電流を流すための電極、前記電極に接合されるワード線およびビット線のみから構成されるメモリセルにおいて、前記メモリセルを構成する磁気抵抗効果素子に対して一方向のみに電流を流し磁化方向を変え、素子抵抗を変化させることを特徴とする請求項1〜7記載のメモリセルの駆動方法。 It is composed of at least two magnetic bodies and a conductor having at least one magnetic characteristic formed so as to be sandwiched between the magnetic bodies, and the magnetic body is in physical contact with the conductor and has the magnetic characteristics. A magnetoresistive effect element having a resistance that varies depending on a magnetization relative angle between two magnetic bodies formed so as to sandwich a conductor, and a quantum conductance of 0.01 or more and 0.3 G 0 or less; In a memory cell including only an electrode for passing a current necessary for writing or reading to the resistive element, and a word line and a bit line joined to the electrode, the magnetoresistive element constituting the memory cell 8. The method of driving a memory cell according to claim 1, wherein the element resistance is changed by flowing a current only in one direction to change the magnetization direction. 前記メモリセルを構成する磁気抵抗効果素子の膜面に対して垂直方向に電流を流すことを特徴とする請求項8記載のメモリセルの駆動方法。 9. The method of driving a memory cell according to claim 8, wherein a current is caused to flow in a direction perpendicular to the film surface of the magnetoresistive effect element constituting the memory cell. 前記ワード線とビット線がマトリックス状に配置され、互いにクロスする位置に前記メモリセルが配置されるクロスポイント構造を有することを特徴とする請求項1〜9記載のメモリ。 10. The memory according to claim 1, wherein said memory device has a cross point structure in which said word lines and bit lines are arranged in a matrix and said memory cells are arranged at positions crossing each other. 前記メモリアレイは絶縁層を介して3次元的に積層されていることを特徴とする請求項10記載のメモリ。 11. The memory according to claim 10, wherein the memory array is three-dimensionally stacked via an insulating layer.
JP2006133297A 2006-05-12 2006-05-12 Memory using magnetoresistance effect element and its driving method Pending JP2007305823A (en)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10652661B2 (en) 2008-06-27 2020-05-12 Snik, LLC Headset cord holder
US10951968B2 (en) 2016-04-19 2021-03-16 Snik Llc Magnetic earphones holder

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10652661B2 (en) 2008-06-27 2020-05-12 Snik, LLC Headset cord holder
US10951968B2 (en) 2016-04-19 2021-03-16 Snik Llc Magnetic earphones holder

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