JP2007300389A - Image encoding apparatus and image encoding program - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To reduce an operation quantity in the variable length encoding of a factor, and to achieve a high speed an encoding processing in image encoding processing. <P>SOLUTION: A code variable calculator 52 calculates a code variable for specifying an arrangement of a zero factor and a non-zero factor based on whether each factor in a factor row generated in a zigzag scanner 51 is zero or non-zero. A first encoder 54a, a second encoder 54b, ..., and a n-th encoder 54n of an encoder 54 conduct the encoding processing of each individual according to the code variable. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to a high-efficiency image encoding apparatus and image encoding program for encoding with a smaller code amount in order to efficiently transmit a moving image.

  In a conventional image encoding device, coefficients generated by orthogonal transform quantization of residual components between a predicted image and an original image are variable-length encoded based on a syntax determined by a standard.

  If the size of the luminance component block is 16 × 16 pixels, the size of the color difference component block is 8 × 8 pixels, and the orthogonal transformation of the coefficients is performed in units of 4 × 4, the number of coefficients is 384 in total. It becomes a piece. This is divided into 4 × 4, that is, 16 pieces, and variable length coding is performed.

  For example, H.M. In the encoding of H.264 / MPEG-4 AVC (hereinafter referred to as H.264 / AVC), the 16 coefficients are first rearranged from high frequency components in zigzag scan order, and then the first non-zero coefficient is searched for. It is necessary to sequentially determine whether zero coefficient values, the number of zero coefficients are arranged, and whether the absolute value of non-zero coefficients is 1, and perform variable-length coding.

  Therefore, in variable-length coding processing of coefficients, there are many conditional judgment statements for examining how non-zero coefficients and zero coefficients are distributed, and a large amount of calculation is required when implemented in a DSP or the like. And

  In addition, as the non-zero coefficient increases, the amount of calculation increases. In general, more non-zero coefficients are distributed in the case of intra coding compared to inter coding. Also, increasing the bit rate increases the number of non-zero coefficients. Further, H.C. There are many table references for conversion to codes defined by the H.264 / AVC syntax, which is also a load at the time of mounting.

  As a conventional image encoding device, for example, a device described in Patent Document 1 has been reported. In this image encoding device, the number of nonzero coefficients is obtained from the distribution of nonzero coefficients and zero coefficients for the coefficient sequence rearranged by zigzag scanning, and the number of zero runs and the level value are combined and stored in the memory. The encoding is performed by referring to the VLC table from the combined value.

  Here, the variable-length encoding process in the conventional image encoding device will be described. Here, 16 coefficients obtained by orthogonal transform in units of 4 × 4 pixels are represented by H.264. The case of variable length coding according to the H.264 / AVC standard will be described.

  FIG. 17 is a flowchart for explaining variable-length coding processing in a conventional image coding apparatus. First, the 4 × 4 block coefficients shown in FIG. 18A are rearranged in the zigzag scan order shown in FIG. 18B (step S10). FIG. 19A shows a coefficient sequence before zigzag scanning, and FIG. 19B shows a coefficient sequence after zigzag scanning.

Then, each coefficient C ₀₀ ′ to C ₁₅ ′ is determined (step S20). The loop of one coefficient will be described. First, it is determined whether the coefficient is a non-zero coefficient or a zero coefficient (step S30). If the coefficient is not a zero coefficient (step S30: NO), the coefficient value (level) of the non-zero coefficient is determined. Value) is recorded (step S60). Then, the number of non-zero coefficients is updated (step S70), and the loop is terminated (step S80).

  Also, encoding requires a continuous number of zero coefficients (zero run number) following non-zero coefficients. For this reason, when the coefficient is a zero coefficient (step S30: YES), it is determined whether there is a non-zero coefficient before the coefficient (step S40), and there is a non-zero coefficient (step S40: YES). In this case, the zero run number is updated and recorded (step S50). If there is no non-zero coefficient (step S40: NO), the loop is terminated (step S80).

  After this loop is completed for 16 coefficients, the number of first consecutive coefficient of absolute value 1 (number of leading 1) of non-zero coefficients is encoded and output together with the sign of those coefficients (step S90). .

  The level value recorded in step S60, the number of zero runs recorded in step S50, and the number of zero coefficients after the first non-zero coefficient (zero number) are encoded and output according to the standard (steps S100 to S120).

  FIG. 19C is a diagram showing an example of a coefficient sequence, FIG. 19D is a table showing the number of zero runs and level values, and the number of combinations of zero run numbers and level values in the coefficient sequence shown in FIG. It is.

  In the coefficient sequence shown in FIG. 19C, since there are three non-zero coefficients, three level values and the number of zero runs are recorded in steps S50 and S60. Then, when the zero run number is encoded and output in S110, the prescribed table is referred to by the zero run number, and the prescribed encoded code is output in the table with the prescribed code length.

Similarly, in steps S90 and S120, a prescribed table is referred to by the number of leading ones and the number of zeros, respectively, and a prescribed encoded code is output in the table with a prescribed code length.
JP 2001-308715 A

  In the variable length encoding process described above, the condition determination statements are frequently used in the processes of steps S30 and S40, so that there is a problem that the amount of calculation increases when implemented in a DSP or the like.

  In addition, after acquiring data such as the number of zero runs from the coefficient sequence and storing it in another memory, in order to load these data during the processing of steps S90 to S120, an access operation to the memory is performed at the time of mounting. Many occur.

  Furthermore, in the processing of steps S90, S110, and S120, since the table to be referred to is switched each time, there is a problem that many access operations to the table occur and the processing takes time.

  The present invention has been made in view of the above, and an object of the present invention is to provide an image encoding device and an image encoding program capable of reducing the amount of calculation in coefficient variable length encoding and speeding up the encoding process. And

  The image coding apparatus according to the present invention is an image coding apparatus that divides an image into blocks and performs coding processing. A coefficient generated by orthogonal transform quantization of a residual component between a predicted image and an original image is a high frequency signal. Based on coefficient sequence generating means for generating a coefficient sequence by rearranging components in zigzag scan order, and whether each coefficient in the coefficient sequence generated by the coefficient sequence generating means is a zero coefficient or a non-zero coefficient, A code variable calculating means for calculating a code variable for specifying an arrangement of the zero coefficient and the non-zero coefficient; a zero-run number indicating a continuous number of zero coefficients following the non-zero coefficient of the coefficient string; and Encoding means for variable-length encoding a zero number indicating the number of zero coefficients after the first non-zero coefficient using an encoding code set in advance corresponding to the code variable and its code length; Preparation And wherein the Rukoto.

  In addition, the image encoding device of the present invention is a coefficient generated by orthogonal transform quantization of the residual component between the predicted image and the original image in an image encoding device that performs encoding processing by dividing an image into blocks. The coefficient sequence generating means for rearranging the high-frequency components in zigzag scan order to generate a coefficient sequence, and dividing the coefficient sequence generated by the coefficient sequence generating means into a plurality of divided coefficient sequences, for each of these divided coefficient sequences, Based on whether each coefficient is a zero coefficient or a non-zero coefficient, a code variable calculation means for calculating a code variable for specifying the arrangement of the zero coefficient and the non-zero coefficient, and for each of the division coefficient sequences A zero-run number indicating the number of consecutive zero coefficients following the non-zero coefficient of the division coefficient sequence and a zero number indicating the number of zero coefficients after the first non-zero coefficient of the division coefficient sequence correspond to the code variable. In advance Encoding means for generating encoded data by variable length encoding using the encoded code and its code length, and the codes for all the division coefficient sequences generated by the encoding means means And integrating means for integrating the digitized data.

  The image coding program of the present invention is a coefficient generated by orthogonal transform quantization of the residual component between the predicted image and the original image in an image coding program that performs coding processing by dividing the image into blocks. Reordering the high-frequency components in zigzag scan order to generate a coefficient sequence, and whether each coefficient in the coefficient sequence generated by the coefficient sequence generation means is a zero coefficient or a non-zero coefficient, Calculating a code variable for specifying a zero coefficient and the arrangement of the non-zero coefficient; a zero-run number indicating a continuous number of zero coefficients following the non-zero coefficient of the coefficient string; and a first non-zero of the coefficient string A step of performing variable length encoding on the number of zeros indicating the number of zero coefficients after the coefficient using a predetermined encoding code corresponding to the code variable and its code length. Characterized in that to execute the computer.

  The image coding program of the present invention is a coefficient generated by orthogonal transform quantization of the residual component between the predicted image and the original image in an image coding program that performs coding processing by dividing the image into blocks. Generating a coefficient sequence by rearranging the high-frequency components in a zigzag scan order, and dividing the coefficient sequence generated by the coefficient sequence generation means into a plurality of divided coefficient sequences, and for each of the divided coefficient sequences, each coefficient is Calculating a code variable for specifying an arrangement of the zero coefficient and the non-zero coefficient based on whether the coefficient is a zero coefficient or a non-zero coefficient; A zero run number indicating the number of consecutive zero coefficients following the non-zero coefficient and a zero number indicating the number of zero coefficients after the first non-zero coefficient of the division coefficient sequence are set in advance corresponding to the code variable. Generating encoded data by variable-length encoding using the encoded code and its code length, and the encoded data for all the divided coefficient sequences generated by the encoding means means The step of integrating is executed by a computer.

  According to the present invention, the code variable for specifying the arrangement of the zero coefficient and the non-zero coefficient of the coefficient to be encoded is calculated, and individual variable length encoding processing is performed according to the code variable. Reduces the amount of computation required for conditional judgment statements in zero / zero judgment and memory access required for table lookup during encoding, reduces the amount of computation required for variable-length coding of coefficients, and speeds up encoding processing Can be

  The best mode for carrying out the present invention will be described below with reference to the drawings.

(First embodiment)
FIG. 1 is a block diagram showing a configuration of an image coding apparatus according to the first embodiment of the present invention. As shown in FIG. 1, the image coding apparatus according to the first embodiment includes a frame memory 1, a computing unit 2, an orthogonal transform unit 3, a quantization unit 4, a variable length coding unit 5, a buffer 6, and an inverse. A quantization unit 7, an inverse orthogonal transform unit 8, a computing unit 9, a frame memory 10, a motion detection unit 11, a motion compensation unit 12, an intra-screen coding unit 13, and a switch 14 are provided.

  The frame memory 1 stores input image signals. When intra-frame coding (hereinafter referred to as intra-coding) is performed, the computing unit 2 subtracts the prediction signal generated by the intra-frame coding unit 13 from the input image signal to obtain a residual signal. When inter-frame coding (hereinafter referred to as inter coding) is performed, the computing unit 2 subtracts the prediction signal generated by the motion compensation unit 12 from the input image signal to obtain a residual signal.

  The orthogonal transform unit 3 performs orthogonal transform such as discrete cosine transform on the residual signal generated by the computing unit 2. The quantization unit 4 performs a quantization process on the transform coefficient subjected to the orthogonal transform. The variable length coding unit 5 performs variable length coding on the quantized data generated by the quantization unit 4 and outputs a coded bit stream.

  The inverse quantization unit 7 performs inverse quantization on the quantized data generated by the quantization unit 4. The inverse orthogonal transform unit 8 performs inverse orthogonal transform on the inversely quantized data and outputs a decoded residual signal.

  When intra coding is performed, the arithmetic unit 9 adds the decoded residual signal from the inverse orthogonal transform unit 8 and the prediction signal supplied from the intra-screen coding unit 13 to generate a decoded image signal. To do. When inter coding is performed, the arithmetic unit 9 adds the decoded residual signal from the inverse orthogonal transform unit 8 and the prediction signal supplied from the motion compensation unit 12 to generate a decoded image signal. To do. The frame memory 10 stores the decoded image signal from the calculator 9.

  The motion detection unit 11 detects a motion vector with reference to the frame memory 10 and supplies the detected motion vector to the motion compensation unit 12. The motion compensation unit 12 performs motion compensation processing using the motion vector. The intra-frame encoding unit 13 performs intra-frame prediction processing on the input image.

  The switch 14 includes ports 14a, 14b, and 14c. When the port 14b-14a is connected, the computing unit 2 and the in-screen encoding unit 13 are connected. When the port 14c-14a is connected, the switch 14 operates. The compensation unit 12 is connected.

  FIG. 2 is a block diagram showing the configuration of the variable length coding unit of the image coding apparatus shown in FIG. As shown in FIG. 2, the variable length encoding unit 5 includes a zigzag scanning unit 51, a code variable calculation unit 52, a switch 53, an encoding unit 54, a bit string generation unit 56, a CAVLC table 57, and a control unit 58. The encoding unit 54 includes a first encoding unit 54a, a second encoding unit 54b,..., And an nth encoding unit 54n.

  The zigzag scan unit 51 rearranges the quantized transform coefficients output from the quantization unit 4 in the zigzag scan order.

  The code variable calculation unit 52 determines a code variable for specifying the arrangement of the zero coefficient and the non-zero coefficient based on whether each coefficient in the coefficient sequence generated by the zigzag scan unit 51 is zero or non-zero. calculate. The switch 53 switches the output destination of the coefficient sequence according to the code variable calculated by the code variable calculation unit 52.

  The first encoding unit 54a, the second encoding unit 54b,..., The n-th encoding unit 54n of the encoding unit 54 are provided corresponding to the code variables, and each perform individual variable-length encoding processing. . The bit string generation unit 56 generates the encoded code and code length output from the encoding unit 54 as a bit string (encoded bit stream), and outputs the generated bit string to the buffer 6.

  The CAVLC table 57 is a table used in CAVLC (Context-Adaptive Variable Length Coding), a table for encoding the number of leading ones, a table for encoding zero numbers, and a number of zero runs. Each table stores an encoded code and data indicating the length (code length) of the encoded code. The control unit 58 controls each unit provided in the variable length coding unit 5.

  Next, the operation of the image coding apparatus according to the first embodiment will be described.

  The input image signal is stored in the frame memory 1, and a signal within or between frames is encoded.

  In intra coding, only the image signal in a frame is independently coded, and in inter coding, a prediction signal using the immediately preceding and immediately following frames as reference frames is generated, and a prediction error is encoded.

  In the intra coding, after the input image signal is stored in the frame memory 1, the input image signal is input to the computing unit 2 and the in-screen coding unit 13, and the prediction signal generated by the in-screen coding unit 13 is the switch 14. It is supplied to the computing unit 2 through the ports 14b-14a. In the arithmetic unit 2, a residual signal between the input image signal and the prediction signal generated by the intra-frame encoding unit 13 is obtained, and the obtained residual signal is supplied to the orthogonal transformation unit 3. In the orthogonal transform unit 3, orthogonal transform such as discrete cosine transform is performed, and the obtained transform coefficient is supplied to the quantization unit 4.

  In the quantization unit 4, the transform coefficient is quantized, and the generated quantized data is supplied to the variable length coding unit 5. Then, after the variable length coding unit 5 performs variable length coding on the quantized data, the coded bit stream is output and stored in the buffer 6 or transmitted to the outside.

  The quantized data generated by the quantizing unit 4 is supplied to the inverse quantizing unit 7 for inverse quantization, and the dequantized data is supplied to the inverse orthogonal transform unit 8 for inverse orthogonality. Conversion is performed and a decoded residual signal is obtained.

  The decoded residual signal obtained by the inverse orthogonal transform unit 8 is supplied to the arithmetic unit 9, and the prediction signal supplied from the in-screen encoding unit 13 is added to form a decoded image signal, which is stored in the frame memory 10. Is done.

  On the other hand, in inter coding, first, an input image signal is input to the motion detection unit 11. The motion detection unit 11 detects a motion vector with reference to the frame memory 10, and the detected motion vector is supplied to the motion compensation unit 12. The motion compensation unit 12 performs a motion compensation process using the motion vector, and generates a prediction signal.

  This prediction signal is supplied to the computing unit 2 via the ports 14c-14a of the switch 14. In the computing unit 2, a residual signal between the input image signal and the prediction signal generated by the motion compensation unit 12 is obtained, and the obtained residual signal is supplied to the orthogonal transformation unit 3. In the orthogonal transform unit 3, orthogonal transform such as discrete cosine transform is performed, and the obtained transform coefficient is supplied to the quantization unit 4.

  In the quantization unit 4, the transform coefficient is quantized, and the generated quantized data is supplied to the variable length coding unit 5. Then, after the variable length coding unit 5 performs variable length coding on the quantized data, the coded bit stream is output and stored in the buffer 6 or transmitted to the outside.

  The quantized data generated by the quantizing unit 4 is supplied to the inverse quantizing unit 7 for inverse quantization, and the dequantized data is supplied to the inverse orthogonal transform unit 8 for inverse orthogonality. Conversion is performed and a decoded residual signal is obtained.

  The decoded residual signal obtained by the inverse orthogonal transform unit 8 is supplied to the arithmetic unit 9, and the prediction signal supplied from the motion compensation unit 12 is added to form a decoded image signal, which is accumulated in the frame memory 10. .

  Next, the variable length coding process of coefficients in the variable length coding unit 5 will be described. FIG. 4 is a flowchart for explaining variable length coding processing in the variable length coding unit 5 shown in FIG.

  First, in step S210, the control unit 58 prepares a 16-bit code variable indicating the non-zero position information of the coefficient, and controls the code variable calculation unit 52 to initialize it to zero. FIG. 5 is a diagram for explaining code variables. For the coefficient sequence after the zigzag scan shown in FIG. 5A, as shown in FIG. 5B, 0/1 of each bit is made to correspond to the coefficient zero / non-zero.

  Next, in step S220, the control unit 58 controls the zigzag scanning unit 51 so that the coefficients input from the quantization unit 4 are rearranged in the zigzag scanning order from the high frequency components.

Then, the control unit 58 controls the code variable calculation unit 52 to perform determination for each coefficient _{C 00'~C 15} '(step S230). The loop of one coefficient will be described. First, in step S240, the code variable calculation unit 52 determines whether the coefficient is a non-zero coefficient or a zero coefficient. If the coefficient is not a zero coefficient (step S240: NO), step S250 is performed. In FIG. 5, the bit of the code is turned ON. If the coefficient is zero (step S240: YES), the code bit is not turned on, and the loop is terminated (step S260).

Thereby, the non-zero position information of 16 coefficients can be expressed by a 16-bit code variable. As shown in FIG. 5C, code = 1 when only the coefficient C ₁₅ ′ is a non-zero coefficient, and code = 2 when only the coefficient C ₁₄ ′ is a non-zero coefficient.

  Next, in S <b> 270, the control unit 58 determines how many code variables are calculated by the code variable calculation unit 52, and outputs a coefficient sequence output from the zigzag scanning unit 51 via the code variable calculation unit 52. The switch 53 is controlled to switch the destination.

  Then, for example, the control unit 58 outputs the coefficient sequence to the first encoding unit 54a when the code = 0 and the second encoding unit 54b when the code = 1, and performs individual variable length encoding processing. (Steps S280a, S280b,...).

Here, the variable length encoding process in the second encoding unit 54b in the case of code = 1 will be described. The code = 1 is when only the coefficient C ₁₅ ′ is a non-zero coefficient as shown in FIG. FIG. 7 is a flowchart for explaining variable-length encoding processing in the second encoding unit 54b.

First, in step S310, the second encoding unit 54b determines whether or not the absolute value of the coefficient value (level value) of the coefficient C ₁₅ ′ is 1. H. In H.264 / AVC, the encoding efficiency is increased by encoding the number of coefficients of the absolute value 1 that are consecutive at the beginning of the non-zero coefficient (the number of leading 1s), so this determination is necessary.

When the absolute value of the level value of the coefficient C ₁₅ ′ is 1 (step S310: YES), in step S320, the second encoding unit 54b refers to the CAVLC table 57 and encodes the number of leading 1s. For this reason, an encoded code corresponding to the number of leading 1s = 1 defined in the table for output is output to the table with a specified code length. The second encoding unit 54b also encodes the positive and negative signs of the coefficient C ₁₅ ′ and outputs an encoded code.

When the absolute value of the level value of the coefficient C ₁₅ ′ is not 1 (step S310: NO), in step S330, the second encoding unit 54b refers to the CAVLC table 57 to encode the number of the preceding 1s. The encoded code corresponding to the number of leading 1s = 0 defined in the table is output to the table with a specified code length. Then, in step S340, the second encoding unit 54b is to encode the level value of the coefficient _{C 15} 'and outputs the encoded code.

  Next, in step S350, the second encoding unit 54b encodes the zero-run number and outputs an encoded code. However, if the code = 1, the zero-run number encoded code is not required to be output.

  Then, in step S360, the second encoding unit 54b converts the preset encoding code (= 1) corresponding to the zero number (= 0) to the preset code length (= 1 bit). To output.

  Thereafter, the bit string generation unit 56 generates the encoded code and code length output from the second encoding unit 54 b as a bit string (encoded bit stream), and outputs the generated bit string to the buffer 6.

  Here, in the conventional variable length encoding process, when the zero run number and the zero number are encoded and output, the CAVLC table is referred to. FIG. 8 shows a table used for encoding zero numbers in CAVLC.

  In the conventional variable length encoding process, for example, when the number of zeros is 0 and the number of non-zero coefficients is 1, the encoding code = 1 and the code length = 1 bit are obtained with reference to the table shown in FIG. It was. In the image encoding device according to the first embodiment, the encoding code (= 1) and the code length (= 1 bit) are set in advance in the second encoding unit 54b corresponding to the number of zeros (= 0). Because there is no need to refer to the table. Similarly, for the zero-run number, an encoding code and a code length are set in advance, and encoding can be performed without referring to a table.

Next, the variable length encoding process in the third encoding unit 54c in the case of code = 2 will be described. The code = 2 is the case where only the coefficient C ₁₄ ′ is a non-zero coefficient as shown in FIG. FIG. 10 is a flowchart for explaining variable-length encoding processing in the third encoding unit 54c.

First, in step S410, the third encoding unit 54c determines whether or not the absolute value of the level value of the coefficient C ₁₄ ′ is 1.

If the absolute value of the level value of the coefficient C ₁₄ ′ is 1 (step S410: YES), in step S420, the third encoding unit 54c refers to the CAVLC table 57 and encodes the number of the preceding 1s. For this reason, an encoded code corresponding to the number of leading 1s = 1 defined in the table for output is output to the table with a specified code length. The third encoding unit 54c also encodes the positive and negative signs of the coefficient C ₁₄ ′ and outputs an encoded code.

When the absolute value of the level value of the coefficient C ₁₄ ′ is not 1 (step S410: NO), in step S430, the third encoding unit 54c refers to the CAVLC table 57 to encode the number of the preceding 1s. The encoded code corresponding to the number of leading 1s = 0 defined in the table is output to the table with a specified code length. Thereafter, in step S440, the third encoding unit 54c encodes the level value of the coefficient C ₁₄ ′ and outputs an encoded code.

  Next, in step S450, the third encoding unit 54c outputs an encoding code set in advance corresponding to the number of zero runs (= 1) with a code length set in advance. In step S460, the third encoding unit 54c outputs an encoding code set in advance corresponding to the number of zeros (= 1) with a code length set in advance.

Next, the variable length encoding process in the twelfth encoding unit 54l in the case of code = 11 will be described. The code = 11 is a case where the coefficients C ₁₂ ′, C ₁₄ ′, and C ₁₅ ′ are non-zero coefficients as shown in FIG. FIG. 12 is a flowchart for explaining variable-length encoding processing in the twelfth encoding unit 54l.

First, in step S510, the twelfth encoding unit 54l determines whether or not the absolute value of the level value of the coefficient C ₁₂ ′ is 1.

When the absolute value of the level value of the coefficient C ₁₂ ′ is 1 (step S510: YES), the process proceeds to step S520. When the absolute value of the level value of the coefficient C ₁₂ ′ is not 1 (step S510: NO), in step S590, the twelfth encoding unit 54l refers to the CAVLC table 57 to encode the number of leading 1s. The encoded code corresponding to the number of leading 1s = 0 defined in the table is output to the table with a specified code length. Then, in step S600, the 12 encoding unit 54l includes coefficients _C 12 _', C _14', and which encoded the level value of _{C 15} 'outputs the encoded code.

Next, in Step S520, the twelfth encoding unit 54l determines whether or not the absolute value of the level value of the coefficient C ₁₄ ′ is 1.

When the absolute value of the level value of the coefficient C ₁₄ ′ is 1 (step S520: YES), the process proceeds to step S530. When the absolute value of the level value of the coefficient C ₁₄ ′ is not 1 (step S520: NO), in step S570, the twelfth encoding unit 54l refers to the CAVLC table 57 and encodes the number of the preceding one. The encoded code corresponding to the number of leading 1s = 1 defined in the table is output to the table with the defined code length. Then, in step S580, the 12 encoding unit 54l includes coefficients _C 14 _{', C 15'} to each coding level values of outputting the encoded code.

Next, in Step S530, the twelfth encoding unit 54l determines whether or not the absolute value of the level value of the coefficient C ₁₅ ′ is 1.

When the absolute value of the level value of the coefficient C ₁₅ ′ is 1 (step S530: YES), the process proceeds to step S540. When the absolute value of the level value of the coefficient C ₁₄ ′ is not 1 (step S530: NO), in step S550, the twelfth encoding unit 54l refers to the CAVLC table 57 and encodes the number of the preceding one. The encoded code corresponding to the number of leading 1s = 2 defined in the table is output to the table with the defined code length. Thereafter, in step S560, the twelfth encoding unit 54l encodes and outputs the level value of the coefficient C ₁₄ ′.

  Next, in step S540, the twelfth encoding unit 54l refers to the CAVLC table 57, and encodes the encoding code corresponding to the number of leading 1s = 3 specified in the table for encoding the number of leading 1s. Is output to the table with the specified code length.

  Next, in step S610, the twelfth encoding unit 54l outputs an encoding code set in advance corresponding to the number of zero runs with a code length set in advance. In step S620, the twelfth encoding unit 54l outputs an encoding code set in advance corresponding to the number of zeros with a code length set in advance.

  Thus, according to the first embodiment, when variable-length coding of coefficients is performed, code variables for specifying the arrangement of coefficients and non-zero coefficients are calculated, and individual codes corresponding to the code variables are calculated. Thus, the position of the non-zero coefficient and the number of zero runs are determined by the code variable, and the amount of calculation for obtaining the position information of the non-zero coefficient and the number of consecutive zero coefficients can be reduced. Further, it is not necessary to refer to the CAVLC table when the zero run number and the zero number are encoded and output, the number of table references can be reduced, and the encoding process can be speeded up.

By the way, when there are 16 coefficients, the code variable has a 16-bit value and has a value in the range of 0 to 65535. However, it is difficult to perform individual encoding processing for all the patterns. In view of this, it is possible to perform individual encoding processing for only frequently occurring patterns by using the fact that coefficients are concentrated on low frequency components due to the nature of orthogonal transform. For example, individual encoding processing can be performed only when non-zero coefficients are distributed only in C ₁₂ ′ to C ₁₅ ′.

  FIG. 3 is a block diagram showing a configuration of a variable length coding unit of a modification of the image coding apparatus according to the first embodiment. As shown in FIG. 3, the variable length encoding unit 5 a has a configuration in which the encoding unit 54 is replaced with an encoding unit 55 with respect to the variable length encoding unit 5 shown in FIG. 2. The encoding unit 55 includes a first encoding unit 54a, a second encoding unit 54b,..., A sixteenth encoding unit 54p, and an out-of-range encoding unit 55a.

In the variable length coding unit 5a, for _example, C _{12'~C 15} 'only if the non-zero coefficients are distributed, that is, if the code variable is 0-15, the first encoding unit 54a, a second encoding unit 54b,..., The 16th encoding unit 54p performs individual variable length encoding processing as described above. If the code variable is larger than 15, the out-of-range encoding unit 55a performs variable length encoding processing according to the conventional encoding processing procedure shown in the flowchart of FIG.

  When non-zero coefficients are concentrated in a low frequency, for example, in low-rate encoding or inter-encoding, the encoding process can be performed at high speed by the image encoding device of this modification.

(Second Embodiment)
Next, a second embodiment will be described. The configuration of the image encoding device according to the second embodiment is the same as the configuration of the image encoding device according to the first embodiment shown in FIG.

  FIG. 13 is a block diagram showing the configuration of the variable length coding unit of the image coding apparatus according to the second embodiment. As shown in FIG. 13, the variable length encoding unit 5b includes a zigzag scanning unit 61, a code variable calculation unit 62, a switch 63, an encoding unit 64, a bit string generation unit 65, a bit string storage unit 66, a bit string integration unit 67, and a CAVLC table. 68 and a control unit 69. The encoding unit 64 includes a first encoding unit 64a, a second encoding unit 64b, ..., and a sixteenth encoding unit 64p.

  The zigzag scan unit 61 rearranges the quantized transform coefficients output from the quantization unit 4 in the zigzag scan order.

  The code variable calculation unit 62 divides the coefficient sequence generated by the zigzag scanning unit 61 into a plurality of division coefficient sequences, and determines zero for each division coefficient sequence based on whether each coefficient is zero or non-zero. A code variable for specifying the arrangement of coefficients and non-zero coefficients is calculated. The switch 63 switches the output destination of the coefficient sequence according to the code variable calculated by the code variable calculation unit 62.

  The first encoding unit 64a, the second encoding unit 64b,..., And the sixteenth encoding unit 64p of the encoding unit 64 are provided corresponding to the code variables, and each perform individual variable length encoding processing. . The bit string generation unit 65 generates the encoded code and code length output from the encoding unit 64 as a bit string, and outputs the generated bit string to the bit string storage unit 66.

  The bit string storage unit 66 stores a bit string for each division coefficient string generated by the bit string generation unit 65. The bit string integration unit 67 integrates the bit strings for all the divided coefficient strings stored in the bit string storage unit 66 and outputs the integrated bit string (encoded bit stream) to the buffer 6.

  The CAVLC table 68 is a table used in CAVLC, and includes a table for encoding the number of leading 1s, a table for encoding the number of zeros, and a table for encoding the number of zero runs. Stores an encoded code and data indicating the length of the encoded code (code length). The control unit 69 controls each unit provided in the variable length coding unit 5b.

  Next, the variable length coding process of coefficients in the variable length coding unit 5b will be described. Hereinafter, an example in which a coefficient sequence including 16 coefficients is divided into four division coefficient sequences including four coefficients will be described, but the number of divisions is not limited thereto.

  FIG. 15 is a flowchart for explaining the variable-length encoding process in the variable-length encoding unit 5b shown in FIG. First, in step S710, the control unit 69 prepares a 16-bit code variable indicating the non-zero position information of the coefficient, and controls the code variable calculation unit 62 to initialize it to zero.

  Next, in step S720, the control unit 69 controls the zigzag scanning unit 61 so that the coefficients input from the quantization unit 4 are rearranged in the zigzag scanning order from the high frequency component.

Then, the control unit 69 divides each coefficient C ₀₀ ′ to C ₁₅ ′ into four divided coefficient sequences composed of the top four coefficients as shown in FIG. 14 and determines the coefficients of each divided coefficient sequence. The code variable calculation unit 62 is controlled so as to perform (steps S730 and S740). Loop 2 is a loop for the division coefficient sequence, and loop 1 is a loop for the coefficient of each division coefficient sequence.

  The loop of one coefficient in the loop 1 will be described. First, in step S750, the code variable calculation unit 62 determines whether the coefficient is a non-zero coefficient or a zero coefficient, and if it is not a zero coefficient (step S750: NO) In step S760, the code bit is turned ON. If the coefficient is zero (step S750: YES), the code bit is not turned ON, and the loop 1 is terminated (step S770).

As a result, the non-zero position information of the four coefficients can be expressed by a 4-bit code variable for one divided coefficient sequence. As shown in FIG. 14, for example, when only the coefficient C ₀₁ ′ is a non-zero coefficient for the first divided coefficient sequence, code = 4.

  Next, in S780, the control unit 69 determines how many code variables are calculated by the code variable calculation unit 62, and the division coefficient sequence output from the zigzag scanning unit 61 via the code variable calculation unit 62 is determined. The switch 63 is controlled to switch the output destination.

  Then, for example, the control unit 69 outputs a coefficient sequence to the first encoding unit 54a when the code = 0 and to the second encoding unit 54b when the code = 1, and performs individual variable length encoding processing. (Steps S790a, S790b,...). Here, the encoding process in the first encoding unit 54a, the second encoding unit 54b,... Is performed in the same manner as the procedure described in the first embodiment.

  Thereafter, the bit string generation unit 65 generates the encoded code and code length output from the encoding unit 64 as a bit string (encoded bit stream), and outputs the generated bit string to the bit string storage unit 66. Here, since the zero-run number is data extending between the divided coefficient sequences, in step S800, the data is updated every time encoding processing of each divided coefficient sequence is completed, and the loop 2 is ended (step S810).

  When the loop 2 is completed for the number of divisions (four times), in step S820, the control unit 69 integrates the bit sequences for all the divided coefficient sequences stored in the bit sequence storage unit 66 according to the order of the encoding process. The bit string storage unit 66 is controlled to output the bit string (encoded bit stream) to the buffer 6.

  Since the distribution of non-zero coefficients is widened in high-rate coding or intra coding, the image coding apparatus according to the first embodiment may not be able to obtain a sufficient speed-up effect. In the second embodiment, since the variable length coding process is performed by dividing the coefficient sequence into an arbitrary number from the top, it is possible to reduce the amount of calculation even in the coefficient sequence including many non-zero coefficients. Encoding processing is possible.

  The present invention includes a program for causing a computer to realize the functions of the above apparatus. This program may be read from a recording medium and loaded into a computer, or may be transmitted via a communication network and loaded into a computer.

  FIG. 16 is a diagram showing a configuration of a personal computer (PC) capable of executing the image encoding program according to the present invention.

  In FIG. 16, the CPU 101 executes an image encoding process and various processes according to a program stored in the ROM 102 or a program loaded from the storage unit 108 to the RAM 103. The RAM 103 also stores data necessary for the CPU 101 to execute image encoding processing and various processes as appropriate.

    The CPU 101, ROM 102, and RAM 103 are connected to each other via a bus 104. An input / output interface 105 is also connected to the bus 104.

    The input / output interface 105 includes an input unit 106 including a keyboard and a mouse, an output unit 107 including a display and a speaker, a storage unit 108 including a hard disk, and a communication unit 109 including a modem and a terminal adapter. It is connected. The communication unit 109 performs communication processing via a communication network including the Internet.

    A drive 110 is connected to the input / output interface 105 as necessary, and a magnetic disk 111, an optical disk 112, a magneto-optical disk 113, a semiconductor memory 114, or the like is appropriately mounted, and image codes read therefrom are read out. A program for executing the conversion process and various processes is installed in the storage unit 108 as necessary.

  The present invention can be applied to a camcorder, a video recorder, a surveillance camera, a video conference system, and the like as an image encoding device that performs variable length encoding of a coefficient portion. It can also be applied to an encoder program on a PC.

It is a block diagram which shows the structure of the image coding apparatus which concerns on the 1st Embodiment of this invention. It is a block diagram which shows the structure of the variable length encoding part of the image coding apparatus shown in FIG. It is a block diagram which shows the structure of the variable length encoding part of the modification of the image coding apparatus which concerns on 1st Embodiment. It is a flowchart for demonstrating the variable length encoding process in the variable length encoding part 5 shown in FIG. It is a figure for demonstrating a code variable. It is a figure which shows code | symbol = 1. It is a flowchart for demonstrating the variable-length encoding process in the 2nd encoding part 54b. FIG. 6 shows a table used to encode zero numbers in CAVLC. It is a figure which shows code = 2. It is a flowchart for demonstrating the variable-length encoding process in the 3rd encoding part 54c. It is a figure which shows code | symbol = 11. It is a flowchart for demonstrating the variable-length encoding process in the 12th encoding part 54l. It is a block diagram which shows the structure of the variable length encoding part of the image coding apparatus which concerns on 2nd Embodiment. It is a figure for demonstrating the division | segmentation of a coefficient sequence. It is a flowchart for demonstrating the variable length encoding process in the variable length encoding part 5b shown in FIG. It is a figure which shows the structure of the personal computer (PC) which can execute the image coding program which concerns on this invention. It is a flowchart for demonstrating the variable-length-coding process in the conventional image coding apparatus. It is a figure for demonstrating a zigzag scan. (A) is a diagram showing a coefficient sequence before zigzag scanning, (b) is a diagram showing a coefficient sequence after zigzag scanning, (c) is a diagram showing an example of the coefficient sequence, and (d) is a coefficient shown in (c). It is a table | surface figure which shows the zero run number and level value in a row | line | column, and the number of combinations of a zero run number and level value.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1,10 Frame memory 2,9 Operation unit 3 Orthogonal transformation part 4 Quantization part 5, 5a, 5b Variable length encoding part 6 Buffer 7 Inverse quantization part 8 Inverse orthogonal transformation part 11 Motion detection part 12 Motion compensation part 13 Screen Inner encoding unit 14 Switch 51, 61 Zigzag scanning unit 52, 62 Code variable calculation unit 53, 63 Switch 54, 55, 64 Encoding unit 54a, 64a First encoding unit 54b, 64b Second encoding unit 54p, 64p Sixteenth encoding unit 55a Out-of-range encoding unit 56, 65 Bit string generation unit 66 Bit string storage unit 67 Bit string integration unit 57, 68 CAVLC table 58, 69 Control unit

Claims (4)

In an image encoding apparatus that performs an encoding process by dividing an image into blocks,
Coefficient sequence generation means for generating a coefficient sequence by rearranging the coefficients generated by orthogonal transform quantization of the residual component of the predicted image and the original image in order of zigzag scan from the high frequency component;
A code variable for specifying the arrangement of the zero coefficient and the non-zero coefficient is calculated based on whether each coefficient in the coefficient string generated by the coefficient string generation unit is a zero coefficient or a non-zero coefficient. Code variable calculation means to perform,
A zero run number indicating the number of consecutive zero coefficients following the non-zero coefficient of the coefficient sequence, and a zero number indicating the number of zero coefficients after the first non-zero coefficient of the coefficient sequence are set in advance corresponding to the code variable. An image encoding apparatus comprising: encoding means for performing variable length encoding using the encoded code and the code length thereof. In an image encoding apparatus that performs an encoding process by dividing an image into blocks,
Coefficient sequence generation means for generating a coefficient sequence by rearranging the coefficients generated by orthogonal transform quantization of the residual component of the predicted image and the original image in order of zigzag scan from the high frequency component;
The coefficient sequence generated by the coefficient sequence generation means is divided into a plurality of divided coefficient sequences, and the zero coefficient is determined for each of the divided coefficient sequences based on whether each coefficient is a zero coefficient or a non-zero coefficient. And a code variable calculating means for calculating a code variable for specifying the arrangement of the non-zero coefficient,
For each of the division coefficient sequences, a zero run number indicating the number of consecutive zero coefficients following the non-zero coefficient of the division coefficient sequence, and a zero number indicating the number of zero coefficients after the first non-zero coefficient of the division coefficient sequence, Encoding means for generating encoded data by variable length encoding using an encoding code set in advance corresponding to the code variable and its code length;
An image encoding apparatus comprising: an integration unit that integrates the encoded data for all the divided coefficient sequences generated by the encoding unit. In an image encoding program that divides an image into blocks and performs an encoding process,
Rearranging the coefficients generated by orthogonal transform quantization of the residual components of the predicted image and the original image in order of high-frequency components in zigzag scan order to generate a coefficient sequence;
A code variable for specifying the arrangement of the zero coefficient and the non-zero coefficient is calculated based on whether each coefficient in the coefficient string generated by the coefficient string generation unit is a zero coefficient or a non-zero coefficient. And steps to
A zero run number indicating the number of consecutive zero coefficients following the non-zero coefficient of the coefficient sequence, and a zero number indicating the number of zero coefficients after the first non-zero coefficient of the coefficient sequence are set in advance corresponding to the code variable. An image encoding program for causing a computer to execute variable length encoding using the encoded code and the code length. In an image encoding program that divides an image into blocks and performs an encoding process,
Rearranging the coefficients generated by orthogonal transform quantization of the residual components of the predicted image and the original image in order of high-frequency components in zigzag scan order to generate a coefficient sequence;
The coefficient sequence generated by the coefficient sequence generation means is divided into a plurality of divided coefficient sequences, and the zero coefficient is determined for each of the divided coefficient sequences based on whether each coefficient is a zero coefficient or a non-zero coefficient. Calculating a code variable for specifying the arrangement of the non-zero coefficients;
For each of the division coefficient sequences, a zero run number indicating the number of consecutive zero coefficients following the non-zero coefficient of the division coefficient sequence, and a zero number indicating the number of zero coefficients after the first non-zero coefficient of the division coefficient sequence, Generating encoded data by variable length encoding using an encoding code set in advance corresponding to the code variable and its code length;
An image encoding program for causing a computer to execute the step of integrating the encoded data for all the divided coefficient sequences generated by the encoding means.

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