JP2007298664A5 - - Google Patents
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- JP2007298664A5 JP2007298664A5 JP2006125509A JP2006125509A JP2007298664A5 JP 2007298664 A5 JP2007298664 A5 JP 2007298664A5 JP 2006125509 A JP2006125509 A JP 2006125509A JP 2006125509 A JP2006125509 A JP 2006125509A JP 2007298664 A5 JP2007298664 A5 JP 2007298664A5
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- JP
- Japan
- Prior art keywords
- pwm pulse
- video display
- video
- signal
- reference signal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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- 230000004397 blinking Effects 0.000 claims 2
- 238000001514 detection method Methods 0.000 claims 2
Claims (6)
２−３プルダウンされた映像信号を表示するとともに、前記光源は２−３プルダウン前のフレーム周期を含んだ周期で点滅制御を行なうことを特徴とする映像表示装置。 A video display device having a light source for video display,
A video display apparatus characterized by displaying a video signal that has been pulled down 2-3, and that the light source performs blinking control in a cycle including a frame cycle before 2-3 pull-down.
前記入力映像信号が２−３プルダウンされた全５フレームから構成される信号の繰り返しタイミングを検出し、２−３プルダウン基準信号として出力する２−３プルダウン基準信号検出手段と、
該位相同期手段から出力される信号を所定の周期に分周する分周手段と、
前記２−３プルダウン基準信号の位相と前記分周手段の出力の位相とが合うように動作するＰＷＭパルス基準信号を出力する位相同期手段と、
前記ＰＷＭパルス基準信号より所定の位相とデューティ比でＰＷＭパルスを発生し、前記光源へ出力するＰＷＭパルス発生手段と、
を備えたことを特徴とする映像表示装置。 The image of the image display means and before Symbol image display means for displaying an input image is used to visualize a video display device provided with a light source that is based dimming input PWM pulse,
2-3 pull-down reference signal detection means for detecting a repetition timing of a signal composed of all 5 frames in which the input video signal is 2-3 pulled down, and outputting as a 2-3 pull-down reference signal;
Frequency dividing means for dividing the signal output from the phase synchronizing means into a predetermined period;
Phase synchronization means for outputting a PWM pulse reference signal that operates so that the phase of the 2-3 pull-down reference signal and the phase of the output of the frequency dividing means match .
PWM pulse generating means for generating a PWM pulse with a predetermined phase and duty ratio from the PWM pulse reference signal, and outputting to the light source;
A video display device comprising:
２−３プルダウンされた映像信号を表示するとともに、前記光源はそれぞれ異なる位相で、２−３プルダウン前のフレーム周期を含んだ周期で点滅制御を行なうことを特徴とする映像表示装置。 A video display device having a light source corresponding to a plurality of video areas when displaying video,
A video display apparatus that displays a video signal that has been pulled down 2-3, and that controls the blinking of the light sources at different phases and in a cycle including a frame cycle before 2-3 pulldown.
前記入力映像信号が２−３プルダウンされた全５フレームから構成される信号の繰り返しタイミングを検出し、２−３プルダウン基準信号として出力する２−３プルダウン基準信号検出手段と、
該位相同期手段から出力される信号を所定の周期に分周する分周手段と、
前記２−３プルダウン基準信号の位相と前記分周手段の出力の位相とが合うように動作するＰＷＭパルス基準信号を出力する位相同期手段と、
前記ＰＷＭパルス基準信号より所定の位相とデューティ比でＰＷＭパルスを発生し、前記複数の光源へそれぞれ出力する複数のＰＷＭパルス発生手段と、
を備えたことを特徴とする映像表示装置。 A video display device comprising: video display means for projecting an input video; and a plurality of light sources that are used for visualizing the video of the video display means and are dimmed based on a plurality of inputted PWM pulses,
2-3 pull-down reference signal detection means for detecting a repetition timing of a signal composed of all five frames in which the input video signal is 2-3 pulled down, and outputting as a 2-3 pull-down reference signal;
Frequency dividing means for dividing the signal output from the phase synchronizing means into a predetermined period;
Phase synchronization means for outputting a PWM pulse reference signal that operates so that the phase of the 2-3 pull-down reference signal and the phase of the output of the frequency dividing means match .
A plurality of PWM pulse generating means for generating a PWM pulse at a predetermined phase and duty ratio from the PWM pulse reference signal and outputting the PWM pulse to the plurality of light sources, respectively;
A video display device comprising:
ことを特徴とする請求項２又は４記載の映像表示装置。The video display device according to claim 2 or 4,
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2006125509A JP2007298664A (en) | 2006-04-28 | 2006-04-28 | Video display apparatus |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2006125509A JP2007298664A (en) | 2006-04-28 | 2006-04-28 | Video display apparatus |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2007298664A JP2007298664A (en) | 2007-11-15 |
| JP2007298664A5 true JP2007298664A5 (en) | 2009-06-04 |
Family
ID=38768221
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2006125509A Withdrawn JP2007298664A (en) | 2006-04-28 | 2006-04-28 | Video display apparatus |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2007298664A (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2010008582A (en) * | 2008-06-25 | 2010-01-14 | Mitsubishi Electric Corp | Display |
| CN113707082B (en) * | 2020-05-21 | 2022-12-13 | 华为技术有限公司 | Display screen and Pulse Width Modulation (PWM) signal adjusting circuit thereof |
-
2006
- 2006-04-28 JP JP2006125509A patent/JP2007298664A/en not_active Withdrawn
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