JP2007295073A - Solid-state image pickup device and imaging method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a solid-state image pickup device capable of maintaining the miniaturization of an imager, even if expanding the area of a light receiver to expand a dynamic range, and to provide a method. <P>SOLUTION: A digital still camera 10 includes: a plurality of light receivers for storing charge obtained by converting incident light photoelectrically, a vertical transfer path for transferring stored charge read from the light receiver, and a transfer gate for transferring the stored charge from the light receiver to the vertical transfer path. In the digital still camera 10, a drive signal generator 10C applies a transfer gate voltage to the transfer gate to read the stored charge from the receiver to the vertical transfer path. The transfer gate voltage can read the stored charge from the light receiver to the vertical transfer path a plurality of times. The vertical transfer path performs transfer operation each time when the stored charge is read. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to a solid-state imaging device and method using a charge coupled device (CCD) or the like, and more particularly to a solid-state imaging device and method having a wide dynamic range.

  When a subject is imaged using a solid-state imaging device, it is desirable that the high-luminance portion in the captured image does not fly out and the low-luminance portion does not become black. That is, in order to enable imaging from low luminance to high luminance, it is necessary to realize a wide dynamic range in the solid-state imaging device. Therefore, various methods for expanding the dynamic range of the solid-state imaging device have been proposed.

  However, an increase in sensitivity and saturation charge amount (expansion of dynamic range) due to an increase in the area of the light-receiving portion necessitates an increase in the width of the vertical transfer path, which goes against the miniaturization of the apparatus. On the other hand, in order to maintain the miniaturization of the device, there is a demand for an increase in the number of pixels due to the miniaturization of the pixels, and it is necessary to reduce the area of the light receiving portion. As a result, the amount of signal charge is reduced, and there is a problem that it goes against high sensitivity (dynamic range expansion). As described above, it is difficult to achieve both high sensitivity / multiple pixels / miniaturization of a solid-state imaging device, particularly a solid-state imaging device included in the device.

As one method for solving this problem, for example, in the prior art described in Patent Document 1, solid-state imaging that can increase the saturation charge capacity that can be handled without expanding the width of the charge transfer path and expand the dynamic range. An apparatus is disclosed. That is, the first signal charge accumulation unit that accumulates signal charges corresponding to the amount of incident light in each light receiving unit, and saturation when the accumulated charge in the first signal charge accumulation unit exceeds the saturation charge amount of the first signal charge accumulation unit A second signal charge accumulating unit that captures and accumulates a part of the excess charge exceeding the charge amount; With this configuration, the saturation charge amount in one pixel (light receiving unit) is increased without increasing the width of the charge transfer path.
JP 2004-335802 A

  In the above prior art, each light receiving unit is provided with a first signal charge storage unit and a second signal charge storage unit having a lower sensitivity than the first signal charge storage unit, and without increasing the area of the light receiving unit, Therefore, the dynamic range is expanded without increasing the width of the charge transfer path. However, a part of the electric charge obtained by photoelectric conversion in the first signal charge accumulating unit is discarded without being used.

  The present invention is capable of maintaining the downsizing of the image sensor even when the dynamic range is expanded by enlarging the light receiving area, that is, a solid-state imaging device capable of achieving both high sensitivity / multiple pixels / miniaturization and It aims to provide a method.

  In order to solve the above-described problems, the present invention provides a plurality of light receiving units for accumulating charges obtained by photoelectric conversion of incident light, a vertical transfer path for transferring accumulated charges read from the light receiving unit, and accumulation. In a solid-state imaging device including a transfer gate for transferring charge from the light receiving unit to the vertical transfer path, including an applying unit that applies a transfer gate voltage to the transfer gate in order to read the accumulated charge from the light receiving unit to the vertical transfer path The transfer gate voltage allows the accumulated charge to be divided into a plurality of times and read out from the light receiving unit to the vertical transfer path, and the vertical transfer path performs a transfer operation every time the accumulated charge is read out. It is characterized by that.

  According to this, it is possible to provide a solid-state imaging device capable of charge transfer even if the vertical transfer path is narrowed as the light receiving unit is enlarged. Since the light receiving portion can be enlarged, the aperture ratio is increased, and sensitivity and saturation output can be improved.

  In order to solve the above-described problems, the present invention provides a plurality of light receiving units that accumulate charges obtained by photoelectric conversion of incident light, and a vertical transfer path that transfers accumulated charges read from the light receiving units. Applying means for applying a transfer gate voltage to the transfer gate in order to read the accumulated charge from the light receiving portion to the vertical transfer path in a solid-state imaging device including a transfer gate for transferring the accumulated charge from the light receiving portion to the vertical transfer path A plurality of transfer gates are provided for each light-receiving unit, the application means applies a transfer gate voltage to the plurality of transfer gates, and the vertical transfer path performs a transfer operation after the application, thereby transferring a group of accumulated charges to the plurality of transfer gates. By reading through the transfer gate, the charge can be separated into a plurality of groups of charges and read out from the light receiving portion to the vertical transfer path. Also in this case, it is possible to provide a solid-state imaging device capable of charge transfer even if the vertical transfer path is narrowed as the light receiving unit is enlarged.

  At this time, the applying means can apply the transfer gate voltage to the plurality of transfer gates by changing at least one of the application timing and the magnitude of the voltage.

  One or more vertical transfer paths can be provided for each light receiving unit. When a plurality of vertical transfer paths are provided for each light receiving unit, different transfer gates included in one light receiving unit are connected to different vertical transfer paths to form a group. Can be separated into a plurality of groups of charges via a plurality of transfer gates and a plurality of vertical transfer paths, and read out from the light receiving section to the plurality of vertical transfer paths.

  Further, it may include a horizontal transfer path that receives and transfers the charges transferred through the vertical transfer path, and the charges read from the same light receiving unit may be mixed in the horizontal transfer path.

  In order to solve the above-described problem, the imaging method of the present invention photoelectrically converts incident light by a plurality of light receiving units to obtain charges, accumulates the charges, and transfers the accumulated charges from the light receiving unit to the vertical transfer path. The transfer gate voltage is applied to the transfer gate to transfer the accumulated charge read from the light receiving unit on the vertical transfer path and to read the accumulated charge from the light receiving unit to the vertical transfer path. The transfer gate voltage is a process in which the accumulated charge can be divided into a plurality of times and read from the light receiving unit to the vertical transfer path, and a transfer operation is performed on the vertical transfer path each time the accumulated charge is read. And a process.

  Furthermore, the method of the present invention includes a step of applying a transfer gate voltage to a plurality of transfer gates provided for each light receiving unit in order to read accumulated charges from the light receiving unit to the vertical transfer path, Including a step of performing a transfer operation, wherein a group of accumulated charges can be read out through a plurality of transfer gates to be separated into a plurality of groups of charges and read out from the light receiving portion to the vertical transfer path. And

  According to the present invention, the area of the light receiving portion is expanded to increase the dynamic range, and the downsizing of the image sensor can be maintained. That is, the solid-state imaging device that achieves both high sensitivity / multiple pixels / downsizing And can provide a method. In addition, when the light receiving area is the same size as the conventional technology, the width of the vertical transfer path can be made narrower than that of the conventional technology. However, it becomes smaller than the image sensor of the prior art.

  Next, embodiments of a solid-state imaging device and an imaging method according to the present invention will be described in detail with reference to the accompanying drawings. In this embodiment, the present invention is applied to a digital still camera, and FIG. 1 is a block diagram of the digital still camera. Referring to FIG. 1, an embodiment of a digital still camera 10 according to the present invention includes an imaging system 10A, a preprocessing unit (AFE) 10F, a signal processing system 10B, a drive signal generation unit 10C, and a system control unit 12. . In the following description, descriptions of parts not directly related to the present invention are omitted.

  The imaging system 10A includes an imaging lens 102 and a CCD type imaging device 104. The imaging lens 102 is an optical system that condenses incident light from the object scene so as to focus on the light receiving surface of the imaging element 104. In the imaging element 104, light receiving elements 20a and 20b that photoelectrically convert incident light form a light receiving surface, and as shown in FIG. 2, the light receiving elements 20a and 20b are two-dimensionally arranged in the row direction and the column direction. The image sensor 104 accumulates and reads out charges in response to a drive signal output from a drive signal generation unit 10C described later.

  The image sensor 104 has a vertical transfer path 22 for transferring the accumulated charge read out for each of the light receiving elements 20a and 20b, and a transfer gate (transfer) for transferring the accumulated charge from the light receiving elements 20a and 20b to the vertical transfer path 22. Gate) There are 24a and 24b. The transfer gates 24a and 24b are the light receiving elements 20a and 20b and the transfer elements of the vertical transfer path 22 disposed adjacent to the light receiving elements 20a and 20b, that is, the vertical transfer elements V1 to V8 among the vertical transfer elements V1 to V8. Is formed between.

  The vertical transfer path 22 is composed of a charge coupled device (CCD). The electrodes of the transfer gates 24a and 24b are electrically connected to the electrodes of the vertical transfer elements V1 and V5, and applied voltages to the transfer gates 24a and 24b are supplied through these electrodes. That is, the voltage applied to the vertical transfer elements V1 and V5 and the voltage applied to the transfer gates 24a and 24b are the same. Hereinafter, the electrodes of the vertical transfer elements V1 to V8 and the vertical transfer elements V1 to V8, and the electrodes of the transfer gates 24a and 24b and the transfer gates 24a and 24b are referred to by the same reference numerals. That is, they are referred to as electrodes V1 to V8 and electrodes 24a and 24b.

  The transfer gates 24a and 24b transfer signal charges from the light receiving elements 20a and 20b to the vertical transfer path 22 by a field shift pulse supplied to the electrodes 24a and 24b via the electrodes V1 and V5. The vertical transfer path 22 sequentially transfers the read signal charges in the column direction, that is, the vertical direction 26. By vertical transfer, the signal charge is line-shifted and finally supplied to the transfer element in the row direction, that is, the horizontal transfer path. In response to the drive signal, the horizontal transfer path 28 outputs this signal charge to the signal processing system 10B via the AFE 10F.

  In this embodiment, all pixels are read out in an interlaced manner. For example, in the first field, reading is performed from the light receiving element 20a connected to the vertical transfer element V1, and in the second field, reading is performed from the light receiving element 20b connected to the vertical transfer element V5. Next, details of reading the first field will be described. Note that reading is performed in the same manner in the second field.

When the accumulated signal charge is read from each light receiving element 20a in the first field, a signal shown in the timing chart of FIG. That is, the signal generator 120, the transfer gate voltage TG1 supplied to the vertical drive signal V ₁ ~V ₈ and the transfer gate 24a is supplied to the transfer device V1~V8 is generated. The transfer gate voltage TG1 is supplied to the transfer gate 24a via the transfer element V1. In FIG. 3 (a), the transfer gate voltage TG1, but showing the vertical drive signal V ₁ separately, in practice, the transfer gate voltage TG1, the result of the addition of the vertical drive signal V ₁ is the transfer gate 24a To be supplied.

In the second field, the transfer gate voltage TG1 is supplied to the transfer gate 24b via the transfer element V5. At this time, the transfer gate voltage TG1, is the result of the addition of the vertical drive signal V ₅ is supplied to the transfer gate 24b.

Transfer gate voltage TG1 is the first time t ₁ and time t ₅ during the first field period becomes high, then during one field period, is low. A transfer gate voltage TG1, showing the actual signal obtained by adding the vertical drive signal V ₁ in FIG. The maximum value of the transfer gate voltage TG1 applied at time t ₁ 30 is lower than the maximum value 32 of the transfer gate voltage TG1 applied at time t _5. By applying a higher voltage at the second time, even if there is an electric charge left in the light receiving element 20a by the first reading, it can be read at the second time. Voltage value 34 indicates the voltage of the vertical drive signal V _1.

The vertical drive signals V _{1 to} V ₈ are signals for 8-phase drive, and are supplied to the transfer elements V _{1 to} V ₈ during one field while alternately repeating high and low. When the vertical drive signal V ₁ ~V ₈ viewed as a whole, the time t ₈ elapses, same is repeated. By applying such a transfer gate voltage TG1 and vertical drive signals V _{1 to} V ₈ , signal charges are read as follows.

In the first field, at times t ₁ and t ₅ , the transfer gate 24a is turned on, and the signal charge is read out twice only from the light receiving element 20a at the position corresponding to the transfer element V1. That is, the field shift is performed twice during one field period, and the field shift is not performed until the next vertical synchronizing signal is supplied. The vertical drive signals V _{1 to} V ₈ are supplied to the transfer elements V _{1 to} V ₈ , respectively, and by this supply, the signal charges shifted to the vertical transfer path 22 are transferred toward the horizontal transfer path 28.

In the second field, only the transfer gate 24b is turned on so that the signal charge is read only from the light receiving element 20b at the position corresponding to the transfer element V5. Vertical drive signals V _{1 to} V ₈ are supplied to the transfer elements V _{1 to} V ₈ , respectively. Transfer gate voltage TG1 is in the first field is applied to the transfer element V1, if the second field except which is applied to the transfer element V5, the transfer gate voltage TG1 and vertical drive signals V ₁ ~V ₈ is first field And in the second field.

The same drive voltage is applied to every eight transfer elements. That is, in FIG. 2, every eight transfer elements are connected in common. When the vertical drive signal V ₁ ~V ₈ is applied, the signal charge vertical transfer element V 1 through V 8, how conveyed to, shown in FIG. 3 (b). FIG. 3B shows the state of the vertical transfer elements V1 to V8 when the field shift is performed at times t ₁ and t ₅ in the first field and immediately after that. The hatched part is a place where there is a signal charge, and this part is a place where a potential for holding the signal charge is formed. FIG. 3 (b), each time t _1, t _2, t _3, ..., the potential of the vertical transfer element V1~V8 at t _8, shown for one row of the vertical transfer path 22 shown in FIG.

In the first field, a field shift pulse is applied only to the vertical transfer element V1 of the vertical transfer path 22. Potential of the vertical transfer elements V1 at time t ₁ is for the transfer gate voltage TG1 is generated by being applied, because of the addition of the transfer gate voltage TG1 minutes, vertical drive signal shown in FIG. 3 (a) A deeper potential is formed than when V _{1 to} V ₈ are applied. It can be seen from FIG. 3B that the signal charge shifted to the vertical transfer path 22 is transferred toward the horizontal transfer path.

The signal charges read out to the vertical transfer element V1 from the light receiving element 20a to the time t ₁ is the vertical transfer, the time t ₁ reaches the bottom of the vertical transfer element V1. At subsequent time t ₂ , the line is shifted and transferred to the horizontal transfer path (HCCD) 28. The signal charges read out to the vertical transfer element V1 from the light receiving element 20a to the time t ₅ can be vertically transferred, at time t ₅ reaches the bottom of the vertical transfer element V1. At subsequent time t ₆ , line shift is performed, the line is transferred to the horizontal transfer path 28, and is mixed with the signal of the light receiving element 20 a already in the horizontal transfer path 28. Thereafter, at time t ₈ , a two-phase horizontal drive signal is applied to the horizontal transfer path 28 to sequentially transfer on the horizontal transfer path 28 at a high speed and output to the AFE 10F in FIG.

The output, after becoming the horizontal transfer path 28 to the air, followed by time t _2, the are decorated with line shift, to the horizontal transfer path 28, the light receiving located above further than the light receiving element 20a of the horizontal transfer completed Signal charges are transferred from the element 20a. Such an operation is repeated for the first and second fields, and the signal charges of all the pixels are read out from the imaging unit 104 within a predetermined time and output to the AFE 10F in FIG.

  The AFE 10F includes a CDS unit 108 and an A / D conversion unit 112. The CDS unit 108 performs correlated double sampling (CDS) processing on the supplied signal using the clock signal 120a from the signal generation unit 120 that generates a timing signal and the like to reduce noise. Is output to the A / D converter 112. The A / D converter 112 samples the analog signal supplied from the CDS unit 108 using the clock signal 120a, and converts the sampled signal into a digital signal by quantization. The converted digital signal is supplied to the signal processing system 10B.

  The signal processing system 10B includes a signal processing unit 114 and a memory 116. The signal processing unit 114 performs noise reduction processing, offset correction, white balance (WB) correction, and the like on the obtained signal, and then takes the obtained still image data into the memory 116.

  A drive signal generation unit 10C that generates a timing signal and the like includes a signal generation unit (TG) 120 and a driver unit (drive unit) 122. For example, the signal generator 120 generates a clock signal 120a based on the original oscillation clock and supplies the clock signal 120a to the signal processor 114. The signal generator 120 also supplies the clock signal 120a to the CDS unit 108 and the A / D converter 112.

The signal generator 120 generates various timing signals from the original oscillation clock. The generated timing signal includes a timing signal used for reading the signal charge obtained by the image sensor 104, for example, a vertical timing signal for supplying driving timing for the vertical transfer path, and a horizontal timing for supplying driving timing for the horizontal transfer path. There are signals, timing signals for performing field shift and line shift. In addition, various signals are output to the above-described units as described above, and the signal generation unit 120 supplies a vertical timing signal, a horizontal timing signal, and the like to the driver unit 122. The driver unit 122 generates the aforementioned 8-phase vertical drive signals V _{1 to} V ₈ and the 2-phase horizontal drive signal according to the supplied timing signal, and outputs them from the signal line 122a. In FIG. 1, for simplification, only one signal line 122a is displayed, but actually, it includes eight vertical drive signal lines, two horizontal drive signal lines, and other signal lines.

As described above, the vertical drive signals V _{1 to} V ₈ include the transfer gate voltage applied to the transfer gate for reading the accumulated charge from the light receiving elements 20a and 20b to the vertical transfer path, and the transfer gate voltage is The accumulated charges can be read out to the vertical transfer path from the light receiving elements 20a and 20b in a plurality of times. The drive signal generation unit 10C applies the transfer gate voltage to the transfer gate through the vertical drive signal line, causes the transfer operation to be performed on the vertical transfer path, and divides the accumulated charge into a plurality of times, so that the light receiving elements 20a, 20b to 22 Enables reading to the transfer path.

  The system control unit 12 is a controller that controls the operation of the entire camera. The system control unit 12 includes a central processing unit (CPU). The system control unit 12 detects the start of shooting based on an input signal from a release shutter (not shown). The system control unit 12 controls the operation of the drive signal generation unit 10C based on the detected information.

  The operation of the digital still camera 10 configured as described above will be described. The digital still camera 10 is usually a camera having an image sensor 104 that can read all pixels. When a still image shooting designation is supplied from a release shutter, each light receiving element photoelectrically converts received light. As a result, signal charges are accumulated.

  When the accumulated signal charges are read from the light receiving elements 20a and 20b, the signal generator 120 generates a vertical synchronization signal. Further, the signal generator 120 generates a vertical drive signal supplied to the transfer elements of the vertical transfer path 22 and a transfer gate voltage supplied to the transfer gates 24a and 24b in synchronization with the vertical synchronization signal. The transfer gate voltage is supplied to the transfer gates 24a and 24b via the transfer element. The transfer gate voltage is generated so as to read the signal charge in synchronization with the vertical synchronization signal.

  A vertical drive signal is supplied, and by this supply, the signal charge shifted to the vertical transfer path 22 is transferred toward the horizontal transfer path 28. The vertically transferred signal charge is line-shifted and transferred to the horizontal transfer path 28, and then the horizontal transfer path 28 is sequentially transferred to read out the signal charges of all the pixels from the image sensor 104 within a predetermined time. .

  As described above, according to the present embodiment, since the charge accumulated in one light receiving element is transferred twice through the vertical transfer path, the charge accumulated in one light receiving element is transferred to the vertical transfer path once. The width of the vertical transfer path can be made narrower than in the case of the prior art for transferring the data. Therefore, even if the light receiving element is increased in order to increase the sensitivity, the size of the entire imaging element is not increased. In this embodiment, the electric charges are read out twice, but the present invention is not limited to this, and it is possible to read out and transfer the data divided into three times or more.

  Next, another embodiment will be described with reference to FIG. In the embodiment of FIG. 2, one transfer gate 24a, 24b is provided for each light receiving element 20a, 20b. In this embodiment, two transfer gates 36a, 36b, 38a, 38b are provided for each light receiving element 20a, 20b. The transfer gates 36a, 36b, 38a, and 38b are connected to the vertical transfer elements V8, V1, V4, and V5, respectively. The accumulated charge of the light receiving element 20a is read out to the vertical transfer path 22 via the transfer gates 36a and 36b, and the accumulated charge of the light receiving element 20b is read out to the vertical transfer path 22 via the transfer gates 38a and 38b, respectively. Also in this embodiment, all pixels are read out by interlace. In the first field, the accumulated charge of the light receiving element 20a is read out, and in the second field, the accumulated charge of the light receiving element 20b is read out.

  In the first field, first, the accumulated charge of the light receiving element 20a is read out to the transfer element V1 of the vertical transfer path 22 through the transfer gate 36a, transferred to the vertical transfer path 22, and then transferred to the transfer gate 36b. Accordingly, the remaining accumulated charge of the light receiving element 20a is read out to the transfer element V8 of the vertical transfer path 22 and transferred through the vertical transfer path 22. A transfer gate voltage TG8 higher than the transfer gate voltage TG1 applied to the transfer gate 36a is applied to the transfer gate 36b. Similarly, in the second field, the accumulated charge of the light receiving element 20b is read out to the transfer elements V5 and V4 of the vertical transfer path 22.

FIG. 6 (a) shows the transfer gate voltages TG1 and TG8 in this embodiment. FIG. 6A also shows vertical drive signals V _{1 to} V ₈ . FIG. 6 (a) corresponds to FIG. 3 (a) described above, and the vertical drive signals V _{1 to} V ₈ are the same in both embodiments. Transfer gate voltage TG1 is only high in the first time t ₁ of the first field, the transfer gate voltage TG8 is only high in the first time t _4. An actual signal obtained by adding the transfer gate voltages TG1 and TG8 and the vertical drive signals V ₁ and V ₈ is shown in FIG. 7 (a) shows an actual transfer gate voltage TG1 applied at time t _1, the maximum value 30 is less than the maximum value 32 of the transfer gate voltage TG8 applied at time t _4. Figure 7 (b) shows the actual transfer gate voltage TG8 applied at time t _4. By applying a higher voltage at the second time, even if there is a charge remaining in the first reading, it can be read out at the second time.

FIG. 6B shows the state of vertical transfer when field shift is performed at times t ₁ and t ₄ in the first field, and immediately after that. FIG. 6B shows the potential of the vertical transfer elements V1 to V8 at _one time t ₁ , t ₂ , t ₃ ,..., T ₈ for one column of the vertical transfer path 22. Also in this embodiment, signal charges are mixed in the horizontal transfer path as in the above-described embodiments.

  As described above, according to the present embodiment, two transfer gates are provided in one light receiving element, and the accumulated charges are transferred to the vertical transfer path in two using the two transfer gates. For this reason, the width of the vertical transfer path can be made narrower than in the case of the prior art in which charges accumulated in one light receiving element are transferred on the vertical transfer path at a time. Therefore, even if the light receiving element is increased in order to increase the sensitivity, the size of the entire imaging element is not increased.

  Next, a third embodiment of the present invention will be described. FIG. 8 shows the configuration of the imaging unit in the present embodiment. Transfer gates 40a, 40b, 42a, 42b and vertical transfer paths 44a, 44b are provided on both sides of each light receiving element 20a, 20b. The charges accumulated in the respective light receiving elements 20a and 20b are read out and transferred to the vertical transfer paths 44a and 44b in two steps through the transfer gates 40a, 40b, 42a and 42b on both sides thereof. Also in this embodiment, all pixels are read out by interlace. In the first field, the accumulated charge of the light receiving element 20a is read out, and in the second field, the accumulated charge of the light receiving element 20b is read out.

  In the first field, first, the accumulated charge of the light receiving element 20a is read to the transfer elements V1a and V1b of the vertical transfer paths 44a and 44b via the transfer gates 40a and 40b, and transferred through the vertical transfer paths 44a and 44b. After that, the remaining accumulated charge of the light receiving element 20a is read to the transfer elements V1a and V1b of the vertical transfer paths 44a and 44b via the transfer gates 40a and 40b, and transferred to the vertical transfer paths 44a and 44b. . Similarly, in the second field, the accumulated charges in the light receiving element 20b are read out to the transfer elements V5a and V5b in the vertical transfer paths 44a and 44b.

The transfer gate voltage and the vertical drive signals V _{1 to} V ₈ used in this embodiment are the same as those shown in FIG. In other words, the transfer element V1a, the transfer gate voltage TG1 applied to V1b is the first time t ₁ and time t ₅ during the first field period becomes high, then during one field period, is low. The state in which signal charges are transferred through the vertical transfer paths 44a and 44b is the same as that shown in FIG.

  FIG. 9 shows a portion where the charges transferred through the vertical transfer paths 44a and 44b are transferred to the horizontal transfer path 46. The vertical transfer paths 44a and 44b are connected to the horizontal transfer path main body 50 through the coupling portion 48. The charges accumulated in one light receiving element and transferred separately by the vertical transfer paths 44a and 44b are combined into one by the coupling portion 48, and sent to the horizontal transfer path main body 50 to be mixed.

  As described above, according to the present embodiment, two transfer gates are provided in one light receiving element, and two vertical transfer paths are provided corresponding to the two transfer gates. Using the transfer path, the vertical transfer path is transferred in two steps. In this embodiment, the width of one vertical transfer path can be further reduced as compared with the first and second embodiments. For example, it can be set to 1/2. For this reason, vertical transfer paths are provided on both sides of one light receiving element, but the sum of the widths of the two vertical transfer paths is equal to the width of one vertical transfer path in the first and second embodiments. Become.

  Therefore, also in this embodiment, the width of the vertical transfer path can be made narrower than in the case of the prior art in which charges accumulated in one light receiving element are transferred on the vertical transfer path at a time. Therefore, even if the light receiving element is increased in order to increase the sensitivity, the size of the entire imaging element is not increased.

1 is a block diagram illustrating a schematic configuration when a solid-state imaging device according to a first embodiment of the present invention is applied to a digital still camera. It is a schematic diagram which simplifies and shows arrangement | positioning of a light receiving element, a transfer gate, and a vertical transfer path. 6 is a timing chart showing the relationship between the transfer gate voltage, the vertical drive signal, and the charge transferred through the vertical transfer path in the first embodiment. It is a wave form diagram which shows the waveform of a transfer gate voltage. It is a schematic diagram which simplifies and shows arrangement | positioning of the light receiving element which concerns on the 2nd Example of this invention, a transfer gate, and a vertical transfer path. 12 is a timing chart showing a relationship between a transfer gate voltage, a vertical drive signal, and charges transferred through a vertical transfer path in the second embodiment. It is a wave form diagram which shows the waveform of the transfer gate voltage in a 2nd Example. It is a block diagram which shows the structure of the imaging part in the 3rd Example of this invention. It is a block diagram which shows the coupling | bond part of the horizontal transfer path and the vertical transfer path in the 3rd Example of this invention.

Explanation of symbols

10 Digital still camera
12 System controller
10A imaging system
10B signal processing system
10C drive signal generator
104 Imaging unit
20a, 20b Photo detector
24a, 24b, 36a, 36b, 40a, 40b, 42a, 42b Transfer gate
22, 44a, 44b Vertical transfer path
28, 46 Horizontal transfer path
V1 ~ V8, V1a ~ V8a, V1b ~ V8b Transfer elements

Claims (7)

A plurality of light receiving units for accumulating charges obtained by photoelectric conversion of incident light, a vertical transfer path for transferring accumulated charges read from the light receiving unit, and the vertical transfer paths for transferring the accumulated charges from the light receiving unit In a solid-state imaging device including a transfer gate for transferring to the device, the device includes:
Application means for applying a transfer gate voltage to the transfer gate in order to read the accumulated charge from the light receiving unit to the vertical transfer path;
The transfer gate voltage can be read from the light receiving unit to the vertical transfer path by dividing the accumulated charge into a plurality of times.
The vertical transfer path performs a transfer operation each time the stored charge is read out. A plurality of light receiving units for accumulating charges obtained by photoelectric conversion of incident light, a vertical transfer path for transferring accumulated charges read from the light receiving unit, and the vertical transfer paths for transferring the accumulated charges from the light receiving unit In a solid-state imaging device including a transfer gate for transferring to the device, the device includes:
Application means for applying a transfer gate voltage to the transfer gate in order to read the accumulated charge from the light receiving unit to the vertical transfer path;
A plurality of the transfer gates are provided for each light receiving unit,
The applying means applies the transfer gate voltage to the plurality of transfer gates,
The vertical transfer path performs a transfer operation after application,
A solid-state imaging device characterized in that the group of accumulated charges can be read through the plurality of transfer gates to be separated into a plurality of groups of charges and read out from the light receiving unit to the vertical transfer path. .   3. The solid-state imaging device according to claim 2, wherein the application unit applies the transfer gate voltage to the plurality of transfer gates with at least one of application timing and voltage magnitude different. Solid-state imaging device. 4. The solid-state imaging device according to claim 2, wherein a plurality of the vertical transfer paths are provided for each of the light receiving units, and different transfer gates included in one light receiving unit are connected to the different vertical transfer paths. And
The group of accumulated charges can be separated into a plurality of groups of charges via the plurality of transfer gates and a plurality of vertical transfer paths, and read out from the light receiving unit to the vertical transfer path. Solid-state imaging device.   5. The solid-state imaging device according to claim 1, wherein the device includes a horizontal transfer path that receives and further transfers the charge transferred through the vertical transfer path, and the same is the same in the horizontal transfer path. The solid-state imaging device, wherein charges read from the light receiving unit are mixed. Incident light is photoelectrically converted by a plurality of light receiving units to obtain electric charge, the electric charge is accumulated, the accumulated charge is transferred from the light receiving unit to a vertical transfer path via a transfer gate, and read from the light receiving unit. In an imaging method for transferring the accumulated charge that has been taken out on a vertical transfer path, the method includes:
In order to read the accumulated charge from the light receiving portion to the vertical transfer path, a transfer gate voltage is applied to the transfer gate. A process that is readable to the transfer path; and
And a step of performing a transfer operation on the vertical transfer path each time the accumulated charge is read. Incident light is photoelectrically converted by a plurality of light receiving units to obtain electric charge, the electric charge is accumulated, the accumulated charge is transferred from the light receiving unit to a vertical transfer path via a transfer gate, and read from the light receiving unit. In an imaging method for transferring the accumulated charge that has been taken out on a vertical transfer path, the method includes:
Applying a transfer gate voltage to the plurality of transfer gates provided for each of the light receiving units in order to read the accumulated charge from the light receiving unit to the vertical transfer path;
Performing a transfer operation on the vertical transfer path after application,
An imaging method, wherein the group of accumulated charges can be read through the plurality of transfer gates to be separated into a plurality of groups of charges and read out from the light receiving unit to the vertical transfer path.