JP2007294889A - Membrane structure element, and method of manufacturing same - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a membrane structure element which can be easily fabricated and has high heat insulation and high quality, and to provide a method of manufacturing the same. <P>SOLUTION: In this manufacturing method, the membrane structural element is manufactured which includes a membrane formed of a silicon oxide film and a substrate for supporting the membrane in the air by supporting a part of the outer edge of the membrane. The method includes a film forming step of forming a heat-shrinkable silicon oxide film 13 on a surface of a silicon substrate 2 by plasma CVD, a heat treatment step of performing heat treatment for thermally shrinking the silicon oxide film 13 having been formed on the substrate 1, and a removal step of forming a concave portion 4 by removing a part of the substrate 2 such that a portion corresponding to the membrane in the silicon oxide film 13 is supported in the air relative to the substrate 2. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to a membrane structure element mainly used for a thermal sensor such as an infrared sensor, an air flow meter, and a gas sensor.

  In recent years, various techniques for manufacturing a thermal sensor using semiconductor microfabrication have been developed. In some cases, the thermal type sensor employs a hollow structure in which a membrane (film) having a detection electronic element is supported in a hollow state with respect to the substrate in order to maintain heat insulation with respect to the substrate. An element having a structure in which the membrane is supported in a hollow state is called a membrane structure element.

Usually, the membrane is formed of a silicon oxide film such as a SiO ₂ (silicon dioxide) film excellent in thermal insulation, and this film can be easily formed by oxidizing the surface of a silicon substrate. The SiO ₂ film thus formed by surface oxidation is referred to as “thermally oxidized SiO ₂ film”. However, since this thermal oxide SiO ₂ film has a smaller coefficient of thermal expansion than most substrate materials such as single crystal silicon used as a substrate, a thermal oxide SiO ₂ film used as a membrane is formed, and after cooling, the underlying substrate When the material is removed in a concave shape by etching or the like to make the membrane hollow, due to the large compressive stress (about 200 MPa when the substrate is single crystal silicon) remaining in the thermally oxidized SiO ₂ film, The supported membrane becomes “sagging”. For this reason, the quality of the membrane structure element is deteriorated, and the strength of the membrane is lowered. For this reason, it is difficult to form a membrane with a large area.

Therefore, various techniques for producing a large-area membrane by minimizing the internal stress remaining in the membrane after the formation of the membrane have been proposed. For example, in Japanese Patent Laid-Open No. 6-132277 (Patent Document 1), a membrane is formed by laminating a Si ₃ N ₄ film and a SiO ₂ film having different thermal expansion coefficients, and the Si ₃ N ₄ film is inherent in the SiO ₂ film. A technique for reducing the residual stress of the membrane as a whole by reducing the compressed residual stress is described. Japanese Patent Application Laid-Open No. 8-264844 (Patent Document 2) describes that the Young's modulus of the membrane is lowered by forming the central portion of the membrane with a Si ₃ N ₄ film or adding a group V element to the SiO ₂ film. The technology to be described is described. In addition, in Lie-yi Sheng et al., Transducers '97, 1997, PP.939-942. (Non-patent Document 1), a polysilicon wiring that also serves as a heater is attached to the SiO ₂ membrane. In this way, a method for removing the slack of the membrane has been proposed.
JP-A-6-132277 JP-A-8-264844 Lie-yi Sheng et al., Transducers '97, 1997, PP.939-942.

However, in the method described in Patent Document 1, it is necessary to form a Si ₃ N ₄ film having a completely different composition from that of the SiO ₂ film. In addition, the thermal conductivity of Si ₃ N ₄ is 22.7 W / mK, which is an order of magnitude higher than the thermal conductivity of SiO ₂ , which is 1.4 W / mK. In addition, when trying to increase the area, the entire membrane is warped like bimetal due to the difference in thermal expansion coefficient, and the reliability is lowered. Moreover, in the method described in Patent Document 2, the manufacturing process is complicated, and the degree of freedom in element design is impaired. Further, in the method described in Non-Patent Document 1, since the stress reduction of the membrane itself is not taken into consideration, warpage is still generated and the degree of freedom of design is impaired.
The present invention has been made in view of such problems, and an object of the present invention is to provide a high-quality membrane structure element that is easy to manufacture, has good heat insulation properties, and a method for manufacturing the same.

  When the silicon oxide film constituting the membrane is formed by the plasma CVD method, the present inventor, like the thermally oxidized silicon oxide film, retains a compressive stress in the film, but thereafter, the film is formed by performing a heat treatment. It has been found that since it is densified and thermally contracted, it can be suppressed to a small stress of ± 100 MPa or less near room temperature. By reducing the residual stress of the membrane in this way, even when the membrane is supported in a hollow shape, the silicon oxide film is hardly bent or warped, and is composed of silicon oxide, so it has excellent heat insulation, and A membrane with excellent flatness can be obtained. The present invention has been completed based on such knowledge.

  That is, the method for producing a membrane structure element of the present invention comprises a membrane structure element comprising a membrane formed of a silicon oxide film and a substrate that supports the membrane in a hollow state by supporting a part of the periphery of the membrane. A film forming step of forming a heat-shrinkable silicon oxide film on the surface side of a substrate formed of a material having a larger thermal expansion coefficient than silicon oxide, and the heat-shrinkable silicon oxide film A heat treatment step of heating and shrinking the substrate, and a removal step of removing a part of the substrate in a concave shape so that the membrane corresponding portion of the silicon oxide film is supported in a hollow state with respect to the substrate.

According to the manufacturing method of the present invention, a heat-shrinkable silicon oxide film is formed on the substrate, and the silicon oxide film is thermally shrunk in the heat treatment step. The compressive stress inherent in the silicon film can be easily reduced or eliminated. For this reason, even if the membrane is supported hollow on the substrate by the removal step, the membrane does not bend or warp, and a high-quality membrane that is easily supported in a flat shape can be obtained. In addition, since the membrane is formed only with a silicon oxide film, it has excellent heat insulation and is easier to manufacture than a composite film with Si ₃ N _4. By densifying this, the strength of the membrane itself, Durability can be improved.

In the manufacturing method, an element forming step for forming a metal wiring having a predetermined pattern on the surface of the silicon oxide film can be provided, and the heat-shrinkable silicon oxide film is easily formed by a plasma CVD method. be able to. When a film is formed by a plasma CVD method, it is preferable that silane gas is used as a film forming source gas, the substrate temperature during film formation is 200 ° C. or lower, and the input power is 0.21 W / cm ² or lower.

  In the heat treatment step, the heating temperature is preferably 400 ° C. or higher. In addition, it is preferable to heat the silicon oxide film together with the substrate so that the heat-shrinkable silicon oxide film uniformly shrinks, and the stress inherent in the silicon oxide film is preferably tensile (+) from 100 MPa. (−) It is desirable to heat so as to have a tensile stress range of 100 MPa, more preferably +50 MPa to 0 MPa. Thereby, a hollow structure membrane excellent in flatness can be obtained. In addition, by using a substrate made of single crystal silicon and removing a part of the substrate by silicon anisotropic etching in the removing step, a recess can be easily formed along the substrate surface below the membrane. Can do.

  The membrane structure element of the present invention includes a membrane formed of a silicon oxide film, and a substrate that supports the membrane in a hollow state by supporting a part of the periphery of the membrane, the silicon oxide film being a heat It is supported by the substrate in a flat shape by contraction. Regarding the flatness of the membrane, the maximum deflection of the membrane should be 0.1% or less of the maximum width of the membrane, with the surface of the silicon oxide film having the same configuration as the membrane formed on the surface of the substrate as a reference plane. Is preferred. According to this membrane structure element, the membrane is formed of a silicon oxide film and is supported in a flat shape by thermal contraction, so that it is easy to manufacture, excellent in heat insulation and quality of the membrane, and as a result, reliable and durable as an electronic component. Excellent in properties.

  According to the method for manufacturing a membrane structure element of the present invention, the membrane that is the basis of the membrane is formed in advance by a heat-shrinkable silicon oxide film, and this is heated and shrunk in the heat treatment step. The stress inherent in the silicon film can be easily controlled over the range from compression to tension, and the stress inherent in the membrane can be eliminated and flattened without taking complex film structures of different compositions and complicated manufacturing processes. Membrane hollow structure with excellent properties and quality can be easily obtained. In addition, according to the membrane structure element of the present invention, the membrane is formed of a silicon oxide film and is supported in a flat shape by thermal contraction, so that it is easy to manufacture, has excellent quality, and is reliable and durable as an electronic component. Excellent in properties. In general, according to the present invention, in a membrane structure element used for a thermal sensor such as an infrared sensor, an air flow meter, and a gas sensor, an element structure and a manufacturing process are simplified, and a performance is improved and a highly reliable element is provided. be able to.

  Hereinafter, a membrane structure element according to an embodiment of the present invention will be described together with a manufacturing method thereof. FIG. 2 shows a membrane structure element according to the embodiment. This element has a square-shaped membrane 1 formed of a silicon oxide film 3 and the same film configuration as the silicon oxide film constituting the membrane 1. A silicon substrate 2 having a silicon oxide film 3 having a laminated surface formed thereon is provided. The membrane 1 is supported in a hollow and flat shape by four support arms 5 on a recess 4 provided in the substrate 2. In the support arm 5, the membrane 1, the support arm 5, and the silicon oxide film 3 on the substrate are integrally formed so as to connect the four corners of the membrane 1 and the substrate 2. On the membrane 1, a Pt / Ti wiring element 6 in which a two-layer structure line of a Pt layer and a Ti layer, which constitutes a detection electronic element, is arranged in a vertically bent shape is laminated on the surface.

  Hereinafter, the manufacturing method of the membrane structure element of the said embodiment is demonstrated with reference to FIG. First, a general-purpose silicon substrate (single crystal silicon substrate with a crystal orientation (100)) 2 is prepared, and as shown in FIG. 1 (1), the front and back surfaces of the substrate 2 are thermally oxidized to a very thin thickness of about 0.1 μm. Silicon oxide oxide films 11 and 12 are formed. The backside thermally oxidized silicon oxide film 12 is formed to protect the backside when the silicon substrate is etched in a later step. Basically, the surface-side thermally oxidized silicon oxide film 11 is not necessary. For this reason, the surface-side thermally oxidized silicon oxide film 11 may be removed after the film formation, and by forming an appropriate protective film on the back surface of the substrate, the formation of the thermally oxidized silicon oxide film on the front and back surfaces is omitted. Can do. In addition, since the compressive stress of about 200 MPa remains in the thermally oxidized silicon oxide film, it is preferable that the thermally oxidized silicon oxide film 11 on the surface side does not exist, but it is as thin as approximately 0.1 μm and will be described later. By making the heat-shrinkable silicon oxide film 13 sufficiently thicker than the thermally oxidized silicon oxide film 11, the influence on the residual stress can be ignored. For this reason, in this embodiment, the surface-side thermally oxidized silicon oxide film 11 is left as it is.

  Next, a heat-shrinkable silicon oxide film 13 is formed on the surface-side thermally oxidized silicon oxide film 11 as shown in FIG. This process is called a film forming process. The thickness of the heat-shrinkable silicon oxide film may be set within a range of about 0.1 μm to 10 μm from the viewpoint of film strength and thermal insulation. In the case where the thermally oxidized silicon oxide film 11 is formed, it is preferable that the thickness of the thermally oxidized silicon oxide film is 5 times or more. The surface-side thermally oxidized silicon oxide film 11 and the thermally shrinkable silicon oxide film 13 are collectively referred to as the silicon oxide film 3 without being distinguished from each other.

  As the film forming method of the heat-shrinkable silicon oxide film 13, a plasma CVD method is preferable because of the film forming speed and the ease of film forming. Here, plasma input power and stress remaining in the film when a silicon oxide film is formed by plasma CVD will be described.

A silicon oxide film was formed as follows. A silicon substrate (thickness 525 μm) on which the thermal silicon oxide film 11 (thickness 0.1 μm) was formed was prepared, and a silicon oxide film 1 μm thick was formed thereon by plasma CVD. The sample stage of the plasma CVD apparatus used for the film formation and the size of the electrode disposed opposite thereto are each 30 cm in diameter (surface area of about 707 cm ² ). Deposition conditions are SiH ₄ , N ₂ , N ₂ 0 mixed gas, gas pressure is 80 Pa, substrate temperature is 200 ° C. or 300 ° C., and various silicon oxide films are formed by changing plasma input power. did.

After the film formation, the residual stress of the film was measured using each silicon oxide film. The residual stress of the film was determined from the following formula based on the amount of warpage of the substrate. The value measured at room temperature (23 ° C.) was used as the amount of warpage. The amount of warpage of the substrate was measured by supporting a substrate (diameter 100 mmφ) at three points and reflecting the laser beam or using a stylus type surface roughness meter.
[sigma] = 1/6 * {1 / Rpost-1 / Rpre} * E / (1- [nu]) * ts < ² > / tf
Where E: Young's modulus of substrate (silicon), ν: Poisson's ratio of substrate (silicon), Rpost: curvature radius of substrate warp after film formation, Rpre: radius of curvature of substrate warp before film formation, ts: Substrate thickness, tf: film thickness, (E / (1-ν) value: 1.8 × 10 ¹¹ Pa in the case of a single crystal silicon (100) substrate.

  FIG. 3 shows the relationship between the plasma input power obtained as described above and the stress remaining in the film. From the figure, for example, when the substrate temperature is 300 ° C. and the input power is 100 W, the residual stress of the film is −300 MPa (compression), and the absolute value of the internal stress after film formation decreases as the input power increases. I understand. The fact that the residual stress of the silicon oxide film after the film formation is a compressive stress is understood from the fact that the substrate after the film formation is warped with the silicon oxide film surface convex. It can also be seen that the residual stress is reduced when the substrate temperature is 200 ° C. rather than 300 ° C.

  Next, the substrate on which the heat-shrinkable silicon oxide film is formed is subjected to a heat treatment to heat-shrink the heat-shrinkable silicon oxide film 13 to reduce or eliminate the compressive residual stress inherent in the silicon oxide film 3. To do. This process is called a heat treatment process.

  Here, the action of reducing the compressive residual stress by the heat treatment will be described in detail. Using a silicon substrate on which a silicon oxide film was formed with a substrate temperature of 300 ° C. and a plasma CVD input power of 200 W, the internal stress relative to the heating temperature when this was heated in a nitrogen gas atmosphere was measured. The result is shown in FIG. The heating of the silicon oxide film is performed by inserting the silicon substrate on which the silicon oxide film is formed into a heat treatment furnace, and the atmosphere temperature in the furnace controlled to the measurement temperature and the temperature of the silicon substrate almost coincide. The holding time at the measurement temperature was 1 hr. The measuring apparatus used is model number F2410 manufactured by KLA-Tencor.

  From FIG. 4, the stress that was −200 MPa before the heat treatment hardly changed to around 400 ° C., but suddenly changed (turned to plus) between 400 ° C. and 700 ° C. It is considered that the internal stress is changed to a positive (tensile stress) when the dangling bonds in the silicon oxide film react in this temperature range and the film becomes dense and slightly contracts. From 700 ° C. to 800 ° C., the slope of the curve decreases. When the temperature is lowered, the stress decreases almost linearly, and finally shows a value of about −80 MPa at room temperature. Thus, the heating temperature in the heat treatment is preferably 400 ° C. or higher, and may be heated at about 1000 ° C., but is preferably 800 ° C. or lower, more preferably 700 ° C. or lower. .

Each substrate on which a silicon oxide film was formed by changing the input power by the plasma CVD method was subjected to a heat treatment in nitrogen gas at 800 ° C. for 1 hr. As shown in FIG. It can be seen that the stress reduction effect is greater when the film is formed with a small input power. In addition, regarding the heat-shrinkable silicon oxide film formed at a substrate temperature of 300 ° C., the internal stress was almost zero at an input power of 75 W, and the average was reduced to about −50 MPa. Further, in a heat-shrinkable silicon oxide film formed at a substrate temperature of 200 ° C. and an input power of 75 W to 150 W (0.11 W / cm ^{2 to} 0.21 W / cm ² ), the residual stress is 0 to +50 MPa and the internal stress is tensile. It became stress.

Further, FIG. 3 shows that the smaller the input power and the lower the substrate temperature, the greater the effect of reducing the residual stress of the film by the heat treatment, and the easier the stress adjustment. In order to adjust to an appropriate stress range according to the material of the substrate and the thickness of the heat-shrinkable silicon oxide film, it is considered effective to adjust the input power and the substrate temperature as described above. When a film having a thickness of about 1 μm, which is suitable for the application of the present invention, is formed on a single crystal substrate, the substrate temperature is 300 ° C. or less and the input power is 250 W (0.35 W), as is apparent from FIG. / Cm ² ) or less, the residual stress of the film can be adjusted to about −100 MPa or less, the substrate temperature is 300 ° C. or less, and the input power is 150 W (0.21 W / cm ² ) or less. The residual stress of the film can be adjusted to about −50 MPa or less. Furthermore, the residual stress of the film can be adjusted to a tensile stress of about 0 to +50 MPa by setting the substrate temperature to 200 ° C. or less and the input power to 150 W (0.21 W / cm ² ) or less. Note that, from the viewpoint of securing the stability of film formation by the plasma CVD method, it is preferable that the input power is 50 W (0.07 W / cm ² ) or more and the substrate temperature is 100 ° C. or more.

Furthermore, the stress reduction effect by heat treatment was confirmed by the following investigation from the organizational viewpoint. The bonded state of silicon oxide was examined by Fourier transform infrared absorption spectroscopy (FTIR) for the heat-shrinkable silicon oxide film after film formation (before heat treatment) and the silicon oxide film after heat treatment. As an example, FIG. 5 shows an infrared absorption spectrum of a film formed at a substrate temperature of 200 ° C. and an input power of 75 W in FIG. From the figure, by performing the heat treatment, the wave number 3000～3700Cm ^-1, and 950 cm ^-1 absorption band due to Si-OH bonds and H ₂ 0 observed around it disappears, mainly of silicon oxide in the vicinity of 1070 cm ^-1 It can be seen that the band shows an increasing trend. That is, the silicon oxide film changes from a state in which there are many incomplete bonds therein to a denser silicon oxide film by heat treatment. From this, it is considered that the film contracts by heat treatment and changes to a tensile stress state.

  Next, as shown in FIG. 1 (3), a Pt / Ti wiring element having a predetermined pattern is formed on the silicon oxide film 3 after the heat treatment by a lift-off method or the like. On the silicon oxide film 3, in addition to the detection element wiring pattern, an appropriate wiring pattern is also formed, but is not shown. This process is called an element forming process.

  Next, the silicon of the substrate 2 under the membrane-corresponding portion is removed so that the silicon oxide film portion (membrane-corresponding portion) in the vicinity including the Pt / Ti wiring element has a hollow structure. This process is called a removal process. Specifically, the opening 14 is formed by removing the silicon oxide film 3 by chemical or physical means around the portion corresponding to the membrane, avoiding the portion corresponding to the support arm 5 (see FIG. 2) of the membrane 1. To do. Thereafter, the substrate 2 is immersed in an etching solution, and the silicon of the substrate 2 exposed in the opening 14 is etched. At this time, the silicon is anisotropically etched depending on the crystal orientation, and the concave portion 4 penetrating in the lateral direction is easily formed in the lower portion of the portion corresponding to the membrane. As the etching solution, for example, a TMAH (tetramethylammonium hydroxide) solution heated to about 80 ° C. is used. After the recess 4 is formed, the etching solution is washed so as not to break the membrane and dried to complete the membrane structure element shown in FIG.

  Of the membrane structure element manufactured in this way, the substrate temperature was set to 300 ° C., and the plasma CVD input power was set to 100 W and 200 W (the stress of the silicon oxide film 3 after the film formation was −300 MPa, -200 MPa), the maximum bending amount of the membrane supported in the hollow state at room temperature (the distance to the surface of the maximum bending portion of the membrane measured using the surface of the silicon oxide film 3 of the substrate as a reference plane) The ratio of the deflection amount to the maximum width of the membrane was determined. The maximum amount of deflection of the membrane was measured using an optical method. Specifically, it was measured using the height measurement function of the microscope. As a result, when the input power was 100 W, it was 0.05%, and when the input power was 200 W, it was 0.1%, and it was confirmed that the membrane was supported on the substrate in a very flat state.

  In a membrane structure element having such a hollow structure, the temperature easily rises due to the heat insulation and small heat capacity of the membrane structure by passing a current through the Pt / Ti wiring element. In this case, it is possible to detect the air volume related to the speed at which heat from the hollow structure is taken from the change in the resistance value of the Pt / Ti detecting element.

  In the above embodiment, in the film forming step, the heat-shrinkable silicon oxide film 13 is formed by plasma CVD, but not limited to plasma CVD, PVD such as sputtering or vapor deposition, sol / gel, etc. Any method can be applied as long as it is a method of forming a silicon oxide film having a density lower than that of the silicon oxide film. In the above embodiment, a single crystal silicon substrate is used as the substrate. However, the present invention is not limited to this, and other crystals, ceramics, resins, and the like can be used.

  Moreover, in the said embodiment, although each process was implemented in order of the film formation process, the heat treatment process, the element formation process, and the removal process from the ease of manufacture of a hollow and excellent flatness membrane, the element formation process Before the removal step, after the wiring element is formed on the silicon oxide film, a silicon oxide film is further formed on the wiring element, and the wiring element is wrapped with the silicon oxide film (the films exist above and below the element). Can be configured. Further, when the element process is not performed, the heat treatment process and the removal process may be interchanged.

It is explanatory drawing which shows the manufacturing process of the membrane structure element concerning embodiment of this invention. FIG. 2 is a (1) cross-sectional view and (2) a plan view of a membrane structure element according to an embodiment of the present invention. (1) is a cross section taken along line AA of (2). It is a graph which shows the relationship between the input electric power of plasma CVD, and the stress of a silicon oxide film. It is a graph which shows the relationship between the heating temperature and film | membrane stress of the silicon oxide film formed into a film by plasma CVD. It is an infrared absorption spectrum of a silicon oxide film before heat treatment and after heat treatment.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Membrane 2 Substrate 3 Silicon oxide film 6 Pt / Ti wiring element (electronic element)
13 Heat-shrinkable silicon oxide film

Claims (10)

A membrane structure element manufacturing method comprising a membrane formed of a silicon oxide film, and a substrate that supports the membrane in a hollow state by supporting a part of the periphery of the membrane,
A film forming step of forming a heat-shrinkable silicon oxide film on the surface side of a substrate formed of a material having a larger thermal expansion coefficient than silicon oxide;
A heat treatment step of heating and thermally shrinking the heat-shrinkable silicon oxide film;
A method for manufacturing a membrane structure element, comprising a removal step of removing a part of the substrate in a concave shape so that the membrane-corresponding portion of the silicon oxide film is supported in a hollow state with respect to the substrate as a membrane.   The method for producing a membrane structure element according to claim 1, further comprising an element forming step of forming a metal wiring having a predetermined pattern on the surface of the silicon oxide film.   The membrane structure element manufacturing method according to claim 1, wherein the heat-shrinkable silicon oxide film is formed by a plasma CVD method. The method for manufacturing a membrane structure element according to claim 3, wherein a silane gas is used as a film forming raw material gas, a substrate temperature during film formation is set to 200 ° C or lower, and input power is set to 0.21 W / cm ² or lower.   The method for manufacturing a membrane structure element according to any one of claims 1 to 4, wherein heating is performed at a temperature of 400 ° C or higher in the heat treatment step.   In the heat treatment step, the heat-shrinkable silicon oxide film is heated together with the substrate, and the stress inherent in the silicon oxide film is in a stress range from tensile (+) 100 MPa to compression (-) 100 MPa. The manufacturing method of the membrane structure element described in any one of 1 to 5.   The method for manufacturing a membrane structure element according to any one of claims 1 to 6, wherein the substrate is made of single crystal silicon, and a part of the substrate is removed by silicon anisotropic etching in the removing step.   A membrane structure element comprising a membrane formed of a silicon oxide film and a substrate that supports the membrane in a hollow state by supporting a part of the periphery of the membrane. The membrane structure element manufactured by the manufacturing method described in the item.   A membrane comprising a membrane formed of a silicon oxide film and a substrate for supporting the membrane in a hollow state by supporting a part of the periphery of the membrane, wherein the silicon oxide film is supported flat by heat shrinkage. Structural element.   The maximum deflection amount of the membrane is 0.1% or less of the maximum width of the membrane with the surface of the silicon oxide film having the same configuration as the membrane formed on the surface of the substrate as a reference plane. Membrane structure element.

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