JP2007293518A - Computer system configuration method, computer, and system configuration program - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To facilitate various setting in adding a peripheral apparatus such as a storage device to a blade server. <P>SOLUTION: The computer is provided with a chip set connected to a plurality of processors and a slot, which is constructed to allow access from the chip set and the processors and allows attachment/detachment of a storage device. In this computer, the system configuration method for allocating the storage device mounted to the slot to the processors includes processing for detecting installation of the storage device, processing for reading identification information of the storage device when its installation is detected, processing for determining the type of the storage device from the previously set type information based on the identification information, and processing for executing a previously defined procedures based on the determined type of the storage device. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to a computer system configuration method, and more particularly to a technique for changing the configuration of a storage device of a blade server.

  The blade server stores a plurality of servers called thin blades in a rack mount. Therefore, by inserting the blades into the rack mount and storing them, a plurality of servers can be constructed while realizing space saving.

  In addition, the blade server has high expandability by making a peripheral device such as a storage device or a network device into a blade.

  However, when adding a blade to a blade server, it is necessary to turn off the power of the blade server and stop and restart the operating system.

Therefore, Patent Document 1 discloses a technique related to so-called hot swap, in which peripheral devices are replaced without turning off the power.
JP2003-088874A

  However, although the storage apparatus can be replaced or added without stopping the operating system by the hot swap technique, various settings such as hardware settings have to be executed.

  An object of the present invention is to provide a blade server that reduces management costs by simplifying or automating settings necessary when adding a peripheral device such as a bladed storage device.

  In a typical embodiment of the present invention, a computer comprising: a chip set connected to a plurality of processors; and a slot configured to be accessible from the chip set and the processor and capable of detaching a storage device; In a system configuration method for assigning a storage device loaded in a slot to the processor, a process for detecting loading of the storage device, a process for reading identification information of the storage device when loading of the storage device is detected, A process for determining the type of the storage device from the type information set in advance based on the identification information, and a process for executing a predefined procedure based on the determined type of the storage device. And

  According to a typical embodiment of the present invention, when a storage device is loaded in the blade server, the chipset automatically identifies the type of the storage device. Therefore, for example, it is possible to automatically execute setting processing according to the use of the loaded storage device.

  FIG. 1 is a hardware configuration diagram of the blade server according to the embodiment of this invention. The blade server includes CPUs 201 to 205, a chip set 206 with a built-in housing, and a slot 213 into which a memory blade can be inserted. Further, the blade server is connected to the network 100 through the network interface 217.

  In the present embodiment, the blade server stores five CPUs 201 to 205. The slot 213 stores the memory blades 241 to 246. Furthermore, the slot 213 includes a blade detection unit that detects loading of a memory blade.

  The blade server can operate a plurality of servers. The plurality of servers are configured such that a CPU to be used and a memory blade are associated with each other by software stored in the chip set 206. A user accesses each server through the network 100.

  The CPUs 201 to 205, the chip set 206, and the slot 213 are connected to each other via an internal bus 218. The CPUs 201 to 205 are numbered # 0 to # 4. The CPUs 201 to 205 are stored in the chassis of the blade server. Note that the CPU may be mounted on the blade. Further, these CPUs 201 to 205 may have performance differences, and a CPU excellent in image processing and a CPU excellent in scientific and technological calculation processing can be mixed. The CPUs 201 to 205 execute various processes by executing programs stored in the memory blades 241 to 246.

  The chip set 206 executes processing such as starting and stopping of a blade server, addition and deletion of a memory blade, and configuration definition. The chipset 206 includes a control processor 215 and a control memory 218. The chip set 206 is connected to the external input device 212 via the input / output interface 216.

  The control processor 215 executes programs stored in the control memory 218 and executes various processes.

  The control memory 218 includes a configuration management manager 209, a server configuration management table 210, and a header information table 211.

  The configuration management manager 209 includes a server start / stop program 221, a memory blade recognition program 222, and a memory dump acquisition program 223.

  The server start / stop program 221 executes the start and stop processing of the blade server in accordance with the input from the external input device 212. A specific procedure will be described with reference to FIGS.

  The memory blade recognition program 222 is automatically executed when a memory blade is loaded. As will be described later with reference to FIG. 6, the memory blade recognition program 221 reads the header information of the memory blade and executes a predetermined procedure such as initial setting.

  The memory dump acquisition program 223 acquires a memory dump of the memory blade as will be described later with reference to FIG.

  The server configuration management table 210 stores blade server configuration information, as will be described later with reference to FIG. The server configuration management table 210 stores the relationship between each server operating in the blade server, the CPUs 201 to 205, and the memory blades 241 to 246.

  As will be described later with reference to FIG. 4, the header information table 211 defines the relationship between header information, functions, and uses of the memory blades 241 to 246.

  FIG. 12 is a diagram showing the CPU information table 214. Each CPU type 1202, performance 1203, operation status 1205, CPU attribute 1204, and the like are stored. The operating status of the CPU is periodically updated by the control processor 215. Indicates the status of operation and non-operation such as during operation and failure. Further, CPU usage rate, CPU load information, and the like can be stored. The CPU attribute 1204 records the usage of the CPU. For example, when a memory blade storing an image processing application is loaded, a CPU having “Graphic” recorded as an attribute can be preferentially assigned. The CPU type 1202 stores a CPU type, such as PowerPC (registered trademark) or Pentium (registered trademark).

  The configuration management manager 209 logs in from the external input device 212 via a network or through a serial console. In the external input device 212, the association between the CPU and the memory blade is set.

  An internal bus address 207 is assigned to a plurality of slots 213 into which memory blades are loaded. The internal bus address 207 is divided and managed in increments of 100 from address 0 to address 1100 for each slot. The internal bus address 207 specifies the loading position of the memory blade by the chip set 206.

  The blade server of this embodiment includes a plurality of memory blades 241 to 246. Each of the memory blades 241 to 246 is assigned to one slot. In addition, it is good also as a structure which can use a some slot in order to mount a high capacity | capacitance memory blade provided with a some socket.

  In the present embodiment, the memory blade is a non-volatile memory that has a large capacity and can be accessed at high speed. The capacity of the memory blade is, for example, a capacity of several gigabytes that can store an operating system (OS) kernel or a single application. The access speed is equivalent to that of a DRAM (Dynamic Random Access Memory) mainly used for the main storage device, specifically, a speed of several tens of ns or more.

  Therefore, the memory blade according to the present embodiment functions as a main storage device and a storage device. Many technologies have been developed for practical use of nonvolatile memories having such performance. For example, a magnetic recording type arbitrary writing / reading memory (MRAM) and a ferroelectric memory (FeRAM: Ferroelectric RAM) may be used.

  The MRAM is a memory that stores data by magnetism. The MRAM uses a ferromagnetic tunnel magnetoresistive (TMR) element generated by spin-dependent electrical conduction.

  FeRAM is a memory architecture that exists on the extension of DRAM. FeRAM enhances non-volatility by using a dielectric capacitor that holds charges in a DRAM cell as a ferroelectric.

  The memory blade according to the present embodiment is classified into three types according to the function or application, and the OS memory blade, the application (AP) memory blade, and the storage memory blade. Further, as described above, the memory blade can function as a main storage device and a storage device. Therefore, the memory blade can store the OS and the application in the activated state.

  Since the OS memory blade stores an execution image in a state in which a program necessary for executing the OS is read and the OS is activated, the system can be activated quickly. As described above, the application memory blade can store the application in the activated state. The storage memory blade stores data as a storage device. Details of the configuration of each memory blade will be described later with reference to FIG.

  OS memory blades 241, 244 and 245 are loaded in the slot 213 of the blade server. These OS memory blades are assigned numbers 0 to 100, 300 to 400, and 800 to 900 of the internal bus address 207, respectively. Similarly, two memory blades for application 243 and 246 are loaded in the slot 213. These application memory blades are assigned internal bus address 207 numbered 200-300 and 900-1000. Further, storage memory blades 242 are loaded in the internal bus addresses 207 at numbers 100 to 200. These configuration information and resource information are stored in the server configuration management table 210.

  FIG. 2 is a diagram for explaining the partition of the memory blade loaded in the blade server casing. Memory blades have different configurations of areas partitioned by the memory blade according to functions and applications such as OS, application, and storage.

  FIG. 2A shows an area configuration of the OS memory blade. The OS memory blade area includes a header information area 101, an OS execution area 102, a user setting area 103, and a data area 104.

  The header information area 101 stores header information for identifying the type of the memory blade. When an OS memory blade is loaded, the blade server can read header information and execute processing such as initial setting for the OS memory blade.

  An OS execution image is written in the OS execution area 102. As described above, the OS memory blade can speed up startup by holding the OS execution image in a state in which the initialization process is completed.

  The user setting area 103 is an area for storing OS system setting information. The user setting area 103 stores, for example, network settings and user information. The data storage area 104 is an area for storing arbitrary data of the OS. The data storage area 104 stores, for example, temporary files necessary for OS execution.

  Since the OS memory blade holds the OS execution image, it can operate alone as a blade server.

  FIG. 2B shows an area configuration of the application memory blade. The area configuration of the application memory blade includes a header information area 111, an application (AP) execution area 112, a user setting area 113, and a data area 114.

  Similar to the OS memory blade, the header information area 111 stores header information for identifying the type of the memory blade. The AP execution area 112 stores an execution image of an application or middleware such as a Web server program or a DB server program.

  The user setting area 113 stores application or middleware specific setting information written in the AP execution area 112. The data area 114 stores arbitrary data of the application.

  Since the application memory blade does not have an OS execution image, it cannot be operated alone. Therefore, the application stored in the application memory blade can be operated in cooperation with the OS memory blade.

  FIG. 2C shows a storage memory blade. Similarly to the OS memory blade, the header information area 121 stores header information for identifying the type of the memory blade. The data area 122 is a storage area for storing input / output data.

  Since the storage memory blade cannot be operated independently like the application memory blade, it operates in cooperation with the OS memory blade. Further, the storage memory blade can acquire a memory dump of the operating OS and applications. A method for acquiring the memory dump will be described later with reference to FIG. Furthermore, the storage memory blade can also be used for backup acquisition. The storage memory blade may be used as the application data area 122.

  FIG. 3 is a table showing the access authority of each memory blade. Regions A to D in the figure correspond to A to D attached to the head of the region name in FIG.

  A record 301 is an access right to each storage area of the OS memory blade.

  The area A of the OS memory blade, that is, the header area 101 is set to be readable only (-r--). The header information does not need to be rewritten unless the usage is changed while the server is running after the memory blade is loaded. In order to operate the server stably, it is better not to allow changes to the header information of the memory blade. Therefore, the header area in which the header information is stored can only be read from the control program stored in the chip set 206 or the OS.

  The OS execution area 102 is set to be executable (−r−x). In the OS execution area 102, an execution image of the OS is recorded. The user setting area 103 is set to be capable of reading and writing (-rwx). The data area 104 is set to be readable and writable (-rwx).

  A record 302 is an access right to each storage area of the application memory blade.

  The header area 111 is set to be readable only (-r--), like the header area 101 of the OS memory blade. The AP execution area 112 is set to be executable (−r−x). The user setting area 113 is set to be capable of reading and writing (-rwx). The data area 114 is set to be readable and writable (-rwx).

  A record 303 is an access right to each storage area of the storage memory blade. In this embodiment, the storage memory blade is mainly used for storing data, and therefore does not have an execution area and a user setting area.

  The header area 121 is set to be readable (-r--), like the header area 101 of the OS memory blade. The data area 122 is set to be readable and writable (-rwx).

  FIG. 4 is a diagram showing the header information table 211 stored in the control memory 218 of the chip set 206. As described above, the header information of each memory blade is stored in the header information areas 101, 111, and 121 that are read-only areas.

  A record 401 is header information of the OS memory blade. In the present embodiment, the header information is set to “0a”.

  A record 402 is header information of the application memory blade. In the present embodiment, the header information is set to “1b”.

  A record 403 is header information of the storage memory blade. In the present embodiment, the header information is set to “ab”.

  In FIG. 4, three types of header information are shown, but the header information may be subdivided according to the function or application. For example, header information corresponding to performance such as memory blade capacity or access speed may be defined according to the use of the memory blade for image processing or scientific and technical calculation. In the case of an application memory blade, an identifier that identifies an OS that can execute an application can be added to the header information.

  It is also possible to select a CPU to be assigned based on the header information. For example, when a memory blade having header information for image processing is mounted, the chip set 206 is based on the attribute 1204 of the CPU information table 214 corresponding to the chip set 206, and the CPU # 5 whose attribute 1204 is “Graphic”. Can be assigned to this memory blade.

  FIG. 5 is a diagram showing the server configuration management table 210 stored in the control memory 218 of the chipset 206.

  The server configuration management table 210 holds the correspondence between memory blades and CPUs. The server configuration management table 210 includes an internal address 501, a type 502, a CPU number 503, and a server name 504.

  The internal address 501 is information on the slot position where the memory blade is loaded, and stores the internal bus address 207. The type 502 stores the type of the loaded memory blade. The CPU number 503 stores the CPU number used by the loaded memory blade. The server name 504 stores the name of the server constructed by associating the memory blade with the CPU.

  As shown in FIG. 5, the blade server of the present embodiment includes a server A, a server B, and a server C.

  The server A loads the OS memory blade 241 at the internal bus address “100”, the storage memory blade 242 at “200”, and the application memory blade 243 at “300”. The server A uses the CPU 201 “# 0” and the CPU 202 “# 1”.

  The server A executes the OS stored in the OS memory blade 241 by the CPU 201 “# 0” and the CPU 202 “# 1” at the time of startup. Further, the server A may be resident in the system for executing the application stored in the application memory blade 243, or may be activated when a processing request from the user is received.

  Similarly, the server B loads only the OS memory blade 244 at the internal bus address “400”. The server B uses the CPU 203 “# 2”.

  Further, the server C loads the OS memory blade 245 at the internal bus address “900” and the application memory blade 246 at the “1000” number. The server C uses the CPU 204 “# 3”.

  FIG. 6 is a flowchart of the memory blade recognition program 221 that is executed when a memory blade is loaded into the chassis of the blade server.

  The chip set 206 executes the memory blade recognition program 221 when the blade detection unit detects that a memory blade is loaded in the empty slot. Note that loading of the memory blade may be detected by the chip set 206 periodically inquiring of the slot 213. Further, the chip set 206 acquires the internal bus address 207 of the slot 213 in which the memory blade is loaded, and reads the header information of the loaded memory blade (step 602).

  Next, the chip set 206 refers to the header information table 211 and specifies the type of the memory blade based on the acquired header information (step 603). For example, when the header information acquired in step 602 is “0a”, the type of the memory blade is “OS memory blade”. Similarly, if the header information is “1b”, it is understood that “application memory blade” is obtained, and if the header information is “ab”, “storage memory blade” is designated.

  Further, the chip set 206 registers the internal bus address 207 and type of the slot 213 in which the memory blade is loaded in the server configuration management table 210 (step 604).

  FIG. 7 is a flowchart showing a procedure for the administrator to define the configuration of the blade server. The configuration definition of the blade server is executed in a state where the memory blade is loaded in the blade server. Therefore, when the configuration definition is executed, the flowchart of FIG. 6 is executed for the loaded memory blade, and a corresponding record is generated in the server configuration management table 210.

  First, the administrator logs in to the configuration management manager 209 executed in the chipset 206 (step 701). Log in to the configuration management manager 209 from the external input device 212 via a network or a serial cable.

  Subsequently, the administrator refers to the server configuration management table 210 and the CPU information table 214 and acquires usable resource information (step 702).

  Further, the administrator selects a CPU associated with the OS memory blade used in the server to be added or updated. The administrator registers the selected CPU number in the CPU 503 for the record in the server configuration management table 210 corresponding to the added memory blade. Further, the server name is registered in the server 504 (step 703).

  When an application memory blade is added (the result of step 704 is “YES”), it is registered in the server configuration management table 210 in association with the registered OS memory blade (step 705). The application memory blade to be added is selected by designating the internal bus address 207 of the loaded slot. The chip set 206 inherits the CPU number and server name of the associated OS memory blade, and updates the corresponding record in the server configuration management table 210.

  Further, when adding a storage memory blade (the result of step 706 is “YES”), as with the application memory blade, it is registered in the server configuration management table 210 in association with the registered OS memory blade (step 706). 707).

  When neither the application memory blade nor the storage memory blade is added to the blade server to be configured (the result of step 704 is “NO” and the result of step 706 is “NO”), this processing is terminated.

  Note that when the memory blade is loaded in the blade server housing, the chip set 206 may automatically associate the CPU and the memory blade.

  For example, by defining the header information of the memory blade and the attribute of the CPU in association with each other in advance, it is possible to add a record in the server configuration information table when the memory blade is loaded.

  Specifically, as described with reference to FIG. 6, when a memory blade is loaded in the slot 213, the blade detection unit notifies the chip set 206 of loading of the memory blade. When receiving the notification from the blade detection unit, the chip set 206 acquires the header information of the loaded memory blade. Further, the chip set 206 refers to the header information table 211 and recognizes the type of the memory blade based on the acquired header information. At this point, the processing shown in FIG. 6 has been executed, so that a record corresponding to the added memory blade is added to the server configuration management table 210.

  Here, if the added memory blade is an OS memory blade, the chip set 206 receives information from the CPU 503 in the server configuration management table 210 regarding the CPU assigned to the current OS memory blade (see FIG. 5). CPU # 4 is not allocated), and the CPU information table 214 is referred to, and the operating status 1205 and attribute 1204 of the CPU mounted on the blade server are acquired. If there is a CPU in which the attribute corresponds to the attribute and the header information of the added OS memory blade, the chip set 206 stores the CPU 503 of the record corresponding to the memory blade in the server configuration management table 210. Update. It is also possible to update the server name 504 of the server configuration management table 210 by storing the server name in the header information of the memory blade in advance.

  Further, after loading an OS memory blade and generating a record in the server configuration management table 210, the chip set 206 may be caused to automatically execute server startup processing including OS startup. At this time, designation of whether or not the server is activated may be added to the header information. For the application memory blade, processing from loading of the memory blade to activation of the application may be automatically executed.

  In addition, it is not necessary to define the header information and the CPU attribute in a one-to-one correspondence in advance, but the CPU and the memory blade are associated with each other by defining the header information and the CPU attribute according to the application. Also good. For example, when it is recorded in the header information that the memory blade to be added is used in image processing, the chip set 206 refers to the CPU information table 214 and associates a CPU and a memory blade excellent in image processing with each other. Can do.

  FIG. 8 is a flowchart when the server is started by the server start / stop program 222 of the server stored in the blade server.

  When starting the server, the administrator first logs in to the configuration management manager 209 stored in the chipset 206 (step 801). Then, a start command is executed for the server to be started (step 802), and the server is started (step 803). The activated server receives processing requests from users via the network and executes various processes.

  FIG. 9 is a flowchart when the server is stopped by the server start / stop program 222 of the server stored in the blade server.

  When stopping the server, the administrator first logs in to the configuration management manager 209 stored in the chipset 206 (step 804). Then, a stop command is executed for the server to be stopped (step 805). In this way, the server is stopped (step 806).

  FIG. 10 is a flowchart showing the processing of the memory blade recognition program 221 executed when the memory blade is pulled out from the blade server housing.

  When the administrator pulls out the memory blade for OS, the server stop process shown in FIG. 9 is executed, the server that uses the memory blade to be pulled out is stopped, and then the memory blade is removed from the blade server chassis. Pull out. In the case of the application memory blade, if the stored application is not executed, the server can be pulled out without stopping. In the case of a storage memory blade, if the data stored from the OS or application is not accessed, it can be similarly extracted without stopping the server.

  When detecting that the memory blade is pulled out of the slot by the blade detection unit, the chip set 206 executes the memory blade recognition program 221.

  The chip set 206 acquires the internal bus address 207 of the slot 213 that has stored the extracted memory blade. Then, the chip set 206 identifies and deletes a record that matches the value of the internal bus address 207 acquired from the server configuration management table 210 (step 606).

  FIG. 11 is a flowchart of the memory dump acquisition program 223 for acquiring the OS memory dump of the blade server.

  When acquiring the OS memory dump, the administrator first logs into the configuration management manager 209 stored in the chipset 206 (step 901).

  Next, the administrator loads a storage memory blade for storing a memory dump into an empty slot of the blade server (step 902). At this time, the memory blade recognition program 221 adds a record corresponding to the storage memory blade added to the server configuration management table 210 according to the flowchart shown in FIG.

  Subsequently, the administrator executes the memory dump acquisition program 223 to copy the contents of the OS memory blade for acquiring the OS memory dump designated by the administrator to the added storage memory blade (step 903). After the copy is completed, the OS memory dump can be acquired by extracting the storage memory blade from the blade server chassis (step 904).

  Note that a memory dump can be obtained in the same manner for the application memory blade.

  In this way, a memory dump of the OS or application can be acquired without stopping the system. Similarly, backups of application data and OS setting information can be easily obtained.

  Further, when the system is stopped due to the occurrence of a failure, a memory dump can be easily obtained by extracting the memory blade in which the failure has occurred.

  According to the present embodiment, it is possible to cause the chipset 206 to recognize the type of the memory blade at the same time as loading the memory blade, and to cause the chipset 206 to execute processing according to the type of the memory blade. Further, in addition to the header information shown in the present embodiment, the header information can be subdivided and defined to allow the chipset 206 to execute various processes. In this way, server settings when peripheral devices such as storage devices are added can be simplified.

  After removing the OS memory blade for dump acquisition, save the header information and CPU information of the AP blade corresponding to the removed OS blade, so that the newly installed OS blade It is also possible to assign the same CPU, AP blade, OS blade, etc. as the previous blade.

  Further, according to the present embodiment, an OS or application memory dump can be easily acquired by adding a storage memory blade and executing the memory dump acquisition program 223. At this time, the timing of removing the storage memory blade from the housing does not depend on the state of the entire blade server. Furthermore, it does not depend on the state of the target OS for acquiring the dump.

  Furthermore, according to the present embodiment, the OS memory blade and the application memory blade physically and independently secure the OS and application execution areas. In this embodiment, since a non-volatile memory is used, a memory dump at the time of the failure can be easily obtained by pulling out the memory blade when the failure occurs in the OS and the server is stopped. . Similarly, in the case of an application memory blade, it is possible to easily obtain a memory dump when a failure occurs.

  According to the present embodiment, an application can be easily installed by adding an application memory blade while the server is operating.

  As a modified example, a main storage device using an existing volatile memory is separately provided, and a disk blade using a disk drive can be applied instead of the memory blade. Although a memory dump cannot be easily acquired when a failure occurs, a backup can be acquired without going through the OS by executing a memory dump acquisition program stored in the chipset.

It is a hardware block diagram of a blade server. It is a detailed view of the storage area of the memory blade. It is a figure which shows the access authority of a memory blade. It is a figure which shows a memory blade header information table. It is a figure which shows the server configuration management table of a blade server. It is a flowchart of a memory blade recognition program executed when a memory blade is added to a blade server. It is a flowchart of the configuration management of a blade server. It is a flowchart of a server start / stop program executed when starting a blade server. It is a flowchart of the server start / stop program executed when stopping a blade server. It is a flowchart of the memory blade recognition program executed when deleting a memory blade from a blade server. It is a flowchart of the memory dump acquisition program which acquires OS dump of a blade server. It is a figure which shows the CPU information table of a blade server.

Explanation of symbols

201 CPU # 0
202 CPU # 1
203 CPU # 2
204 CPU # 3
205 CPU # 4
206 Chipset 207 Internal bus address 209 Configuration management manager (configuration management unit)
210 Server configuration management table (server configuration management information)
211 Header information table (type information)
212 External input device 213 Slot 214 CPU information table (processor information)
215 Control processor (control unit)
218 Control memory (storage unit)
221 Memory blade recognition program 222 Server start / stop program 223 Memory dump acquisition program

Claims (18)

A computer comprising: a chip set connected to a plurality of processors; and a slot configured to be accessible from the chip set and the processor and capable of detaching a storage device, wherein the storage device loaded in the slot is the processor. In the system configuration method assigned to
Processing for detecting loading of the storage device;
A process of reading identification information of the storage device when loading of the storage device is detected;
A process for determining the type of the storage device from the type information set in advance based on the identification information;
And a process of executing a predefined procedure based on the determined type of the storage device.   The system configuration method according to claim 1, wherein loading of the storage device is detected by a detection unit provided in the slot.   2. The system configuration method according to claim 1, wherein loading of the storage device is detected by the chipset periodically inquiring of the slot.   The pre-defined procedure selects a processor having an attribute corresponding to the determined type of storage device and associates the selected processor with the loaded storage device. The system configuration method according to any one of claims 1 to 3.   The system configuration method according to any one of claims 1 to 4, wherein the types of the storage device include an operating system, an application, and a storage.   When the type of the loaded storage device is for an operating system, the chipset includes a process of selecting a processor that is not associated with another operating system storage device and associating with the loaded storage device. The system configuration method according to claim 5.   The system configuration method according to claim 6, further comprising: causing a processor associated with the loaded storage device to start an operating system stored in the loaded storage device. A computer comprising: a chip set connected to a plurality of processors; and a slot configured to be accessible from the chip set and the processor and capable of detaching a storage device;
In the storage device, identification information is recorded in advance,
The chipset includes a control unit and a storage unit,
The storage unit includes processor information for storing attributes of the processor, and type information for storing a type of the storage device corresponding to the identification information,
When the storage device is loaded into the slot, the control unit reads the identification information recorded in the loaded storage device, refers to the type information, and determines the type of the loaded storage device. A computer that executes a predefined procedure based on a type of the loaded storage device. The attribute of the processor corresponds to the type of the storage device,
9. The method according to claim 8, wherein the predefined procedure selects a processor having an attribute corresponding to a type of the storage device, and associates the selected processor with the loaded storage device. Computer.   10. The computer according to claim 8, wherein the types of the storage device include operating system, application, and storage.   When the type of the loaded storage device is for an operating system, the control unit selects a processor that is not associated with another storage device for an operating system based on the processor information, and the loaded storage device 11. The computer according to claim 10, wherein a device is associated with a processor not associated with the other operating system storage device.   The computer according to claim 11, wherein the control unit causes a processor associated with the loaded storage device to start an operating system stored in the loaded storage device.   The computer according to any one of claims 8 to 12, wherein the storage device is a memory blade including a non-volatile memory that functions as a main storage device and a storage device.   14. The computer according to claim 13, wherein an execution image of the operating system or application is recorded in the memory blade when the type of the storage device is an operating system or an application.   15. The computer according to claim 13, wherein the non-volatile memory constituting the memory blade is a magnetic recording type write / read memory at any time.   The computer according to claim 13 or 14, wherein the nonvolatile memory constituting the memory blade is a ferroelectric memory. The storage unit includes a memory dump acquisition unit,
The computer according to any one of claims 8 to 16, wherein the memory dump acquisition unit acquires a memory dump without stopping the system. A system configuration program for associating a processor with a loaded storage device,
A procedure for reading identification information of the loaded storage device;
A procedure for acquiring the type of the loaded storage device based on the identification information;
A procedure for receiving related information between the processor and the loaded storage device;
A system configuration program for causing a computer to execute a procedure for storing, in server configuration management information, information related to the processor and a loaded storage device.

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