JP2007282001A - Decoding device, decoding method, information reproducing device, and electronic equipment - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a decoding device for simplifying control and a configuration for error detection processing by detecting an error per packet, and to provide a decoding method, an information reproducing device and electronic equipment. <P>SOLUTION: The decoding device 10 for applying decoding processing to stream data having multiplexed packet data includes an error processor 22, for detecting an error of fixed length packet data separated from the stream data, and adding error information indicating the presence or absence of the error to the packet data; and a decoder 30 for executing decoding processing of the packet data. The decoding device 10 executes decoding processing, or discards the packet data on the basis of the error information without converting the packet data into a variable-length section or a variable-length packet. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to a decoding device, a decoding method, an information reproducing device, and an electronic apparatus.

  In terrestrial digital broadcasting that appears in place of analog terrestrial broadcasting, there are expectations for the provision of various new services in addition to improving the quality of images and audio. One of the services newly provided by the introduction of terrestrial digital broadcasting is so-called “one-segment broadcasting” as a service for mobile terminals. In “1-segment broadcasting”, digital modulated waves modulated by the QPSK (Quadrature Phase Shift Keying) modulation method are multiplexed by the OFDM (Orthogonal Frequency Division Multiplexing) modulation method, so that stable broadcast reception is possible even when the mobile terminal is moving. Is possible.

  An example of such a mobile terminal is a mobile phone. When a reception function of “1-segment broadcasting” is added to a cellular phone, a separation process of a transport stream in which video data and audio data after compression processing are multiplexed and data decoding processing after the separation processing are performed. At this time, communication is performed between the processing unit that performs the decoding process of the video data and the processing unit that performs the decoding process of the audio data, and the video data and audio data after the decoding process are reproduced in synchronization.

  As a technique for reproducing such a digital broadcast, for example, in Patent Document 1, in order to notify the user that reception is impossible, an error correction unit is provided in front of the transport stream DMUX that separates packets from the transport stream. A technique for obtaining a change in reception level from the frequency of errors detected in an error correction unit is disclosed. This makes it easier to recognize that the reception level has deteriorated due to rain or the like.

Patent Document 2 discloses a digital broadcast receiving apparatus that performs filtering for each packet identifier. More specifically, a digital broadcast receiving apparatus including a filtering circuit that reduces the number of registers referred to during filtering by storing packet identifiers of packets to be passed or packet identifiers of packets that are not allowed to pass through is disclosed. Has been.
JP 2000-115654 A JP 2002-320154 A

  By the way, in “terrestrial digital broadcasting” including “1-segment broadcasting”, a broadcast signal is transmitted as a radio wave signal, and thus a normal reception signal is not always obtained. Therefore, it is important how to handle error detection processing of stream data generated from a received signal when considering cost reduction of a data reproducing apparatus and reduction of processing load. At this time, even if an error in the stream data is detected, if the packet in which the error has occurred can be identified, the optimum error processing corresponding to the packet can be performed.

  However, in the technique disclosed in Patent Document 1, since error detection is performed before the transport stream DMUX, an error cannot be detected in units of packets obtained by separating the transport stream. Therefore, there is a problem that even if an error in stream data is detected, the packet in which the error has occurred cannot be specified.

  Further, the technique disclosed in Patent Document 2 has a problem in that it cannot be specified in which packet an error has occurred because filtering is performed in units of packet identifiers.

  The present invention has been made in view of the technical problems as described above, and an object of the present invention is to detect errors on a packet basis, thereby simplifying control and configuration for error detection processing. A decoding device, a decoding method, an information reproducing device, and an electronic device are provided.

In order to solve the above problems, the present invention
A decoding device for performing decoding processing on stream data in which packet data is multiplexed,
An error processing unit that detects an error in fixed-length packet data separated from the stream data and adds error information indicating the presence or absence of the error to the packet data;
A decoder for decoding the packet data,
The present invention relates to a decoding apparatus that performs the decoding process or discards the packet data based on the error information without converting the packet data into a variable-length section or a variable-length packet.

  According to the present invention, the error information of the fixed-length packet data separated from the stream data is added to the packet data so that the presence / absence of the error can be determined in packet data units. Packet data can be easily specified. As a result, packet data is not discarded wastefully. In addition, since it is not necessary to convert to a variable-length section or packet, the processing load for error processing can be greatly reduced, and the control and configuration for error detection processing can be simplified.

In the decoding device according to the present invention,
A buffer for storing the error information and the packet data;
The decoder can read out the error information and the packet data from the buffer and determine whether to perform a decoding process or discard the packet data based on the error information.

  According to the present invention, it is only necessary to refer to the packet data read from the buffer and the error information added to the packet data. Can be minimized.

In the decoding device according to the present invention,
Prior to writing packet data to the buffer, error information added to the previous packet data can be written to the buffer.

  According to the present embodiment, it becomes possible to easily detect an insufficient size of fixed-length packet data, and it is possible to continue the process of adding error information to stream data that arrives one after another without any processing delay.

In the decoding device according to the present invention,
The error processing unit
Error information indicating that another write request to the buffer has occurred during a write request for writing the packet data to the buffer can be added to the packet data.

  According to the present invention, it is possible to indicate whether or not the packet data is a request for another write to the buffer during the write request for writing the packet data to the buffer. Thus, it is not necessary to analyze the packet data until the packet data stored in the buffer is incomplete, and it is possible to perform normal decoding processing by waiting for the next incoming packet data. And the control can be simplified.

In the decoding device according to the present invention,
The error information is
The error information may be stored in the storage area of the buffer so as to be read prior to packet data to which the error information is added.

  According to the present invention, the packet data can be read from the buffer after the error information is read and the presence or absence of the error is determined, so that the error detection processing of the packet data stored in the buffer can be simplified.

In the decoding device according to the present invention,
The packet data is a TS (Transport Stream) packet,
The decoding process or the discarding of the TS packet can be performed based on the error information without converting the TS packet into a variable-length section or a PES (Packetized Elementary Stream) packet.

In the decoding device according to the present invention,
The error processing unit
At least one error can be detected from table_id, section_syntax_indicator, current_next_indicator, and section_number in the data structure of a PMT (Program Map Table), and error information indicating the presence or absence of an error can be added to the packet data.

  According to the present invention, PMT error detection processing can be performed without converting into variable-length sections or packets, the processing load can be greatly reduced, and control and configuration for error detection processing can be simplified. .

In the decoding device according to the present invention,
The error processing unit
An error in PAT (Program Association Table) or NIT (Network Information Table) can be detected, and error information indicating the presence or absence of an error can be added to the packet data.

In the decoding device according to the present invention,
Based on the error information, packet data in which a PMT, PAT, or NIT error is detected may be discarded.

  According to any one of the above-described inventions, PMT, PAT, or NIT error detection processing can be performed without conversion into variable-length sections or packets, and the processing load can be greatly reduced. The control and configuration can be simplified.

The present invention also provides
A decoding method for performing decoding processing on stream data in which packet data is multiplexed,
Detecting an error in fixed-length packet data separated from the stream data;
Add error information indicating the presence or absence of errors to the packet data,
Without converting the packet data into variable-length sections or variable-length packets, based on the error information, determine whether to decode the packet data or discard the packet data,
The present invention relates to a decoding method for performing the decoding process when it is determined to perform the decoding process of the packet data based on the error information.

The present invention also provides
An information reproducing apparatus for reproducing at least one of video data and audio data,
Transport a first TS (Transport Stream) packet for generating video data, a second TS packet for generating audio data, and a third TS packet other than the first and second TS packets. A separation processing unit for extracting from the stream;
A first storage area for storing the first TS packet; a second storage area for storing the second TS packet; and a third storage area for storing the third TS packet; A memory having
A video decoder for performing video decoding processing for generating the video data based on the first TS packet read from the first storage area;
An audio decoder that performs audio decoding processing for generating the audio data based on the second TS packet read from the second storage area;
The separation processing unit is
Detecting an error in each TS packet of the first to third TS packets, adding error information indicating the presence or absence of an error to each TS packet;
Related to an information reproducing apparatus that performs the video decoding process, the audio decoding process, or the discarding of the TS packet based on the error information without converting each TS packet into a variable-length section or a PES (Packetized Elementary Stream) packet To do.

  According to the present invention, error information of a fixed-length TS packet separated from a TS is added to the TS packet so that the presence or absence of an error can be determined on a packet basis. Can be easily identified. As a result, TS packets are not wasted. In addition, since it is not necessary to convert to a variable-length section or packet, the processing load for error processing can be greatly reduced, and the control and configuration for error detection processing can be simplified.

In the information reproducing apparatus according to the present invention,
The video decoder reads the first TS packet from the first storage area independently of the audio decoder, performs the video decoding process based on the first TS packet,
The audio decoder can read the second TS packet from the second storage area independently of the video decoder, and perform the audio decoding process based on the second TS packet.

  According to the present invention, in addition to the above effects, it is possible to provide an information reproducing apparatus that realizes decoding processing with low power consumption and heavy processing load using a processing circuit with low processing capability.

In the information reproducing apparatus according to the present invention,
When reproducing only the video data of the video data and audio data, stop the operation of the audio decoder,
When only the audio data of the video data and audio data is reproduced, the operation of the decoding device can be stopped.

  According to the present invention, further reduction in power consumption of the information reproducing apparatus can be realized.

The present invention also provides
Any one of the information reproducing devices described above;
The present invention relates to an electronic apparatus including a host that instructs the information reproduction apparatus to start at least one of the video decoding process and the audio decoding process.

The present invention also provides
Tuner,
Any one of the above information reproducing apparatuses to which a transport stream from the tuner is supplied;
The present invention relates to an electronic apparatus including a host that instructs the information reproduction apparatus to start at least one of the video decoding process and the audio decoding process.

  According to any one of the above-described inventions, it is possible to provide an electronic device that can realize the reproduction processing of one-segment broadcasting with heavy processing load with low power consumption.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. The embodiments described below do not unduly limit the contents of the present invention described in the claims. Also, not all of the configurations described below are essential constituent requirements of the present invention.

1. Decoding Device FIG. 1 is a block diagram showing a configuration example of a decoding device according to this embodiment.

  A transport stream (hereinafter referred to as TS) from a digital tuner (tuner in a broad sense) 50 is input to the decoding device 10 in the present embodiment. The TS is stream data in which TS packets (packet data in a broad sense) are multiplexed, and is defined by, for example, the MPEG-2 system (ISO / IEC 13818-1). Then, the decoding device 10 performs a decoding process on this TS. More specifically, the decoding device 10 performs a decoding process on the TS packet extracted from the TS. For example, the decoded data is transferred to a display unit (not shown) and displayed as an image, or output to a speaker (not shown) and output as sound.

  The decoding device 10 can include a separation processing unit 20 and a decoder 30. The separation processing unit 20 performs processing for separating the TS packet from the TS. More specifically, the separation processing unit 20 performs processing for separating the TS packet from the TS based on the setting content of the host 60. The decoder 30 performs a decoding process on the TS packet separated by the separation processing unit 20.

  Such a separation processing unit 20 includes an error processing unit 22 and a packet separation unit 24. The error processing unit 22 detects an error in a fixed-length TS packet (packet data in a broad sense) separated from the TS, and performs processing for adding error information indicating the presence / absence of an error in the TS packet to the TS packet. The packet separation unit 24 separates the TS packet from the TS, and stores the packet added with the error information from the error processing unit 22 in the buffer 40 built in the decoding device 10. That is, not only the TS packet separated from the TS by the separation processing unit 20 is buffered in the buffer 40, but the TS packet and error information of the TS packet are buffered. Note that the process of adding the error information to the TS packet may be performed by the error processing unit 22 or the packet separation unit 24.

  Then, the decoder 30 can read the error information and the TS packet from the buffer 40 and determine whether to perform the decoding process or discard the TS packet based on the error information. For example, when the decoder 30 decides to discard the packet, it can leave the discard process to the host 60.

  The packet separation unit 24 separates a plurality of types of TS packets from the TS, and stores the separated TS packets in a storage area previously assigned to the buffer 40 for each type of TS packet. The buffer 40 displays a TS packet for setting a PMT (Program Map Table) as program information, a TS packet for setting a NIT (Network Information Table) as network information, and character / caption information. Output TS packets, TS packets for displaying BML (Broadcast Markup Language), TS packets for setting PSI / SI (Program Specific Information / Service Information), video TS packets for displaying images, and audio A voice TS packet to be stored is stored in each storage area.

  The host 60 provided outside the decoding apparatus 10 analyzes PMT, NIT, character / caption information, BML, and PSI / SI based on the TS packet read from the buffer 40. For example, the host 60 analyzes the PMT and analyzes the packet identifier (PID) of the video TS packet and the audio TS packet, and the host 60 notifies the separation processing unit 20 of the PID. Receiving this, the packet separation unit 24 of the separation processing unit 20 refers to the PID set by the host 60 and performs the process of separating each TS packet from the TS from the digital tuner 50 as described above. At this time, the host 60 can perform predetermined error processing by referring to the error information added to the TS packet stored in each storage area of the buffer 40. As error processing, for example, a TS packet is discarded, or a TS packet in which an error has occurred is repaired by a given error concealment, and decoding processing is continued using the repaired TS packet. .

  The decoder 30 reads at least one of the video TS packet and the audio TS packet stored in the buffer 40, analyzes the TS header, generates a PES (Packet Elementary Stream) packet, and generates a PES header of the PES packet. And the ES (Elementary Stream) data after deleting the PES header is written back to the buffer 40. At this time, the decoder 30 can perform predetermined error processing by referring to the error information added to the video TS packet or audio TS packet read from the buffer 40. Here again, as error processing, for example, the TS packet is discarded or the error TS packet is repaired by a given error concealment, and the decoding process is continued using the repaired TS packet. Or

  The decoder 30 reads ES data from the buffer 40 and performs a decoding process on the ES data.

  In FIG. 1, the host 60 and the digital tuner 50 are provided outside the decoding device 10, but at least one of the host 60 and the digital tuner 50 may be provided inside the decoding device 10. Alternatively, in FIG. 1, at least one of the separation processing unit 20, the decoder 30, and the buffer 40 may be provided outside the decoding device 10.

  According to the present embodiment having the above-described configuration, it is possible to detect the occurrence of an error for each TS packet, so that decoding processing can be performed without conversion to a variable-length section or variable-length packet. . As a result, the TS packet in which an error has occurred can be specified, and a situation in which the packet is discarded wastefully as a result of error processing can be avoided. In addition, since it is not necessary to convert the packet into a variable-length packet, the error processing load can be greatly reduced, and the error processing control can be simplified.

  FIG. 2 is an explanatory diagram of error information added to the TS packet in the present embodiment.

  The packet separation unit 24 of the separation processing unit 20 separates the TS packet from the TS from the digital tuner 50. The TS packet separated by the packet separation unit 24 is a fixed-length packet having a length of 188 bytes. The error processing unit 22 performs a detection process of a predetermined type of error on the TS packet, and generates a detection process result as error information having a 4-byte length. Upon receiving the error information, the packet separator 24 performs processing for storing, in the buffer 40, 192-byte packet data in which 4-byte error information is added to the 188-byte TS packet to be subjected to error detection processing.

  FIG. 3 is a detailed explanatory diagram of the error information of FIG.

  In the error information in the present embodiment, an error status indicating the presence / absence of an error is set as an error detection processing result in a predetermined bit of 4 bytes (= 32 bits). In FIG. 3, the error status is set in the 29th to 24th bits and the 19th to 16th bits.

  FIG. 4 is an explanatory diagram showing an example of the contents of the error status shown in FIG.

  In the 16th bit of the error information, an error status indicating whether or not there is a PMT table_id error is set. More specifically, in the 16th bit, when the TS packet is a PMT packet, when the table_id specified by the data structure of the PMT packet is not 0x02 ("0x" indicates a hexadecimal number), a table_id error is displayed. It is determined that it has occurred and “1” is set.

  In the 17th bit of the error information, an error status indicating the presence / absence of a PMT section_syntax_indicator error is set. More specifically, in the 17th bit, when the TS packet is a PMT packet, if the section_syntax_indicator specified by the data structure of the PMT packet is not 0x01, it is determined that a section_syntax_indicator error has occurred and “1” is set. Is set.

  In the 18th bit of the error information, an error status indicating the presence / absence of a PMT current_next_indicator error is set. More specifically, in the 18th bit, when the TS packet is a PMT packet, if the current_next_indicator specified by the data structure of the PMT packet is not 0x01, it is determined that a current_next_indicator error has occurred and “1” is set. Is set.

  In the 19th bit of the error information, an error status indicating the presence / absence of a PMT section_number error is set. More specifically, in the 19th bit, when the TS packet is a PMT packet, if the section_number specified by the data structure of the PMT packet is not 0x00, it is determined that a section_number error has occurred and “1” is set. Is set.

  An error status indicating the presence or absence of a tuner error is set in the 24th bit of the error information. More specifically, in the 24th bit, when an RS (Read Solomon) code error from the digital tuner 50 is detected, it is determined that a tuner error has occurred, and “1” is set. An RS code error occurs, for example, when error correction using an RS code is impossible.

  In the 25th bit of the error information, an error status indicating the presence / absence of a synchronization byte mismatch error is set. More specifically, in the 25th bit, when the synchronization byte of the TS packet is different from the predetermined synchronization byte, it is determined that a synchronization byte mismatch error has occurred and “1” is set.

  In the 26th bit of the error information, an error status indicating whether there is a cyclic redundancy check (CRC) error is set. More specifically, in the 26th bit, when a CRC error is detected when the TS packet is a PMT packet, it is determined that a CRC error has occurred and “1” is set.

  In the 27th bit of the error information, an error status indicating whether or not the TS packet size is insufficient is set. More specifically, in the 27th bit, when the TS packet size is less than 188 bytes, it is determined that the TS packet size is insufficient, and “1” is set.

  In the 28th bit of the error information, an error status indicating whether or not the TS packet size is over is set. More specifically, in the 28th bit, when the size of the TS packet is 189 bytes or more, it is determined that the TS packet size is over and “1” is set.

  The 29th bit of the error information is set with an error status indicating whether another write request has occurred in the buffer 40 during a write request to the buffer 40 of the separation processing unit 20 (packet separation unit 24). . That is, it can be said that the error processing unit 22 adds to the packet data error information indicating that another write request to the buffer 40 has occurred during the write request for writing the packet data to the buffer 40. While the separation processing unit 20 (packet separation unit 24) is writing TS packets and error information to the buffer 40, for example, when the decoder 30 makes a write request to the buffer 40, "1" is set. Is set. This indicates that when processing TSs that arrive one after another, the processing of each unit cannot catch up, and it is not possible to guarantee that the write data to the buffer 40 that has received two write requests is complete. The error status is set to “1” in order to leave the determination as to whether or not to continue the decoding process to the subsequent stage.

  For example, when at least one of the 16th bit, the 17th bit, the 18th bit, and the 19th bit is “1”, it is desirable to discard the TS packet to which the error information including the error status is added. This is because since the TS packet to be separated by the separation processing unit 20 is determined by the host 60 that analyzes the PMT, it is not necessary to analyze the PMT even when the contents of the PMT are incomplete, and the TS packet is discarded. This is because waiting for the next incoming PMT increases the possibility of reproduction with a normal TS packet, and simplifies the control.

  Note that it is not necessary to detect all the error statuses shown in FIG. 4, but at least one error is detected from table_id, section_syntax_indicator, current_next_indicator, and section_number in the data structure of the PMT, and error information indicating the presence / absence of an error is indicated in the packet data May be added.

  Incidentally, the error information generated in the error processing unit 22 is preferably stored in the storage area of the buffer 40 so as to be read prior to packet data to which the error information is added.

  FIG. 5 is an explanatory diagram of the storage status of the error information and TS packet buffer 40 in the present embodiment.

  An address value is allocated to the buffer 40, and each storage area in which the TS packet is stored is specified by the address value. Here, for example, it is assumed that the decoder 30 reads TS packets and error information in order from a storage area having a small address value to a storage area having a large address value.

  At this time, it is desirable to store the error information in the present embodiment in the storage area of address 0 having a small address value, and store the TS packet to which the error information is added in the storage areas of addresses 1 to 47 having a large address value. In this way, by storing error information in the address value storage area rather than the TS packet storage area for each TS packet, for example, the decoder 30 or the host 60 first reads the error information to determine the error. That's fine. For example, when it is determined to discard a TS packet, the process of reading error information of the next TS packet may be performed without reading a TS packet stored in a storage area having a large address value thereafter.

  FIG. 6 shows an example of timing for adding error information in the present embodiment.

  From the digital tuner 50, a 204-byte transmission TSP (Transport Stream Packet) is input to the decoding device 10. The transmission TSP is stream data in which a TS packet having a length of 188 bytes and a parity bit of an RS code having a length of 16 bytes are multiplexed.

  For example, when a transmission TSP is input to the decoding device 10 at time TG1, the error processing unit 22 starts an error detection process. Further, the packet separation unit 24 also starts a process of separating the TS packet corresponding to the PID set by the host 60, and performs a process of storing the separated TS packet in the buffer 40 after time TG2.

  Then, when the next transmission TS is input at time TG10, the error information, which is the error detection processing result started at time TG1, is buffered so that the reading order comes before the TS packet, as shown in FIG. 40. That is, prior to writing the packet data obtained as a result of the separation process started at time TG10 into the buffer 40, error information added to the immediately preceding packet data is written into the buffer 40. By doing so, it is possible to easily detect the TS packet size shortage shown in FIG. 4 and continue the error information addition processing for the successively transmitted TSPs without any processing delay.

  Thereafter, the TS packet and error information are similarly stored. At this time, as shown in FIG. 1, the buffer 40 displays a TS packet for setting the PMT, a TS packet for setting the NIT, a TS packet for displaying character / caption information, and BML. TS packets, TS packets for setting PSI / SI, video TS packets, and audio TS packets are stored in each storage area.

  Next, processing examples of the host 60 and the decoder 30 that refer to the error information thus detected will be described.

  FIG. 7 shows a flowchart of an example of error processing of the host 60 in this embodiment.

  The host 60 can perform the process shown in FIG. 7 by reading a program stored in a memory (not shown) and executing a process corresponding to the program.

  First, the host 60 reads and acquires one TS packet for setting the PMT from the buffer 40 (step S10). At this time, the host 60 reads error information and a TS packet. Then, as shown in FIGS. 3 and 4, it is determined whether or not the error status of any of the 16th to 19th bits (or including the 26th bit) is “1” (step S11). .

  When it is determined in step S11 that any of the above error statuses is “0” (step S11: Y), a packet unit start indicator (hereinafter referred to as a packet unit start indicator) of the TS header that is the header of the TS packet is described below. It is determined whether or not (PUSI) is “1” (step S12). When a section is generated by concatenating a plurality of payloads, it indicates that the payload of a packet whose PUSI is “1” is the head packet of the section.

  When it is detected in step S12 that the PUSI is “1” (step S12: Y), the host 60 performs processing to delete the TS header (step S13), and the data after the header deletion is stored in a memory (not shown). In the section memory area (step S14).

  When it is determined that one section has been acquired (step S15: Y), a series of processing ends (end).

  When it is detected in step S11 that one of the error statuses described above is “1” (step S11: N), or when PUSI is detected as “0” in step S12 (step S12: N) ), Or when it is determined in step S15 that one section has not been acquired (step S15: N), a process of updating the read pointer of the buffer 40 is performed (step S16), and the process returns to step S10.

  In FIG. 7, the host 60 has been described as reading error information and a TS packet at the same time. However, the TS packet to which the error information is added is read on condition that the error information is read and no error is detected. You may read. However, even when the error information and the TS packet are read simultaneously as shown in FIG. 7, the error information is stored as shown in FIG. 5, so that the read pointer update process is simplified. It is done.

  As described above, when the host 60 acquires a section, as a result of analyzing the section, the host 60 extracts PIDs of video TS packets and audio TS packets, and performs processing for setting the PIDs in the separation processing unit 20. . Further, as shown in FIGS. 3 and 4, the host 60 detects that the error status of any of the 16th to 19th bits (or including the 26th bit) is “1”. The read pointer of the buffer 40 is updated. That is, processing for discarding the TS packet stored in the buffer 40 is performed.

  FIG. 8 shows a flowchart of an example of error processing of the decoder 30 in this embodiment.

  The decoder 30 can perform the process shown in FIG. 8 by reading a program stored in a memory (not shown) and executing a process corresponding to the program.

  The decoder 30 holds an error count indicating the number of times the occurrence of an error is detected based on the error information, and performs a process of initializing the error count (step S20). Next, the decoder 30 reads the TS packet from the buffer 40 (step S21). At this time, the decoder 30 reads error information and a TS packet.

  Then, it is determined whether or not all of the 24th bit, 25th bit, 27th bit, 28th bit, and 29th bit are “0” in the error status of FIG. 4 (step S22). When it is detected that both of the error statuses are “0” (step S22: Y), a given video decoding process or audio decoding process is performed (step S23), and a series of processes is terminated (step S23). End).

  In step S22, when it is detected that any of the error statuses described above is “1” (step S22: N), the error count is incremented (step S24). It is determined whether or not the incremented error count is equal to or greater than a given threshold value (step S25). When it is detected that the error count is equal to or greater than the threshold value (step S26: Y), the decoder 30 determines that the host 60 The occurrence of an error is notified by a command (step S26), and the process returns to step S20. For example, by incrementing the error count for each error status type, the host 60 that has received the command can perform error processing according to the error that has occurred. For example, when a tuner error frequently occurs, it can be displayed, the tuner can be initialized, or the TS packet can be discarded.

  In step S25, when it is detected that the incremented error count is not greater than or equal to the given threshold value (step S25: N), the process returns to step S21.

  In FIG. 8, the decoder 30 is described as reading error information and a TS packet at the same time. However, the TS packet to which the error information is added is read on condition that the error information is read and no error is detected. You may read.

  As described above, the decoder 30 does not perform the decoding process when an error is detected, and can leave the error process to the host 60 when the error count exceeds a threshold value. Therefore, the occurrence of an error can be detected without converting the TS packet into a variable-length section or a variable-length PES (Packetized Elementary Stream) packet, and decoding processing or TS packet discard can be performed.

1.1 Modification In this embodiment, the PMT error is described as being detected. However, the present invention is not limited to this. An error is detected for a packet as shown in FIG. It can be added to the TS packet.

  Here, a case where an error of the NIT packet among the packets of FIG. 9 is detected will be described.

  FIG. 10 shows another example of the error status in this embodiment.

  For example, an error status indicating the presence / absence of a NIT table_id error is set in a predetermined bit of the error information. More specifically, when the TS packet is a NIT packet, if the table_id defined by the data structure of the NIT packet is not 0x40, it is determined that a table_id error has occurred and “1” is set.

  In addition, an error status indicating the presence / absence of a NIT section_syntax_indicator error is set in a predetermined bit of the error information. More specifically, when the TS packet is a NIT packet, if the section_syntax_indicator specified by the data structure of the NIT packet is not 0x01, it is determined that a section_syntax_indicator error has occurred and “1” is set.

  Alternatively, an error status indicating the presence / absence of an NIT network_id error is set in a predetermined bit of the error information. More specifically, when the TS packet is a NIT packet, if the network_id defined by the data structure of the NIT packet is not the same value as the TS_id obtained from the PAT, it is determined that a network_id error has occurred and “1 Is set.

  Alternatively, an error status indicating the presence / absence of a NIT current_next_indicator error is set in a predetermined bit of the error information. More specifically, when the TS packet is a NIT packet, if the current_next_indicator defined by the data structure of the NIT packet is not 0x01, it is determined that a current_next_indicator error has occurred and “1” is set.

  Furthermore, an error status indicating the presence / absence of an NIT section_number error is set in a predetermined bit of the error information. More specifically, when the TS packet is a NIT packet, if the section_number specified in the data structure of the NIT packet is equal to or less than the last_section_number in the NIT, it is determined that a section_number error has occurred and “1” is set. The

  FIG. 11 shows a flowchart of an example of error processing of the host 60 in a modification of the present embodiment.

  FIG. 11 shows an example of error processing based on NIT error information.

  The host 60 can perform the processing shown in FIG. 11 by reading a program stored in a memory (not shown) and executing processing corresponding to the program.

  First, the host 60 reads and acquires one TS packet for setting the NIT from the buffer 40 (step S30). At this time, the host 60 reads error information and a TS packet. Then, it is determined whether any one of the error statuses shown in FIG. 10 is “1” (step S31).

  When it is determined in step S31 that any of the above error statuses is “0” (step S31: Y), it is determined whether or not the PUSI of the TS header that is the header of the TS packet is “1”. (Step S32).

  When it is detected in step S32 that the PUSI is “1” (step S32: Y), the host 60 performs processing to delete the TS header (step S33), and the data after the header deletion is stored in a memory (not shown). In the section memory area (step S34).

  When it is determined that one section has been acquired (step S35: Y), a series of processing ends (end).

  When it is detected in step S31 that one of the error statuses described above is “1” (step S31: N), or when PUSI is detected as “0” in step S32 (step S32: N) ), Or when it is determined in step S35 that one section has not been acquired (step S35: N), a process of updating the read pointer of the buffer 40 is performed (step S36), and the process returns to step S30.

  In FIG. 11, the host 60 has been described as reading error information and a TS packet at the same time. However, the TS packet to which the error information is added is read on condition that the error information is read and no error is detected. You may read. However, even when the error information and the TS packet are read simultaneously as shown in FIG. 11, the error information is stored as shown in FIG. 5, so that the read pointer update process is simplified. .

  As described above, when the host 60 acquires a section, as a result of analyzing the section, the host 60 extracts PIDs of video TS packets and audio TS packets, and performs processing for setting the PIDs in the separation processing unit 20. . Further, the host 60 updates the read pointer of the buffer 40 when it is detected that any one of the error statuses shown in FIG. 10 is “1”. That is, processing for discarding the TS packet stored in the buffer 40 is performed.

  In this modification, the error processing of the decoder 30 is the same as that of the present embodiment, and thus the description thereof is omitted.

  Note that the addition of NIT error information in the present modification may be replaced with or added to the addition of PMT error information in the present embodiment.

  FIG. 12 shows an example of an error status in another modification of the present embodiment.

  For example, an error status indicating the presence / absence of a PAT table_id error is set in a predetermined bit of error information. More specifically, when the TS packet is a PAT packet and the table_id defined by the data structure of the PAT packet is not 0x00, it is determined that a table_id error has occurred and “1” is set.

  Also, an error status indicating whether or not there is a PAT section_syntax_indicator error is set in a predetermined bit of the error information. More specifically, when the TS packet is a PAT packet, if the section_syntax_indicator defined by the data structure of the PAT packet is not 0x01, it is determined that a section_syntax_indicator error has occurred and “1” is set.

  Alternatively, an error status indicating whether or not there is a PAT current_next_indicator error is set in a predetermined bit of the error information. More specifically, when the TS packet is a PAT packet, if the current_next_indicator specified by the data structure of the PAT packet is not 0x01, it is determined that a current_next_indicator error has occurred and “1” is set.

  Furthermore, an error status indicating whether or not there is a PAT section_number error is set in a predetermined bit of the error information. More specifically, when the TS packet is a PAT packet and the section_number defined by the data structure of the PAT packet is not 0x00, it is determined that a section_number error has occurred and “1” is set.

  Since the error processing of the host 60 is the same for both PAT and NIT, detailed description is omitted. The error processing of the decoder 30 is also the same as in FIG.

  As described above, according to this modification, it is possible to detect a PAT or NIT error and add error information indicating the presence or absence of an error to packet data. The addition of NIT and PAT error information in this modification may be performed instead of or in addition to the addition of PMT error information in the present embodiment. Then, it is desirable to discard the packet data in which the PMT, PAT, or NIT error is detected based on the error information.

  As described above, according to the decoding device in the present embodiment or its modification, errors are detected and buffered in units of packets, so that packets with errors can be identified and useless TS packets can be discarded. It is possible to simplify the control and configuration for error detection processing without performing it.

2. Information Reproducing Device Next, an information reproducing device to which the above-described decoding device in the present embodiment or its modification is applied will be described. The information reproducing apparatus according to the present embodiment can reproduce digital terrestrial broadcasting.

2.1 Overview of 1-segment broadcasting In terrestrial digital broadcasting that appears in place of terrestrial analog broadcasting, there are high expectations for the provision of various new services in addition to improving the quality of images and audio.

  FIG. 13 is an explanatory diagram of the concept of digital terrestrial broadcast segments.

  In digital terrestrial broadcasting, a pre-assigned frequency band is divided into 14 segments, and broadcasting is performed using 13 segments SEG1 to SEG13. The remaining one segment is used as a guard band. Then, one segment SEGm out of 13 segments for broadcasting is allocated to the frequency band of broadcasting for mobile terminals.

  In one-segment broadcasting, a transport stream (Transport Stream: TS) in which video data, audio data, and other data (control data) encoded (compressed) are multiplexed is transmitted. More specifically, a Reed-Solomon error correction code is added to each packet of the TS, and then divided into layers, and convolutional coding and carrier modulation are performed in each layer. After layer synthesis, frequency interleaving and time interleaving are performed, and a pilot signal necessary for the receiving side is added to form an OFDM segment frame. The OFDM segment frame is subjected to inverse Fourier transform operation and transmitted as an OFDM signal.

  FIG. 14 is an explanatory diagram of TS.

  The TS is composed of a plurality of TS packet sequences as shown in FIG. The length of each TS packet is fixed to 188 bytes. Each TS packet has header information called a 4-byte TS header (TS header) added thereto, and includes a PID (Packet Identifier) serving as an identifier of the TS packet. One segment broadcast program is specified by PID.

  The TS packet includes an adaptation field, and is embedded with PCR (Program Clock Reference) and dummy data which are time information serving as a reference for synchronous reproduction of video data, audio data, and the like. The payload includes data for generating a PES (Packetized Elementary Stream) packet or section.

  FIG. 15 is an explanatory diagram of PES packets and sections.

  Each of the PES packet and the section is configured by the payload of each TS packet of one or a plurality of TS packets. The PES packet includes a PES header and a payload, and video data, audio data, or caption data is set as ES (Elementary Stream) data in the payload. In the section, program information such as video data set in the PES packet is set.

  Therefore, when a TS is received, first, it is necessary to analyze program information included in the section and specify a PID corresponding to the broadcast program. Then, video data and audio data corresponding to the PID are extracted from the TS, and the extracted video data and audio data are reproduced.

2.2 Mobile terminal A mobile terminal having a 1-segment broadcast reception function requires processing such as packet analysis as described above. That is, such a mobile terminal is required to have a high processing capacity. Therefore, when a one-segment broadcast receiving function is added to a conventional mobile phone as a mobile terminal (electronic device in a broad sense), it is necessary to further add a processor or the like having a high processing capability.

  FIG. 16 shows a block diagram of a configuration example of a mobile phone including a multimedia processing CPU in a comparative example of the present embodiment.

  In this cellular phone 900, the received signal received via the antenna 910 is demodulated, the telephone CPU 920 performs the incoming call processing, and the signal processed by the telephone CPU 920 is modulated and transmitted via the antenna 910. Sent. The telephone CPU 920 can read a program stored in the memory 922 and perform incoming call processing and outgoing call processing.

  When a desired signal is extracted from the received signal received via the antenna 930 via the tuner 940, a TS is generated by using the desired signal as an OFDM signal in the reverse procedure. The multimedia processing CPU 950 analyzes the TS packet from the generated TS, determines the PES packet and the section, and decodes video data and audio data from the TS packet of the desired program. The multimedia processing CPU 950 can read the program stored in the memory 952 and perform the above-described packet analysis processing and decoding processing. The display panel 960 performs display output based on the decoded video data, and the speaker 970 performs audio output based on the decoded audio data.

  In this way, the multimedia processing CPU 950 requires a very high processing capability. In general, a processor having a high processing capability has a high operating frequency and a large circuit scale.

  By the way, considering the bit rate of 1-segment broadcasting, most of the bandwidth is considered to be the bandwidth for video data and audio data, and the bandwidth for data broadcasting itself is narrowed. Accordingly, among the processes that can be realized by the multimedia processing CPU, it is necessary to always operate the multimedia processing CPU even though only the reproduction processing of video data and audio data may be required, resulting in an increase in power consumption. .

  Therefore, in this embodiment, a video decoder that performs video data decoding processing and an audio decoder that performs audio data decoding processing are provided independently, and the decoding processing is performed independently, thereby reducing the processing capability of each. You can adopt things. Furthermore, it is possible to flexibly reduce power consumption by appropriately stopping one of the operations of the video decoder and the audio data.

  Furthermore, since the video decoder and the audio decoder can be operated in parallel, the processing capability of each decoder can be reduced, and lower power consumption and cost can be realized.

  FIG. 17 shows a block diagram of a configuration example of a mobile phone including the information reproducing apparatus in the present embodiment. In FIG. 17, the same parts as those in FIG. 16 are denoted by the same reference numerals, and description thereof will be omitted as appropriate.

  The cellular phone 100 includes a host CPU (host in a broad sense) 110, a RAM (Random Access Memory) 120, a ROM (Read Only Memory) 130, a display driver 140, a DAC (Digital-to-Analog Converter) 150, an image processing IC ( Integrated Circuit) (information reproducing apparatus in a broad sense) 200 can be included. Further, the cellular phone 100 includes antennas 910 and 930, a tuner 940, a display panel 960, and a speaker 970.

  The host CPU 110 has a function of controlling the image processing IC 200 as well as the function of the telephone CPU 920 of FIG. The host CPU 110 reads a program stored in the RAM 120 or the ROM 130, and performs processing of the telephone CPU 920 in FIG. 16 and processing of controlling the image processing IC 200. At this time, the host CPU 110 can use the RAM 120 as a work area.

  The image processing IC 200 receives, from the TS from the tuner 940, a video TS packet (first TS packet) for generating video data and an audio TS packet (second TS packet) for generating audio data. Extract and buffer in a shared memory (not shown). The image processing IC 200 includes a video decoder and an audio decoder (not shown) capable of controlling the operation stop independently of each other. The video decoder and the audio decoder decode the video TS packet and the audio TS packet, respectively. Video data and audio data are generated. The video data and the audio data are supplied to the display driver 140 and the DAC 150, respectively, while being synchronized. The host CPU 110 can instruct the image processing IC 200 to start the video decoding process and the audio decoding process. The host CPU 110 may instruct the image processing IC 200 to start at least one of video decoding processing and audio decoding processing.

  A display driver (driving circuit in a broad sense) 140 drives a display panel (electro-optical device in a broad sense) 960 based on video data. More specifically, the display panel 960 includes a plurality of scanning lines, a plurality of data lines, and a plurality of pixels, each pixel being specified by each scanning line and each data line. Crystal Display panel can be used. The display driver 140 has a function of a scanning driver that scans a plurality of scanning lines and a function of a data driver that drives a plurality of data lines based on the video data.

  The DAC 150 converts audio data that is a digital signal into an analog signal and supplies the analog signal to the speaker 970. The speaker 970 outputs sound corresponding to the analog signal from the DAC 150.

2.3 Information Reproducing Device FIG. 18 is a block diagram showing a configuration example of the image processing IC 200 shown in FIG. 17 as the information reproducing device of this embodiment.

  The image processing IC 200 includes a TS separation unit (separation processing unit) 210, a memory (shared memory) 220, a video decoder 230, and an audio decoder 240. The image processing IC 200 further includes a display control unit 250, a tuner I / F (Interface) 260, a host I / F 270, a driver I / F 280, and an audio I / F 290. The memory 220 has the function of the buffer 40 of FIG.

  The TS separation unit 210 includes a video TS packet (first TS packet) for generating video data, an audio TS packet (second TS packet) for generating audio data, a video TS packet, and audio. Packets other than the TS packet for use (third TS packet) are extracted from the TS. The TS separation unit 210 can extract the first and second TS packets based on the analysis result of the host CPU 110 that analyzes the third TS packet once extracted from the TS. The TS separation unit 210 has the function of the separation processing unit 20 of FIG. That is, the TS separation unit 210 detects an error of each TS packet of the first to third TS packets, adds error information indicating the presence or absence of an error to each TS packet, and sets each TS packet to a variable length section or Based on the error information, the video decoding process, the audio decoding process, or the discarding of the TS packet can be performed without converting the packet into a PES (Packetized Elementary Stream) packet. The discarding of the TS packet may be performed by notifying the host CPU 110 from the image processing IC 200.

  The video decoder 230 reads the video TS packet from the storage area dedicated to the video TS packet in the storage area of the memory 220 and performs video decoding processing for generating video data based on the video TS packet. A reference timing for reproducing video data and audio data in synchronization is generated.

  The audio decoder 240 reads the audio TS packet from the storage area dedicated to the audio TS packet in the storage area of the memory 220 and performs audio decoding processing for generating audio data based on the audio TS packet.

  At least one of the video decoder 230 and the audio decoder 240 has the function of the decoder 30.

  The display control unit 250 performs a rotation process for rotating the orientation of the image represented by the video data read from the memory 220 and a resizing process for reducing or enlarging the size of the image. The data after the rotation processing and the data after the resizing processing are supplied to the driver I / F 280. The display control unit 250 performs control to transfer the processed data to the driver I / F 280 in accordance with the display timing.

  The tuner I / F 260 performs an interface process with the tuner 940. More specifically, the tuner I / F 260 performs control to receive a TS from the tuner 940. Tuner I / F 260 is connected to TS separator 210. A tuner 940 connected to the tuner I / F 260 corresponds to the digital tuner 50 of FIG.

  The host I / F 270 performs interface processing with the host CPU 110. More specifically, the host I / F 270 controls data transmission / reception with the host CPU 110. The host I / F 270 is connected to the TS separation unit 210, the memory 220, the display control unit 250, and the audio I / F 290. The host CPU 110 connected to the host I / F 270 realizes the function of the host 60 in FIG.

  The driver I / F 280 reads video data from the memory 220 via the display control unit 250 at a predetermined cycle, and supplies the video data to the display driver 140. The driver I / F 280 performs interface processing for transmitting video data to the display driver 140.

  The audio I / F 290 reads audio data from the memory 220 at a predetermined cycle and supplies the audio data to the DAC 150. The audio I / F 290 performs interface processing for transmitting audio data to the DAC 150.

  In such an image processing IC 200, the TS packet is extracted from the TS from the tuner 940 by the TS separator 210. The TS packet is stored in a pre-allocated storage area of the memory 220 as a shared memory. Then, the video decoder 230 and the audio decoder 240 respectively read out TS packets from dedicated storage areas allocated to the memory 220, generate video data and audio data, and display the synchronized video data and audio data with the display driver 140. And to the DAC 150.

  FIG. 19 shows an operation explanatory diagram of the image processing IC 200 of FIG.

  19, the same parts as those in FIG. 18 are denoted by the same reference numerals, and the description thereof will be omitted as appropriate.

  The memory 220 has first to eighth storage areas AR1 to AR8, and each storage area is assigned in advance. A TS packet separated by the TS separation unit 210 and error information as a result of error detection processing performed on the TS packet by the TS separation unit 210 are stored in each storage area.

  The first storage area AR1 stores the video TS packet (first TS packet) extracted by the TS separation unit 210 as a storage area dedicated to the video TS packet. The second storage area AR2 stores the voice TS packet (second TS packet) extracted by the TS separation unit 210 as a storage area dedicated to the voice TS packet. In the third storage area AR3, TS packets (third TS packets) excluding video TS packets and audio TS packets among the TS packets extracted by the TS separator 210 are stored.

  The fourth storage area AR4 stores the video ES data generated by the video decoder 230 as a storage area dedicated to the video ES data. The fifth storage area AR5 stores the audio ES data generated by the audio decoder 240 as a storage area dedicated to the audio ES data.

  In the sixth storage area AR6, a TS generated by the host CPU 110 is stored as TSRAW data. TSRAW data is set by the host CPU 110 instead of the TS from the tuner 940. Then, the TS separation unit 210 extracts a video TS packet, an audio TS packet, and other TS packets from the TS set as TSRAW data.

  In the seventh storage area AR7, video data after decoding by the video decoder 230 is stored. The video data stored in the seventh storage area AR7 is read by the display control unit 250 and used for video output by the display panel 960. The eighth storage area AR8 stores the audio data after the decoding process by the audio decoder 240. The audio data stored in the eighth storage area AR8 is provided for audio output by the speaker 970.

  The video decoder 230 includes a header deletion processing unit 232 and a video decoding processing unit 234. The header deletion processing unit 232 reads the video TS packet from the first storage area AR1, analyzes the TS header of the video TS packet, generates a PES packet (first PES packet), and then generates the PES header. The payload portion is stored in the fourth storage area AR4 of the memory 220 as video ES data. Then, the video decoder 230 including the header deletion processing unit 232 instructs the display control unit 250 to transfer image data in accordance with the display timing.

  The video decoding processing unit 234 reads video ES data from the fourth storage area AR4, Video data generated by performing decoding processing (video decoding processing in a broad sense) in accordance with the H.264 / AVC (Advanced Video Coding) standard is written to the seventh storage area AR7.

  The audio decoder 240 includes a header deletion processing unit 242 and an audio decoding processing unit 244. The header deletion processing unit 242 reads the audio TS packet from the second storage area AR2, analyzes the TS header of the audio TS packet, generates a PES packet (second PES packet), and then generates the PES header. The payload portion is stored as audio ES data in the fifth storage area AR5 of the memory 220. The audio decoding processing unit 244 generates audio ES data from the fifth storage area AR5, and performs decoding processing (audio decoding processing in a broad sense) in accordance with the MPEG-2 AAC (Advanced Audio Coding) standard. Audio data is written to the eighth storage area AR8.

  Then, the video decoder 230 reads the video TS packet (first TS packet) from the first storage area AR1, independently of the audio decoder 240, and performs the video decoding process based on the video TS packet. I do. Also, the audio decoder 240 reads the audio TS packet (second TS packet) from the second storage area AR2 independently of the video decoder 230, and performs the above audio decoding process based on the audio TS packet. Do. In this way, the video decoder 230 and the audio decoder 240 can be operated when the video and audio are output in synchronism, while only the video decoder 230 is operated and output when only the video is output. The operation of the decoder 240 can be stopped. When outputting only audio, only the audio decoder 240 can be operated to stop the operation of the video decoder 230.

  The host CPU 110 reads another TS packet (third TS packet) stored in the third storage area AR3, and generates a section from the TS packet. Then, various table information included in the section is analyzed. The host CPU 110 sets the analysis result in a predetermined storage area of the memory 220 and specifies it as control information for the TS separation unit 210. Thereafter, the TS separation unit 210 extracts TS packets from the tuner 940 according to the control information. On the other hand, the host CPU 110 can issue activation commands to the video decoder 230 and the audio decoder 240 separately. The video decoder 230 and the audio decoder 240 independently access the memory 220, read the analysis result of the host CPU 110, and perform a decoding process corresponding to the analysis result.

2.3.1 Reproduction Operation Next, an operation in the case of reproducing video data or audio data multiplexed on a TS in the image processing IC 200 as an information reproduction apparatus in the present embodiment will be described.

  FIG. 20 shows a flowchart of an operation example of reproduction processing by the host CPU 110. The host CPU 110 can perform the process shown in FIG. 20 by reading a program stored in the RAM 120 or the ROM 130 and executing a process corresponding to the program.

  First, the host CPU 110 performs a broadcast reception start process (step S100). Thereby, video data or audio data of a desired program among a plurality of programs received as a TS can be extracted from the TS. Then, the host CPU 110 activates at least one of the video decoder 230 and the audio decoder 240 of the image processing IC 200.

  Thereafter, the host CPU 110 causes the video decoder 230 and the audio decoder 240 to perform decoding processing when reproducing video and audio. Alternatively, the host CPU 110 stops the operation of the audio decoder 240 and causes the video decoder 230 to perform decoding processing when reproducing only the video. Alternatively, when reproducing only audio, the host CPU 110 stops the operation of the video decoder 230 and causes the audio decoder 240 to perform decoding processing (step S101).

  Next, the host CPU 110 performs broadcast reception end processing (step S102), and ends a series of processing (end). As a result, the host CPU 110 stops the operation of each unit of the image processing IC 200.

2.3.2 Broadcast Reception Start Process Next, a process example of the broadcast reception start process shown in FIG. 20 will be described. Here, a case where video and audio are reproduced will be described.

  FIG. 21 shows a flowchart of an operation example of the broadcast reception start process of FIG. The host CPU 110 can perform the process shown in FIG. 21 by reading a program stored in the RAM 120 or the ROM 130 and executing a process corresponding to the program.

  First, the host CPU 110 activates the video decoder 230 and the audio decoder 240 of the image processing IC 200 (step S110). Thereafter, the host CPU 110 initializes the tuner 940 and sets given operation information (step S111). Then, the host CPU 110 also initializes the DAC 150 and sets given operation information (step S112).

  Thereafter, the host CPU 110 monitors reception of TS (step S113: N). When reception of the TS is started, in the image processing IC 200, the TS separation unit 210 separates the TS from the TS into the video TS packet, the audio TS packet, and the other TS packets as described above, and the separated TS packet. Is stored in a storage area of a memory 220 provided for exclusive use. For example, the host CPU 110 can detect reception of a TS by an interrupt signal generated on the condition that a TS packet is stored in the third storage area AR3 in the memory 220 of the image processing IC 200. Alternatively, the host CPU 110 can periodically determine whether the TS packet has been written by accessing the third storage area AR3 of the memory 220, thereby determining the reception of the TS.

  When reception of a TS is detected in this way (step S113: Y), the host CPU 110 reads a TS packet stored in the third storage area AR3 and generates a section. Then, PSI (Program Specific Information) / SI (Service Information: program arrangement information) included in the section is analyzed (step S114). This PSI / SI is defined by the MPEG-2 system (ISO / IEC 13818-1).

  PSI / SI includes NIT (Network Information Table) and PMT (Program Map Table). The NIT includes, for example, a network identifier for specifying which broadcasting station the TS is from, a service identifier for specifying the PMT, a service type identifier indicating a broadcast type, and the like. In the PMT, for example, the PID of the video TS packet multiplexed in the TS and the PID of the audio TS packet are set.

  Therefore, the host CPU 110 extracts a service identifier for specifying the PMT from the PSI / SI, and can specify the PID of the received video TS packet and audio TS packet based on the service identifier (step S115). . Then, a predetermined storage in the memory 220 is provided so that the host CPU 110 can refer to the video decoder 230 and the audio decoder 240 for the PID corresponding to the program selected by the user of the mobile terminal or the PID corresponding to the predetermined program. An area (for example, the third storage area AR3) is set (step S116), and a series of processing ends (end).

  In this way, the video decoder 230 and the audio decoder 240 can perform decoding processing on the video TS packet and the audio TS packet while referring to the PID set in the memory 220.

  The host CPU 110 sets information corresponding to, for example, a service identifier for specifying the PMT in the TS separation unit 210 of the image processing IC 200. In this way, the TS separation unit 210 determines a section periodically received at a predetermined time interval, analyzes the PMT corresponding to the service identifier, and identifies the video TS specified by the PMT. Packets and TS packets for voice and other TS packets are extracted and stored in the memory 220.

  FIG. 22 is an operation explanatory diagram of the broadcast reception start process of the image processing IC 200 of FIGS. 18 and 19. In FIG. 22, the same parts as those in FIG. 18 or FIG.

  In FIG. 22, the seventh storage area AR7 is shared with the fourth storage area AR4, and the eighth storage area AR8 is shared with the fifth storage area AR5. In addition, PSI / SI, NIT, and PMT are stored in a predetermined storage area in the third storage area AR3.

  First, when TS is input from the tuner 940 (SQ1), the TS separation unit 210 stores a TS packet including PSI / SI in the memory 220 (SQ2). The TS separation unit 210 performs error detection processing, adds the result as error information, and stores the TS packet in the memory 220. At this time, the TS separation unit 210 can extract the PSI / SI itself of the TS packet and store it in the memory 220. Further, the TS separation unit 210 can extract the NIT from the PSI / SI and store it in the memory 220.

  The host CPU 110 reads PSI / SI, NIT, and PMT (SQ3), analyzes them, and identifies the PID corresponding to the program to be decoded. Then, the host CPU 110 sets information corresponding to the service identifier or PID corresponding to the program to be decoded in the TS separation unit 210 (SQ4). The host CPU 110 also sets the PID in a predetermined storage area of the memory 220 and refers to it during decoding processing by the video decoder 230 and the audio decoder 240. Here, the host CPU 110 can perform the processing shown in FIG. 7 or FIG. 11 and discard the TS packet based on the error information.

  The TS separation unit 210 extracts video TS packets and audio TS packets from the TS based on the set PID, and writes them to the first and second storage areas AR1 and AR2, respectively (SQ5).

  Thereafter, the video decoder 230 and the audio decoder 240 activated by the host CPU 110 sequentially read the video TS packet and the audio TS packet from the first and second storage areas AR1 and AR2 (SQ6), and perform video decoding processing and Perform audio decoding.

  At this time, in the next sequence, the host CPU 110, the video decoder 230, and the audio decoder 240 perform communication via command data.

2.3.3 Broadcast Reception End Process Next, an operation example of the broadcast reception end process shown in FIG. 20 will be described. Here, a case where video and audio are reproduced will be described.

  FIG. 23 shows a flowchart of a processing example of the broadcast reception end processing of FIG. The host CPU 110 can perform the process shown in FIG. 23 by reading a program stored in the RAM 120 or the ROM 130 and executing a process corresponding to the program.

  First, the host CPU 110 stops the video decoder 230 and the audio decoder 240 of the image processing IC 200 (step S120). In this case, the host CPU 110 issues a command to the image processing IC 200, and the image processing IC 200 stops the video decoder 230 and the audio decoder 240 using the decoding result of the control command.

  Thereafter, the host CPU 110 similarly stops the TS separation unit 210 (step S121). Then, the host CPU 110 stops the tuner 940 (step S122).

  FIG. 24 is a diagram for explaining the operation in the broadcast reception end process of the image processing IC 200 shown in FIGS. In FIG. 24, the same parts as those in FIG. 22 are denoted by the same reference numerals, and description thereof will be omitted as appropriate.

  First, the host CPU 110 performs control to stop the operation of the display control unit 250, and stops the supply of video data to the display driver 140 (SQ10). Next, the host CPU 110 stops the operations of the video decoder 230 and the audio decoder 240 (SQ11), and then stops the operations in the order of the TS separation unit 210 and the tuner 940 (SQ12, SQ13).

2.3.4 Reproduction Process 2.3.4.1 Reproduction Process of Video Data Next, an operation example of the video decoder 230 that performs the reproduction process of the video data will be described.

  FIG. 25 is a flowchart showing an example of the memory access operation of the video decoder 230 performed during the video decoding process. This process is performed, for example, in the decoding process in step S23 of FIG.

  First, the video decoder 230 determines whether or not the first storage area AR1 provided as the video TS buffer is in an empty state (step S140). When there is no video TS packet to be read from the first storage area AR1, the state becomes empty.

  When it is determined in step S140 that the first storage area AR1 that is the video TS buffer is not empty (step S140: N), the video decoder 230 further includes a fourth storage area provided as a video ES buffer. It is determined whether or not AR4 is full (step S141). When no more video ES data can be stored in the fourth storage area AR4, the full state is entered.

  When it is determined in step S141 that the fourth storage area AR4 that is the video ES buffer is not full (step S141: N), the video decoder 230 reads the video TS packet from the first storage area AR1, It is detected whether or not the PID (designated PID) specified by the host CPU 110 in step S116 in FIG. 21 (step S142).

  When it is detected in step S142 that the PID of the video TS packet is the designated PID (step S142: Y), the video decoder 230 analyzes the TS header and the PES header (step S143), and the video ES data Are stored in a fourth storage area AR4 provided as a video ES buffer (step S144).

  Thereafter, the video decoder 230 updates the read pointer for specifying the read address of the first storage area AR1, which is a video TS buffer (step S145), and returns to step S140 (return).

  When it is detected in step S142 that the PID of the video TS packet is not the designated PID (step S142: N), the process proceeds to step S145. When it is determined in step S140 that the first storage area AR1 that is the video TS buffer is in an empty state (step S140: Y), or in step S141, the fourth storage area AR4 that is the video ES buffer. Is determined to be full (step S141: Y), the process returns to step S140 (return).

  The video ES data stored in the fourth storage area AR4 in this way is sent to the H.264 by the video decoder 230. The decoding process is performed according to the H.264 / AVC standard and is written as video data in the seventh storage area AR7.

  FIG. 26 is a diagram for explaining the operation of the video decoder of the image processing IC 200 shown in FIGS. In FIG. 26, the same parts as those in FIG. 22 are denoted by the same reference numerals, and description thereof will be omitted as appropriate.

  In FIG. 26, the seventh storage area AR7 is shared with the fourth storage area AR4, and the eighth storage area AR8 is shared with the fifth storage area AR5. In addition, PSI / SI, NIT, and PMT are stored in a predetermined storage area in the third storage area AR3.

  First, as shown in FIG. 21, the host CPU 110 sets the PID corresponding to the program to be decoded in the TS separator 210 (SQ20). When a TS is input from the tuner 940 (SQ21), the TS separation unit 210 separates the video TS packet, audio TS packet, and other TS packets from the TS from the tuner 940 (SQ22). The video TS packet separated by the TS separation unit 210 is stored in the first storage area AR1 together with the error information generated by the TS separation unit 210. The audio TS packet separated by the TS separation unit 210 is stored in the second storage area AR2 together with the error information generated by the TS separation unit 210. TS packets other than the video TS packet and audio TS packet separated by the TS separation unit 210 are stored in the third storage area AR3 as PSI / SI together with error information generated by the TS separation unit 210. At this time, the TS separation unit 210 extracts NIT and PMT in the PSI / SI and stores them in the third storage area AR3.

  Next, the video decoder 230 activated by the host CPU 110 reads the video TS packet from the first storage area AR1 (SQ23). At this time, the video decoder 230 refers to the error information described above and determines whether to perform video decoding processing or discard video TS packets. When it is determined to perform the video decoding process, the video decoder 230 generates video ES data and stores the video ES data in the fourth storage area AR4 (SQ24).

  After that, the video decoder 230 reads the video ES data from the fourth storage area AR4 (SQ25). The decoding process according to the H.264 / AVC standard is performed. In FIG. 26, the video data after the decoding process is directly supplied to the display control unit 250 (SQ26). For example, the video data after the decoding process is once written back to a predetermined storage area of the memory 220, and then It is desirable to supply the display control unit 250 while synchronizing with the output timing of the audio data.

  Based on the video data thus supplied to the display control unit 250, the display driver 140 drives the display panel (SQ27).

2.3.4.2 Audio Data Reproduction Processing Next, an operation example of the audio decoder 240 that performs audio data reproduction processing will be described.

  FIG. 27 shows a flowchart of an example of memory access operation of the audio decoder 240 performed during the audio decoding process. This process is performed, for example, in the decoding process in step S23 of FIG.

  First, when activated by the host CPU 110, the audio decoder 240 reads out a program stored in a predetermined storage area of the memory 220, for example, and performs the processing shown in FIG. 27 by executing processing corresponding to the program. Can be done. That is, the audio decoder 240 includes a CPU (central processing unit), and after initialization processing of the image processing IC 200 (information reproduction device), a program for realizing audio decoding processing is read into the CPU from outside the image processing IC 200. Thus, the CPU can realize the audio decoding process.

  First, the audio decoder 240 determines whether or not the second storage area AR2 provided as the audio TS buffer is in an empty state (step S150). When there is no audio TS packet to be read from the second storage area AR2, the state becomes empty.

  When it is determined in step S150 that the second storage area AR2 that is the audio TS buffer is not empty (step S150: N), the audio decoder 240 further includes a fifth storage area provided as an audio ES buffer. It is determined whether or not AR5 is full (step S151). When no more audio ES data can be stored in the fifth storage area AR5, the full state is entered.

  When it is determined in step S151 that the fifth storage area AR5, which is the audio ES buffer, is not full (step S151: N), the audio decoder 240 reads the audio TS packet from the second storage area AR2, It is detected whether or not the PID (designated PID) specified by the host CPU 110 in step S116 in FIG. 21 (step S152).

  When it is detected in step S152 that the PID of the audio TS packet is the designated PID (step S152: Y), the audio decoder 240 analyzes the TS header and the PES header (step S153), and the audio ES data Are stored in a fifth storage area AR5 provided as an audio ES buffer (step S154).

  After that, the audio decoder 240 updates the read pointer for specifying the read address of the second storage area AR2 that is the audio TS buffer (step S155), and returns to step S150 (return).

  When it is detected in step S152 that the PID of the voice TS packet is not the designated PID (step S152: N), the process proceeds to step S155. When it is determined in step S150 that the second storage area AR2 that is the audio TS buffer is in an empty state (step S150: Y), or in step S151, the fifth storage area AR5 that is the audio ES buffer. Is determined to be full (step S151: Y), the process returns to step S150 (return).

  The audio ES data stored in the fifth storage area AR5 in this manner is decoded by the audio decoder 240 in accordance with the MPEG-2 AAC standard and written as audio data in the eighth storage area AR8.

  FIG. 28 is an operation explanatory diagram of the audio decoder of the image processing IC 200 of FIGS. 18 and 19. In FIG. 28, the same parts as those in FIG. 22 are denoted by the same reference numerals, and description thereof will be omitted as appropriate.

  In FIG. 28, the seventh storage area AR7 is shared with the fourth storage area AR4, and the eighth storage area AR8 is shared with the fifth storage area AR5. In addition, PSI / SI, NIT, and PMT are stored in a predetermined storage area in the third storage area AR3.

  First, as shown in FIG. 21, the host CPU 110 sets the PID corresponding to the program to be decoded in the TS separator 210 (SQ30). When a TS is input from the tuner 940 (SQ31), the TS separation unit 210 separates the video TS packet, the audio TS packet, and the other TS packets from the TS from the tuner 940 (SQ32). The video TS packet separated by the TS separation unit 210 is stored in the first storage area AR1 together with the error information generated by the TS separation unit 210. The audio TS packet separated by the TS separation unit 210 is stored in the second storage area AR2 together with the error information generated by the TS separation unit 210. TS packets other than the video TS packet and audio TS packet separated by the TS separation unit 210 are stored in the third storage area AR3 as PSI / SI together with error information generated by the TS separation unit 210. Furthermore, the TS separation unit 210 can extract NIT and PMT in the PSI / SI and write them in a predetermined storage area of the third storage area AR3.

  Next, the audio decoder 240 activated by the host CPU 110 reads the audio TS packet from the second storage area AR2 (SQ33). At this time, the audio decoder 240 determines whether to perform the audio decoding process or discard the audio TS packet with reference to the error information described above. When it is determined to perform the audio decoding process, the audio decoder 240 generates audio ES data and stores the audio ES data in the fifth storage area AR5 (SQ34).

  Thereafter, the audio decoder 240 reads audio ES data from the fifth storage area AR5 (SQ35), and performs a decoding process according to the MPEG-2 AAC standard. In FIG. 28, the decoded audio data is directly supplied to the DAC 150 (SQ36). For example, the decoded audio data is temporarily written back to a predetermined storage area of the memory 220, and then the video data It is desirable to supply the DAC 150 in synchronization with the output timing.

  The operation of the audio decoder 240 as described above is performed independently of the operation of the video decoder 230.

  The present invention is not limited to the above-described embodiment, and various modifications can be made within the scope of the gist of the present invention. In the above embodiment or its modification, an example applicable to terrestrial digital broadcasting has been described. However, the present invention is not limited to one applicable to terrestrial digital broadcasting.

  In the present embodiment, mainly H.264 is used. Although the case where the present invention is applied to decoding processing conforming to H.264 / AVC has been described, the present invention is not limited to this, and other standards, It goes without saying that the present invention can be applied to decoding processing based on a standard developed from the H.264 / AVC standard.

  In the invention according to the dependent claims of the present invention, a part of the constituent features of the dependent claims can be omitted. Moreover, the principal part of the invention according to one independent claim of the present invention can be made dependent on another independent claim.

The block diagram of the structural example of the decoding apparatus in this embodiment. Explanatory drawing of the error information added to TS packet in this embodiment. FIG. 3 is a detailed explanatory diagram of the error information of FIG. 2. FIG. 4 is an explanatory diagram of an example of contents of an error status in FIG. 3. Explanatory drawing of the storage condition of the error information in this embodiment, and the buffer of TS packet. The figure which shows an example of the addition timing of the error information in this embodiment. The flowchart of an example of the error processing of the host in this embodiment. The flowchart of an example of the error process of the decoder in this embodiment. The figure which shows the kind of packet applicable in this embodiment. The figure which shows the other example of the error status in this embodiment. The flowchart of an example of the error process of the host in the modification of this embodiment. The example of the error status in the other modification of this embodiment is shown. Explanatory drawing of the concept of the segment of digital terrestrial broadcasting. Explanatory drawing of TS. Explanatory drawing of a PES packet and a section. The block diagram of the structural example of the mobile telephone containing the multimedia processing CPU in the comparative example of this embodiment. The block of the structural example of the mobile telephone containing the information reproduction apparatus in this embodiment. FIG. 18 is a block diagram of a configuration example of the image processing IC in FIG. 17. FIG. 19 is an operation explanatory diagram of the image processing IC in FIG. 18. The flowchart of the operation example of the reproduction | regeneration processing by host CPU. The flowchart of the operation example of the broadcast reception start process of FIG. Operation | movement explanatory drawing in the broadcast reception start process of the image processing IC of FIG.18 and FIG.19. The flowchart of the process example of the broadcast reception end process of FIG. Operation | movement explanatory drawing in the broadcast reception end process of the image processing IC of FIG.18 and FIG.19. The flowchart of the example of memory access operation | movement of a video decoder. FIG. 20 is an operation explanatory diagram of a video decoder of the image processing IC in FIGS. 18 and 19. The flowchart of the example of memory access operation | movement of a speech decoder. FIG. 20 is an operation explanatory diagram of the audio decoder of the image processing IC in FIGS. 18 and 19.

Explanation of symbols

10 decoding device, 20 separation processing unit, 22 error processing unit,
24 packet separator, 30 decoder, 40 buffer,
50 digital tuners, 60 hosts, 100 mobile phones,
110 host CPU, 120 RAM, 130 ROM,
140 display driver, 150 DAC, 200 image processing IC,
210 TS separator, 230 video decoder, 240 audio decoder,
250 display control unit, 260 tuner I / F, 270 host I / F,
280 Driver I / F, 290 Audio I / F, 910, 930 Antenna,
940 tuner, 960 display panel, 970 speaker

Claims (15)

A decoding device for performing decoding processing on stream data in which packet data is multiplexed,
An error processing unit that detects an error in fixed-length packet data separated from the stream data and adds error information indicating the presence or absence of the error to the packet data;
A decoder for decoding the packet data,
A decoding apparatus, wherein the decoding process or the packet data is discarded based on the error information without converting the packet data into a variable-length section or a variable-length packet. In claim 1,
A buffer for storing the error information and the packet data;
The decoding apparatus, wherein the decoder reads out the error information and the packet data from the buffer, and determines whether to perform a decoding process or discard the packet data based on the error information. In claim 2,
Prior to writing packet data into the buffer, error information added to the immediately preceding packet data is written into the buffer. In claim 2 or 3,
The error processing unit
A decoding device, wherein error information indicating that another write request to the buffer has occurred during a write request for writing the packet data to the buffer is added to the packet data. In any of claims 2 to 4,
The error information is
A decoding apparatus, wherein the error information is stored in a storage area of the buffer so as to be read prior to packet data to which the error information is added. In any one of Claims 1 thru | or 5,
The packet data is a TS (Transport Stream) packet,
A decoding apparatus characterized by performing the decoding process or discarding the TS packet based on the error information without converting the TS packet into a variable-length section or a PES (Packetized Elementary Stream) packet. In claim 6,
The error processing unit
A decoding apparatus characterized by detecting at least one error among table_id, section_syntax_indicator, current_next_indicator, and section_number in a data structure of a PMT (Program Map Table), and adding error information indicating the presence / absence of an error to the packet data. In claim 6,
The error processing unit
A decoding apparatus, wherein an error in a PAT (Program Association Table) or NIT (Network Information Table) is detected, and error information indicating the presence or absence of an error is added to the packet data. In claim 7 or 8,
A decoding apparatus characterized in that packet data in which a PMT, PAT, or NIT error is detected is discarded based on the error information. A decoding method for performing decoding processing on stream data in which packet data is multiplexed,
Detecting an error in fixed-length packet data separated from the stream data;
Add error information indicating the presence or absence of errors to the packet data,
Without converting the packet data into variable-length sections or variable-length packets, based on the error information, determine whether to decode the packet data or discard the packet data,
A decoding method comprising: performing decoding processing when it is determined to perform decoding processing of the packet data based on the error information. An information reproducing apparatus for reproducing at least one of video data and audio data,
Transport a first TS (Transport Stream) packet for generating video data, a second TS packet for generating audio data, and a third TS packet other than the first and second TS packets. A separation processing unit for extracting from the stream;
A first storage area for storing the first TS packet; a second storage area for storing the second TS packet; and a third storage area for storing the third TS packet; A memory having
A video decoder for performing video decoding processing for generating the video data based on the first TS packet read from the first storage area;
An audio decoder that performs audio decoding processing for generating the audio data based on the second TS packet read from the second storage area;
The separation processing unit is
Detecting an error in each TS packet of the first to third TS packets, adding error information indicating the presence or absence of an error to each TS packet;
The video decoding process, the audio decoding process, or the discarding of the TS packet is performed based on the error information without converting each TS packet into a variable-length section or a PES (Packetized Elementary Stream) packet. Information playback device. In claim 11,
The video decoder reads the first TS packet from the first storage area independently of the audio decoder, performs the video decoding process based on the first TS packet,
The audio decoder reads the second TS packet from the second storage area independently of the video decoder, and performs the audio decoding process based on the second TS packet. Information playback device. In claim 11 or 12,
When reproducing only the video data of the video data and audio data, stop the operation of the audio decoder,
An information reproducing apparatus characterized by stopping the operation of the decoding apparatus when reproducing only the audio data of the video data and audio data. An information reproducing apparatus according to any one of claims 11 to 13,
An electronic apparatus comprising: a host that instructs the information reproduction apparatus to start at least one of the video decoding process and the audio decoding process. Tuner,
The information reproducing apparatus according to claim 11, wherein a transport stream from the tuner is supplied;
An electronic apparatus comprising: a host that instructs the information reproduction apparatus to start at least one of the video decoding process and the audio decoding process.

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