JP2007281954A - Digital filter - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To reduce circuit scale and power consumption, and to prolong a driving time of a combo-type radio unit even in application to a WLAN device. <P>SOLUTION: The digital filter uses a plurality of coefficients of different impulse responses to output respectively a first filtering value of a signal of a first modulation system and a second filtering value of a second modulation system. The digital filter comprises: an approximate output unit 11 which outputs a first filtering value g(t) using a first coefficient a<SB>n</SB>as one of the plurality of coefficients and calculates out an approximate value of the second filtering value using an approximate coefficient of a second coefficient b<SB>n</SB>, including at least a part of the first coefficient a<SB>n</SB>, as one of the plurality of coefficients; a differential output unit 14 which calculates out a differential value between the approximate value outputted from the approximate output unit 11 and the second filtering value calculated using the second coefficient b<SB>n</SB>; and an addition unit 17 which outputs a second filtering value h(t) by adding the approximate value and the differential value calculated by the approximate output unit 11 and the differential output unit 14, respectively. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to a digital filter applied to a communication device, and more particularly to a digital filter applied to a portable wireless communication device having a limitation in power supply.

  In general, a digital filter includes a shift register for holding input data, and a multiplier and an adder for changing frequency characteristics. As an implementation method of the digital filter, for example, there is a flash type finite impulse response (FIR) filter. The flash FIR filter holds input data in a shift register, multiplies the value of each stage of the shift register by a filter coefficient, and adds the multiplied values together to obtain a filtering value.

FIG. 8 shows an example of a conventional digital filter. FIG. 8 shows a digital filter in a combo-type receiver. When only the upper half of FIG. 8 is used, the configuration of a normal flash FIR filter is obtained. First, a normal digital filter will be described. In the upper half of FIG. 9, the output data s (t) of the AD converter 1 is input to an N-stage shift register 2 and a plurality of flip-flops 2 (0) to 2 (N−1) from the first stage to the n-th stage. ) Are appropriately weighted by the multipliers 3 (0) to 3 (N-1) and then added by the adder 4. The tap coefficients of the weighting in this _{case, a n (n = 0,1,} ..., N-1) When the output of the adder at time t is as shown below formula (i),
g (t) = Σ _n a _n × s (tn) (i)
The frequency characteristics of the input signal can be changed. Here, s (t) represents the input signal of the digital filter at time t.

  A radio receiver illustrated and described in a later embodiment is a single analog-digital system having an in-phase (I-inphase-) component and a quadrature (Q-quadrature-) component between a downconverter including an antenna and a demodulator. A converter (ADC) and a digital filter are provided, and after a signal received by an antenna is separated into an I component and a Q component by orthogonal demodulation by a down converter, a baseband (base frequency, hereinafter referred to as B / B) Reduce the frequency to “Base-Band”. An analog signal is converted into a digital signal by an AD converter, and unnecessary band noise is suppressed by a digital filter. The demodulator demodulates the signal that has been modulated and transmitted to obtain an estimated value of the transmission sequence.

  There is a configuration example called a combo-type radio receiver for such a basic configuration. This combo-type radio receiver refers to a radio apparatus for receiving signals of a plurality of different modulation schemes. In such a combo-type radio receiver, there is one down converter including an antenna, and the AD converter I component and the Q component are provided in parallel, but the digital filter is for the first system I component. And the Q component are provided in parallel between the first system demodulator, and the second system I component and Q component digital filters are also provided in parallel between the second system demodulator. Yes. Therefore, in the combo-type radio receiver, four digital filters and two demodulators are provided. After being converted into digital signals by the AD converter, two different digital filters and demodulators are respectively connected. To obtain a transmission sequence estimation value.

  A conventional combo-type receiver (or transmitter) uses a plurality of digital filters each having an optimum coefficient for each reception (or transmission) system, and the normal digital signal shown in the upper half of FIG. A plurality of filter configurations are prepared, or a composite type digital filter as shown in FIG. 8 in which the upper half is a first-system digital filter and the lower half is a second-system digital filter is used. It was.

In FIG. 8, a conventional digital filter for a combo-type receiver uses an output s (t) of an AD converter 1 for each stage 2 (0), 2 (1),..., 2 (N-2). , 2 (n-1) and the data storage register 2 sequentially stores each multiplier 3 for each respective stage for multiplying a first coefficient a _n in the output of each stage of each of the data storage register 2 (0) , 3 (1),..., 3 (N−2), 3 (N−1), a plurality of first multipliers 3, and each stage 3 (0), 3 (1), .., 3 (N-2), 3 (N-1), the first adder 4 that outputs the digital value g (t) of the first system by adding the outputs, and each stage of the data storage register 2 2 (0), 2 (1), ..., 2 (n-2), 2 a multiplier 5 (0) per each stage multiplying a second coefficient _{b n} to (n-1) output for each, 5 ( ,..., 5 (N−2), 5 (N−1), and a plurality of stages of the second multiplier 5, and each stage 5 (0), 5 (1),. And a second adder 6 that outputs a digital value h (t) of the first system by adding the outputs of N-2) and 5 (N-1).

First coefficient _{a n} multiplier 3 of each stage (0), 3 (1) , ..., 3 (N-2), 3 (N-1) , respectively for each _{a 0, a 1, a 2} , ..., a _N-2 , a _N-1 , and the second coefficient b _n is a multiplier 5 (0), 5 (1), ..., 5 (N-2), 5 (N- Each of 1) is b ₀ , b ₁ , b ₂ ,..., B _N−2 , b _N−1 . Compared to a configuration in which the output of the AD converter 1 is held in a separate data storage register, such a composite digital filter has a configuration in which the data storage register 2 can be omitted for one column and the circuit scale can be reduced. Although it has the characteristics, it still requires a large number of multipliers having a large bit width, and there has been a problem that the overall circuit scale and power consumption become large.

  For example, in a WLAN (Wireless LAN—Local Area Network—) system compliant with the IEEE 802.11g standard, it is necessary to operate at least two types of digital filters simultaneously in order to receive signals of a plurality of modulation schemes. In addition, a multiple access system called CSMA / CA (Carrier Sense Multiple Access / Collision Avoidance) is used. Since this system cannot predict the timing at which the received signal arrives, the digital filter should be operated even during standby. There must be. For this reason, reducing the power consumed by the digital filter as much as possible has been a major issue for extending the driving time of WLAN devices that are combo-type radios.

  As described above, the conventional digital filter of the combo-type radio still requires a large number of multipliers having a large bit width even if the digital filter itself has a composite configuration corresponding to a plurality of different modulation methods. Therefore, there is a problem that the circuit scale and power consumption increase.

In addition, when a conventional digital filter is applied to a communication system that cannot predict when data destined for its own station will be transmitted, the digital filter must be operated during the standby time. There is also a problem that it is difficult to extend the driving time of the combo-type radio device applied to the WLAN device.
JP 2002-016479 A JP-A-11-202949 USP 6,307,879

  The present invention has been made in view of the above problems, and provides a digital filter capable of reducing the circuit scale and power consumption and extending the driving time of a combo-type radio even when applied to a WLAN device. With the goal.

  The digital filter according to the first configuration as a basic configuration is a digital filter that outputs a first filtering value of a signal of the first modulation scheme and a second filtering value of the second modulation scheme using a plurality of coefficients having different impulse responses. A filter that outputs the first filtered value using a first coefficient as one of the plurality of coefficients and includes at least a part of the first coefficient as one of the plurality of coefficients; An approximate output unit that calculates and outputs an approximate value of the second filtering value using an approximate coefficient of the second coefficient, and is calculated using the approximate value output from the approximate output unit and the second coefficient. A difference output unit that calculates and outputs a difference value with respect to the second filtering value; the approximate value calculated by the approximate output unit and the difference output unit; Characterized by comprising an adding unit which adds the differential value to output the second filtered value.

  In the digital filter according to the second configuration, the approximate output unit includes a first filter unit that outputs the first filtering value using the first coefficient as a finite impulse response filter coefficient, and the approximate coefficient. An approximate value calculation unit that calculates an approximate value of the second filtering value by using the difference output unit, the coefficient generated by adding and subtracting the second coefficient and the approximate coefficient with respect to the input digital signal. A difference calculation unit that calculates the approximate value of the second filtering value and a difference value of the second filtering value as a finite impulse response filter coefficient, and an output of the adding unit that adds the difference value and the approximate value is The second filtering value is used.

  The digital filter according to the third configuration is that of the second configuration, wherein the approximate value calculation unit outputs an approximate value of the second filtering value by using the first coefficient as a finite impulse response filter coefficient.

  In the digital filter according to the fourth configuration, the approximate output unit outputs the first filtering value using the first coefficient as a finite impulse response filter coefficient and outputs an approximate value of the second filtering value in the first configuration. A first filter unit for calculating, and the difference output unit includes a difference calculation unit that outputs the difference value using a coefficient obtained by subtracting the approximate coefficient from the second coefficient as a finite impulse response filter coefficient. And an adder for adding the difference value and the approximate value and outputting the second filtered value.

  A digital filter according to a fifth configuration is the first configuration, wherein the approximate output unit includes a first filter unit that outputs the first filtering value using the first coefficient as a finite impulse response filter coefficient, and the approximate coefficient as the first filter. An approximate value calculation unit including a third filter unit that is a modified flash FIR filter in which a part of the first coefficient is a finite impulse response filter coefficient, and the difference output unit is configured to approximate the second coefficient to the approximation A second filter unit that outputs the differential filtering value using a coefficient obtained by subtracting the coefficient as a finite impulse response filter coefficient is provided.

  According to the digital filter having the above configuration, the circuit scale and power consumption can be reduced.

  Hereinafter, embodiments of a digital filter according to the present invention will be described in detail with reference to the accompanying drawings.

[First Embodiment]
FIG. 1 is a block diagram showing a configuration of a digital filter according to a first embodiment including the basic concept of the present invention. In FIG. 1, a digital filter 10 is a digital filter that is applied to a wireless transceiver that transmits and receives signals of a plurality of different modulation schemes and that is represented by a plurality of coefficients having different impulse responses. The present invention is applied to a receiver and a combo-type wireless receiver whose configuration example is shown in FIG.

  First, the wireless receiver of FIG. 2 and the combo-type wireless receiver of FIG. 3 will be described. Here, the combo-type radio receiver refers to a radio apparatus for receiving signals of a plurality of different modulation schemes. In FIG. 2, a signal received by the antenna 8 is separated into an I component and a Q component by orthogonal demodulation by the down converter 7, and then the frequency is converted from a carrier band to a baseband (Base-band) band. An analog signal is converted into a digital signal for each phase component by the AD converters 1 (I) and 1 (Q), and noise in unnecessary bands is suppressed by the digital filters 10 (I) and 10 (Q). . The demodulator 9 demodulates the modulated signal to obtain an estimated value of the transmission sequence.

  In FIG. 3, the combo-type radio receiver uses two different digital filters 10A and 10B and demodulators 9A and 9B to convert the digital signals after AD converters 1 (I) and 1 (Q), respectively. A combo-type receiver is configured by calculating the transmission sequence estimation value. Since the I component and the Q component are digitally filtered in each system, the first system digital filter includes 10A (I) and 10A (Q), and the second system digital filter includes 10B (I) and 10B (Q). Is included. The digital filter of the first embodiment is applied to the combo type digital filter shown in FIG.

In Figure 1, the digital filter 10, from an analog signal analog - using the first coefficient a _n as one of the digitally converted sequentially held to the plurality of coefficient digital signal s (t) at a plurality of stages and calculating an approximate value of the second filtered value h (t) calculated using the second coefficient b _n as one of the other of the plurality of coefficients and outputting a first filtered value g (t) Te output The approximate output unit 11 that calculates the difference value between the approximate value output from the approximate output unit 11 and the second filtering value h (t) calculated using the second coefficient b _n. 14 and an addition unit 17 that adds the approximate value and the difference value respectively calculated by the approximate output unit 11 and the difference calculation unit 14 and outputs a second filtering value h (t).

As the detailed structure of the approximate output unit 11, a first filter unit 12 for outputting a first filtered value g (t) by using the first coefficient a _n, it is calculated using the second coefficient b _n An approximate value calculation unit 13 that calculates an approximate value of the second filtering value h (t) may be provided. The difference output unit 14 is a difference calculation unit 15 that calculates a difference between the approximate value of the second filtering value h (t) calculated using the second coefficient b _n and the second filtering value h (t). The difference calculation unit 15 may include a second filter unit.

[Second Embodiment]
FIG. 4 shows a digital filter according to a second embodiment of the present invention. The second embodiment, "b _l -a _l replaces the approximate value calculating section 13 and the first filter unit 12 to the flash FIR filter with coefficients a _n as a first filter coefficient, the difference output unit 14 as the filter coefficients The flash type FIR filter having “” is replaced with the adder 17 in the example.

That is, the digital filter according to the second embodiment, the digital filter according to the first embodiment, the approximate output unit 11, the calculates the filtering value of the first coefficient a _n first filtered value g (t) is It comprises a first filter section 12 having a first coefficient a _n for calculating an approximate value of the second filtered output value and outputting the difference output unit 14, a first coefficient a _n as an approximation coefficient from the second coefficient b _n A difference calculation unit 16 that outputs a difference filtering value using a coefficient (b _n −a _n ) subtracted as a finite impulse response filter coefficient, and adds the difference filtering value and the first filtering value to obtain a second coefficient b _n the same coefficient _{[i.e., = (b n -a n)} + a n] by the second filtering value h (t) the output of the filtering value Characterized in that it comprises a that adder 17.

  FIG. 5 shows an example of filter coefficients in the second embodiment shown in FIG. In the second embodiment, the input signal and the filter coefficient are assumed to be real numbers, but the same idea can be applied even if the input signals and filter coefficients are complex numbers.

In the second embodiment, two filter outputs
g (t) = Σ _n a _n × s (tn) (ii)
h (t) = Σ _n b _n × s (tn) (iii)
To get
g (t) = Σ _n a _n × s (tn) (iv)
h (t) = g (t) + {h (t) -g (t)}
= Σ _n a _n × s (tn) + {Σ _n (b _n -a _n ) × s (tn)} (v)
Is used. As shown in FIG. 5, the absolute value of the difference of the filter coefficients _{a n} and _{b n (n = 0~N-1} ) | a n -b n | if small, in order to determine the h (t), approximated By using g (t) as a value and obtaining from a digital filter using the difference “b _n −a _n ” as a filter coefficient, the circuit scale required for the calculation can be greatly reduced. The reason is the bit width _w s of the input signal s (t), the value needed to represent the _{b n w 0, b n -a} n needed to represent the value _w 1 _(w s < when a w _0), h multipliers required in the calculation of (t) can be replaced by the those of w _s bits × w ₀ bits of w _s bits × w _s bits, obtained by the replacement This is because the circuit reduction scale is sufficiently larger than the circuit scale of the final stage adder that is newly required.

In the second embodiment, was determined using the equation approximation of the sum of all the terms of h (t) represented by _{(iii) a n × s (} t-n), h of (t) the approximation of the partial sum obtained with _{a n × s (t-n} ), it is possible to reduce power consumption and circuit scale even seek h (t) by using the approximate value.

  In the second embodiment, the flash type filter is used as an example of the FIR filter, but a transposition type FIR filter may be used. Here, the transposed FIR filter is an FIR filter in which an adder for adding the value held in the previous register and the input data multiplied by the filter coefficient is inserted between the stages of the shift register. It is. In the transposed FIR filter, the arrangement order of the filter coefficients is just the transposed order as compared with the flash type FIR filter.

[Third Embodiment]
Next, a digital filter according to a third embodiment of the present invention will be described with reference to FIGS. The third embodiment is replaced with a flash-type FIR filters with _{a n (0 ≦ n ≦ 24} ) a first filter unit in the first embodiment as the filter coefficients, {a ₀ approximate value calculating section as the filter coefficients, - The modified flash FIR filter having a ₁ , a ₄ , a ₁₂ , a ₂₀ , −a ₂₃ , a ₂₄ }, and {b ₀ −a ₀ , b ₁ + a ₁ , b ₂ − In this example, a flash type FIR filter having a ₄ , b ₃ -a ₁₂ , b ₄ -a ₂₀ , b ₅ + a ₂₃ , b ₆ -a ₂₄ } is replaced, and the adder is replaced by an adder. The reason why the modified flash type is used is that a register for adjusting the timing of addition is inserted.

  FIG. 7 shows an example of filter coefficients in the third embodiment. In the fourth embodiment, the input signal and the filter coefficient are assumed to be real numbers, but the same idea can be applied even if the input signals and filter coefficients are complex numbers.

In this fourth embodiment, two filter outputs
g (t) = Σ _n a _n × s (tn) (vi)
h (t) = Σ _n b _n × s (tn) (vii)
To get
g (t) = Σ _n a _n × s (tn) (viii)
h (t) = (a ₀ × s (t-9) + a ₁ × s (t-10)-a ₄ × s (t-11) + a ₁₂ × s (t-12)
-a ₂₀ × s (t-13) + a ₂₃ × s (t-14) + a ₂₄ × s (t-15)}
+ ((b ₀ -a ₀ ) × s (t-9) + (b ₁ + a ₁ ) × s (t-10) + (b _2- a ₄ ) × s (t-11) + (b ₃ -a ₁₂ ) × s (t-12)
+ (b _4- a ₂₀ ) × s (t-13) + (b ₅ + a ₂₃ ) × s (t-14) + (b ₆ -a ₂₄ ) × s (t-15)} (... ix)
This relationship is used. To calculate h (t), _first, after selecting a _b l (l = _0~6) values close absolute value from among a n (n = 0~24), they h (t ) Is used to calculate the approximate value. Next, a difference between h (t) and an approximate value of h (t) is obtained from a digital filter using b _n −a _m (or b _n + a _m ) as a filter coefficient. Finally, the value of h (t) is derived by adding the approximate value of h (t) and the difference. Here, a _m represents a value close to b _n in absolute value. With the above operation, the bit width of the multiplier that is newly required for the calculation of h (t) can be reduced as in the second embodiment, and a circuit necessary for obtaining two filter outputs. Scale and power consumption can be greatly reduced.

That digital filter according to the third embodiment, in the digital filter of the first embodiment, the approximate output section, a first filter unit 12 which outputs the first filtered value of the first coefficient a _n as a finite impulse response filter coefficients includes an approximation calculation unit 13 a part of the first coefficient a _n as an approximation coefficient becomes than the third filter portion 23 which is a modified flash type FIR filter having a finite impulse response filter coefficients, the differential output unit 14 The second filter unit 15 outputs the differential filtering value using a coefficient obtained by subtracting the approximate coefficient from the second coefficient as a finite impulse response filter coefficient. As can be seen from the configuration of the third embodiment, the idea of the present invention is applied to reduce the circuit scale and power consumption even if the number of filter taps and the sign of the filter coefficient of each signal system do not match. it can.

  In the third embodiment, a transposition FIR filter may be used as the FIR filter.

The block diagram which shows the structure of the digital filter by 1st Embodiment. The block diagram which shows the structure of a radio receiver. The block diagram which shows the structure of a combo type | mold radio | wireless receiver. The block diagram which shows the structure of the digital filter by 2nd Embodiment. The characteristic view which shows the relationship between the coefficient of the digital filter of 2nd Embodiment, and a subscript. The block diagram which shows the structure of the digital filter by 3rd Embodiment. The characteristic view which shows the relationship between the coefficient of the digital filter of 3rd Embodiment, and a subscript. The block diagram which shows the conventional digital filter in a combo type | mold radio | wireless machine.

Explanation of symbols

a _n first coefficient _{b n} second coefficient _b n -a _n difference coefficient s (t) the input digital signal g (t) first filtering value h (t) second filtering value 11 approximates the output unit 12 first filter unit 13 Approximate value calculation unit 14 Difference output unit 15 Second filter unit 16 Difference calculation unit 17 Addition unit 23 Third filter unit (transposed FIR filter)

Claims (5)

A digital filter that outputs a first filtering value of a signal of the first modulation scheme and a second filtering value of the second modulation scheme using a plurality of coefficients having different impulse responses,
Approximating a second coefficient as one of the plurality of coefficients, wherein the first filtering value is output using a first coefficient as one of the plurality of coefficients and includes at least a part of the first coefficient An approximate output unit that calculates and outputs an approximate value of the second filtering value using a coefficient;
A difference output unit that calculates and outputs a difference value between the approximate value output from the approximate output unit and the second filtering value calculated using the second coefficient;
An adding unit that adds the approximate value and the difference value calculated by the approximate output unit and the difference output unit, respectively, and outputs the second filtering value;
A digital filter comprising: The approximate output unit outputs a first filtering value using the first coefficient as a finite impulse response filter coefficient, and an approximate value for calculating an approximate value of the second filtering value using the approximate coefficient A calculation unit,
The differential output unit uses the approximate value of the second filtering value and the second filtering value by using a coefficient generated by adding and subtracting the second coefficient and the approximate coefficient with respect to the input digital signal as a finite impulse response filter coefficient. A difference calculation unit for calculating the difference value of
The digital filter according to claim 1, wherein an output of the adding unit that adds the difference value and the approximate value becomes the second filtering value.   The digital filter according to claim 2, wherein the approximate value calculation unit outputs an approximate value of the second filtering value using the first coefficient as a finite impulse response filter coefficient. The approximate output unit includes a first filter unit that outputs the first filtering value using the first coefficient as a finite impulse response filter coefficient and calculates an approximate value of the second filtering value,
The difference output unit includes a difference calculation unit that outputs the difference value as a finite impulse response filter coefficient obtained by subtracting the approximate coefficient from the second coefficient,
The digital filter according to claim 1, wherein the adding unit includes an adder that adds the difference value and the approximate value and outputs the second filtering value.   The approximate output unit includes a first filter unit that outputs the first filtering value using the first coefficient as a finite impulse response filter coefficient, and a modification that uses a part of the first coefficient as a finite impulse response filter coefficient as an approximate coefficient. An approximate value calculation unit comprising a third filter unit that is a flash FIR filter, and the differential output unit uses the coefficient obtained by subtracting the approximate coefficient from the second coefficient as a finite impulse response filter coefficient to perform the differential filtering The digital filter according to claim 1, further comprising a second filter unit that outputs a value.

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