JP2007274180A - Load circuit and tuning circuit using the same - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a load circuit used for a tuning circuit with a characteristic of a constant gain for a constant band at all times wherein the need for a circuit of adjusting a negative resistance value is eliminated with respect to a tuning frequency even if the tuning frequency of the tuning circuit is greatly changed. <P>SOLUTION: The load circuit 10 used for the tuning circuit includes: an inductor 14; and a negative resistance circuit 12 connected in series with the inductor 14 and cancelling a series resistance component of the inductor 14 so as to increase the Q of the inductor. The tuning circuit with a Q higher than the Q of the inductor 14 itself can be obtained by configuring the tuning circuit by the use of the load circuit 10 with the configuration, and the tuning circuit with the characteristic of the constant gain at the constant band at all times can be configured even if the tuning frequency is greatly changed. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention generally relates to a load circuit used for a tuning circuit of a receiving terminal device such as a television tuner, and more specifically, an improved load circuit so that a Q (Quality Factor) of the tuning circuit can be increased. About. The present invention also relates to a tuning circuit using the load circuit.

  The best way to improve the intermodulation characteristics of the receiver is to improve the frequency selectivity of the tuning circuit at the receiving frequency. However, the Q of the tuning circuit, which is an index of the frequency selectivity of the tuning circuit, depends on the Q of the inductor circuit. When the inductor is formed on the semiconductor substrate, the Q of the inductor component becomes small due to the metal resistance component generated in series with the inductance component. When a tuning circuit is created using an inductor formed on a semiconductor substrate, only a small tuning circuit Q can be created. To increase the frequency selectivity of the tuning circuit, it is conceivable to increase the Q of the tuning circuit by increasing the number of stages of the tuning circuit or using a negative resistance circuit.

  Since it is difficult to increase the number of stages of the tuning circuit because it is necessary to interlock with a plurality of tuning frequencies accurately matched, a circuit that uses a negative resistance circuit to increase the Q of the tuning circuit is considered.

  As shown in FIG. 8, a negative resistance circuit 62 is added to one of the circuit configurations for increasing the Q of the tuning circuit using a negative resistance, and a proposal for adjusting the Q of the tuning circuit has been made (non-patent document). Reference 1). In the circuit of FIG. 8, the input signal Vi is passed through the voltage-current conversion circuit 17 and output from Vo. Reference numeral 63 denotes a current source.

  Referring to FIG. 8A, the negative resistance circuit 62 connects the drains and gates of the differential transistors M1 and M2, and the sources of the differential transistors M1 and M2 are connected to each other. With the configuration described above, a negative resistance component having a value of −2 / gm when viewed from the drain ends of the transistors M1 and M2 is produced.

  In Non-Patent Document 1, the negative resistance circuit 62 is connected to the inductor 61 in parallel with the frequency adjustment circuit. For this reason, the negative resistance circuit 62 adjusts the Q of the resistance component originally possessed by the inductor 61.

“Q-Enhanced LC Bandpass Filters for Integrated Wireless Applications” W. B. Kuhn et.al IEEE Trans. MICROWAVE THEORY AND TECHNIQUES, vol.46, No.12, Dec. 1998, pp2577

  An equivalent circuit of the circuit configuration shown in FIG. 8A is shown in FIG. Assuming that the resistance component inherent in the inductor 61 is RM, a negative resistance value r composed of a negative resistance circuit 62 composed of transistors M1 and M2 is connected in parallel to a series circuit of metal resistance components RM included in the inductor 61. It becomes a form. In this case, if the parallel impedance of the inductor 61 and the negative resistance circuit 62 is Z and the tuning frequency is ω,

から

From

のときに、

When

となり、
Zの実数成分がキャンセルされ、インダクタの値が示される。しかしながら、Zを虚数成分のみにするには、ｒの値を周波数依存性を持って調整する必要がある。そのため、例えば、テレビチューナのような広帯域通信の同調回路に使用する場合、同調周波数ωにあわせてｒの値を調整する必要がある。このため、ｒの設定回路が新たに必要であり、広帯域通信の同調回路として不向きであるという問題があった。

And
The real component of Z is canceled and the value of the inductor is shown. However, in order to make Z only an imaginary component, it is necessary to adjust the value of r with frequency dependence. Therefore, for example, when used in a tuning circuit for broadband communication such as a TV tuner, it is necessary to adjust the value of r in accordance with the tuning frequency ω. For this reason, a setting circuit for r is newly required, and there is a problem that it is not suitable as a tuning circuit for broadband communication.

  The present invention has been made to solve the above-described problems. Even if the tuning frequency is greatly changed, a circuit for adjusting the value of r with respect to the tuning frequency is unnecessary, and a constant band and constant gain characteristics are obtained. An object of the present invention is to provide a load circuit used in the tuning circuit for realizing the tuning circuit having the tuning circuit.

  Another object of the present invention is to provide a tuning circuit using the load circuit.

  A load circuit according to the present invention is a load circuit used for a tuning circuit, and is connected to an inductor and the inductor in series, cancels a series resistance component of the inductor, and increases a Q of the inductor. With.

  When the tuning circuit is configured using the load circuit having the above-described configuration, a tuning circuit having a higher Q than the Q of the inductor can be realized, and even when the tuning frequency is greatly changed, the gain is always constant in a constant band. A tuning circuit having

  The negative resistance circuit includes a negative resistance element, and the negative resistance element includes first and second transistors that move in a differential manner, and a base end of the first transistor and the second transistor It is preferable that the collector end of the second transistor is connected to the base end of the second transistor and the collector end of the first transistor.

  When the tuning circuit is configured using the negative circuit having the above configuration, a characteristic that it is resistant to substrate noise appears because it is a differential circuit,

で表す負性抵抗を簡単に発生させることが出来る。

The negative resistance represented by can be easily generated.

  Further, the load circuit according to the present invention is configured such that a series circuit of the inductor and the negative resistance circuit is combined with an amplifier, one terminal of the inductor is connected to the output terminal of the amplifier, and the other terminal of the inductor is connected. By connecting the terminal to the negative resistance circuit, the Q of the inductor is increased, and the apparent inductor value seen from the input terminal of the amplifier is variable according to the gain of the amplifier. Is preferred.

  When the tuning circuit is configured using the load circuit having the above configuration, the metal resistance component of the inductor can be canceled, so that the Q at the tuning frequency when the tuning circuit is assembled can be set high, and the tuning frequency can be greatly changed. Even if it is made, it always has a constant gain characteristic in a constant band.

  The negative resistance circuit includes a third transistor connected to a collector terminal and a base terminal of the first transistor, a fourth transistor connected to a collector terminal and a base terminal of the second transistor, And a first current source connected to a collector terminal and a base terminal of the first and second transistors, and different currents are passed through the first and second transistors and the third and fourth transistors. It is preferable that it is such.

  According to the above configuration, a negative resistance can be created from the difference between the currents flowing in the first and second transistors and the currents flowing in the third and fourth transistors. Therefore, when an inductor with an apparently high Q is made, The value can be suppressed.

  According to a preferred embodiment of the load circuit of the present invention, the load circuit further includes an amplifier having two input terminals for differential input and two output terminals for differential output. The inductor includes a first inductor and a second inductor. The input of the third transistor is connected to one output terminal of the amplifier, and the input of the fourth transistor is connected to the other output terminal of the amplifier. The first current source and the collector end and base end of the first transistor are connected to the emitter end of the third transistor, and the first current source and the second end are connected to the emitter end of the fourth transistor. Connect the collector end and base end of the transistor. One terminal of the first inductor is connected to the emitter terminal of the first transistor, and one terminal of the second inductor is connected to the emitter terminal of the second transistor. The other terminal of the first inductor is connected to one input terminal of the amplifier, and the other terminal of the second inductor is connected to the other input terminal of the amplifier. With this configuration, the Q of the inductor is increased, and the apparent inductor value seen from the input terminal of the amplifier is variable according to the gain of the amplifier.

  Therefore, when a tuning circuit is configured using the load circuit having the above-described configuration, a tuning circuit having a high Q and a variable inductor value can be configured. Therefore, a tuning circuit in which the tuning frequency can be greatly changed with a constant band can be created.

  According to another preferred embodiment of the load circuit according to the present invention, the load circuit further includes an amplifier having two input terminals for differential input and two output terminals for differential output. The inductor includes a first inductor and a second inductor. The input of the fifth transistor is connected to one output terminal of the amplifier, and the input of the sixth transistor is connected to the other output terminal of the amplifier. The collector end and the base end of the first transistor are connected to the drain end of the fifth transistor via the second current source and a folded configuration, and the drain end of the sixth transistor is connected to the second end. The collector end and the base end of the second transistor are connected via a current source and a folded configuration. One terminal of the first inductor is connected to the emitter terminal of the first transistor, and one terminal of the second inductor is connected to the emitter terminal of the second transistor. The other terminal of the first inductor is connected to one input terminal of the amplifier, and the other terminal of the second inductor is connected to the other input terminal of the amplifier. With this configuration, the Q of the inductor is increased, and the apparent inductor value seen from the input terminal of the amplifier is variable according to the gain of the amplifier.

  Therefore, when a tuning circuit is configured using the load circuit having the above-described configuration, a tuning circuit having a high Q and a variable inductor value can be configured. Therefore, a tuning circuit in which the tuning frequency can be greatly changed with a constant band can be created.

  According to a preferred embodiment of the load circuit according to the present invention, a third current source is connected to the emitter ends of the first and second transistors, a current different from that of the first current source is passed, and a negative resistance is provided. It is characterized by generating.

  According to another preferred embodiment of the load circuit according to the present invention, a fourth current source is connected to the input terminal of the amplifier, and a negative current is generated by flowing a current different from that of the first current source. It is characterized by that.

  With any of the above-described load circuits, the value of the negative resistance circuit can be determined by the difference in current value, and the Q of the inductor can be easily increased.

  According to another preferred embodiment of the load circuit according to the present invention, the load circuit includes an amplifier having an input terminal and an output terminal, and a first resistance element connected to the output terminal of the amplifier at one end thereof, A collector end and a base end of the negative resistance are connected to the other end of the first resistance element, one end of the inductor is connected to an emitter end of the negative resistance, and the other end of the inductor is connected to the amplifier. By being connected to the input terminal, the Q of the inductor is increased, and the apparent inductor value seen from the input terminal of the amplifier is variable according to the gain of the amplifier.

  Therefore, when a tuning circuit is configured using the load circuit having the above-described configuration, a tuning circuit having a high Q and a variable inductor value can be configured. Therefore, a tuning circuit in which the tuning frequency can be greatly changed with a constant band can be created.

  According to a preferred embodiment of the load circuit according to the present invention, a capacitive element is connected between the differential input terminals of the amplifier.

  According to a preferred embodiment of the load circuit according to the present invention, the second resistance element is connected between the differential input terminals of the amplifier.

  The load circuit having the above configuration is configured such that a resistor for setting the Q of each tuning frequency is connected between the input terminals so that the band is constant according to the tuning frequency. Therefore, when the tuning circuit is configured using the load circuit, Even if the tuning frequency is greatly changed, a tuning circuit having a constant band can be configured.

  The first to fourth current sources in the load circuit according to the present invention preferably have a function of adjusting a current value.

  Since the load circuit with the above configuration can adjust the current value, configuring the tuning circuit using the load circuit adjusts the current value even if the metal resistance component of the inductor varies due to temperature changes, process variations, etc. Thus, a tuning circuit that can set the Q of the tuning circuit to a desired value can be created.

  The tuning circuit according to the present invention includes the load circuit, and a voltage-current conversion circuit is connected to an input of the load circuit.

  The tuning circuit configured as described above can receive a tuning signal as a voltage signal by the voltage-current conversion circuit.

  In the tuning circuit, the inductor is preferably formed on the same semiconductor substrate as the amplifier and the negative resistance circuit. The tuning circuit having the above configuration can reduce external parts and contribute to miniaturization of parts.

  The present invention relates to a tuning circuit of a terminal device such as a TV tuner, for example, by adding a negative resistance circuit in series to the tuning circuit, thereby increasing Q even when the tuning frequency is high, and The tuning frequency can be greatly changed at a constant value. Furthermore, it can contribute to miniaturization by making it IC.

  The purpose of obtaining an improved tuning circuit that can increase the Q even when the tuning frequency is high, can change the tuning frequency greatly with a constant band, and can be miniaturized by making an IC, This is realized by connecting an inductor, a transistor, and a negative resistance element in series, generating a negative resistance by passing different currents through the transistor and the negative resistance element, and canceling out the series resistance component of the inductor. Embodiments of the present invention will be described below with reference to the drawings.

  FIG. 1 is a simplified conceptual diagram of a tuning circuit according to Embodiment 1 of the present invention. Referring to FIG. 1A, the tuning circuit includes a variable load circuit 10 and a voltage-current conversion circuit 17. The input signal Vi is passed through the voltage-current conversion circuit 17 to give a current signal to the variable load circuit 10. The variable load circuit 10 includes an inductor 14 and a negative resistance circuit 12 connected in series, a variable inductor circuit 11 to which feedback is applied by a voltage control voltage source 13, and a capacitance element (hereinafter referred to as a capacitor) 16 that determines a frequency. And a parallel connection with a resistance element 15 for setting Q.

  As shown in FIG. 1B, when the inductor 14 is formed on a semiconductor substrate, the metal resistance component RM resulting from the length of the metal constituting the inductor is large, and therefore the Q of the inductor is small. For this reason, in order to increase the Q of the inductor 14, when the negative resistance circuit 12 (= r <0) is connected in series to the inductor 14,

となり、ｒが負の数であればＲＭ＋ｒにより、インダクタ１４のメタル抵抗成分を小さく出来るため、Ｑを大きくすることができる。

If r is a negative number, the metal resistance component of the inductor 14 can be reduced by RM + r, so that Q can be increased.

  The impedance Za of the variable inductor circuit 11 in which the series circuit of the inductor 14 and the negative resistance circuit 12 is feedbacked by the voltage control voltage source 13 is:

であり、電圧制御電圧源１３の利得値Aによって、インダクタ値が変わっても、ＲＭ＋ｒの値を限りなく０に近い値にすると、周波数に対するメタル抵抗の寄与が表れにくい。

Even if the inductor value changes depending on the gain value A of the voltage control voltage source 13, if the value of RM + r is made as close to 0 as possible, the contribution of the metal resistance to the frequency hardly appears.

When RM + r˜0, the center frequencies ω _o and Q of impedance obtained by connecting the variable inductor circuit 11, the capacitor 16 (= C), and the resistance element 15 (= R) in parallel are

で表される。同調周波数は電圧制御電圧源１３で決めることができる。また、同調周波数に対し帯域一定で、Ｑ値が比較的高い可変負荷回路１０を作ることが出来る。可変負荷回路１０に電圧―電流変換回路１７を接続することによって、高周波数であってもＱを増大させ、かつ帯域一定で同調周波数を大きく変化する信号を出力Voより取り出すことが出来る。

It is represented by The tuning frequency can be determined by the voltage control voltage source 13. Further, the variable load circuit 10 having a constant band with respect to the tuning frequency and a relatively high Q value can be produced. By connecting the voltage-current conversion circuit 17 to the variable load circuit 10, it is possible to extract from the output Vo a signal that increases Q even at a high frequency and greatly changes the tuning frequency with a constant band.

  FIG. 2 is an implementation example of a tuning circuit. Referring to FIG. 2, the collector of second transistor Q2 is connected to the base of first transistor Q1, and the collector of first transistor Q1 is connected to the base of second transistor Q2. Thus, the negative resistance element 18 composed of a cross-coupled circuit is constructed. Inductors 14 and 14 are connected to the collector ends of the first and second transistors Q1 and Q2, respectively, to cancel the metal resistance in series with the inductor 14. The voltage control voltage source 13 constitutes feedback and constitutes the variable inductor circuit 11. The impedance ZL of the variable inductor circuit 11 is

である。ここでトランジスタＱ１、Ｑ２のトランスコンダクタンスはgm_１である。よって

It is. Wherein the transconductance of the transistors Q1, Q2 is gm _1. Therefore

であれば、インダクタに付随するメタル抵抗成分が除去できるため、Ｑが非常に高いインダクタが実現できる。上記可変インダクタ回路１１に、キャパシタ１６を並列に接続した可変負荷回路１０は、電圧制御電圧源１３の値Aにより同調周波数を調整でき、さらに抵抗素子１５を並列に接続した可変負荷回路１０は、同調周波数におけるＱを調整できる。

Then, since the metal resistance component accompanying the inductor can be removed, an inductor having a very high Q can be realized. The variable load circuit 10 in which the capacitor 16 is connected in parallel to the variable inductor circuit 11 can adjust the tuning frequency by the value A of the voltage control voltage source 13, and the variable load circuit 10 in which the resistance element 15 is connected in parallel is The Q at the tuning frequency can be adjusted.

  If the current sources 22 and 71 are added, an inductor having a very high Q can be realized even when the temperature changes, as will be described later.

  FIG. 3 is a circuit diagram according to a modification of the first embodiment. The same parts as those of the circuit shown in FIG. 2 are denoted by the same reference numerals, and the description thereof will not be repeated.

  In the first embodiment, it is important that the inductor 14 and the negative resistance circuit 18 are connected in series, and the connection order of the negative resistance element 18 and the inductor 14 does not matter. That is, as shown in FIG. 3, when the inductors 14 and 14 are connected to the emitter ends of the first and second transistors Q1 and Q2, respectively, and the feedback is constituted by the voltage control voltage source 13, the same effect can be obtained. .

  FIG. 4 is another implementation of the tuning circuit. Referring to FIG. 4, the emitter terminals of the third and fourth transistors Q3 and Q4 are configured by a cross-coupled circuit formed by connecting the collectors and bases of the first and second transistors Q1 and Q2 to each other. The negative resistance element 18 is connected to realize the negative resistance circuit 12. Feedback of the emitter ends of the transistors Q1 and Q2 is constituted by a voltage control voltage source 13 via an inductor 14 to constitute a variable inductor circuit 11. The impedance ZL of the variable inductor circuit 11 is

である。ここでトランジスタＱ１、Ｑ２のトランスコンダクタンスをgm₁、トランジスタＱ３、Ｑ４のトランスコンダクタンスをgm₂とする。よって

It is. Here gm ₁ the transconductance of the transistors Q1, Q2, the transconductance of the transistors Q3, Q4 and gm _2. Therefore

であれば、インダクタに付随するメタル抵抗成分が除去できるため、Ｑが非常に高いインダクタが実現できる。上記可変インダクタ回路１１に、キャパシタ１６を並列に接続した可変負荷回路１０は、電圧制御電圧源１３の値Aにより同調周波数を調整でき、さらに抵抗素子１５を並列に接続した可変負荷回路１０は、同調周波数におけるＱを調整できる。トランジスタＱ１〜Ｑ２、Ｑ３〜Ｑ４のトランスコンダクタンス値gm₁、gm₂は、電流値で値を決められるため、トランジスタＱ１〜Ｑ２、Ｑ３〜Ｑ４に流す電流値を変えることでＱを調整できる。これはトランジスタＱ１〜Ｑ２に電流を流し込む電流源２１を付加させることで実現でき、電流値を調整することでメタル抵抗ＲＭの除去を行う。

Then, since the metal resistance component accompanying the inductor can be removed, an inductor having a very high Q can be realized. The variable load circuit 10 in which the capacitor 16 is connected in parallel to the variable inductor circuit 11 can adjust the tuning frequency by the value A of the voltage control voltage source 13, and the variable load circuit 10 in which the resistance element 15 is connected in parallel is The Q at the tuning frequency can be adjusted. Since the transconductance values gm ₁ and gm ₂ of the transistors Q1 to Q2 and Q3 to Q4 can be determined by current values, Q can be adjusted by changing the current values flowing through the transistors Q1 to Q2 and Q3 to Q4. This can be realized by adding a current source 21 for supplying current to the transistors Q1 and Q2, and the metal resistance RM is removed by adjusting the current value.

If the metal resistance RM hardly changes with temperature, the difference 1 / gm ₁ -1 / gm ₂ of the reciprocal of the transconductance values of the transistors Q1 to Q2 and Q3 to Q4 is

となる。

It becomes.

When the current source 22 is further added, as described below, the variable inductor circuit 11 having a very high Q can be realized even if the temperature changes. For example, if the current sources 21 and 22 are set so that the currents I ₁ and I ₂ flowing in the transistors Q1 to Q2 and Q3 to Q4 are proportional to the temperature by devising the circuit configuration of the current sources 21 and 22,
Write I ₁ = αT, I ₂ = βT (α and β are constants).

となり、この式は温度に依存しない。すなわち負性抵抗の値は、温度変化の影響を受けず、温度が変化してもＱが非常に高い可変インダクタ回路１１が実現できる。

This equation is independent of temperature. That is, the value of the negative resistance is not affected by the temperature change, and the variable inductor circuit 11 having a very high Q can be realized even if the temperature changes.

  A voltage-current conversion circuit 17 is connected to the input of the variable load circuit 10 using the variable inductor circuit 11 to extract a signal from Vo, thereby realizing a tuning circuit.

  FIG. 5 is another implementation of the tuning circuit. The same parts as those in FIG. 4 are denoted by the same reference numerals, and the description thereof will not be repeated. Referring to FIG. 5, current source 23 is connected between inductor 14 and voltage control voltage source 13. Even in this configuration, the current value flowing through the transistors Q1 to Q2 and Q3 to Q4 can be determined, and a tuning circuit having a high Q value can be realized.

  FIG. 6 is another implementation of the tuning circuit. Referring to FIG. 6, a folded configuration is realized at the drains of transistors P1 and P2 via current source 41, and the folded signals are configured by connecting the bases and collectors of differential transistors Q1 and Q2 to each other. The negative resistance circuit 12 is realized by inputting from the collector end of the negative resistance element 18 constituted by the cross-coupled circuit. The current source 42 and one terminal of the inductor 14 are connected to the emitter ends of the transistors Q1 and Q2, and the voltage control voltage source 13 forms a feedback via the inductor 14 to form the variable inductor circuit 11.

In the structure described above, the transconductance value gm ₁ and transconductance gm ₂ of the transistors Q1, Q2 of the transistors P1, P2, in order to determined the value at a current value, the transistors P1 to P2, the current value flowing to Q1~Q2 By changing the current value so as to change the values of the transconductances gm ₁ and gm ₂ , the metal resistance RM is removed. The variable load circuit 10 having the capacitor 16 connected in parallel to the variable inductor circuit 11 having the above configuration can adjust the tuning frequency, and the variable load circuit 10 having the resistance element 15 connected in parallel can adjust the Q at the tuning frequency.

  A voltage-current conversion circuit 17 is connected to the input of the variable load circuit 10 to extract a signal from Vo, thereby forming a tuning circuit.

  Even in the configuration described above, the current source 42 may be connected between the inductor 14 and the voltage control voltage source 13 as described in the third embodiment. Even in this configuration, the current values flowing through the transistors P1 to P2 and Q1 to Q2 can be determined, and a tuning circuit having a high Q value can be realized.

  FIG. 7 is another implementation example of the tuning circuit. Referring to FIG. 7, a cross is formed by connecting one end of resistance element 51 to the output terminal of voltage controlled voltage source 13 and connecting the other end to the base and collector of differential transistors Q1 and Q2. The negative resistance circuit 12 is realized by connecting to the collector terminal of the negative resistance element 18 formed of a couple circuit. The current source 52 and one terminal of the inductor 14 are connected to the emitter ends of the transistors Q1 and Q2, and the voltage control voltage source 13 forms a feedback via the inductor 14 to form the variable inductor circuit 11.

  Even in the above configuration,

といった式が成り立ち、抵抗素子５１の抵抗値Ｒ５１と、Ｑ１〜Ｑ２のトランスコンダクタンス値gm₁の逆数の差でメタル抵抗ＲＭの除去を行う。上記構成の可変インダクタ回路１１にキャパシタ１６を並列に接続した可変負荷回路１０は同調周波数を調整でき、さらに抵抗素子１５を並列に接続した可変負荷回路１０は同調周波数におけるＱを調整できる。

Expression holds such, the resistance value R51 of the resistor element 51, to remove the metal resistor RM in the difference between the inverse of the transconductance value gm ₁ of Q1-Q2. The variable load circuit 10 having the capacitor 16 connected in parallel to the variable inductor circuit 11 having the above configuration can adjust the tuning frequency, and the variable load circuit 10 having the resistance element 15 connected in parallel can adjust the Q at the tuning frequency.

  A voltage-current conversion circuit 17 is connected to the input of the variable load circuit 10 to extract a signal from Vo, thereby forming a tuning circuit.

  Also in the configuration described above, the current source 71 may be connected to the collector terminal of the negative resistance element, and as described in the third embodiment, the current source 52 is interposed between the inductor 14 and the voltage control voltage source 13. You may connect. Even in this configuration, the current value flowing through the transistors Q1 and Q2 can be determined, and a tuning circuit having a high Q value can be realized.

[Other matters]
In this configuration, it was explained that the inductor, transistor, etc. are all configured on the same substrate. However, when making an IC, the tuning circuit Q may not be as designed due to temperature variations, process variations, etc. There is. In order to obtain the desired Q, for example, when the adjustment circuit is configured so that the desired Q can be obtained by allowing the current sources 21, 23, 41, 42, 52, 71 to set the current value from the outside. Is also included.

  Furthermore, although the above-described configuration has been described with all bipolar transistors in mind, the present invention is not limited to bipolar transistors, and includes cases where MOS transistors are also used. Further, although the case of the NPN transistor has been described, the case of the PNP transistor is also included.

  Further, it should be considered that the embodiment disclosed this time is illustrative and not restrictive in all respects. The scope of the present invention is defined by the terms of the claims, rather than the description above, and is intended to include any modifications within the scope and meaning equivalent to the terms of the claims.

  The present invention relates to a tuning circuit for a terminal device such as a TV tuner, for example, and by adding a negative resistance circuit in series to the tuning circuit, the Q is increased even when the tuning frequency is high, and the band is constant. The tuning frequency can be changed greatly, and further, it can be suitably implemented in a tuning circuit that can contribute to miniaturization by making an IC.

It is the conceptual diagram of the tuning circuit of this invention, and the equivalent circuit schematic of an inductor. 1 is a tuning circuit diagram according to Example 1. FIG. FIG. 6 is a tuning circuit diagram according to a modification of Example 1; FIG. 6 is a tuning circuit diagram according to the second embodiment. FIG. 10 is a tuning circuit diagram according to the third embodiment. FIG. 6 is a tuning circuit diagram according to a fourth embodiment. FIG. 10 is a tuning circuit diagram according to the fifth embodiment. It is the schematic in the conventional tuning circuit.

Explanation of symbols

DESCRIPTION OF SYMBOLS 10 Variable load circuit 11 Variable inductor circuit 12 Negative resistance circuit 13 Voltage control voltage source 14,61 Inductor 15,51 Resistance element 16 Capacitance element (capacitor)
17 Current conversion circuit 18 Negative resistance element 21, 23, 41, 42, 52, 63, 71 Current source 62 Negative resistance circuit M1, M2 transistor P1, P2 transistor Q1-Q4 transistor RM Metal resistance component
Vi input signal
Vo output

Claims (14)

A load circuit used for a tuning circuit,
An inductor;
A negative resistance circuit connected in series to the inductor, for canceling a series resistance component of the inductor, and increasing Q of the inductor. The negative resistance circuit includes a negative resistance element,
The negative resistance element includes first and second transistors that operate differentially with respect to each other.
Connecting a base end of the first transistor and a collector end of the second transistor;
The load circuit according to claim 1, further comprising a base end of the second transistor connected to a collector end of the first transistor. A series circuit of the inductor and the negative resistance circuit is combined with feedback by an amplifier,
Connect one terminal of the inductor to the output terminal of the amplifier,
By connecting the other terminal of the inductor to the negative resistance circuit, the Q of the inductor is increased, and the apparent inductor value seen from the input terminal of the amplifier is variable according to the gain of the amplifier. The load circuit according to claim 1. The negative resistance circuit is:
A third transistor connected to the collector end of the first transistor;
A fourth transistor connected to the collector end of the second transistor;
A first current source connected to the collector ends of the first and second transistors,
3. The load circuit according to claim 2, wherein different currents are passed through the first and second transistors and the third and fourth transistors. An amplifier having two input terminals for differential input and two output terminals for differential output;
The inductor includes a first inductor and a second inductor,
The input of the third transistor is connected to one output terminal of the amplifier,
Connecting the input of the fourth transistor to the other output terminal of the amplifier;
A first current source and a collector end and a base end of the first transistor are connected to an emitter end of the third transistor;
Connecting the first current source and the collector end and base end of the second transistor to the emitter end of the fourth transistor;
One terminal of the first inductor is connected to the emitter end of the first transistor;
One terminal of the second inductor is connected to the emitter end of the second transistor,
Connecting the other terminal of the first inductor to one input terminal of the amplifier;
By connecting the other terminal of the second inductor to the other input terminal of the amplifier,
3. The load circuit according to claim 2, wherein an apparent inductor value viewed from an input terminal of the amplifier is variable according to a gain of the amplifier while increasing a Q of the inductor. An amplifier having two input terminals for differential input and two output terminals for differential output;
The inductor includes a first inductor and a second inductor,
An input of a fifth transistor is connected to one output terminal of the amplifier;
Connecting the input of the sixth transistor to the other output terminal of the amplifier;
The collector end and the base end of the first transistor are connected to the drain end of the fifth transistor via a second current source and a folded configuration,
The collector end and the base end of the second transistor are connected to the drain end of the sixth transistor via the second current source and a folded configuration,
One terminal of the first inductor is connected to the emitter end of the first transistor,
One terminal of the second inductor is connected to the emitter end of the second transistor,
Connecting the other terminal of the first inductor to one input terminal of the amplifier;
By connecting the other terminal of the second inductor to the other input terminal of the amplifier,
3. The load circuit according to claim 2, wherein an apparent inductor value viewed from an input terminal of the amplifier is variable according to a gain of the amplifier while increasing a Q of the inductor.   6. The load according to claim 5, wherein a third current source is connected to the emitter ends of the first and second transistors, and a negative resistance is generated by flowing a current different from that of the first current source. circuit.   6. The load circuit according to claim 5, wherein a fourth current source is connected to an input terminal of the amplifier, and a negative resistance is generated by flowing a current different from that of the first current source. An amplifier having an input terminal and an output terminal;
A first resistance element connected at one end to the output terminal of the amplifier;
A collector end and a base end of the negative resistance are connected to the other end of the first resistance element;
One end of the inductor is connected to the emitter end of the negative resistance;
By connecting the other end of the inductor to the input end of the amplifier,
3. The load circuit according to claim 2, wherein an apparent inductor value viewed from an input terminal of the amplifier is variable according to a gain of the amplifier while increasing a Q of the inductor.   10. The load circuit according to claim 3, wherein a capacitive element is connected between differential input terminals of the amplifier.   11. The load circuit according to claim 3, wherein a second resistance element is connected between the differential input terminals of the amplifier.   The load circuit according to any one of claims 4 to 8, wherein the first to fourth current sources have a function of adjusting a current value. A load circuit according to any one of claims 1 to 12,
A tuning circuit, wherein a voltage-current conversion circuit is connected to an input of the load circuit.   The tuning circuit according to claim 13, wherein the inductor is formed on the same semiconductor substrate as the amplifier and the negative resistance circuit.

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