JP2007274174A - Solid-state imaging apparatus, and drive method thereof - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To relieve the influence of transfer deterioration at a branch in a solid-state imaging apparatus for branching the horizontal transfer path of an imaging element by the branch to output an image signal with two outputs. <P>SOLUTION: The solid-state imaging apparatus 10 allows a horizontal transfer path 50 to transfer signal charges read from each light receiving element 46 by an imaging section 14 horizontally, branches the signal charge into a horizontal transfer paths 56, 58 at the branch 54 for outputting as an electric signal via output amplifiers 60, 62, and processes the signal charge at a pre-processor 22 and a signal processor 26. In this case, in a timing signal generator 32, the duty cycle and period of a drive signal supplied to a pre-branching electrode positioned at the pre-stage of the branch 54 and the duty cycle, and period of a drive signal supplied to the horizontal transmission paths 56, 58 are changed, thus lengthening the transfer time of the signal charge to the branch 54 from the pre-branching electrode and that of the signal charge to the horizontal transfer paths 56, 58 from the branch 54, and hence relieving the influence of the transmission deterioration at the branch 54. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to a solid-state imaging device, and more particularly to a solid-state imaging device and a driving method for outputting an image signal with multiple outputs by branching a horizontal transfer path of an imaging element in the middle.

2. Description of the Related Art Conventionally, there is a solid-state imaging device that branches a signal charge transferred through one horizontal transfer path into a plurality of parts by branch electrodes and outputs the branched signal charges by separate output circuits. For example, Patent Document 1 discloses a device in which one horizontal transfer path is branched. By branching the horizontal transfer path in this way, it is possible to read without being limited to the bandwidth of the output circuit, so that the speed can be increased.
JP-A-5-244340

  However, in such a solid-state imaging device, the signal charge is not branched well at the branch electrode, and the signal charge that should be branched to the other horizontal transfer path enters the one horizontal transfer path, and the transfer efficiency is deteriorated. Had occurred.

  More specifically, for example, signal charges transferred in the order of pixel G1, pixel R, pixel G2, and pixel B from one horizontal transfer path are branched by a branch electrode, and signal charges of pixels G1 and G2 are branched. Is supplied to one horizontal transfer path, and the signal charges of the pixels R and B are supplied to the other horizontal transfer path. At this time, when the temperature during imaging is low, a part of the signal charge of the pixel G1 is mixed into the signal charge of the pixel R.

  Such transfer efficiency deterioration, that is, transfer deterioration occurs not only when the temperature at the time of imaging is low, but also when the color temperature of the subject is low or when the ISO sensitivity is high. In particular, in the case of a subject having a low color temperature, the amount of mixed signal charge is different even for pixels of the same color. Specifically, for example, when the signal charges of the pixel G1, the pixel R, the pixel G2, and the pixel B obtained by imaging a subject with a low color temperature are transferred in this order, from the pixel G1 While the amount of signal charge mixed into the pixel R is large, the amount of signal charge mixed from the pixel G2 into the pixel B is small. As a result, a difference occurs between the pixel R and the pixel B, and noise appears in the image.

  Therefore, the present invention eliminates the disadvantages of the prior art, eliminates the deterioration of transfer efficiency at the branch electrode, and includes a solid-state image sensor driving method capable of creating a good image, and the solid-state image sensor. An object of the present invention is to provide a method for driving a solid-state imaging device.

  In order to solve the above-described problems, in the present invention, the duty cycle and period of a drive signal that drives a pre-branch electrode that is an electrode immediately before a branch electrode in a solid-state imaging device are changed, or signal charges after branching The horizontal transfer path that transfers the signal charge from the branch electrode to the branch electrode and the signal charge after branch from the branch electrode by changing the duty cycle and cycle of the drive signal that drives the horizontal transfer path The signal charge transfer time to is made longer than usual.

  Specifically, in the present invention, focusing on the fact that a part of the signal charge of the red and blue pixels enters the signal charge of the green pixel, it becomes noise and appears in the image. The signal charge of the red and blue pixels is transferred from the electrode to the branch electrode, and the signal charge of the red and blue pixels is transferred to the horizontal transfer path for transferring the signal charge after branching from the branch electrode. Make the transfer time longer than usual.

  Here, the normal transfer time is the transfer time before changing the duty cycle or cycle of the drive signal, and the transfer efficiency is not deteriorated, that is, the transfer is performed when the transfer efficiency is maintained. It's time. For example, in terms of the duty cycle, the normal transfer time is a transfer time when the duty cycle is 50%, that is, when the high level and low level times are substantially the same. Note that the duty cycle is a temporal relationship between the high level and the low level when the high level and the low level are periodically performed, and is the ratio of the time that is the high level in one cycle of the signal, that is, the duty ratio. It is.

  Thus, by making the transfer time when the signal charges of the red and blue pixels are transferred longer than the normal transfer time, it becomes possible to move the signal charges sufficiently. As a result, a part of the signal charge of the remaining pixel is left behind, so that it is possible to prevent a part of the signal charge of the remaining red and blue pixels from entering the signal charge of the green pixel. .

  The process of making the transfer time longer than the normal transfer time can be changed according to, for example, the temperature, the color temperature of the subject, the sensitivity, or the speed at which the electric signal is read. Further, how much the duty cycle and period are changed can be obtained by calculating the transfer efficiency, and this transfer efficiency can be calculated by using the reference signal charge.

  According to the present invention, it is possible to eliminate the deterioration of transfer efficiency in the branch electrode and obtain a good image without noise.

  Next, embodiments of a method for driving a solid-state imaging device according to the present invention will be described in detail with reference to the accompanying drawings. FIG. 1 is a block diagram showing the configuration of an embodiment of a solid-state imaging device according to the present invention. In FIG. 1, a solid-state imaging device 10 includes an optical system 12, an imaging unit 14, an amplifier power supply unit 16, a bias supply unit 18, a driver 20, a preprocessing unit 22, a memory unit 24, a signal processing unit 26, a system control unit 28, The device includes an operation unit 30, a timing signal generator 32, a media I / F circuit 34, a media 36, and a monitor 38, and forms a digital image signal based on incident light from an object scene.

  The optical system 12 has an AF (Automatic Focus) function in which incident light 40 from an object field (not shown) is imaged by the imaging unit 14 according to the operation of the operation unit 30. The optical system 12 adjusts the angle of view and the focal length according to the zoom operation or half-press operation of the operation unit 30. The optical system 12 also has an AE (Automatic Exposure) function that adjusts the incident light 40 to an aperture according to the operation of the operation unit 30 by the imaging unit 14. The optical system 12 adjusts the incident light 40 to the light beam 42 by such a function and emits it to the imaging unit 14.

  The imaging unit 14 includes a solid-state imaging device 44 as shown in FIG. FIG. 2 is a diagram conceptually showing a surface on which incident light from an object field is irradiated, that is, an imaging surface in the solid-state imaging device 44. Although not shown, the solid-state image sensor 44 is provided with a color filter segment on the side on which the incident light 42 is incident, corresponding to the arrangement position of the light receiving element 46. The solid-state image sensor 44 has a function of color-separating the incident light 42, converting the separated color component light into a signal charge by the light-receiving element 46, and outputting an electric signal. In the present embodiment, the light-receiving elements 46 having a square lattice arrangement are used. However, the present invention is not limited to this, and for example, a honeycomb arrangement can also be adopted.

  Further, the solid-state imaging device 44 reads the signal charges accumulated according to the exposure to the vertical transfer path 48 and sequentially transfers them in the vertical direction. In the solid-state imaging device 44, a horizontal transfer path 50 is formed in a direction orthogonal to the vertical transfer path 48. The signal charge transferred vertically is supplied to the horizontal transfer path 50. Further, a horizontal drive signal 74 is supplied to the flat transfer path 50, and the horizontal transfer path 50 transfers signal charges to the branching unit 54 in response to the horizontal drive signal 74.

  The branching unit 54 is connected to the output end 52 of the horizontal transfer path 50, and supplies the bias signal 72 from the bias supply unit 18 and divides the signal charge transferred by the horizontal transfer path 50. In the present embodiment, horizontal transfer paths 56 and 58 are connected to the branch section 54, and the signal charges divided by the branch section 54 are transferred to either the horizontal transfer path 56 or the horizontal transfer path 58. . In this embodiment, two horizontal transfer paths 56 and 58 are connected to the branching section, and the branching section divides the signal charge into two parts and supplies them to the respective horizontal transfer paths 56 and 58. However, the present invention is not limited to this, and the number of horizontal transfer paths provided in the branching section can be arbitrarily set, and can be arbitrarily branched according to the number of provided horizontal transfer paths.

  The horizontal transfer paths 56 and 58 transfer the signal charges branched by the branching unit 54. In this embodiment, of the horizontal transfer paths 56 and 58, output amplifiers 60 and 62 are connected to the side facing the side to which the branching unit 54 is connected, that is, the output side, respectively. 58 transfers the branched signal charge to the output amplifier 60, 62. The horizontal transfer path 56 is supplied with a horizontal drive signal 76a, and the horizontal transfer path 58 is supplied with a horizontal drive signal 76b. The horizontal transfer paths 56 and 58 sequentially transfer signal charges in response to this signal.

  The output amplifiers 60 and 62 are both floating diffusion amplifiers. The output amplifiers 60 and 62 convert signal charges into analog voltage signals. In this embodiment, the output amplifiers 60 and 62 are driven independently, and the power line 64 is connected to the output amplifier unit 60 and the power line 66 is connected to the output amplifier 62. The power supply lines 64 and 66 are connected independently from the amplifier power supply unit 16. Further, reset signals 68 and 70 are supplied from the driver 20 to the output amplifiers 60 and 62, respectively. In addition, the solid-state imaging device 44 is supplied with an overflow drain (OFD) pulse 80 and a vertical drive signal 82.

  In this way, the solid-state imaging device 44 outputs two systems of output signals 82 and 84 from the output amplifiers 60 and 62 to the preprocessing unit 22. In the solid-state imaging device 44 having such a configuration, the frequency bands of the output amplifiers 60 and 62 are halved by setting the period of the horizontal drive signals 76a and 76b to, for example, half the period of the horizontal drive signal 74. Can be read at high speed. The horizontal transfer in the solid-state imaging device 44 will be further described later.

  Returning to FIG. 1, the amplifier power supply unit 16 has a function of supplying power to the output amplifier units 60 and 62 included in the solid-state imaging device 44. The amplifier power supply unit 16 supplies power depending on whether the solid-state image pickup device 44 has one or two outputs. This power supply is controlled by a control signal 86 supplied from the signal processing unit 26 to the amplifier power supply unit 16.

  The bias supply unit 18 has a function of supplying a bias signal 72 to the branch unit 54. The bias signal 72 is applied as a bias voltage that defines a gain. The bias supply unit 18 is controlled by a control signal 88 supplied from the signal processing unit 26.

  The driver unit 20 has a function of supplying various drive signals for driving the solid-state image sensor 44. The driver unit 20 is supplied with a plurality of timing signals 90 from the timing signal generator 32. As shown in FIG. 3, the driver unit 20 includes an OFD pulse output unit 92, a vertical (V) driver 94, a horizontal series (HS) driver 96, a horizontal parallel (HP) driver 98, and a reset (RS) driver 100.

  FIG. 3 is a block diagram conceptually showing a configuration example of the driver shown in FIG. In FIG. 3, an OFD pulse output unit 92 outputs an OFD pulse 78 to the solid-state image sensor 44. The V driver 94 outputs a vertical drive signal 80 to the solid-state imaging device 44. The HS driver 96 outputs a horizontal drive signal 74 to the solid-state imaging device 44. The HP driver 98 outputs a horizontal drive signal 76 to the solid-state imaging device 44. The horizontal drive signal 76 has a period twice that of the horizontal drive signal 74. The RS driver 100 outputs reset signals 68 and 70 to the solid-state imaging device 44.

  Returning to FIG. 1, the preprocessing unit 22 has an analog front end (AFE) function. This function includes noise removal by correlated double sampling (CDS) on the supplied analog electrical signals 82 and 84 and digitization of this denoised analog electrical signal, ie A / D conversion. The preprocessing unit 22 is supplied with timing signals or sampling signals 106 and 108 for performing noise removal and A / D conversion preprocessing on the input signals of each system from the timing signal generator 32. Two systems of analog electrical signals 82 and 84 are supplied to the preprocessing 22. The preprocessing unit 22 outputs two systems of digital signals 110 and 112 to the memory unit 24 in response to the supply of the timing signals 106 and 108.

  In the present embodiment, since the output from the imaging unit 14 is two systems, the processing in the preprocessing unit 20 is also two systems. However, the present invention is not limited to this, and for example, the branching of the solid-state imaging device 44 is performed. When the signal charge is not branched in the unit 54 and the output becomes one system, the preprocessing unit 20 can also perform one system process.

  The memory unit 24 has a function of temporarily storing and outputting the supplied digital signals 110 and 112. Input / output of the memory unit 24 is controlled according to a control signal 116 supplied via the bus 114. The memory unit 24 outputs the digital signals 110 and 108 input according to the control signal 116 as the digital signal 118 to the signal processing unit 26 via the bus 114 and the signal line 120.

  The signal processing unit 26 has a function of performing signal processing on the supplied digital signal 118 and generating a control signal. The signal processing unit 26 includes a power control function unit 122, a gain control function unit 124, a control function unit 122, an AF control function unit 126, an AE control function unit 128, an AWB (Automatic White Balance) control function unit 130, and an arrangement conversion function unit. Including 132. The power supply control function unit 122 has a function of generating a control signal 86 corresponding to either high speed or low speed reading by scene discrimination in the system control unit 28, for example. The power control function unit 122 outputs the generated control signal 86 to the amplifier power supply unit 16.

  The gain control function unit 124 has a function of generating a control signal 88 according to whether the signal charge from the horizontal transfer path 50 is supplied from the branching unit 54 to which of the horizontal transfer paths 56 and 58. The gain control function unit 124 outputs the control signal 88 to the bias supply unit 18. The bias supply unit 18 applies the bias signal 72 to the branch unit 54. The AF control function unit 126 has a function of adjusting the focus based on the generated image data.

  The AE control function unit 128 has a function of obtaining an evaluation value based on the generated image data and adjusting the aperture and shutter speed. The AF control function unit 126 and the AE control function unit 128 send a control signal (not shown) to the system control unit 28 via the signal line 120, the bus 114, and the signal line 134 according to the adjustment. The AWB control function unit 130 has a function of adjusting white balance based on the generated image data.

  The arrangement conversion function unit 132 has a function of correcting image data obtained by high-speed reading as two systems in order of dot sequential order corresponding to the arrangement of color filter segments of an image, for example, and synthesizing the image data. If the output from the preprocessing unit 22 is a single-system output, the arrangement conversion function unit 132 performs an array conversion process for single-system output.

  Although not shown, the signal processing unit 26 synchronizes on the basis of supplied image data, and generates a Y / C signal using the synchronized image data. The generated Y / C signal is, for example, a signal for a liquid crystal monitor. And a function of compressing the Y / C signal generated according to the recording mode and a function of decompressing and restoring the compressed signal based on the compressed signal. The recording mode includes JPEG (Joint Photographic Experts Group), MPEG (Moving Picture Experts Group), RAW mode, and the like. The signal processing unit 26 supplies the image data processed in the recording mode to the media I / F circuit 34 from the signal line 120, the bus 114, and the signal line 136. The signal processing unit 26 outputs a liquid crystal monitor signal 138 to the monitor 38.

  The system control unit 28 has a function of generating various control signals according to an operation signal 140 from the operation unit 30 described later. The system control unit 28 includes a setting / operation correspondence control function unit (not shown). The setting / operation correspondence control function unit acquires the operation signal 140 from the operation unit 30 as a setting condition, and generates a control signal 142 according to the setting condition. The setting / operation correspondence control function unit generates a control signal 142 for controlling whether the output of horizontal transfer is operated as a correspondence between two outputs or one output. In this way, the system control unit 28 determines whether or not to read out the horizontal transfer at a high speed in accordance with a moving image mode setting, a continuous shooting speed setting, a scene determination, and a release shutter button pressing operation, which will be described later, and generates the generated control signal 142. Output to the timing signal generator 32. In addition, the system control unit 28 also controls the memory unit 24, the signal processing unit 26, the media I / F circuit 34, and the like.

  Although not shown, the operation unit 30 includes a power switch, a zoom button, a menu display changeover switch, a selection key, a moving image mode setting unit, a continuous shooting speed setting unit, and a release shutter button. The power switch causes the solid-state imaging device 10 to be turned on / off. The zoom button changes the angle of view of the object field including the subject and adjusts the focal length of the subject according to the change. The menu display changeover switch is a switch for changing the menu displayed on the liquid crystal monitor and moving the selection cursor, and includes, for example, a cross key. The selection key is a key for selecting the selected menu item.

  The moving image mode setting unit determines whether to display a moving image on the liquid crystal monitor, for example, by setting a flag value. With this setting, the solid-state imaging device 10 displays the scene image captured on the monitor 38 as a through image. The moving image mode setting section includes items for setting the resolution, the number of display frames, and the continuous shooting speed. The item of resolution is an item for selecting the resolution of the VGA (Video Graphics Array) standard which is, for example, the HDTV (High-Definition TeleVision) standard / standard. The number of display frames is an item for selecting either 30/15.

  The continuous shooting speed setting unit is provided with a plurality of continuous shooting speeds and sets the speed for continuous shooting, and is set according to 2 outputs / 1 output. The continuous shooting speed is an item for setting the continuous shooting speed for an image having a certain number of pixels. With regard to the continuous shooting speed, the solid imaging device is operated with the former being set as one output and the latter being set as two outputs based on the setting of the number of continuous shots smaller than the threshold for the number of continuous shots and the number of continuous shots greater than this threshold.

  The release shutter button has a function of selecting an operation timing and an operation mode of the solid-state imaging device 10 according to a half-press / full-press operation. The release shutter button activates AE and AF in response to a half-press operation. In this operation, an appropriate aperture, shutter speed and focus distance are obtained using an image obtained by moving image display. Further, the release shutter button sends the recording start / recording end timing as the operation signal 140 to the system control unit 28 by a full press operation, and provides the operation timing according to the setting mode of the solid-state imaging device 10. Setting modes include still image recording and moving image recording.

  The timing signal generator 32 generates various timing signals such as vertical and horizontal synchronization signals, field shift gate signals, vertical and horizontal timing signals, and OFD pulses and reset signals for the solid-state imaging device 44 of the imaging unit 14. It has a function. This function generates various timing signals 80, 106 and 108 in response to a control signal 142 from the system control unit 28. The timing signal generator 32 outputs various timing signals 90 to the driver 20. The timing signal generator 32 has a function of generating a reference clock signal, and particularly generates a horizontal timing signal. The timing signal generator 32 divides the horizontal timing signal to generate a horizontal timing signal having two frequencies. In response to the control signal 142 from the system control unit 28, the timing signal generator 32 outputs at least one of the sampling signals 106 and 108 to output one system. By operating in this way, power consumption of the solid-state imaging device 10 can be suppressed.

  The media I / F circuit 34 has an interface control function for controlling recording / reproduction of image data in accordance with, for example, a recording medium to be handled. The media I / F circuit 34 controls writing / reading of image data 144 to / from a PC (Personal Computer) card which is a semiconductor recording medium or an image supplied via a bus 144 when a USB (Universal Serial Bus) controller is built in. Data 136 can be written / read out. The media 36 has various semiconductor card standards.

  As the monitor 38, a liquid crystal monitor or the like is used. The monitor 38 displays the image data 138 supplied from the signal processing unit 26. With this configuration, the solid-state imaging device 10 can be optimally operated by setting the signal charge readout from the horizontal transfer path 50 to 2 outputs for high speed readout and 1 output for low speed readout.

  The solid-state imaging device 10 having the above configuration corresponds to a device that includes the imaging unit 14 and captures a scene image to form a digital image signal. For example, a digital camera, an electronic still camera, an image input device, Examples include a movie camera, a mobile phone provided with a camera, or an apparatus that captures an image of a subject and prints it on a sticker. However, the present invention is not limited thereto. In the present invention, the configuration of each unit is not limited to the present embodiment, and an arbitrary configuration can be adopted according to the solid-state imaging device 10.

  In the solid-state imaging device 44 including such a branching unit 54, the analog electric signal is read out as follows, for example. FIG. 4 is a diagram conceptually showing a view of the horizontal transfer path in the solid-state imaging device of FIG. 1 as viewed from above. FIG. 5A conceptually shows an enlarged view of the horizontal transfer path 50 and the horizontal transfer path 56 shown in FIG. 4, and FIG. 5B shows a one-dot chain line IV-IV in FIG. The section when cut by is conceptually shown. FIG. 6A conceptually shows an enlarged view of the horizontal transfer path 50 and the horizontal transfer path 56 shown in FIG. 4, and FIG. 6B shows a horizontal line indicated by an alternate long and short dash line VII-VII in FIG. A cross section when the transfer path 50 and the horizontal transfer path 58 are cut is conceptually shown.

  In this embodiment, the signal charges are transferred in the order of G, R, G, B in the color attributes in the horizontal transfer path 50, and the signal charges in the color attributes R and B are horizontally transferred in the branch unit 54. The signal charge having the color attribute G is branched to the horizontal transfer path 58 to the path 56. In the horizontal transfer paths 50, 56, and 58, a plurality of transfer elements are formed. One transfer element is formed by two electrodes made of polycrystalline silicon (Poly-Silicon) and an impurity layer near the surface of the silicon substrate. The two impurity layers under the two electrodes have different configurations. For this reason, a staircase-like potential potential is formed by applying a drive signal having the same potential to the two electrodes. Similarly, the branching portion 54 is a transfer element including two electrodes. Hereinafter, one transfer element and two electrodes included in the transfer element are denoted by the same reference numerals. For example, “branch portion 54” indicates a transfer element, and “electrode 54” indicates two electrodes of the branch portion 54.

  As shown in FIG. 4, the horizontal transfer path 50 includes polysilicon electrodes HS2, HS1, HS4, HS3, HS4, HS1, HS2, and HS3 from the right side toward the electrode HSL of the branch portion 54 located on the left side. In order, this is formed as a repeating unit. Further, the electrode HL is provided on the right side of the electrode HSL, that is, on the left side of the electrode HS3 on the output end side of the horizontal transfer path 50 in FIG. The electrode HL will be described in detail later.

  As shown in FIGS. 4 and 5, the horizontal transfer path 56 includes four polysilicon electrodes HP1, HP2, HP1, HP2, and OG (Output Gate) electrodes in order from the electrode HSL of the branching portion 54 toward the output amplifier 60. Is formed. A floating diffusion (FD) is formed on the left side of the OG electrode. Further, a reset electrode RS is formed on the left side of the FD. Finally, a reset drain RD is formed on the left side of the reset electrode.

  As shown in FIGS. 4 and 6, the horizontal transfer path 58 includes five polysilicon electrodes HP2, HP1, HP2, HP1, HP2, and OG (Output) in order from the electrode HSL of the branching section 54 to the output amplifier 60. Gate) electrode is formed. The horizontal transfer path 58 is characterized in that it is formed by one more than the number of electrodes of the horizontal transfer path 56. Note that the floating diffusion arranged on the left side of the OG electrode, that is, the left side of the OG electrode, the reset electrode arranged on the left side of the floating diffusion, and the reset drain arranged on the left side of the reset electrode are horizontal. This is the same as the transfer path 56.

  As shown by the one-dot chain line IV-IV in FIG. 5, when the leftmost reset drain RD to the electrode HP1 of the horizontal transfer path 56 and further from the branch portion 54 to the electrode HL of the horizontal transfer path 50 are broken, this section shows In addition, an impurity layer is formed immediately below each electrode in a P-type silicon substrate (not shown). The impurity layer is doped with an impurity using an ion implantation method or the like, and the potential potential changes depending on the type and concentration of the impurity to be doped. In addition, a predetermined potential potential is formed as will be described later in accordance with the voltage level of the drive signal applied to the electrode formed immediately above the impurity layer.

  Similarly, in the cross section shown in FIG. 6B, an impurity layer is formed immediately below the P-type silicon substrate and each electrode. This impurity layer is also divided according to the size of the polycrystalline silicon electrode, and the concentration of the divided impurity layer is adjusted so that a predetermined potential is formed according to the voltage level of the supplied drive signal. ing.

  Next, drive signals supplied to the electrodes will be described. Drive signals φHS1, φHS2, φHS3, and φHS4 are supplied to the electrodes HS1, HS2, HS3, and HS4, respectively. Although not shown, the drive signal φHSL is supplied to the electrode HSL. The drive signal φHSL is a constant bias voltage. A drive signal φHS is supplied to the electrode HS. Drive signals φHP1 and φHP2 are supplied to the electrodes HP1 and HP2. A drive signal φOG is supplied to the electrode OG. The drive signal φOG is a constant voltage signal. The drive signal φRS is supplied to the electrode RS. Further, the drive signal φRD is supplied to the reset drain RD. This drive signal φRD is a power supply voltage signal.

  The timing for these drive signals is shown in FIG. The phases of the drive signals will be described. The drive signals φHS1 and φHS3 are two-phase drive signals that are 180 ° out of phase with the drive signals φHS2 and φHS4. Further, the drive signal φHP1 and the drive signal φHP2 are in opposite phases and are two-phase drive signals.

  The cycle of each drive signal will be described. The drive signals φHS1 to φHS4 are half the cycle of the drive signals φHP1 and φHP2. That is, the drive signals φHS1 to φHS4 have a double frequency of the drive signals φHP1 and φHP2. As shown in FIG. 7, the drive signal φRS supplies the level “H” at the timing of 4n + 1, for example, t = 1, t = 5,. The variable n is an integer including zero. Output signals OS1 and OS2 are output as shown in FIG.

  The flow of signal charges that are horizontally transferred by these drive signals will be described. FIGS. 8 and 9 show the potentials formed in the horizontal transfer paths 50, 56 and 58 when each drive signal is applied to the horizontal transfer paths 50, 56 and 58, and the signal charge transfer status at that time. FIG. 10 shows a view from above on the horizontal transfer path. Each time in FIGS. 8 to 10 corresponds to each time shown in FIG. 7, for example, FIGS. 8 (a), 9 (a), and 10 (a) correspond to time t = 1 in FIG. ing. Others are the same.

  FIG. 8 shows potentials for the horizontal transfer path 50 and the horizontal transfer path 56, and a simplified version of FIG. 5B is also shown in order to show the position of the potential. Similarly, FIG. 9 shows potentials for the horizontal transfer path 50 and the horizontal transfer path 58, and a simplified version of FIG. 6B is also described to show the position of the potential. is there.

  Although not shown, when the drive signal φHSL is supplied, immediately below the electrode HSL to which the drive signal φHSL is supplied, the potential potential of the reference level 146 that is always fixed, as shown in FIGS. A potential barrier (barrier) 148 that prevents the backflow of signal charges supplied from the horizontal transfer path 50 is formed.

  The potential formed by changing according to the supplied drive signal and the movement of the signal charge by the constant potentials 146 and 148 will be described with reference to FIGS. For the sake of easy understanding, the description will be divided into transfer in the branch unit 54 and one horizontal transfer path 56 and transfer in the branch unit 54 and one horizontal transfer path 58. First, the transfer of signal charges in the horizontal transfer path 56 will be described with reference to FIG. Hereinafter, the signal charges corresponding to the colors R, G, and B are referred to as signal charges R, G, and B.

As shown in FIG. 8A, at time t = 1, the level “H” driving signal φHL, the constant bias voltage driving signal φHSL, and the level “L” driving are applied to the electrodes of the horizontal transfer path 58, respectively. Signal φHP1 is supplied. At this time, for example, if the signal charge G is held by the branching portion 54, the impurity layer of the electrode HP1 (not shown) adjacent to the electrode HSL is supplied with the level “L”, and the signal charge G as shown by the broken line 150 is supplied. Generates a potential or barrier that does not mix with the horizontal transfer path 56. The other electrode HP2 adjacent to the branch portion 54 is supplied with the drive signal φHP2 of level "H", so that the signal charge G So as to flow into the horizontal transfer path 58, a potential potential 152 lower than the reference level is generated. At this time, the signal charge G is present in both packets of the reference level 146 and the potential potential 152.

  Immediately below the electrodes HP2 and HP1, impurity layers 154 and 156 are formed as shown in FIG. 5B. Therefore, when the level “H” is supplied, the potential potential is one level lower than the reference level 146. And the deepest level are formed in steps. Further, when the level “L” is supplied, the potential potential is one level higher than the reference level 146 and has the same level as the reference level 146. As a result, the level of the packet formed decreases stepwise in the direction toward the signal charge transfer direction, and the signal charge R and the signal charge B are transferred to the horizontal transfer path 56 at time t = 1. Every other element is held.

  Next, at time t = 2, as shown in FIG. 7, the drive signal φHL is applied to the electrode HL at the level “H”. By this application, the impurity layer of the electrode HL generates a potential potential 148 and a reference level 146. Due to the formation of this potential potential, the electrode HL forms a packet between the electrode HSL and the signal charge R is held in this packet. Further, the signal charge G accumulated in the packet in the electrode HSL moves to the electrode HP2 on the horizontal transfer path 58 located on the front side of the paper (not shown). The signal charge G in this state is indicated by a broken line.

  Next, at time t = 3, as shown in FIG. 7, the drive signal φHL is applied to the electrode HL at the level “L”. By this application, the electrode HL and the electrode HSL potential potential are in a state at time t = 1. Therefore, the signal charge R held in the packet formed on the electrode HL at time t = 2 moves to the branching portion 54 due to the formation of this potential potential.

  At this time, since the drive signal φHP1 of level “H” is supplied to the electrode HP1 of the horizontal transfer path 56 adjacent to the electrode HSL, the potential potential formed in the impurity layer corresponding to the electrode HP1 is indicated by a broken line 160 As shown, the potential is lower than the reference level 146. At this time, since the drive signal φHP2 of level “L” is supplied on the electrode HP2 side of the horizontal transfer path 58, a potential potential higher than the reference level 146 is generated as indicated by a broken line 158. Therefore, the signal charge R is present in both the reference level 146 and potential potential 160 packets.

  At time t = 3, the drive signal φHP2 of level “L” is applied to the electrode HP2 adjacent to the electrode HP1. Thus, impurity layers 154 and 156 form a potential potential 148 and a reference level 146 level. A drive signal φHP1 of level “H” is applied to the electrode HP1 adjacent to the electrode HP2. Thus, impurity layers 154 and 156 form a level one step lower than reference level 146 and the deepest potential potential. Further, in the adjacent electrode HP2, a potential potential 148 and a reference level 146 are formed by the supplied level “L”. As a result, the signal charge B held in the packet formed on the electrode HP1 at time t = 2 moves to the packet formed on the electrode HP1. Further, the signal charge R present in the packet in the electrode HP2 adjacent to the electrode OG at time t = 2 is transferred to the FD via the electrode OG due to the increase in potential potential.

  Next, at time t = 4, the level “H” driving signal φHL is supplied to the electrode HL, the same potential as at time t = 2 is formed, and the signal charge G is held in the packet formed at the electrode HL. . In the electrode HSL, the potential potential at the electrode HP2 adjacent to the electrode HSL is in a state of a potential higher than the reference level 146 as indicated by the broken line 158, and the potential potential at the electrode HP1 adjacent to the electrode HSL is broken. As indicated by 160, the potential is lower than the reference level 146. Therefore, the signal charge R of the branching portion 54 moves toward a packet formed on the electrode HP1 of the horizontal transfer path 56 on the back side of the paper (not shown).

  Next, at time t = 5, the drive signal φHL of level “L” is supplied to the electrode HL, so that the impurity layer corresponding to the electrode HL forms the same potential as at time t = 1. Therefore, the signal charge G that has been accumulated in the packet at the electrode HL so far is transferred from the electrode HL to the electrode HSL. In addition, the electrode HP1 on the horizontal transfer path 56 side adjacent to the branching portion 54 forms a potential potential 158 similarly to the time t = 1, and serves as a potential barrier against the signal charge G transferred to the electrode HSL. Do not mix with route 56. On the other hand, a potential potential 152 lower than the reference level is generated at the electrode HP2 on the side of the horizontal transfer path 58 adjacent to the branch portion 54 so that the signal charge G flows into the horizontal transfer path 58. Therefore, the signal charge G exists at both the reference level 146 and the potential potential 152. As described above, the signal charge R and the signal charge B are supplied from the branching unit 54 to the horizontal transfer path 56.

  Next, the transfer of signal charges from the branching unit 54 to the horizontal transfer path 58 will be described with reference to FIGS. In FIG. 9, at time t = 1, the level “L” drive signal φHL, the drive signal φHP2, the constant bias voltage drive signal φHSL, and the level “H” drive signal φHP1 are applied to the electrodes of the horizontal transfer path. Supplied. As a result, the potential potential at the electrode HP2 adjacent to the electrode HSL becomes a level 152 that is one step lower than the reference level 146. In addition, the potential potential at the electrode HP1 adjacent to the electrode HSL becomes level 150 and functions as a potential barrier to prevent mixing of signal charges. Therefore, for example, if the signal charge G is held in the branching portion 54, the signal charge G is present in both the reference level 146 and potential potential 152 packets.

  In the horizontal transfer path 58, four electrodes HP1 and HP2 are alternately formed following the electrode HP2 adjacent to the electrode HSL. Therefore, the horizontal transfer path 58 has one electrode more than the horizontal transfer path 56. Impurity layers 154 and 156 are alternately formed in order from the right in the impurity layer provided immediately below these four electrodes, as in FIG. At time t = 1, the drive signal φHP1 of level “L” is supplied to the electrode HP1, so that the potential potential 148 and the level of the reference level 146 are formed immediately below the electrode HP1. Further, since the drive signal φHP2 of level “H” is supplied to the electrode HP2, a level one level lower than the reference level 146 and the deepest potential potential are formed immediately below the electrode HP2. In this embodiment, at time t = 1, the signal charge G is accumulated in the packet at the electrode HP2.

  Next, at time t = 2, the drive signal φHL of level “H” is applied to the electrode HL. By this application, the impurity layer of the electrode HL adjacent to the electrode HSL forms a packet in the same manner as at time t = 2 in FIG. 8, and the signal charge R is held in this packet in this embodiment. Similarly to the time t = 2 in FIG. 8, the signal charge G accumulated in the packet in the electrode HSL moves to the electrode HP2 on the horizontal transfer path 58 side that is located on the front side of the paper (not shown). The signal charge G in this state is indicated by a broken line.

  Next, at time t = 3, the drive signal φHL is applied to the electrode HL at the level “L”. By this application, the potential at the electrode HL becomes in a state at time t = 1, and the signal charge R accumulated in the packet at the electrode HL at time t = 2 moves to the branching portion 54. At this time, the drive signal φHP2 of level “L” is supplied to the electrode HP2 of the horizontal transfer path 58 adjacent to the electrode HSL, and the level “H” is supplied to the electrode HP1 of the horizontal transfer path 56 adjacent to the electrode HSL. "Is supplied.

  Therefore, as in the case of time t = 3 shown in FIG. 8, the potential potential at the electrode HP2 becomes higher than the reference level 146 as indicated by a broken line 158. On the other hand, the potential potential at the electrode HP1 becomes a potential potential lower than the reference level 146 as indicated by a broken line 160. Therefore, the signal charge R of the branching portion 54 starts to move toward the packet formed on the electrode HP1 of the horizontal transfer path 56 on the back side of the paper (not shown). Similarly to the time t = 3 shown in FIG. 8, the signal charge G existing in the packet formed on the electrode HP2 adjacent to the electrode OG at the time t = 2 passes through the electrode OG due to the increase in potential potential. Transferred to FD.

  Next, at time t = 4, similarly to time t = 4 shown in FIG. 8, a packet is formed at the electrode HL, and the signal charge G is accumulated in this packet. In the electrode HSL, the potential potential at the electrode HP2 adjacent to the electrode HSL is higher than the reference level 146 as indicated by the broken line 158, and the potential potential at the electrode HP1 adjacent to the electrode HSL is indicated by the broken line 160. As shown in the figure, since the signal level is lower than the reference level 146, the signal charge R of the branching section 54 moves to a packet formed on the electrode HP1 of the horizontal transfer path 56 on the back side of the paper (not shown).

  Next, at time t = 5, the same potential as at time t = 1 is formed on each electrode, and the signal charge G accumulated in the electrode HL is transferred to the electrode HSL. In the horizontal transfer path 58, the signal charge existing in the packet at the electrode HP1 moves to the packet at the electrode HP2 formed at t = 5. As described above, the signal charge is transferred in response to each drive signal. Note that the present invention is not limited to this embodiment, and it is possible to arbitrarily set which color signal charge is supplied to which horizontal transfer path.

  As described above, since the horizontal transfer path 50 is operated at a double frequency compared to the horizontal transfer paths 56 and 58, the horizontal transfer path 50 is supplied at time t = 2 in FIG. In response to the drive signal, the signal charge R is transferred toward the branching unit 54. However, the transfer of the signal charges R and B does not change in the horizontal transfer path 56. Also, the signal charge G is not transferred on the horizontal transfer path 58. Since the potential potential lower than the reference level 146 is formed at the branching portion 54, the signal charge G has moved to the packet formed at the electrode HP2.

  In each output amplifier, for example, as shown at times t = 3 and t = 4 shown in FIG. 10, the signal charges of the colors B and G are converted into analog voltage signals substantially simultaneously, and the output signals OS1 and OS2 Is being output as a fully parallel process. Thereby, it is possible to eliminate the time-series processing difference between the output signals OS1 and OS2. The present invention is not limited to the present embodiment. For example, the output signals OS1 and OS2 may be alternately output as long as the difference in time series processing is acceptable.

  By operating the solid-state imaging device 44 as described above, the signal charges having color attributes can be classified, transferred, and output without being mixed. In general, a solid-state imaging device is required to read out signal charges obtained with an increase in the number of pixels at high speed. This requirement affects the frequency band in the output amplifier of the horizontal transfer path. Conventional solid-state imaging devices have been difficult to drive at a certain frequency or higher due to a lack of frequency bands. However, since the solid-state imaging device 44 of the present embodiment increases the output by branching even if the drive frequency of the horizontal transfer path 50 is increased in response to the increase in the number of pixels, the output units 60 and 62 are driven. Even without increasing the frequency, the output signal charge can be read out within a predetermined frequency band according to the color. That is, it is possible to improve the reading speed of signal charges.

  In such a solid-state imaging device 14, conventionally, when transfer efficiency deteriorates in the branching unit 54, the remaining signal charge affects the signal charge of other pixels, and the image formed as a result Have a problem of appearing as fixed pattern noise.

  More specifically, for example, as shown in FIGS. 8 to 10, signal charges transferred in the order of color attributes G, R, G, and B are branched by a branching unit 54, and signal charges R, B Is transferred in the horizontal transfer path 56, and the signal charge G is transferred in the horizontal transfer path 58, the remaining signal charge is left in the situation where transfer efficiency is deteriorated in the branching section 54, that is, transfer deterioration occurs. A part of R was mixed into the next signal charge, that is, signal charge G. In particular, in the case of signal charges obtained by imaging a subject with a low color temperature, the amount of signal charge G mixed into signal charge R is large, whereas the amount of signal charge G mixed into signal charge B is large. Less. Therefore, a signal difference is generated between the signal charges G transferred by the horizontal transfer path 58, and appears as fixed pattern noise in the image.

  Therefore, in this embodiment, an electrode HL is provided in front of the branch portion, and this electrode HL can be driven independently. Then, the duty cycle and cycle of the drive signal φHL supplied to the electrode HL are changed by the timing signal generator 32 to lengthen the signal charge transfer time from the electrode to the branch portion. In the present embodiment, the timing signal generator 32 changes either the duty cycle or cycle of the horizontal drive signals 76a and 76b that drive the horizontal transfer paths 56 and 58, or one of them, from the branch section. The signal charge transfer time to one horizontal transfer path is set longer than usual.

  Here, the normal transfer time is the transfer time before changing the duty cycle or cycle of the drive signal, and the transfer efficiency is not deteriorated, that is, the transfer is performed when the transfer efficiency is maintained. It's time. For example, in the case of the duty cycle, in this embodiment, the normal transfer time is a transfer time when the duty cycle is 50%, that is, when the time of the high level and the low level is substantially the same. The normal transfer time is not limited to the transfer time when the duty cycle is 50%, for example, as long as the transfer time is maintained when the transfer efficiency is maintained.

  In FIG. 4, an electrode HL is a transfer element provided immediately before the branch-part electrode HSL, and transfers a signal charge received from the electrode HS3 to the electrode HSL. In the present embodiment, the electrode HL is a pair of polysilicon electrodes, like the other electrodes. The electrode HL can be driven independently. For example, in this embodiment, the electrode HL is supplied with a drive signal φHL as shown in FIG.

  The drive signal φHL shown in FIG. 7 indicates the drive signal φHL supplied to the electrode HL during normal driving. In the present embodiment, the driving signal φHL during normal driving is a signal having the same signal waveform as the driving signals φHS2 and φHS4. This is because in this embodiment, the electrode on the right side of the electrode HL is the electrode HS3, and therefore it is necessary to make the potential potential the same as that of the electrodes HS2 and HS4 during normal driving. The invention is not limited to this. The drive signal supplied to the electrode HL can be arbitrarily set according to the horizontal transfer path 50. For example, the drive signal φHL during normal driving can be a signal having the same signal waveform as the drive signals φHS1 and φHS3.

  On the other hand, when transfer deterioration is considered, for example, when the color temperature of the subject is low, in this embodiment, the timing signal generator 32 changes the duty cycle of the drive signal φHL as shown in FIG. As a result, the transfer time of the signal charge from the electrode HL to the electrode HSL can be made longer than the transfer time during normal driving, that is, the transfer time when the duty cycle is not changed.

  FIG. 11 is a timing chart conceptually showing the timing of the drive signal supplied to each electrode shown in FIG. 4 when the transfer efficiency is deteriorated, and is supplied to the electrode HL when the transfer efficiency is deteriorated. It is the figure which showed notionally the process which changes the duty cycle of a drive signal, and makes it longer than before changing the transfer time of the signal charge from the electrode HL to the electrode HSL, and cancels deterioration of transfer efficiency.

  In FIG. 11, the drive signal φHL has a high level time longer than a low level time. More specifically, referring to FIG. 11, the high level time and the low level time are both the time Ta, that is, a half cycle, like the drive signals φH1 to H4. The level time is time Tb, and the low level time is time Tc. Since the time Ta is a half period, the time Tb> time Ta> time Tc is satisfied.

  In the example shown in FIG. 11, the period is not modulated. Further, the drive signals φHS1 to 4 are not modulated. This is to maintain the transfer efficiency in the horizontal transfer path 50. The present invention is not limited to this. For example, the drive signals φHS1 to 4 can be modulated. Such modulation of the drive signal is made possible by the system control unit 28 controlling the timing signal generator 32, for example.

  Since the signal charge is transferred from the electrode HL to the electrode HSL when the drive signal φHL is at a low level and the drive signal φHP1 is at a high level, the duty cycle of the drive signal φHL is changed in this way. When the high level time Tb in the drive signal φHL is longer than the low level time Tc, the signal charge transfer time from the electrode HL to the electrode HSL is changed from the previous time Ta to the time Tb, that is, longer. It becomes possible. As a result, the transfer of signal charges from the electrode HS to the electrode HSL can be improved, the amount of charge remaining without being transferred can be reduced, and the deterioration of transfer efficiency can be eliminated. It becomes possible.

  Note that by changing the duty cycle of the drive signal φHL in this way, the high level time in the drive signal φHL is shortened, so that the transfer time from the electrode located on the left side of the electrode HL to the electrode HL is shortened. For example, in the example shown in FIG. 4, the transfer time of the signal charge from the electrode HS3 to the electrode HL is shortened. However, the transfer of signal charges from the electrode HS3 to the electrode HS has a margin in frequency characteristics and a large margin for shortening the transfer time. Therefore, by applying this margin to the transfer time from the electrode HS to the electrode HSL, transfer can be performed without any problem.

  The present invention is not limited to changing the duty cycle of the drive signal φHL. For example, as shown in FIG. 12, the timing signal generator 32 generates the drive signal φHL, the horizontal drive signal φHP1, and the horizontal drive signal φHP2. By changing the duty cycle and period, it is possible to lengthen the transfer time of the signal charge from the branch portion to one of the horizontal transfer paths.

  FIG. 12 is a timing chart conceptually showing another timing of the drive signal supplied to each electrode shown in FIG. 4 when the transfer efficiency is deteriorated. The drive signal φHL, the drive signal φHP1, and the drive By changing the duty cycle and cycle of signal φHP2, when the transfer efficiency deteriorates, the transfer time of the signal charge from the electrode HSL to the horizontal transfer path 56 is made longer than before the change to reduce the transfer efficiency. It is the figure which showed the process to eliminate conceptually. 12, the same reference numerals as those in FIG. 11 denote the same components.

  In the example shown in FIG. 12, not only the duty cycle of the drive signal φHL but also the duty cycles of the drive signals φHP1 and φHP2 are changed. More specifically, in FIG. 12, the duty cycle of the drive signals φHP1 and φHP2 is changed so that the high level time of the drive signal φHP1 is the time Td and the low level time. Is time Tq. On the other hand, since the drive signal φHP2 is in an opposite phase to the drive signal φHP1, the low level time is set to time Tp and the high level time is set to time Tq. Since the time Td before the change and the time Te are substantially the same length, that is, the length of the half period of the drive signals φHP1, φHP2, the relationship between the times Td, Te, Tp, and Tq is the time Tp > Time Td, Time Tq> Time Te.

  Further, the period of the drive signal φHL is changed in accordance with such changes of the drive signals φHP1 and φHP2, so that one period is a time Tp portion and one period is a time Tq portion alternately. In the example shown in FIG. 12, the duty cycle of the drive signal φHL is set such that the low level time is longer than the high level time as in FIG. For example, in this embodiment, when one period is a time Tp, the low level time is the time Tl and the high level time is the time Tm, and Tl> Tm. Further, in a portion where one period is time Tq, the low level time is time Tn, and the high level time is time To, and Tn> To.

  In this embodiment, even if the cycle of the drive signal φHL is different for each cycle in this way, the duty cycle is the same for the portion where the time Tp is one cycle and the portion where the time Tq is one time Tq. ing. Specifically, for example, when the period is the time Tp, the low level time Tl is 60% of the time Tp, and the high bell time Tm is 40% of the time Tp. Even when the period is the time Tq, the low level time Tn is set to 60% of the time Tq, and the high level time To is set to 40% of the time Tq. Note that the present invention is not limited to this, and any method can be adopted. For example, it is possible to change the duty cycle between a period of time Tp and a period of time Tq. For example, in both periods, the duty cycle is set to 50%, It is also possible to make the high level half a cycle. The present invention is not limited to these.

Further, the period of the drive signals φHS1 to HS4 is also changed by changing the drive signal φHL. Specifically, one cycle of the drive signal φHL is 1 cycle time T ₃ parts corresponding to those of the time Tp. Time T ₃ is substantially the same length as time Tp. Similarly one cycle of the drive signal HL is one cycle of the portion to be synchronized with the time Tq and time T _4. Time T ₄ is substantially the same length as time Tq. The duty cycle is not changed, and the low level and the high level are set to half a cycle in each cycle.

  As described above, when the duty cycle of the drive signals φHP1 and φHP2 is changed and the time during which the drive signal φHP1 is at a high level is lengthened, the signal charge is transferred from the electrode HSL to the horizontal transfer path 56 when the drive signal φHP1 is at a high level. Therefore, it is possible to lengthen the transfer time of the signal charge from the electrode HSL to the horizontal transfer path 56. Further, by changing the cycle of the drive signal φHP so that one cycle becomes longer, for example, even when the duty cycle is 50%, the drive signal φHL is low and the drive signal φHP1 is high. It becomes possible to lengthen the time which is a level, and it is possible to lengthen the transfer time of the signal charge from the electrode HL to the electrode HSL.

  In particular, by changing the duty cycle of the drive signal φHL as in the present embodiment, the drive signal φHL is at a low level and the drive signal φHP1 is at a high level can be made longer. It is possible to make the transfer time to the electrode HSL longer. Note that when the cycle of the drive signal φHL is changed, whether the duty cycle is also changed can be arbitrarily determined according to the transfer status in the transfer unit at that time.

  By changing the duty cycle of the drive signals φHP1 and HP2, the transfer time from the electrode HSL to the horizontal transfer path 58 is shortened from time Te to time Tq (time Te> time Tq). However, in the case where the signal charges of the pixel R and the pixel B are transferred to the horizontal transfer path 56 and the signal charge of the pixel G is transferred to the horizontal transfer path 58 as in the present embodiment, for example, the horizontal transfer path from the branch portion. As the transfer time to 58 is shortened, the signal charge of the pixel G is mixed into the signal charges of the pixel R and the pixel B. However, since the signal amount differs between the pixel R and the pixel B, the signal charge G Even if there is some contamination, the effect is minor.

  As shown in FIG. 11, when the duty cycles of the drive signals φHP1 and φHP2 are changed, the reset level Tr and the feedthrough level Ts of the output waveforms OS1 and OS2 are shortened and the data level Tt is lengthened. When noise is removed by the correlated double sampling method in the processing unit 22, it is necessary to change the phase of the sampling pulse in accordance with the change of the drive signals φHP1 and φHP2.

  As described above, in this embodiment, as shown in FIGS. 11 and 12, transfer from the electrode HL to the electrode HSL is performed by changing the duty cycle and period of the drive signal φHL and the drive signals φHP1 and φHP2. Since the signal charge is sufficiently moved by extending the time and the transfer time from the electrode HSL to the horizontal transfer path 56, it is possible to eliminate the deterioration of transfer efficiency in the electrode HSL. Further, for example, by changing the timing signal formed by the timing signal generator 32 shown in FIG. 1, it is possible to change the duty cycle and cycle, so that the deterioration of transfer efficiency is eliminated without requiring extra elements. Is possible.

  Such transfer degradation by driving the drive signals φHL, φHP1, and φHP2 by changing the duty cycle and cycle can be achieved by, for example, the temperature of the solid-state image sensor 44, the color temperature of the subject, the ISO sensitivity, and the drive speed. It is possible to carry out according to the above. For example, since the transfer efficiency deteriorates in a situation where the temperature of the solid-state imaging device 44 is low, it is possible to eliminate this deterioration by driving with changing the duty cycle or cycle.

  Note that the temperature of the solid-state imaging device 44 is measured by providing a known temperature detecting means such as a thermometer or a sensor (not shown) at any location of the solid-state imaging device 10, for example, the imaging unit 14 or the system control unit 28. It is possible. Further, when the measured temperature is lower than a predetermined value, the timing is reduced by controlling the timing signal generator 32 by the system control unit 28 or the like to change the duty cycle or cycle of each drive signal. It becomes possible to eliminate the deterioration of the transfer efficiency in the situation. Note that the present invention is not limited to this.

  Note that when the detected temperature is high, that is, when the detected temperature is equal to or higher than a predetermined value, it is preferable to perform normal driving because transfer efficiency is increased. Specifically, when the detected temperature is high, the timing signal generator 32 generates a normal timing signal, i.e., a timing signal in which the duty cycle is 50% and the low level and high level times are each half cycle. To the driver.

  Further, when the color temperature is extremely high or extremely low, the influence of the signal charge of the pixel R and the signal charge of the pixel B mixed into the signal charge of the pixel G is great. Therefore, driving by changing the duty cycle and period to eliminate transfer deterioration makes it possible to mitigate the influence of mixing.

  The case where the color temperature is extremely high differs depending on the solid-state imaging device 10 or the usage state, but it can be considered that the color temperature is higher than 6000 Kelvin, for example. Similarly, when the color temperature is extremely low, for example, a case where the color temperature is lower than 3000 Kelvin can be considered. Note that the present invention is not limited to this. The color temperature can be detected by employing a known method.

  In addition, when driving at high ISO sensitivity, that is, when shooting sensitivity is high compared to normal shooting sensitivity, the luminance of the subject is low, so the signal obtained is small, and the influence of mixing increases, By driving by changing the duty cycle and period, it is possible to prevent the contamination and reduce the influence.

  Further, at the time of high-speed driving, the transfer time is shorter than that of normal driving, and it is considered that signal charges are left behind. Therefore, by driving with changing the duty cycle and cycle, it is possible to prevent mixing and obtain a good image. It should be noted that at the time of low speed driving, it is possible to ensure a sufficient transfer time, and therefore it is preferable to return to normal driving. The present invention is not limited to the above-described case. In any case where transfer efficiency deteriorates in the branching unit 54, it is possible to eliminate the deterioration by driving by changing the duty cycle or cycle. Is possible.

  In the processing shown in FIGS. 11 and 12, how much the duty cycle is changed, that is, the variation value of the duty cycle can be arbitrarily set. For example, in a situation where transfer efficiency is likely to occur, It can be determined by measuring how much signal charge is left and calculating the transfer efficiency using the measured amount of signal charge left behind in the subsequent stage, that is, the remaining amount.

  FIG. 13 is a flowchart showing an example of a process for calculating the transfer efficiency by measuring the remaining transfer amount in order to set the fluctuation value of the duty cycle. In FIG. 13, in order to detect the remaining transfer amount, the system control unit 28 causes the imaging unit 14 to image a light source having a constant light amount and form a reference signal (step S1). By this control, the imaging unit 14 images a light source having a constant light amount, and mixes eight pixels in the horizontal direction in the horizontal transfer path 50 as shown in FIGS. At least two empty pixels 202 to 206 are formed so as to be continuous with the subsequent stage of the reference signal.

  14 to 17 are diagrams conceptually showing a process of forming the reference signal 200 by mixing eight pixels in the horizontal direction in the horizontal transfer path 50 shown in FIG. FIG. 14 is a timing chart conceptually showing each drive signal supplied to the line memory and the electrodes HS1 to HS4 in order to mix eight pixels. 15 to 17 are potential diagrams conceptually showing the potential potential of each electrode at the time shown in FIG. 15 to 17, the same reference numerals as those in FIG. 4 denote the same components. Although not shown, in FIGS. 15 to 17, the branching portion 54 is located on the left side, and the signal charges are sequentially transferred in the left direction.

  15 to 17, in the horizontal transfer path 50, a pair of polysilicon electrodes are electrodes HS4a, HS3a, HS4b, HS1a, HS2a, HS3b, HS2b from the right side toward the left side where the branch portion 54 is located. , HS1b. The drive signal shown in FIG. 14 is supplied to each electrode. For example, the drive signal φHP1 shown in FIG. 14 is supplied to the electrode HP1. The same applies to the other electrodes.

The potential potential formed in accordance with each drive signal and the movement of the signal charge due to this potential potential will be described with reference to FIGS. 15 to 17. First, at time t = 1, the level “ A drive signal of “H” is supplied, and a signal charge is supplied to each electrode. In this embodiment, the signal charges are transferred in the order of the color attributes G, R, G, and B. Therefore, for example, at time t = 1 in FIG. 14, the color attribute of the electrode HS1 _b is G. signal charge G ₁ is supplied, the color attribute is supplied the signal charges R ₁ is R next to the electrode HS2 _b of the electrode HS1 _b. The same applies to the other electrodes.

Next, at time t = 2, the drive signal of level “H” is supplied to the line memory and the electrodes HS1, HS3, the drive signal of level “L” is supplied to the electrodes HS2, HS4, and the electrodes HS1, A drive signal of level “L” is supplied to the electrode HS3. By this drive signal, the potential potential at the electrodes HS1 and HS3 is lowered, and a packet is formed at the electrodes HS1 and HS3. Therefore, the signal charges that existed in the packets at the electrodes HS2 and HS4 are transferred to the packets at the electrodes HS1 and HS3, and the signal charges of the two pixels accumulate in the packets at the electrodes HS1 and HS3. To do. For example, electrodes HS1 _b, 2 two signal charges of the signal charges G ₁ and the signal charges R ₁ are accumulated.

  Next, at time t = 3, a drive signal of level “H” is supplied to the line memory and the electrodes HS1, HS3, HS4, and a drive signal of level “L” is supplied to the electrode HS2. The potential potential is lowered. At time t = 3, each signal charge does not move.

Next, at time t = 4, the drive signal of level “H” is supplied to the line memory and the electrodes HS1, HS4, and the drive signal of level “L” is supplied to the electrodes HS2, HS3. Get higher. As a result, the signal charges G ₄ was in the packet at the electrode HS3 _a, and the signal charges B _2, move left adjacent electrodes, the electrodes HS4 _b.

Next, at time t = 5, the drive signal of level “H” is supplied to the line memory and the electrode HS1, and the drive signal of level “L” is supplied to the electrodes HS2, HS3, HS4, and the potential potential at the electrode HS4 is Get higher. As a result, the signal charges present in the packet at the electrode HS4 _b is transferred left neighboring electrodes, the electrodes HS1 _a, the electrodes HS1 _a, pixel four the signal charges, i.e. in this embodiment, the signal Charge G ₃ , signal charge R ₂ , signal charge G ₄ , and signal charge B ₂ accumulate.

  Thereafter, until time t = 6, the level “H” driving signal is supplied to the line memory and the electrode HS1, and the level “L” driving signal is supplied to the electrodes HS2, HS3, and HS4. Absent. After that, at time t = 6, the drive signal of level “H” is supplied to the electrode HS1, and the drive signal of level “L” is supplied to the line memory, electrodes HS2, HS3, and HS4. Even if a drive signal of level “H” is supplied to the line memory, the potential potential and the position of the signal charge at each electrode are not changed from the state at time t = 5 in FIG.

At time t = 7, a level “H” driving signal is supplied to the line memory and the electrode HS2, and a level “L” driving signal is supplied to the electrodes HS1, HS3, and HS4. As a result, the potential potential at the electrode HS1 increases and the potential potential at the electrode HS2 decreases. Therefore, the signal charge G ₃ , the signal charge R ₂ , the signal charge G ₄ , and the signal charge B ₂ existing on the electrode HS1a are transferred to the left adjacent electrode, that is, the electrode HS2a. The electrode HS3 _b signal was present in the charge G ₂ and the signal charges B ₁ is transferred left of the electrode, namely the electrode HS2 _b.

At time t = 8, the drive signal of level “H” is supplied to the line memory and electrode HS3, and the drive signal of level “L” is supplied to electrodes HS1, HS2, and HS4, and the potential potential at electrode HS2 is high. Thus, the potential potential at the electrode HS3 is lowered. As a result, the _four signal charges of the signal charge G ₃ , the signal charge R ₂ , the signal charge G ₄ , and the signal charge B ₂ existing on the electrode HS2 _a are transferred to the left adjacent electrode, that is, the electrode HS3 _b. .

Next, at time t = 9, the drive signal of level “H” is supplied to the line memory and electrode HS2, and the drive signal of level “L” is supplied to electrodes HS1, HS3, and HS4, and the potential potential at electrode HS3 Becomes higher, and the potential potential at the electrode HS2 becomes lower. As a result, the signal charges G ₃ was present in the electrode HS3 _b, the signal charges R _2, signal charges G _4, and four signal charges of the signal charges B ₂ is transferred left of the electrode, namely the electrode HS2 _b The Since the _two signal charges of the signal charge G ₂ and the signal charge B ₁ have been accumulated in the electrode HS2 _b until then, the signal charges of six pixels are accumulated in the electrode HS2 _b by this transfer.

Finally, at time t = 10, the drive signal of level “H” is supplied to the line memory and electrode HS1, and the drive signal of level “L” is supplied to electrodes HS2, HS3, and HS4, and the potential potential at electrode HS2 Becomes higher, and the potential potential at the electrode HS1 becomes lower. As a result, the signal charges of the six pixels has been accumulated in the electrode HS2 _b are transferred left of the electrode, namely the electrode HS1 _a. Since the electrode HS1 _a signal charge of two pixels to have been accumulated, the signal charges of the eight pixels by the transfer is to be accumulated.

  As described above, the eight pixels are mixed to form the reference signal pixel 200. In this embodiment, although not shown, three pixels that have lost their charge due to the mixing, that is, three empty pixels, are formed at the subsequent stage of the pixel 200. Note that the number of empty pixels may be at least two after the pixel 200 of the reference signal, and is not limited to this embodiment.

  In this way, when the reference signal pixel 200 and three consecutive empty pixels are formed behind the reference signal pixel 200, the solid-state imaging device 44 divides the reference signal pixel 200 and the empty pixel into the branching unit 54. The reference signal 200 and one of the three empty pixels are supplied to one horizontal transfer path, and the remaining two empty pixels are supplied to the other horizontal transfer path (step S2).

  18 shows the reference signal pixel 200 formed by the processing shown in FIGS. 15 to 17 and the empty pixels 202 to 206 formed in the subsequent stage of the reference signal pixel 200 from the branching unit 54 to the horizontal transfer paths 56 and 58. FIG. 5 is a diagram conceptually illustrating a situation of transfer to a network, and is a diagram conceptually illustrating a processing example for calculating transfer efficiency. 18, the same reference numerals as those in FIGS. 4 and 16 denote the same components. In FIG. 18, the reference signal pixel 200 and the empty pixels 202 to 206 are supplied from the horizontal transfer path 50 to the branching unit 54. By branching at the branching unit 54, the reference signal pixel 200 and the empty pixel 204 are sequentially supplied to the horizontal transfer path 56. Also, to the horizontal transfer path 58, the empty pixel 202 and the empty pixel 206 that are located immediately behind the reference signal pixel 200 in the horizontal transfer path 50 are sequentially supplied.

  The reference signal pixel 200 and the empty pixel 204 are sequentially transferred to the output amplifier 60 through the horizontal transfer path 56, and the output amplifier 60 outputs a signal 82 including the reference signal pixel 200 and the empty pixel 204. Similarly, the empty pixel 202 and the empty pixel 206 are sequentially transferred to the output amplifier 62 through the horizontal transfer path 58, and the output amplifier 62 outputs a signal 84 including the empty pixels 202 and 206. Thereafter, these signals 82 and 84 are processed by the preprocessing unit 22 to generate digital signals 110 and 112 and stored in the memory unit 24.

At this time, if the signal charge is left behind when branching from the branching unit 54 to the horizontal transfer path 56, the left signal charge enters the empty pixel 202 after branching. Therefore, the signal processing unit 26 reads the reference signal pixel 200 and the empty pixel 202 from the memory 24 as the digital signal 118 via the bus 114 and the signal line 120, and from the branch unit 54 to the horizontal transfer path 56 according to Equation 1. The transfer efficiency HTR _HSL1 when transferring to is calculated (step S3). In Equation 1, S is the signal amount of the pixel 200 of the reference signal, and T is the amount of the remaining signal charge detected from the empty pixel 202, that is, the residual charge amount. In addition, this invention is not necessarily limited to this, It can be performed in arbitrary parts.

Further, after branching, the signal charges left behind in the horizontal transfer path 56 enter the empty pixel 204. Therefore, in the present embodiment, similarly, the signal processing unit 26 detects the residual charge amount existing in the empty pixel 204, and calculates the transfer efficiency HTR _os1 (step S4). The transfer efficiency HTR _os1 can also be _{calculated by setting} the above-described variable T in _Equation 1 to the residual charge amount detected from the empty pixel 204. In particular, the empty pixel 204 contains the amount of residual charge left between the final stage in the horizontal transfer path 56, that is, between the output gate and the floating diffusion amplifier shown in FIG. The maintained transfer efficiency is particularly useful for improving the influence of image degradation and the like.

In this way, the transfer efficiency when the signal charge is branched from the branching unit 54 to the horizontal transfer path 56 and the transfer efficiency in the horizontal transfer path 56 are calculated. Note Similarly, as shown in FIG. 18, it is also possible to calculate the transfer efficiency HTR _HSL2, and transfer efficiency HTR _os1 in the horizontal transfer path 58. Specifically, as shown in FIG. 18, if the pixel 200 of the reference signal created by the processing of FIGS. 15 to 17 is supplied to the horizontal transfer path 58 and then the signal charge existing in the empty pixel 204 is detected, the horizontal signal is detected. The transfer efficiency HTR _os2 on the transfer path 58 can be calculated. If the signal charge existing in the empty pixel 202 is detected, it is possible to calculate the transfer efficiency HTR _HSL2 when the signal charge is branched from the branching unit 54 to the horizontal transfer path 58.

  The transfer efficiency to be calculated may be, for example, the transfer efficiency with respect to the reference signal 200 having a certain signal amount, or the residual charge amount depending on the signal amount of the pixel 200 of the reference signal as shown in FIGS. Therefore, several reference signal pixels 200 having different signal amounts may be formed and calculated for each signal amount. Note that the present invention is not limited to calculating the transfer efficiency in the manner shown in FIGS. 13 to 19, and can be calculated by employing a known method.

20 is a diagram conceptually showing a measurement result when the residual charge amount is measured by changing the signal amount of the pixel 200 of the reference signal, and FIG. 21 is a transfer calculated from the residual charge amount shown in FIG. It is the figure which showed efficiency conceptually. In FIG. 20, the horizontal axis represents the signal amount (mV) of the reference signal pixel 200, and the vertical axis represents the residual charge amount (mV). Also, FIG. 20 shows the results of detecting the residual charges in the branching portion 54, and the broken line 232 indicates the residual charges when the signal charge is branched from the branching portion 54 to the horizontal transfer path 56, that is, the empty pixel 202 in FIG. The broken line 234 indicates the residual charge when the signal charge is branched from the branching portion 54 to the horizontal transfer path 58, that is, the signal amount detected from the empty pixel 202 in FIG. . FIG. 21 shows the transfer efficiencies HTR _HSL1 and HTR _HSL2 calculated from the values shown in FIG. Note that the present invention is not limited to the transfer efficiency in the branch unit 54, and it is also possible to calculate the transfer efficiency in the horizontal transfer paths 56 and 58 for each signal amount of the reference signal pixel 200 in the same manner.

FIG. 22 is a flowchart showing an example of processing for calculating the transfer efficiency in the procedure shown in FIG. 13 and setting the duty cycle variation value using the obtained transfer efficiency in the solid-state imaging device 10 shown in FIG. is there. In FIG. 22, in order to set the variation value, the transfer efficiency of the portion where the variation value of the duty cycle or period is set is calculated according to the procedure shown in FIG. 13 (step S1). For example, in this embodiment, a pixel 200 having a certain signal amount is formed in order to determine a fluctuation value used when extending the transfer time from the branching unit 54 to the horizontal transfer path 56, and as shown in FIG. calculating the transfer efficiency HTR _HSL2 when branching from the transfer efficiency HTR _HSL1, and the branch portion 54 at the time of branching the signal charges to the horizontal transfer path 56 the signal charges to the horizontal transfer path 58 from.

  Since the transfer efficiency calculated at this time is used as a reference when setting the fluctuation value, when calculating the transfer efficiency in step S1, the duty of the normal driving, that is, the drive signals φHL, φHP1, and φHP2 is calculated. Although it is preferable to set the cycle to 50% and a constant cycle, the present invention is not limited to this.

When the transfer efficiencies for branching the signal charges from the branching unit 54 to the horizontal transfer paths 56 and 58 are obtained in this way, it is determined whether one of the transfer efficiencies exceeds the reference value (step S2). ). For example, in this embodiment, it is determined whether or not the transfer efficiency HTR _HSL1 of the horizontal transfer path 56 exceeds the reference value.

An arbitrarily set value can be adopted as the reference value. For example, it may be a value set based on the transfer efficiencies HTR _HSL1 and HTR _HSL2 calculated in step S1, or may be a value set based on experience or the like. The present invention is not limited to this. For example, in this embodiment, reference values are set as indicated by dotted lines 242 and 244 in FIG. In FIG. 21, a dotted line 242 is a reference value of transfer efficiency when branching from the branching portion 54 to the horizontal transfer path 56, and a dotted line 244 is a reference value of transfer efficiency when branching from the branching portion 54 to the horizontal transfer path 58. .

  Also, in this embodiment, if transfer deterioration occurs when branching from the branching unit 54 to the horizontal transfer path 56, the influence on the image is large. Therefore, the transfer efficiency when branching from the branching unit 54 to the horizontal transfer path 56 is large. The reference value is set to be stricter than the reference value of the transfer efficiency when branching from the branching unit 54 to the horizontal transfer path 58. The present invention is not limited to this, and the same reference value may be set for the branch from the branch unit 54 to the horizontal transfer path 56 and the branch from the branch unit 54 to the horizontal transfer path 58. A reference value may be set for each as in the embodiment, and can be arbitrarily selected.

As a result of the determination in step S2, if the transfer efficiency HTR _HSL1 exceeds the reference value, the process proceeds to step S3, and the other transfer efficiency, specifically, transfer when branching from the branching unit 54 to the horizontal transfer path 58 is performed. It is determined whether or not the efficiency HTR _HSL2 exceeds the reference value (step S3).

As a result of the determination in step S3, when the transfer efficiency HTR _HSL2 also exceeds the reference value, the process for setting the fluctuation value is terminated. On the other hand, if the result of determination in step S3 is that the transfer efficiency HTR _HSL2 is below the reference value, the duty cycle and cycle of each drive signal are adjusted (step S4). Specifically, the duty cycle and period of the drive signals φHL, φHP1, φHP2, etc. are adjusted. Note how much change is possible to arbitrarily set, for example, may be set depending on whether the transfer efficiency HTR _HSL1 exceeds what extent the reference value, also for example the transfer efficiency HTR _HSL2 the reference value It may be set according to how far below it is, and further, for example, the amount of change in one adjustment, for example, a value that raises the duty cycle by 5%, etc. is set, and adjustment based on this amount of change May be performed. The present invention is not limited to this.

After the adjustment in step S4, the process returns to step S1, calculates transfer efficiency HTR _HSL1 and HTR _HSL2 again, determines whether or not the obtained transfer efficiencies HTR _HSL1 and HTR _HSL2 exceed the reference value, and transfers efficiency If HTR _HSL1 and transfer efficiency HTR _HSL2 exceed the reference value, the process ends. The reason for returning to step S1 in this way is to determine whether or not the transfer efficiency HTR _{HSL2 at the} time of branching from the branching unit 54 to the horizontal transfer path 58 has been improved, and in step S4, the duty cycle and period are set. This is to confirm whether the transfer efficiency HTR _HSL1 when branching from the branching unit 54 to the horizontal transfer path 56 is less than the reference value due to the change.

If one transfer efficiency HTR _HSL1 is lower than the reference value as a result of the determination in step S2, the process proceeds to step S5, and it is determined whether or not the other transfer efficiency HTR _HSL2 is higher than the reference value (step S5). ). As a result of this determination, if the transfer efficiency HTR _HSL2 is also below the reference value, it is determined that the fluctuation value cannot be set (step S6), and the process is terminated.

On the other hand, when the transfer efficiency HTR _HSL2 exceeds the reference value, the duty cycle and cycle of each drive signal are adjusted so that the transfer efficiency HTR _HSL1 is increased (step S7). The degree of change can be arbitrarily set as in step S4. After the change, the process returns to step S1, and it is determined how much the transfer efficiency HTR _HSL1 has been improved by the change in step S7 and whether the other transfer efficiency HTR _HSL2 has become less than the reference value.

Setting a variation value while measuring the transfer efficiency HTR _HSL1, and transfer efficiency HTR _HSL2 as described above. Therefore, for example, as a result of changing the duty cycle or cycle, the deterioration of transfer efficiency in one horizontal transfer path is improved, but it is possible to prevent the problem that the transfer efficiency in the other horizontal transfer path is deteriorated. It is possible to obtain a variation value according to the situation. In this embodiment, the fluctuation value when branching from the branching portion 54 to the horizontal transfer paths 56 and 58 is set, but when changing the transfer time from the electrode HL before branching to the electrode HSL of the branching portion 54 It is possible to set the variation value of by adopting a similar method.

  It should be noted that such variable values should be set in a state where transfer efficiency tends to deteriorate, such as when the temperature is high, when the sensitivity is high, when reading at high speed, or when the color temperature is extremely high or low. This is preferable because it is possible to obtain a variation value that further improves transfer degradation. In addition, it is preferable to calculate the transfer efficiency and set the variation value at the time of shipment of the solid-state imaging device 44 and the solid-state imaging device 10 because the individual differences of the solid-state imaging device 10 can be absorbed. Note that the present invention is not limited to this, and it is possible to set a variation value in an arbitrary situation and at an arbitrary stage.

It is a block diagram which shows the schematic structure of the Example of the solid-state imaging device of this invention. It is a block diagram which shows the schematic structure of the Example in the 2-line readout CCD to which the solid-state image sensor which concerns on this invention is applied. FIG. 2 is a block diagram conceptually showing a configuration example of a driver shown in FIG. 1. It is the figure which showed notionally the figure which looked at the horizontal transfer path in the solid-state image sensor of FIG. 1 from the top. It is a figure which shows notionally the cross section which cut | disconnected one horizontal transfer path shown in FIG. It is a figure which shows notionally the cross section which cut | disconnected the other horizontal transfer path shown in FIG. 5 is a timing chart conceptually showing timings of drive signals supplied to the respective electrodes shown in FIG. FIG. 6 is a conceptual diagram conceptually showing a signal charge transfer state in the horizontal transfer path shown in FIG. 5. FIG. 7 is a conceptual diagram conceptually showing a transfer state of signal charges in the horizontal transfer path shown in FIG. 6. FIG. 5 is a diagram conceptually showing a signal charge transfer situation in the horizontal transfer path shown in FIG. 4. 5 is a timing chart conceptually showing timings of drive signals supplied to the respective electrodes shown in FIG. 5 is a timing chart conceptually showing another timing of drive signals supplied to the respective electrodes shown in FIG. 4. It is the flowchart which showed an example of the process which calculates transfer efficiency. 4 is a timing chart conceptually showing drive signals supplied to a line memory and electrodes HS1 to HS4 in order to mix eight pixels. FIG. 5 is a diagram conceptually illustrating a process of forming a reference signal by mixing eight pixels in the horizontal direction in the horizontal transfer path illustrated in FIG. 4. FIG. 5 is a diagram conceptually illustrating a process of forming a reference signal by mixing eight pixels in the horizontal direction in the horizontal transfer path illustrated in FIG. 4. FIG. 5 is a diagram conceptually illustrating a process of forming a reference signal by mixing eight pixels in the horizontal direction in the horizontal transfer path illustrated in FIG. 4. It is the figure which showed notionally the process example which calculates the transfer efficiency in one horizontal transfer path. It is the figure which showed notionally the process example which calculates the other transfer efficiency. It is the figure which showed notionally the residual charge amount detected for every signal amount of the reference signal. FIG. 21 is a diagram conceptually showing transfer efficiency calculated from the residual charge amount shown in FIG. 20. FIG. 14 is a flowchart illustrating an example of a process for calculating transfer efficiency according to the processing procedure illustrated in FIG. 13 and setting a variation value of the duty cycle using the obtained transfer efficiency.

Explanation of symbols

10 Solid-state imaging device
12 Optical system
14 Imaging unit
16 Amplifier power supply
18 Bias supply section
20 drivers

Claims (30)

A plurality of light receiving elements arranged in row and column directions for photoelectrically converting incident light from the object field into signal charges;
Vertical transfer means for vertically transferring the signal charges read from the plurality of light receiving elements;
First horizontal transfer means for receiving the signal charge vertically transferred from the vertical transfer means and horizontally transferring the signal charge;
A branching unit arranged at the output end of the first horizontal transfer unit and distributing the horizontally transferred signal charge to any one of a plurality of output destinations;
Second and third horizontal transfer means for receiving the signal charges distributed from the branching means and further horizontally transferring them;
In a solid-state imaging device using a solid-state imaging device provided at each output end of second and third horizontal transfer means and including first and second output means for forming an electric signal from the signal charge, the apparatus Is
Including a pre-branch transfer unit that is arranged in a preceding stage of the branch unit in the first horizontal transfer unit and transfers the signal charge transferred by the first horizontal transfer unit to the branch unit;
By changing the duty cycle and / or the cycle of the drive signal for driving the pre-branch transfer means, the transfer time of the signal charge from the pre-branch transfer means to the branch means is made longer than the normal transfer time. A solid-state imaging device.   2. The apparatus according to claim 1, wherein the apparatus further changes the duty cycle and / or period of the drive signal for driving at least one of the second and third horizontal transfer means to change the duty cycle from the branch means. 2. A solid-state imaging device, wherein a transfer time of the signal charge to either one of the second and third horizontal transfer means is made longer than usual. 2. The apparatus according to claim 1, wherein the solid-state imaging element is further arranged corresponding to each of the plurality of light receiving elements to color-separate the incident light into three primary colors of red, green, and blue, and to receive any one of the light receiving elements. Including a color filter incident on the element,
The plurality of light receiving elements obtain the incident light indicating any one of the three primary colors of red, green, and blue from the color filter, and photoelectrically convert the incident light into red, green, and blue signal charges,
The branching means transfers the red and blue signal charges to the second horizontal transfer means, and transfers the green signal charge to the third horizontal transfer means,
The solid-state imaging device changes the transfer time of the red and blue signal charges from the pre-branch transfer unit to the branch unit by changing the duty cycle and / or cycle of the drive signal that drives the pre-branch transfer unit. Solid-state imaging device characterized in that longer than normal transfer time   4. The apparatus according to claim 3, wherein the apparatus further changes the duty cycle and / or period of the drive signal for driving at least one of the second and third horizontal transfer means to change the second from the branch means. A solid-state imaging device characterized in that the transfer time of the red and blue signal charges to the horizontal transfer means is longer than usual. 5. The apparatus according to claim 1, further comprising a temperature detection unit that detects a temperature of the solid-state imaging device,
A solid-state imaging device characterized in that the transfer time is lengthened when the temperature detected by the temperature detection means is lower than a set value. 5. The apparatus according to claim 1, further comprising a temperature detection unit that detects a temperature of the solid-state imaging device,
A solid-state imaging device, wherein the transfer time is set to a normal time when the temperature detected by the temperature detection means is higher than a set value. 5. The apparatus according to claim 1, further comprising color temperature detecting means for detecting a color temperature of the object scene,
A solid-state imaging device characterized in that the transfer time is lengthened when the color temperature detected by the color temperature detecting means is higher or lower than a set range.   5. The solid-state imaging device according to claim 1, wherein the transfer time is extended when the sensitivity is high.   5. The solid-state imaging device according to claim 1, wherein the device sets the transfer time to a normal time when driving at a low speed. 10. The apparatus according to claim 1, further comprising signal processing means for removing noise in the electric signal by a correlated double sampling method.
A solid-state imaging device characterized by changing the phase of a sampling pulse used in the correlated double sampling method when the transfer time changes. 11. The apparatus according to claim 1, further comprising transfer efficiency calculating means for calculating transfer efficiency,
A solid-state imaging device, wherein a duty cycle and / or a cycle for extending the transfer time is determined according to the transfer efficiency calculated by the transfer efficiency calculation means. 12. The apparatus according to claim 11, wherein when the transfer efficiency calculation unit calculates the transfer efficiency, the vertical transfer unit includes a plurality of signal charges composed of a predetermined number of groups of the signal charges arranged in one horizontal direction. Is transferred to the first horizontal transfer means,
The first horizontal transfer means mixes the predetermined number of signal charges by a horizontal pixel mixing method, and a reference signal pixel, and the first and second signals that are continuous after the reference signal pixel and have lost charge due to the mixing. Form empty pixels,
The branching unit branches the reference pixel, the first sky pixel, and the second sky pixel, and supplies the reference pixel and the second sky pixel to one of the second and third horizontal transfer units. And the first empty pixel to the other,
The solid-state imaging device, wherein the transfer efficiency calculation means calculates the transfer efficiency using a residual charge amount detected from the first and second empty pixels. 13. The apparatus according to claim 12, wherein the transfer efficiency calculation unit uses the residual charge amount detected from the first empty pixel to transfer between the branch unit and the horizontal transfer unit to which the reference signal is transferred. Calculate efficiency,
The solid-state imaging device determines a duty cycle and / or a cycle for extending the transfer time based on the transfer efficiency.   13. The solid-state imaging device according to claim 12, wherein the horizontal pixel mixing method is a horizontal 8-pixel mixing method. 13. The apparatus according to claim 12, wherein when calculating the transfer efficiency, the apparatus images a light source having a constant light amount at the time of factory shipment in advance, and uses the signal charges obtained by the imaging, Forming one empty pixel and a second empty pixel;
The transfer efficiency calculating means calculates the transfer efficiency using the reference pixel, the first sky pixel, and the second sky pixel,
A solid-state imaging device, wherein a duty cycle and / or a cycle for extending the transfer time is determined according to the transfer efficiency calculated by the transfer efficiency calculating means. Incident light from the object scene is photoelectrically converted into signal charges by a plurality of light receiving elements arranged in rows and columns, and the signal charges read from the plurality of light receiving elements are vertically transferred in a vertical transfer step. Then, the signal charge vertically transferred from the vertical transfer step is received and transferred in the first horizontal transfer step, and the first horizontal transfer is performed in the branch step arranged at the output end of the first horizontal transfer step. The signal charges horizontally transferred from the transfer process are distributed to any of a plurality of output destinations, the signal charges distributed from the branch process are received in the second and third horizontal transfer processes, and further transferred horizontally. In the driving method for driving the solid-state imaging device that outputs a signal corresponding to the signal charge in the first and second output steps provided at the respective output ends of the third horizontal transfer step, the method includes:
A pre-branch transfer step for transferring the signal charge transferred at the first horizontal transfer step and transferred at the first horizontal transfer step to the branch step;
A drive method characterized by changing a duty cycle and / or a cycle of a drive signal for driving the pre-branch transfer step so that a transfer time of the signal charge in the transfer step is longer than a normal transfer time.   17. The method of claim 16, further comprising changing the duty cycle and / or period of the drive signal that drives at least one of the second and third horizontal transfer steps from the branching step. A driving method characterized in that a transfer time of the signal charge in either one of the second and third horizontal transfer steps is made longer than usual. The method according to claim 16, wherein the solid-state imaging device color-separates incident light from an object scene into a plurality of colors with a color filter, and indicates one of the three primary colors of red, green, and blue from the color filter. Incident light is obtained and photoelectrically converted into the red, green, and blue signal charges,
The branching process distributes the red and blue signal charges to a second horizontal transfer process, and distributes the green signal charge to a third horizontal transfer process,
In the driving method, a duty cycle and / or a cycle of a driving signal for driving the pre-branch transfer process is changed so that the transfer time of the red and blue signal charges in the transfer process is longer than a normal transfer time. A driving method characterized by:   19. The method according to claim 18, wherein the method further comprises changing the duty cycle and / or period of a drive signal that drives at least one of the second and third horizontal transfer steps to change the duty step in the branching step. A driving method characterized in that the transfer time of red and blue signal charges is longer than usual.   20. The driving method according to claim 16, wherein the transfer time is lengthened when the temperature of the solid-state imaging device is lower than a set value.   20. The driving method according to claim 16, wherein the transfer time is set to a normal time when the temperature of the solid-state imaging device is higher than a set value.   20. The method according to claim 16, wherein the transfer time is lengthened when the color temperature of the object scene is higher or lower than a set range. Driving method.   20. The solid-state imaging method according to claim 16, wherein the transfer time is lengthened when the sensitivity is high.   20. The driving method according to claim 16, wherein the transfer time is set to a normal time during low-speed driving. 25. A method as claimed in any of claims 16 to 24, comprising a signal processing step of removing noise in the electrical signal by a correlated double sampling scheme.
When the transfer time changes, the driving method is characterized in that the phase of the sampling pulse used in the correlated double sampling method is changed. The method according to any one of claims 16 to 25, further comprising a transfer efficiency calculating step of calculating transfer efficiency,
A driving method characterized in that a duty cycle and / or a cycle for extending the transfer time is determined according to the transfer efficiency calculated in the transfer efficiency calculation step. 27. The method according to claim 26, wherein when calculating the transfer efficiency, the vertical transfer step converts a plurality of signal charges formed of a predetermined number of groups of signal charges arranged in one horizontal direction into a first horizontal direction. Transfer to the transfer process,
In the first horizontal transfer step, the predetermined number of signal charges are mixed by a horizontal pixel mixing method to be a reference signal pixel, and the first and second signals that have been lost due to the mixing are continuous after the reference signal pixel. Form empty pixels,
The branching step branches the reference pixel, the first sky pixel, and the second sky pixel, and the reference pixel and the second sky pixel are one of the second and third horizontal transfer steps. And the first empty pixel to the other,
The driving method according to claim 1, wherein the transfer efficiency calculating step calculates the transfer efficiency using a residual charge amount detected from the first and second empty pixels. 28. The method according to claim 27, wherein the transfer efficiency calculation step calculates a transfer efficiency in the branching step using a residual charge amount detected from the first empty pixel,
2. A driving method according to claim 1, wherein a duty cycle and / or a period for increasing the transfer time is determined based on the transfer efficiency.   28. The driving method according to claim 27, wherein the horizontal pixel mixing method is a horizontal 8-pixel mixing method. 28. The method according to claim 27, wherein when measuring the transfer efficiency, the method images a light source having a constant light amount at the time of shipment from a factory in advance, and uses the signal charges obtained by the imaging, Forming one empty pixel and a second empty pixel;
The transfer efficiency calculation step calculates the transfer efficiency using the reference pixel, the first sky pixel, and the second sky pixel,
2. A driving method according to claim 1, wherein a duty cycle and / or a cycle for increasing the transfer time is determined according to the transfer efficiency calculated in the transfer efficiency calculation step.