JP2007273662A - Semiconductor manufacturing device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a semiconductor manufacturing device capable of eliminating an error in detecting a phase difference due to signal delay included in detecting a signal flowing in a transmission line. <P>SOLUTION: The semiconductor manufacturing device includes: an antenna electrode for generating plasma in a vacuum chamber, a substrate electrode for holding a material to be treated, a first high frequency power source for supplying power to the antenna electrode via the transmission line and an impedance matching circuit, a second high frequency electric power source for supplying power to the substrate electrode via the transmission line and the impedance matching circuit, a first detector 108 for detecting the phase of the power to be supplied by the first high frequency power source, and a second detector 109 for detecting the phase of the power to be supplied by the second high frequency power source. The first and second detectors respectively include: a binarizing circuit 206 for binarizing the inputted signal and outputting it, and a delay circuit 205 for adjusting the signal delay in the transmission line from the antenna electrode or the substrate electrode to the binarizing circuit 206. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to a semiconductor manufacturing apparatus using plasma, such as etching processing, ashing processing, and CVD processing, and in particular, a high-frequency power source capable of phase difference control for arbitrarily controlling plasma generation and the moving direction and energy of charged particles in the plasma. About.

  In the manufacturing process of a semiconductor element, various processes using plasma such as an etching process, an ashing process, and a CVD process are performed. In these processing apparatuses using plasma, the process gas is ionized and ionized to increase the reactivity with the material to be processed. In addition, for the purpose of improving the accuracy of processing, the incident angle of charged particles to the material to be processed is controlled by using high-frequency bias power to improve the processing anisotropy. Here, when controlling the movement direction (incident angle) and energy of charged particles in the plasma in the processing chamber, the phase of the high-frequency power applied between the two electrodes configured to sandwich the plasma is accurate. If they are not available, efficient control cannot be performed.

  As an example of a processing apparatus that performs such processing, there is an apparatus called a plasma etching apparatus. (See Patent Document 1 and Patent Document 2).

  This apparatus has a sample stage for holding a material to be processed in a vacuum vessel, a high-frequency power supply antenna for forming plasma above and below the material to be processed, and an air core coil for forming and controlling the antenna In the outer periphery of the vacuum vessel. The shape of the high-frequency power supply antenna is circular, and is installed facing the top and bottom so as to sandwich the material to be processed. The antenna at the top of the material to be processed has a first high-frequency power for generating plasma and a second high-frequency power for inducing charged particles contained in the plasma atmosphere to the material to be processed. It is supplied from a high frequency power source. A third high frequency power having a phase difference with an arbitrary phase angle different from that of the second high frequency power source is supplied to the antenna below the material to be processed, and an electric field is vertically applied to the material to be processed. Is formed. The supplied first high-frequency power ionizes the processing gas supplied into the vacuum vessel and turns it into plasma. At this time, the ionized processing gas is confined by the magnetic field generated by the air-core coil in the outer peripheral portion of the vacuum vessel, and the shape, density and distribution of the plasma in the vacuum vessel are controlled to an arbitrary shape. Here, the electric field generated by the second and third high-frequency powers controls the direction of movement and the incident energy so that the charged particles in the plasma are perpendicularly incident on the material to be processed. Devices that enable direction control and high-speed processing are known.

  In the apparatus as described above, the density and distribution of charged particles in the plasma, the incidence of charged particles incident on the material to be processed, in order to keep the processing accuracy of the material to be treated constant and to achieve a highly reliable process. Some ingenuity is needed to keep the corners, energy and flux constant. Therefore, a processing system having a special structure as described below has been devised.

  FIG. 1 shows a general apparatus configuration of the plasma etching apparatus disclosed in each of the above-mentioned patent documents, and an antenna electrode 102 and a substrate electrode 103 that transmit electric power as a plasma energy source into the vacuum vessel 101. A processing chamber is configured by providing a gas supply device 111 for supplying a processing gas. A magnetic field generating coil 112 is disposed on the outer periphery of the vacuum vessel 101 so as to surround the processing chamber. An antenna electrode 102 for supplying electric power and a gas introduction plate 113 having a plurality of fine holes for introducing processing gas from the gas supply device 111 into the vacuum container are installed on the upper part of the vacuum container 101. . Further, an evacuation device (here, a turbo molecular pump) 114 is connected to the vacuum vessel 101 in order to maintain a vacuum. The upper antenna electrode 102 has a function of supplying high-frequency power for maintaining plasma in the processing chamber and a function of supplying high-frequency power for generating an electric field perpendicular to the material to be processed. . The lower substrate electrode 103 has a function of supplying high-frequency power for generating an electric field perpendicular to the material 115 to be processed, and a function as a stage for mounting the material to be processed and for adsorbing and holding it by Coulomb force. have.

  A coaxial waveguide 120 is connected to the upper antenna electrode 102 for connection to a first high-frequency power source 116 for supplying high-frequency power arranged outside the vacuum vessel 101. The transmission line drawn out of the vacuum vessel 101 by the coaxial waveguide 120 has a first high-frequency power source 116 for generating plasma and a second for causing charged particles to enter the object to be processed from the plasma. A high frequency power source 106 is connected via a mixer / filter 117. The mixer / filter 117 has a function of combining power supplied from the first and second high-frequency power sources 116 and 106 and supplying the power to the antenna electrode 102. The mixer / filter 117 and the first high-frequency power source 116 are connected to each other via a transmission line or a matching box 118 for absorbing plasma impedance fluctuations. Further, the mixer / filter 117 and the second high-frequency power source 106 pass through the transmission line and the matching box 104 for absorbing the impedance fluctuation of the plasma, and further, the phase / phase necessary for controlling the phase of the high-frequency power. A detector 108 for detecting a peak voltage is connected between the mixer. Data obtained from the detector 108 is transmitted to a phase controller 110 that controls the phases of the second and third high-frequency power sources 106 and 107, and these power sources can be controlled in conjunction with each other. .

  A third high-frequency power source 107 that supplies high-frequency power to the substrate electrode 103 installed under the workpiece 115 includes a matching box 105 and a detector between the substrate electrode 103 and the third high-frequency power source 107. 109 is connected, and is controlled by the phase controller 110 to interlock with the second high-frequency power source 106 based on the data obtained from the detector 109. Further, a DC voltage source 119 for generating a Coulomb force for attracting and holding the processed material 115 to the substrate electrode 103 is connected to the substrate electrode 103 installed below the processed material 115.

  In the above-described plasma etching system, the phase difference between the second and third high-frequency power sources 106 and 107 is controlled, so that the phase of the high-frequency power applied to the antenna electrode 102 and the substrate electrode 103 is kept constant, and the potential difference is stabilized. It is a system to let you. By maintaining a constant electric field formed perpendicular to the plasma space, the energy for sweeping charged particles from the plasma toward the substrate electrode 103 is stabilized. As a result, it is possible to reduce damage (charge-up damage) of the oxide film on the surface of the material 115 to be processed due to inadvertent increase in charged particle energy. In addition, since the charged particles in the randomly moving plasma are swept in a vertical direction with a constant electric field, the incident angle on the surface of the material to be processed 115 can be controlled to some extent, which contributes to anisotropy improvement. Is possible. There exists patent document 3 as an example which applied this.

JP-A-9-321031 JP 2004-111432 A JP-A-8-162292

  In such a system, a problem in maintaining the performance is a means for accurately detecting the phase difference between the end faces of the upper and lower electrodes installed in the processing chamber. The phase difference detection of the output power of the second and third high-frequency power sources is performed by a detector installed in each transmission line. In general, a detector has a binarization circuit, and a difference between two signals is obtained by using a dedicated comparator (phase difference detection circuit) provided in the phase controller 110 for the binarized signal. It is defined as phase difference. Therefore, when the binarized signal input to the comparator includes an unknown delay with respect to the signal flowing through the transmission line, a phase difference different from that of the actual signal is detected. An incorrect phase difference is given to the source. As a result, the phase difference between the power applied to the upper and lower electrodes is not constant, and the energy of the charged particles on the surface of the material to be processed is not constant, which causes charge-up damage.

  The above-described problem is particularly caused by errors in the circuit elements of the transmission system from the binary circuit alone in the detectors 108 and 109 to the input part of the binary circuit in the detectors 108 and 109 from the end faces of the electrodes. This is due to the fact that is not constant. The binarization circuit detects the waveform of the high-frequency power separated from the transmission line by the pickup circuit and converts it into a binary value of Hi and Lo.

It is generally known that high-frequency signals are easily affected by variations in circuit elements, and the influence of transmission lines, substrate materials, and circuit patterns cannot be ignored. These always vary due to minute errors during processing, errors in the element itself, and the like, and these effects appear as phase shifts in the phase detection circuit. Therefore, when the phase of the output signal of the binarization circuit in the detectors 108 and 109 is viewed with reference to the input end of the transmission line, the relationship has a certain degree of variation. Since the phase controller 110 obtains the phase difference by comparing the output signals of the detectors 108 and 109, when these output signals have uncertain variations, the phase controller 110 can obtain an accurate phase difference. It will be difficult. Therefore, in the system shown in Patent Document 3, adjustment is performed so that the phase difference is constant throughout the system corresponding to the phase difference control system including the second and third high-frequency power sources. If the magnitude of the variation changes due to replacement due to a failure, it becomes difficult to maintain the phase difference detection accuracy.

  Therefore, the present invention develops a method capable of always guaranteeing a certain error range (variation) with the detectors 108 and 109 alone for the purpose of solving the above-described problems, so that adjustment in the entire control system is unnecessary. Thus, a semiconductor manufacturing apparatus capable of reducing operation costs and improving detection accuracy is provided.

  In order to achieve the above object, the present invention mounts a mechanism for correcting the above-described variation on a detector inserted in a transmission line between a high-frequency power source and an electrode. As a result, the variation in delay time of the detector alone is kept constant, and the accuracy of the entire phase difference control system of the high-frequency power source is improved.

  Specific means include an analog method and a digital method.

  The analog method is a case where the waveform shaping / delay circuit and the binarization circuit in the detector are constituted by analog circuits. In the detector, a constant delay is given to the input signal by the capacitor (C1) 301 and the coil (L1) 302, and the output is binarized by elements such as a buffer and an inverter, and is transmitted to a dedicated controller. Take a series of actions. Furthermore, by adding an adjustment mechanism including a variable capacitor here, it is possible to adjust the delay time within a certain range, and individual differences such as circuit elements, errors in circuit manufacturing, and constant changes in circuit elements due to deterioration over time. By absorbing, a configuration in which a constant delay amount can always be guaranteed. In actual operation, the adjustment mechanism described above is set so that the relationship between the phase of the input end of the transmission line and the rising portion of the output signal of the binarization circuit is constant.

  The digital method is a system in which the waveform shaping / delay circuit and the binarization circuit in the detector are replaced with a DSP (Digital Signal Processing) unit or an MPU (Micro Processing Unit). In this configuration, power separated from the transmission line by the pickup circuit is quantized by an A / D converter (Analog-Digital converter), and thereafter, calculation and analysis are performed by a program installed in the MPU, and the result is output as a numerical value. .

  Further, since this technique is a detection means using an MPU, the phase information of the digitized input signal is transmitted to the phase controller of the high-frequency power source in real time via the inter-device communication network so that an arbitrary phase difference is obtained. By controlling the phases of the second and third high-frequency power sources, distributed control is also possible.

  By using the present invention, the variation of the binarization circuit 108 can be defined to be constant, and the phase difference detection result in the phase controller 110 can be guaranteed to be constant in any combination. . As a result, since the potential difference between the antenna electrode 102 and the substrate electrode 103 can be kept constant, it becomes possible to stably control the incident direction and energy of charged particles on the surface of the material to be processed 115, thereby preventing charge-up damage. Reduction and anisotropy of processing can be improved.

  Two embodiments of the phase difference control power source system using the present invention will be described below.

  The phase difference control power source and the plasma processing apparatus using the same according to the present invention will be described in detail with reference to FIGS. FIG. 1 is a schematic configuration diagram showing a plasma etching apparatus equipped with a phase difference control power source according to the present invention. Schematically, it is the same as the conventional apparatus configuration already described. Description of common parts is omitted.

  Next, details of the present embodiment will be described with reference to FIGS. FIG. 2 is a block diagram showing the processing contents of the detectors 108 and 109 and the phase controller 110, and FIG. 3 is a block diagram of a phase difference control power source including a binarization circuit.

  In FIG. 2, a transmission line A 202 is a transmission line connected to the antenna electrode 102, and a transmission line B 207 is a transmission line connected to the substrate electrode 103. Since the configuration of the system connected to the transmission line A 202 and the transmission line B 207 is the same, the transmission line A 202 will be described.

  A certain percentage of power is separated from the transmission line A 202 by the pickup circuit 203 (hereinafter referred to as an input signal) and input to the filter circuit 204 in the mixer / filter circuit 117. The filter circuit 204 that receives the signal removes a noise component (a signal in a band other than this when the output of the phase difference control power source is a sine wave having a single frequency) included in the input signal. The input signal from which noise has been removed is input to the waveform shaping / delay circuit 205. In the waveform shaping / delay circuit 205 that has received the signal, the delay time is arbitrarily varied and predetermined so as to keep constant the signal delay due to the error caused by the circuits from the pickup circuit 203 to the binarization circuit 206. Adjust within the specified range. The input signal whose delay time is adjusted is input to the binarization circuit 206, and the sine wave is converted into binary values of Hi and Lo by an inverter, a buffer, and the like.

  For the transmission line B 207, the same processing flow as that described above is performed by an independent circuit.

  The binarized input signals of the transmission lines A and B are input to the phase comparator / arithmetic circuit 201 in the phase controller 110 to detect the time delay between the two rectangular waves. From the wavelength corresponding to the detected time delay and the frequency of the signal to be transmitted, the wavelength shift due to the delay is calculated and recognized as a phase angle by angular coordinate conversion.

In FIG. 3, the second high-frequency power source 106 receives a reference signal from a signal source (OSC: Oscillator) 304 that can arbitrarily set the phase in the phase controller 110, and an internal AMP (amplifier circuit). Amplifies to the power set by 305. The amplified signal is adjusted to 50Ω by the internal impedance load 306 and output. The signal output from the second high frequency power source 106 is input to the matching box 104 (impedance adjustment circuit) for absorbing the load fluctuation of the plasma 307 formed in the vacuum vessel 101.

  In the matching box 104, the impedance of the transmission line is controlled to be constant by adjusting variable elements such as the variable capacitor VC2 (308) and the variable capacitor VC3 (309) corresponding to the fluctuation of the plasma 307 load. . The power output from the matching box 104 is applied to the electrodes through the mixer / filter circuit 117.

  Between the mixer / filter circuit 117 and the matching box 104, there is a pickup circuit 203 that separates power from the transmission line at a certain rate. The output of the pickup circuit 203 passes through a dedicated filter circuit 204, and then a waveform shaping / delay circuit 205 and a binarization circuit 206 for detecting the phase, and a Vpp detection circuit 310 for detecting and controlling the peak power. (Hereinafter, this signal is used as an input signal).

  In the waveform shaping / delay circuit 205 and the binarization circuit 206, a variable capacitor VC1 (303) is mounted as an adjustment mechanism for keeping a signal delay due to a circuit error constant. The variable capacitor VC1 is adjusted in advance so that the phase relationship between the input signal and the output binary signal is constant. A signal whose delay is adjusted to be constant by the variable capacitor VC1 is converted into a binary value of Hi and Lo by a binarization circuit combining an inverter, a buffer and the like.

  The signal converted to binary is transmitted to the phase controller 110 through a dedicated communication circuit, and compared with the output from a similar circuit installed in the other transmission line (transmission line B), Determine the phase difference. The Vpp detection circuit 310 monitors the peak power of the transmitted power. This value is transmitted to the phase controller 110 and the second high frequency power source 106 and used to control the output power to be constant.

  Next, details of phase difference detection using a DSP, MPU, etc. (hereinafter referred to as a digital circuit) will be described. FIG. 4 shows a processing flow from the output of the pickup circuit 203 to acquisition of a signal indicating the phase of power.

In this process, the functions of the waveform shaping / delay circuit 205 and the binarization circuit 206 shown in FIG.
It is replaced by a digital circuit such as an MPU and a program. The means for correcting the phase shift of the output signal relative to the input signal, which is a feature of this circuit, outputs phase information that can be handled by the phase controller 110 by incorporating a signal separated from the transmission line by a program. All processing up to is performed by a program.

  First, an input signal separated from a transmission line by a pickup circuit at a certain ratio is quantized by an A / D converter.

Instead of the filter circuit 204 shown in FIG.
Waveform shaping is performed by separating components other than the frequency output from the high-frequency power source by a mathematical method such as Fourier Transport or the wavelet method. The input signal that has been subjected to waveform shaping corrects the phase shift using a preprogrammed constant for correcting the phase shift caused by the circuit from the transmission line to the input part of the A / D converter. Alternatively, correction is performed by reflecting the change in the phase of the input signal so as to obtain a preset deviation amount. The corrected input signal calculates a time delay at an arbitrary point of the input signal with reference to a common timer for synchronizing the digital circuits installed in the transmission line A 202 and the transmission line B 207, respectively. The calculation result is output to the phase controller 110 as a phase signal.

  Next, an example in which a phase difference detection mechanism is configured as a distributed control system using a binarization circuit using a digital technique will be described. FIG. 5 and FIG. 6 show an example of a processing flow for detecting and controlling the phase difference between the power flowing through the transmission line A 202 and the transmission line B 207 using a plurality of digital circuits connected via a network. Show.

The flowcharts shown in FIGS. 5 and 6 are installed in the MPU of the binarization circuit installed in the transmission line A 202 and the transmission line B 207, the second high-frequency power source 106, and the third high-frequency power source 107. In this case, the control MPUs connected are connected via a network capable of bidirectional communication.

  In addition, the MPUs installed in each device share a timer that is a reference for operation because of the fact that they operate in conjunction with each other. The time information acquired from this timer is always added to the signal to be communicated, and is used as a common reference when acquiring a signal indicating the phase, particularly in the phase detection routine.

  First, a processing flow in the transmission line A 202 will be described. A part of the electric power being transmitted is taken out by the pickup circuit 203 installed on the transmission line A 202 and input to the A / D converter (hereinafter, this signal is referred to as an input signal A). In the A / D converter, the input signal A is quantized and converted into digital data. The quantized input signal A is subjected to waveform shaping by removing components (noise and frequency components of other power sources) that are different from the frequency of the input signal A using a mathematical method such as FFT or wavelet method. Do. An approximate function is calculated for the input signal A that has been subjected to waveform shaping, and a waveform that matches this is synthesized using the DSP unit. The phase shift is corrected with respect to the synthesized waveform by using a constant for correcting the phase shift caused by the circuit from the transmission line A to the input part of the A / D converter. Alternatively, correction is performed by reflecting the change in the phase of the input signal so as to obtain a preset deviation amount. The synthesized / corrected waveform is compared with the input signal A subjected to the previous waveform shaping, and it is confirmed that the wavelength match and the phase are in a predetermined relationship. Here, it is assumed that the synthesized waveform is a pseudo reference waveform. Since this pseudo reference waveform is considered to be an ideal waveform of the input signal A, a time delay at an arbitrary point of the waveform is obtained with reference to a common timer. This result and data indicating the frequency of the pseudo reference waveform are transmitted to the MPU installed on the transmission line B 207.

  Next, a processing flow of the transmission line B 207 will be described. A part of the electric power being transmitted is taken out by the pickup circuit 208 installed on the transmission line B 207 and input to the A / D converter (hereinafter, this signal is referred to as an input signal B). In the A / D converter, the input signal B is quantized and converted into digital data. The quantized input signal B is subjected to waveform shaping by removing components (noise and frequency components of other power sources) that are different from the frequency of the input signal B using a mathematical method such as FFT or wavelet method. Do. For this signal, the phase shift is corrected using a constant for correcting the phase shift caused by the circuit from the transmission line B to the input part of the A / D converter. Alternatively, correction is performed by reflecting the change in the phase of the input signal so as to obtain a preset deviation amount. Next, the time delay of an arbitrary point of the waveform is obtained with reference to a common timer for the corrected signal. The obtained time delay is compared with the time delay transmitted from the MPU of the transmission line A, and the amount of deviation is calculated. A delay amount is calculated from the calculated shift amount and the frequency of the pseudo reference signal. Since this delay amount is a shift amount (displacement) of time until reaching that point in each waveform when a certain point is used as a reference, a phase shift occurs when angular coordinate conversion is performed.

  The delay amount obtained here is transmitted to the second high-frequency power source 106 and the third high-frequency power source 107. The second and third high-frequency power sources 106 and 107 that have received the delay amount calculate a phase difference from the output power of the third high-frequency power source 107 based on the phase of the output power of the second high-frequency power source 106. To do. This phase difference is compared with the value obtained by converting the received delay amount into a phase, and the shift amount is obtained. Furthermore, the amount of deviation and the amount of change up to the set phase difference are obtained, a power source that can be adjusted with less phase change is selected, and the OSC (Oscillator) inside the corresponding high-frequency power source is determined from the amount of change obtained earlier. In contrast, the setting value of the phase angle is calculated and transmitted.

  This is a distributed control system that realizes feedback control that always maintains a constant phase difference by repeating the above series of operations in real time.

  As described above, according to the present invention, it is possible to always stably detect the phase difference between the AC signals flowing through the two transmission lines regardless of the analog method or the digital method. In particular, in the digital method, all processing is performed by a program, so phase shift correction can be performed while changing the correction amount in real time during device operation, and waveform shaping to an arbitrary shape is also possible. It becomes. Further, since MPU outputs phase information as a numerical value, noise tolerance and reliability can be improved as compared with an analog method of outputting an analog waveform. Furthermore, according to this example, it is possible to eliminate a dedicated controller from the phase difference control system of the phase difference control power source, and it is possible to construct a distributed control system using a small and general-purpose MPU or the like. Become. Many benefits can be expected from the introduction of this technology, such as higher processing speed, improved reliability, and the possibility of developing a next-generation distributed control system with a view to the overall system control system.

It is a schematic block diagram of a plasma etching apparatus. It is a block diagram of a detector and a phase controller. It is a block diagram for demonstrating description of a phase difference detection mechanism. It is a flowchart of a process at the time of comprising a binarization circuit with a digital method. An example of a flowchart in the case of using a distributed control system for phase difference detection and control of a phase difference control power source. From the transmission line to the determination of the phase difference information is shown. An example of a flowchart in the case of using a distributed control system for phase difference detection and control of a phase difference control power source. From the determination of the phase difference to the control of the OSC of the power source is shown.

Explanation of symbols

DESCRIPTION OF SYMBOLS 101 ... Vacuum container, 102 ... Antenna electrode, 103 ... Substrate electrode, 104, 105, 118 ... Matching box, 106 ... Second high frequency power source, 107 ... Third high frequency power source,
108, 109 ... Detector, 110 ... Phase controller, 111 ... Gas supply device, 112 ... Coil, 113 ... Gas introduction plate, 114 ... Turbo molecular pump, 115 ... Material to be treated, 116 ... First high frequency power source, DESCRIPTION OF SYMBOLS 117 ... Mixer filter, 119 ... DC voltage source, 120 ... Coaxial waveguide, 121 ... Filter circuit, 201 ... Phase comparator / arithmetic circuit, 202 ... Transmission line A, 203, 208 ... Pickup circuit, 204 ... Filter circuit 205 ... Waveform shaping / delay circuit, 206 ... Binary circuit, 207 ... Transmission line B, 301 ... Capacitor C1, 302 ... Coil L1, 303 ... Variable capacitor VC1, 304 ... OSC (Oscillator), 305 ... AMP
(Amplifier), 306 ... Internal impedance load, 307 ... Plasma, 308 ... Variable capacitor VC2, 309 ... Variable capacitor VC3, 310 ... Vpp detection circuit.

Claims (5)

An antenna electrode for generating plasma in a vacuum chamber, a substrate electrode for holding a material to be processed, a first high-frequency power supply for supplying power to the antenna electrode via a transmission line and an impedance matching circuit, and the substrate A second high-frequency power source that supplies power to the electrode via a transmission line and an impedance matching circuit; a first detector that detects a phase of power supplied by the first high-frequency power source; and the second high-frequency power source. A second detector for detecting a phase of power supplied by the power source, and a phase control for detecting a phase difference between power supplied by the first and second high-frequency power sources from outputs of the first and second detectors; A semiconductor manufacturing apparatus having a portion,
Each of the first and second detectors is
A binarization circuit that binarizes and outputs an input signal, and a delay circuit that adjusts a signal delay on a transmission line from the antenna electrode or the substrate electrode to the binarization circuit, Semiconductor manufacturing equipment. The semiconductor manufacturing apparatus according to claim 1.
The delay circuit includes adjustment means including a variable capacitor connected in parallel to a delay circuit in which a capacitor and a coil are connected in series, and adjusts the adjustment means to adjust a signal delay. Semiconductor manufacturing equipment. In the semiconductor manufacturing apparatus of Claim 2,
Between the delay circuit and the transmission line, a pickup circuit for obtaining a predetermined input signal from the power flowing through the transmission line, and a filter circuit for removing a noise component contained in the input signal obtained by the pickup circuit are provided. A semiconductor manufacturing apparatus. The semiconductor manufacturing apparatus according to claim 1.
A semiconductor manufacturing apparatus, wherein the delay circuit and the binarization circuit are constituted by a digital circuit of a DSP (Digital Signal Processing) unit and an MPU (Micro Processing Unit). The semiconductor manufacturing apparatus according to claim 4.
The first high-frequency power source and the second high-frequency power source include a control MPU (Micro Processing Unit), and constitute a communication network that performs bidirectional communication with the delay circuit and the binarization circuit,
Phase difference detection of output power of the first high-frequency power source and the second high-frequency power source, setting of a phase difference between the first high-frequency power source and the second high-frequency power source, and a detected phase difference value A semiconductor manufacturing apparatus, wherein phase difference comparison processing is performed by the communication network.

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