JP2007251101A - Circuit substrate with built-in solid electrolytic capacitor, interposer using it and package - Google Patents

Circuit substrate with built-in solid electrolytic capacitor, interposer using it and package Download PDF

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Publication number
JP2007251101A
JP2007251101A JP2006076320A JP2006076320A JP2007251101A JP 2007251101 A JP2007251101 A JP 2007251101A JP 2006076320 A JP2006076320 A JP 2006076320A JP 2006076320 A JP2006076320 A JP 2006076320A JP 2007251101 A JP2007251101 A JP 2007251101A
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Prior art keywords
layer
solid electrolytic
electrolytic capacitor
built
substrate
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Inventor
Yoshiyuki Yamamoto
義之 山本
喜久 ▲高▼瀬
Yoshihisa Takase
Yasuhiro Sugaya
康博 菅谷
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Panasonic Holdings Corp
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Matsushita Electric Industrial Co Ltd
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation

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  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)

Abstract

<P>PROBLEM TO BE SOLVED: To provide a substrate with a built-in solid electrolytic capacitor which can achieve low resistance connection between an aluminum metallic layer which is an anode of the solid electrolytic capacitor and a through-hole. <P>SOLUTION: In the substrate with a built-in solid electrolytic capacitor, a sheet-like solid electrolytic capacitor consisting of an anode 1 of an aluminum metallic layer and a cathode 6 of a silver paste layer is built in an insulating resin 3. A front layer and a back layer are formed of a metallic layer 4. The anode 1 is connected to the metallic layer 4 of the front layer and the back layer via a through-hole 8. The cathode 6 is connected to the metallic layer 4 of the front layer by means of a conductor paste. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

本発明は、各種電子機器に利用されるシートコンデンサに関するものである。   The present invention relates to a sheet capacitor used in various electronic devices.

機器の高速・高周波化に伴ってノイズ対策が重要となってくる。インターポーザ表面に実装された半導体が高周波でスイッチングが行われる場合、電源系のノイズが外部に漏洩する。これにより、配線基板の表面に実装されるICチップ、或いは配線基板自体が実装されるマザー基板上の他の配線基板に実装されるICチップに影響を与え、誤動作を招くおそれがある。マザー基板上に表面実装される固体電解コンデンサでは端子長や配線長が存在し高速・高周波化への対応には限界があることから、インターポーザ内部に固体電解コンデンサを配置する必要がある。   Noise countermeasures are becoming important as equipment increases in speed and frequency. When a semiconductor mounted on the surface of the interposer is switched at a high frequency, noise in the power supply system leaks to the outside. As a result, the IC chip mounted on the surface of the wiring board or the IC chip mounted on another wiring board on the mother board on which the wiring board itself is mounted may be affected, leading to a malfunction. A solid electrolytic capacitor that is surface-mounted on a mother board has terminal lengths and wiring lengths, and there is a limit to dealing with high speeds and high frequencies, so it is necessary to dispose a solid electrolytic capacitor inside the interposer.

なお、この出願の発明に関連する先行技術文献情報としては、例えば、特許文献1が知られている。
国際公開第03/107367号パンフレット
As prior art document information related to the invention of this application, for example, Patent Document 1 is known.
International Publication No. 03/107367 Pamphlet

従来の固体電解コンデンサ素子では一般的に陽極化成箔と外部電極への接続は溶接によるリードフレームへの接続が一般的に行われている。固体電解コンデンサ内蔵基板のために、溶接接続や、個別実装による接続方法を用いた場合には、接続および実装領域を設ける必要があり、小型化に限界がある。そこで、陽極化成箔の接続形成方法として基板に貫通孔を形成してめっきによるスルーホール接続が考えられるが、アルミニウムの表面には酸化被膜が形成されやすく、電解めっき等で接続する場合にはアルミニウムとスルーホールとの低抵抗接続の形成が困難であった。   In the conventional solid electrolytic capacitor element, the connection to the anodized foil and the external electrode is generally performed by connecting to the lead frame by welding. When a connection method using welding connection or individual mounting is used for the solid electrolytic capacitor built-in substrate, it is necessary to provide a connection and mounting region, and there is a limit to downsizing. Therefore, as a method for forming anodized foil, a through-hole connection can be considered by forming a through hole in the substrate and plating. However, an oxide film is easily formed on the surface of aluminum. It was difficult to form a low resistance connection between the through hole and the through hole.

本発明は、上記従来の問題点を解決するものであり、アルミニウムとスルーホールとが低抵抗接続した固体電解コンデンサ内蔵回路基板の実現を目的とする。   The present invention solves the above-mentioned conventional problems, and an object thereof is to realize a circuit board with a built-in solid electrolytic capacitor in which aluminum and through holes are connected with low resistance.

上記目的を達成するために本発明は、特に、陽極がアルミニウム金属層、陰極が銀ペーストの層からなるシート状の固体電解コンデンサを絶縁樹脂に内蔵し、表層及び裏層が金属層からなり、前記陽極がスルーホールを介して表層と裏層の金属層に接続され、前記陰極が導体ペーストにより表層の金属層に接続された固体電解コンデンサ内蔵基板という構成を有する。   In order to achieve the above object, the present invention particularly includes a sheet-like solid electrolytic capacitor having an anode formed of an aluminum metal layer and a cathode formed of a silver paste layer in an insulating resin, and a surface layer and a back layer formed of a metal layer, The anode is connected to the surface and back metal layers through a through hole, and the cathode is connected to the surface metal layer by a conductive paste.

本発明によれば、陽極がアルミニウム金属層、陰極が銀ペーストの層からなるシート状の固体電解コンデンサが絶縁樹脂に内蔵され、表層及び裏層が金属層からなり、前記陽極がスルーホールを介して表層と裏層の金属層に接続され、前記陰極が導体ペーストにより表層の金属層に接続された固体電解コンデンサ内蔵基板という構成を備えることにより、このスルーホールによって固体電解コンデンサ素子の陽極を回路基板外部に電気的に取り出すことができ、前記スルーホール内部において前記弁金属シートの端面はニッケルめっき層を介して前記スルーホールを貫通する固体電解コンデンサ内蔵回路基板という構成を備えることにより、アルミニウムの表面の酸化被膜を介することなくアルミニウム金属層を銅めっき層に電気的に接続できるので、固体電解コンデンサの陽極であるアルミニウム金属層とスルーホールとの低抵抗接続を実現できる。   According to the present invention, a sheet-like solid electrolytic capacitor in which the anode is made of an aluminum metal layer and the cathode is made of a silver paste layer is built in the insulating resin, the surface layer and the back layer are made of metal layers, and the anode is inserted through the through hole. The solid electrolytic capacitor element is connected to the front and back metal layers, and the cathode is connected to the front metal layer with a conductive paste. It can be electrically taken out to the outside of the substrate, and the end surface of the valve metal sheet inside the through hole has a configuration of a solid electrolytic capacitor built-in circuit board that penetrates the through hole through a nickel plating layer. The aluminum metal layer can be electrically connected to the copper plating layer without intervening the surface oxide film. Runode, a low resistance connection between the aluminum metal layer and the through-hole is an anode of a solid electrolytic capacitor can be realized.

(実施の形態1)
以下、本発明の実施の形態1における固体電解コンデンサ内蔵回路基板について、本発明の特に請求項1〜6,8,9の発明について、図面を参照しながら説明する。図1は本発明の実施の形態1における固体電解コンデンサ内蔵回路基板の断面図、図2は固体電解コンデンサ内蔵回路基板のスルーホール8付近における断面図、図3は固体電解コンデンサ内蔵回路基板の固体電解コンデンサにおける拡大図である。
(Embodiment 1)
Hereinafter, the solid electrolytic capacitor built-in circuit board according to the first embodiment of the present invention will be described with reference to the drawings. 1 is a cross-sectional view of a circuit board with a built-in solid electrolytic capacitor according to Embodiment 1 of the present invention, FIG. 2 is a cross-sectional view of the circuit board with a built-in solid electrolytic capacitor in the vicinity of a through hole 8, and FIG. It is an enlarged view in an electrolytic capacitor.

図1において、図3に示すようにアルミニウムからなる陽極1の片面側が薬液処理によって多孔質化された多孔質部2が形成され、多孔質部2の表出部を覆うように導電性高分子層である固体電解層5が形成され、その上にAgペーストの層からなる陰極6が形成されている。多孔質部2において陽極1の表面では、酸化アルミニウム16からなる誘電体が形成されており、陽極1と固体電解層5、および陽極1と陰極6との間が電気的に絶縁され、固体電解コンデンサ素子を形成する。   In FIG. 1, a conductive polymer is formed so that a porous portion 2 in which one side of an anode 1 made of aluminum is made porous by chemical treatment as shown in FIG. 3 and the exposed portion of the porous portion 2 is covered. A solid electrolytic layer 5 as a layer is formed, and a cathode 6 made of an Ag paste layer is formed thereon. In the porous portion 2, a dielectric made of aluminum oxide 16 is formed on the surface of the anode 1, and the anode 1 and the solid electrolytic layer 5, and the anode 1 and the cathode 6 are electrically insulated, so that solid electrolysis A capacitor element is formed.

この固体電解コンデンサが絶縁樹脂3に内蔵され、表層及び裏層が配線パターンからなる金属層4からなり、陽極1がスルーホール8を介して表層と裏層の金属層4に接続され、陰極6が導体7により金属層4に接続されたものである。   This solid electrolytic capacitor is built in the insulating resin 3, the surface layer and the back layer are made of a metal layer 4 made of a wiring pattern, the anode 1 is connected to the surface layer and the back layer metal layer 4 through a through hole 8, and the cathode 6 Is connected to the metal layer 4 by a conductor 7.

本実施の形態では、導体7は導体ペーストが用いられている。また、本実施の形態では、陽極1の片面に多孔質部2を有して固体電解コンデンサを形成しているが、片面に限定するものではなく陽極1の両面に形成する構成であってもよい。また、本実施の形態において、陽極1の片面に固体電解コンデンサを形成する方法としては特に上または下方向に限定するものではない。   In the present embodiment, a conductor paste is used for the conductor 7. Further, in the present embodiment, the solid electrolytic capacitor is formed by having the porous portion 2 on one side of the anode 1, but is not limited to one side, and may be formed on both sides of the anode 1. Good. Further, in the present embodiment, the method for forming the solid electrolytic capacitor on one surface of the anode 1 is not particularly limited to the upward or downward direction.

本発明において、スルーホール8が表裏の金属層4を接続する構造であれば、内部に絶縁樹脂を充填しても、金属またはその混合物を充填してもよい。   In the present invention, as long as the through hole 8 has a structure for connecting the front and back metal layers 4, the inside may be filled with an insulating resin, or may be filled with a metal or a mixture thereof.

ここで、図2について説明する。図2に示すように、シート状のアルミニウムからなる陽極1の端面付近において、陽極1の端面より、アルミニウムの端面を覆う亜鉛層9、ニッケル層10、パラジウム層11、銅めっき層12からなる接続層を有する構成となる。また、絶縁樹脂3における端面において、パラジウム層11、銅めっき層12からなる接続層を形成している。この構成を用いることでアルミニウムと銅スルーホールとの安定した接続を得ることができる。   Here, FIG. 2 will be described. As shown in FIG. 2, in the vicinity of the end face of the anode 1 made of sheet-like aluminum, a connection made of a zinc layer 9, a nickel layer 10, a palladium layer 11, and a copper plating layer 12 covering the end face of the aluminum from the end face of the anode 1. It becomes the structure which has a layer. In addition, a connection layer including a palladium layer 11 and a copper plating layer 12 is formed on the end surface of the insulating resin 3. By using this configuration, a stable connection between aluminum and a copper through hole can be obtained.

本実施の形態において、絶縁樹脂3としては、例えば、耐熱性の高いエポキシ樹脂やフェノール樹脂、シアネート樹脂を用いることにより、電気絶縁層の耐熱性をあげることができる。熱可塑性樹脂として、例えば、フッ素樹脂、シリコン樹脂などを用いることができる。特にフッ素樹脂を用いることにより誘電率が低い樹脂組成物層を得ることができる。   In the present embodiment, as the insulating resin 3, for example, by using an epoxy resin, a phenol resin, or a cyanate resin having high heat resistance, the heat resistance of the electric insulating layer can be increased. As the thermoplastic resin, for example, a fluorine resin, a silicon resin, or the like can be used. In particular, a resin composition layer having a low dielectric constant can be obtained by using a fluororesin.

また、絶縁樹脂にフィラーと樹脂の混合物を用いた場合、フィラーを選択することによって、電気絶縁層の線膨張係数、熱伝導度、誘電率などを容易に制御することができる。例えば、フィラーとしてアルミナ、マグネシア、窒化ホウ素、窒化アルミ、窒化珪素、テフロン(登録商標)及び、シリカなどを用いることができる。特にアルミナ、窒化ホウ素、窒化アルミを用いることにより、熱伝導度が高くなり、素子部分の発熱を効果的に放熱させることができる。また、シリカを用いた場合、誘電率が低い樹脂組成物層を得ることができるので高周波用途として好ましい。   In addition, when a mixture of a filler and a resin is used as the insulating resin, the linear expansion coefficient, thermal conductivity, dielectric constant, and the like of the electrical insulating layer can be easily controlled by selecting the filler. For example, alumina, magnesia, boron nitride, aluminum nitride, silicon nitride, Teflon (registered trademark), silica, or the like can be used as the filler. In particular, by using alumina, boron nitride, or aluminum nitride, the thermal conductivity is increased, and the heat generated in the element portion can be effectively dissipated. Further, when silica is used, a resin composition layer having a low dielectric constant can be obtained, which is preferable for high frequency applications.

さらに、フィラーは分散剤、着色剤またはカップリング剤を含んでいてもよい。分散剤によって、樹脂中のフィラーを均一性よく分散させることができる。着色剤によって、樹脂組成物層を着色することができる。カップリング剤によって、樹脂とフィラーとの接着強度を高くすることができるため、樹脂組成物層の絶縁性を向上できる。   Further, the filler may contain a dispersant, a colorant or a coupling agent. By the dispersant, the filler in the resin can be dispersed with good uniformity. The resin composition layer can be colored with the colorant. Since the bonding agent can increase the adhesive strength between the resin and the filler, the insulating property of the resin composition layer can be improved.

また表層と裏層の金属層4は、予め回路基板表面の配線パターンは転写工法で形成してからスルーホール形成したものでも、基板表面の銅箔はスルーホール形成後にエッチングによりパターニングしてもよい。さらに、基板の表層及び裏層の金属層4にニッケル層を形成することもできる。   Further, the metal layer 4 of the surface layer and the back layer may be formed in advance by forming a wiring pattern on the surface of the circuit board by a transfer method and then forming a through hole, or the copper foil on the surface of the substrate may be patterned by etching after forming the through hole. . Furthermore, a nickel layer can be formed on the metal layer 4 on the front layer and the back layer of the substrate.

以上のように、実施の形態1によれば、陽極1がスルーホール8を介して表層と裏層の金属層4に接続されるので、金属接合によって安定した電気的な接続を得ることが可能であり、同時にスルーホール8によって局所的な電極取り出しが可能となるため固体電解コンデンサ内蔵基板の小型化や、設計自由度の向上ができる。   As described above, according to the first embodiment, since the anode 1 is connected to the front and back metal layers 4 through the through holes 8, a stable electrical connection can be obtained by metal bonding. At the same time, local electrodes can be taken out through the through-holes 8, so that the substrate with a built-in solid electrolytic capacitor can be downsized and the degree of design freedom can be improved.

(実施の形態2)
次に本発明の実施の形態2における固体電解コンデンサ内蔵回路基板について、本発明の特に請求項7に記載の発明について、図面を参照しながら説明する。図4は本発明の実施の形態2における固体電解コンデンサ内蔵回路基板の断面図、図5は実施の形態2における固体電解コンデンサ内蔵回路基板のスルーホール8付近における拡大断面図である。なお、実施の形態1の構成と同様の構成を有するものについては、同一符号を付しその説明を省略する。
(Embodiment 2)
Next, a solid electrolytic capacitor built-in circuit board according to Embodiment 2 of the present invention will be described with reference to the drawings. 4 is a cross-sectional view of the circuit board with a built-in solid electrolytic capacitor in the second embodiment of the present invention, and FIG. 5 is an enlarged cross-sectional view in the vicinity of the through hole 8 of the circuit board with a built-in solid electrolytic capacitor in the second embodiment. In addition, about what has the structure similar to the structure of Embodiment 1, the same code | symbol is attached | subjected and the description is abbreviate | omitted.

本実施の形態2においては陽極1における多孔質部2をスルーホール8が貫通している構成である。固体電解コンデンサ内蔵回路基板のスルーホール8を拡大したものが図5である。ここで、陽極1とスルーホール8の接続部を拡大したものが図6である。多孔質部2はアルミニウムが多数の凹凸形状を形成しており、液状樹脂の硬化物からなる絶縁体13が充填されている。このようにアルミニウムの多孔質部2を絶縁体13で充填して多孔質部に存在する空隙を封止しておくことで、スルーホール8における接続信頼性が向上する。   In the second embodiment, the through hole 8 passes through the porous portion 2 in the anode 1. FIG. 5 is an enlarged view of the through hole 8 of the circuit board with a built-in solid electrolytic capacitor. Here, FIG. 6 is an enlarged view of the connecting portion between the anode 1 and the through hole 8. The porous portion 2 has a number of concave and convex shapes made of aluminum, and is filled with an insulator 13 made of a cured liquid resin. Thus, the reliability of the connection in the through hole 8 is improved by filling the porous portion 2 of aluminum with the insulator 13 and sealing the voids existing in the porous portion.

(実施の形態3)
次に、本発明の実施の形態3における固体電解コンデンサ内蔵回路基板およびそれを用いたインターポーザについて、本発明の特に請求項10〜12に記載の発明について、図面を参照しながら説明する。図7、図8は固体電解コンデンサ内蔵層に再配線層を有するインターポーザである。
(Embodiment 3)
Next, a solid electrolytic capacitor built-in circuit board and an interposer using the same according to the third embodiment of the present invention will be described with reference to the drawings. 7 and 8 are interposers having a rewiring layer in a solid electrolytic capacitor built-in layer.

なお、実施の形態1の構成と同様の構成を有するものについては、同一符号を付しその説明を省略する。   In addition, about the thing which has the structure similar to the structure of Embodiment 1, the same code | symbol is attached | subjected and the description is abbreviate | omitted.

本構成は固体電解コンデンサ内蔵回路基板をコア層としてビルドアップ工法によって再配線層を形成してもよいし、導電ペーストを充填したプリプレグを用いてコンデンサ内蔵回路基板と第2の配線基板とを一体化してもよい。尚、本実施の形態ではコンデンサ内蔵層の両側に再配線層を有する構造としたが、特に再配線層はコンデンサ内蔵層の両側に限定するものではなくコンデンサ内蔵層の片側のみであってもよい。   In this configuration, the rewiring layer may be formed by a build-up method using the circuit board with a solid electrolytic capacitor as a core layer, or the circuit board with a capacitor and the second wiring board are integrated using a prepreg filled with a conductive paste. May be used. In this embodiment, the rewiring layer is provided on both sides of the capacitor built-in layer. However, the rewiring layer is not limited to both sides of the capacitor built-in layer, and may be only on one side of the capacitor built-in layer. .

本構成を用いることで、表面に半導体の狭い電極間隔のルールに対応することができる。この構成によって半導体の電極端子から固体電解コンデンサまでの距離を基板の厚み方向分まで短くすることが可能なので、効率よい半導体の電源安定機能およびノイズ除去機能を有するインターポーザ基板が得られる。   By using this configuration, it is possible to deal with a rule of a narrow electrode interval of a semiconductor on the surface. With this configuration, since the distance from the semiconductor electrode terminal to the solid electrolytic capacitor can be shortened to the thickness direction of the substrate, an interposer substrate having an efficient semiconductor power supply stabilizing function and noise removing function can be obtained.

さらに図7に示すように分割された複数のコンデンサ素子を内蔵することで多電源電圧が必要な半導体に対応したインターポーザが実現できる。   Further, by incorporating a plurality of divided capacitor elements as shown in FIG. 7, an interposer corresponding to a semiconductor requiring multiple power supply voltages can be realized.

また、コンデンサ素子の両電極から独立したスルーホールを形成することで信号伝達用の配線の形成が可能である。   Further, by forming a through hole independent from both electrodes of the capacitor element, a signal transmission wiring can be formed.

(実施の形態4)
次に、本発明の実施の形態4における固体電解コンデンサ内蔵回路基板を用いた半導体パッケージについて、本発明の特に請求項13に記載の発明について図面を参照しながら説明する。図9および図10は実施の形態4の固体電解コンデンサ内蔵回路基板の表層に半導体を実装したパッケージである。この構成によって半導体の電極端子から固体電解コンデンサまでの距離を基板の厚み方向分まで短くすることが可能なので、効率よい半導体の電源安定およびノイズ除去が可能である。さらに、パッケージの内部でノイズ対策を施しているために、パッケージを実装するそれぞれのマザー基板上で必要であったノイズ対策の設計を低減できる。
(Embodiment 4)
Next, a semiconductor package using the circuit board with a built-in solid electrolytic capacitor according to Embodiment 4 of the present invention will be described with reference to the drawings. 9 and 10 show a package in which a semiconductor is mounted on the surface layer of the circuit board with a built-in solid electrolytic capacitor according to the fourth embodiment. With this configuration, since the distance from the semiconductor electrode terminal to the solid electrolytic capacitor can be shortened to the thickness direction of the substrate, it is possible to efficiently stabilize the power supply of the semiconductor and remove noise. Furthermore, since noise countermeasures are taken inside the package, the noise countermeasure design required on each mother board on which the package is mounted can be reduced.

また、基板サイズより実装する半導体14のサイズが小さい場合は、基板の中央に固体電解コンデンサを配置して信号線を基板の外側に配置することで、半導体からコンデンサまでの短配線化を行うことができる。   Further, when the size of the semiconductor 14 to be mounted is smaller than the substrate size, a solid electrolytic capacitor is disposed in the center of the substrate and the signal line is disposed outside the substrate, thereby shortening the wiring from the semiconductor to the capacitor. Can do.

以上のように、本発明にかかる固体電解コンデンサ内蔵回路基板およびそれを用いたインターポーザおよびパッケージは、ノイズ対策が重要な半導体を実装する回路基板の用途に適応できる。   As described above, the solid electrolytic capacitor built-in circuit board and the interposer and package using the same according to the present invention can be applied to the use of a circuit board on which a semiconductor in which noise countermeasures are important is mounted.

本発明の実施の形態1における固体電解コンデンサ内蔵回路基板の断面図Sectional drawing of the circuit board with a built-in solid electrolytic capacitor in Embodiment 1 of this invention 同実施の形態における固体電解コンデンサ内蔵回路基板の断面図Sectional drawing of the circuit board with a built-in solid electrolytic capacitor in the same embodiment 同実施の形態における固体電解コンデンサ内蔵回路基板の素子形成部の断面図Sectional drawing of the element formation part of the circuit board with a built-in solid electrolytic capacitor in the same embodiment 本発明の実施の形態2における固体電解コンデンサ内蔵回路基板の断面図Sectional drawing of the solid electrolytic capacitor built-in circuit board in Embodiment 2 of this invention 同実施の形態における固体電解コンデンサ内蔵回路基板の断面図Sectional drawing of the circuit board with a built-in solid electrolytic capacitor in the same embodiment 同実施の形態における固体電解コンデンサ内蔵回路基板の断面図Sectional drawing of the circuit board with a built-in solid electrolytic capacitor in the same embodiment 本発明の実施の形態3における固体電解コンデンサ内蔵回路基板の断面図Sectional drawing of the solid electrolytic capacitor built-in circuit board in Embodiment 3 of this invention 同実施の形態における固体電解コンデンサ内蔵回路基板の断面図Sectional drawing of the circuit board with a built-in solid electrolytic capacitor in the same embodiment 本発明の実施の形態4における固体電解コンデンサ内蔵回路基板の断面図Sectional drawing of the circuit board with a built-in solid electrolytic capacitor in Embodiment 4 of this invention 同実施の形態における固体電解コンデンサ内蔵回路基板の断面図Sectional drawing of the circuit board with a built-in solid electrolytic capacitor in the same embodiment

符号の説明Explanation of symbols

1 陽極(アルミニウム)
2 多孔質部
3 絶縁樹脂
4 金属層
5 固体電解層
6 陰極
7 導体
8 スルーホール
9 亜鉛層
10 ニッケル層
11 パラジウム層
12 銅めっき層
13 絶縁体
14 半導体
15 バンプ
16 酸化アルミニウム
1 Anode (aluminum)
DESCRIPTION OF SYMBOLS 2 Porous part 3 Insulating resin 4 Metal layer 5 Solid electrolytic layer 6 Cathode 7 Conductor 8 Through hole 9 Zinc layer 10 Nickel layer 11 Palladium layer 12 Copper plating layer 13 Insulator 14 Semiconductor 15 Bump 16 Aluminum oxide

Claims (13)

陽極が多孔質部を有するアルミニウム金属層、陰極が銀ペーストの層からなるシート状の固体電解コンデンサが絶縁樹脂に内蔵された固体電解コンデンサ内蔵基板であって、表層及び裏層が金属層からなり、前記陽極がスルーホールを介して前記表層と前記裏層の金属層に接続され、前記陰極が導体により前記表層の金属層に接続された固体電解コンデンサ内蔵基板。 A solid electrolytic capacitor-embedded substrate in which an anode is an aluminum metal layer having a porous part and a cathode is a silver paste layer in which a sheet-like solid electrolytic capacitor is embedded in an insulating resin. A solid electrolytic capacitor built-in substrate, wherein the anode is connected to the surface layer and the back metal layer through a through hole, and the cathode is connected to the surface metal layer by a conductor. スルーホール内壁面の陽極の断面部に第1層として亜鉛層、第2層としてニッケル層が順に形成され、さらに第3層として、前記第2層と絶縁樹脂層を含むスルーホール内壁面全体にパラジウム層が形成され、さらに第4層としてスルーホール内壁面、表層及び裏層の金属層に電解銅めっき層が形成された請求項1に記載の固体電解コンデンサ内蔵基板。 A zinc layer as a first layer and a nickel layer as a second layer are formed in this order on the cross section of the anode on the inner wall surface of the through hole, and a third layer is formed on the entire inner wall surface of the through hole including the second layer and the insulating resin layer. The substrate with a built-in solid electrolytic capacitor according to claim 1, wherein a palladium layer is formed, and further, an electrolytic copper plating layer is formed as a fourth layer on the inner wall surface, the surface layer, and the back layer of the through hole. 金属層は銅箔層である請求項1に記載の固体電解コンデンサ内蔵基板。 The substrate with a built-in solid electrolytic capacitor according to claim 1, wherein the metal layer is a copper foil layer. 導体は導電性ペースト硬化物である請求項1に記載の固体電解コンデンサ内蔵基板。 The substrate with a built-in solid electrolytic capacitor according to claim 1, wherein the conductor is a cured conductive paste. 基板内の絶縁層を貫通するスルーホールを有し、このスルーホールは前記絶縁層によって固体電解コンデンサの陰極および陽極と絶縁されていることを特徴とする請求項1に記載の固体電解コンデンサ内蔵回路基板。 2. The solid electrolytic capacitor built-in circuit according to claim 1, further comprising a through hole penetrating an insulating layer in the substrate, wherein the through hole is insulated from a cathode and an anode of the solid electrolytic capacitor by the insulating layer. substrate. 基板の表層及び裏層の金属層にニッケル層が形成されている請求項2に記載の固体電解コンデンサ内蔵基板。 The board | substrate with a built-in solid electrolytic capacitor of Claim 2 by which the nickel layer is formed in the metal layer of the surface layer and back layer of a board | substrate. 陽極の素子形成していない多孔質部に液状樹脂の硬化物からなる絶縁体が充填されている請求項1に記載の固体電解コンデンサ内蔵基板。 2. The substrate with a built-in solid electrolytic capacitor according to claim 1, wherein a porous portion of the anode where no element is formed is filled with an insulator made of a cured liquid resin. スルーホールの内部に絶縁樹脂が充填されている請求項1に記載の固体電解コンデンサ内蔵基板。 The solid electrolytic capacitor built-in substrate according to claim 1, wherein the through hole is filled with an insulating resin. スルーホールの内部に金属またはその混合物が充填されている請求項1に記載の固体電解コンデンサ内蔵基板。 The solid electrolytic capacitor built-in substrate according to claim 1, wherein the through hole is filled with a metal or a mixture thereof. 請求項1から9のいずれか一つに記載の固体電解コンデンサ内蔵基板に再配線層を有するインターポーザ。 The interposer which has a rewiring layer in the board | substrate with a built-in solid electrolytic capacitor as described in any one of Claim 1 to 9. 固体電解コンデンサから半導体の複数の電源端子に対応する構造である請求項10に記載のインターポーザ。 The interposer according to claim 10, which has a structure corresponding to a plurality of power terminals of a semiconductor from a solid electrolytic capacitor. 固体電解コンデンサを複数個内蔵し、それぞれ陽極が電気的に分離されて独立した電源電圧に対応する構造である請求項11に記載のインターポーザ。 12. The interposer according to claim 11, wherein a plurality of solid electrolytic capacitors are incorporated, and the anodes are electrically separated from each other to correspond to independent power supply voltages. 請求項10から12のいずれか一つに記載のインターポーザに半導体素子を搭載してなることを特徴とする半導体パッケージ。 13. A semiconductor package comprising a semiconductor element mounted on the interposer according to any one of claims 10 to 12.
JP2006076320A 2006-03-20 2006-03-20 Circuit substrate with built-in solid electrolytic capacitor, interposer using it and package Pending JP2007251101A (en)

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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114365249A (en) * 2019-08-27 2022-04-15 株式会社村田制作所 Capacitor, connection structure, and method for manufacturing capacitor
WO2023286484A1 (en) * 2021-07-16 2023-01-19 株式会社村田製作所 Capacitor
WO2024009824A1 (en) * 2022-07-06 2024-01-11 株式会社村田製作所 Solid electrolytic capacitor and capacitor array

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114365249A (en) * 2019-08-27 2022-04-15 株式会社村田制作所 Capacitor, connection structure, and method for manufacturing capacitor
WO2023286484A1 (en) * 2021-07-16 2023-01-19 株式会社村田製作所 Capacitor
TWI831226B (en) * 2021-07-16 2024-02-01 日商村田製作所股份有限公司 capacitor
WO2024009824A1 (en) * 2022-07-06 2024-01-11 株式会社村田製作所 Solid electrolytic capacitor and capacitor array

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