JP2007242982A - Manufacturing method of semiconductor device, semiconductor manufacturing apparatus and semiconductor-manufacturing system - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To restrain defective fraction of a semiconductor device caused by moisture absorption of a low dielectric film used as a layer insulating film material. <P>SOLUTION: When a metal interconnection is formed by using a damascine method in a layer insulating film comprising a low dielectric film, determination of a semiconductor substrate is carried out based on waiting time among processes and humidity of storage environment, and fraction defective is managed by promoting only a semiconductor substrate determined as non-defective to a next process. A semiconductor substrate determined as defective is returned to its original manufacturing process again through another process for removing absorbed moisture or is eliminated from the manufacturing process. A semiconductor device with little moisture absorption amount is manufactured, by consistently carrying out a manufacturing process suitable for removing moisture absorbed to the low dielectric film and baking. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a manufacturing technique of a semiconductor device, and more particularly to a technique effective when applied to the manufacture of a semiconductor device in which a metal wiring is formed using a damascene method in an interlayer insulating film including a low dielectric constant film. is there.

  Of the recent semiconductor manufacturing processes, in the wiring formation process, Cu (copper) wiring is formed by a damascene method. Formation of the Cu wiring by the damascene method is performed by the following method, for example.

  First, as shown in FIG. 6, a barrier film 101, an interlayer insulating film 102, and a cap film 103 are deposited on the semiconductor substrate 100. Although not shown, a semiconductor element 100 (not shown) such as a MOS transistor and a lower layer wiring are formed on the semiconductor substrate 100 below the barrier film 101.

  Conventionally, a silicon oxide-based or silicon nitride-based insulating film has been used for the interlayer insulating film 102. However, when forming a Cu wiring by the damascene method, a fluorine-containing silicon oxide is used to reduce the capacitance between the wirings. Insulating films having a dielectric constant lower than that of silicon nitride films, such as organic insulating films, porous insulating films, and laminated films thereof, in addition to inorganic insulating films such as films and carbon-containing silicon oxide films. (Referred to as non-patent document 1 and non-patent document 2).

  Next, as shown in FIG. 7, an antireflection film 104 and a first photoresist film 105 are formed on the cap film 103, and the cap film 103 and the interlayer are formed by well-known dry etching using the photoresist film 105 as a mask. A hole 106 is formed in the insulating film 102. Next, after removing the photoresist film 105 and the antireflection film 104, an antireflection film 107 and a second photoresist film 108 are formed on the cap film 103 as shown in FIG. A trench 109 is formed in the cap film 103 and the interlayer insulating film 102 by dry etching using the mask 108 as a mask.

Next, after removing the photoresist film 108 and the antireflection film 107, the barrier film 101 at the bottom of the hole 106 is dry-etched using the cap film 103 as a mask as shown in FIG. Lower layer wiring (not shown) is exposed. Next, as shown in FIG. 10, a Cu film 110 is formed on the cap film 103 by using a sputtering method, a CVD method, a plating method, or the like, and the Cu film 110 is embedded in the trench 109 and the hole 106. Thereafter, unnecessary Cu film 110 on cap film 103 is removed by a chemical mechanical polishing method, thereby forming Cu wiring 110a inside trench 109 and hole 106, as shown in FIG. Thereafter, a plurality of Cu wirings are sequentially formed in the upper layer of the Cu wiring 110a by repeating the same process as described above.
M. Tada, et al., Proc. IITC 2002, p.12 (2002) K. Higashi, et al., Proc. IITC 2002, p.15 (2002)

  A low dielectric constant film used as an interlayer insulating film material is characterized by higher hygroscopicity than existing materials (silicon oxide film, silicon nitride film) due to its composition and structure. On the other hand, the antireflection film and the barrier film laminated on the low dielectric constant film in the Cu wiring formation process are denser and have lower gas permeability than the low dielectric constant film. For this reason, it is known that moisture taken into the low dielectric constant film is trapped in the film and causes corrosion of the Cu wiring. Further, the present inventors have clarified that moisture desorbed from the film during etching of the low dielectric constant film fluctuates the etching characteristics, and causes, for example, an opening defect in hole processing. Thus, moisture absorption of the low dielectric constant film becomes a factor that reduces the manufacturing yield of the semiconductor device.

  However, in a semiconductor manufacturing process, cleaning of a semiconductor wafer (hereinafter referred to as a wafer) using pure water or a chemical solution is performed in many processes. In addition to this, in the Cu wiring formation process by the damascene method, chemical mechanical polishing of the Cu film using a chemical solution is performed, so that it is difficult to sufficiently suppress the moisture absorption of the low dielectric constant film.

  Also, the amount of moisture absorbed by the low dielectric constant film varies greatly depending on various factors. For example, a wafer may be heated in an insulating film deposition process or a photolithography process, and moisture is desorbed from the film at that time. Further, since the low dielectric constant film absorbs moisture in the atmosphere, the amount of moisture absorption varies depending on the length of time the wafer is stored in the atmosphere. Furthermore, when another film having low gas permeability is laminated on the low dielectric constant film, the time until moisture in the atmosphere is absorbed by the low dielectric constant film becomes long.

  In semiconductor manufacturing facilities, a plurality of types of semiconductor products are often manufactured in parallel at the same time. Therefore, a plurality of wafers having different processing steps and processing conditions are processed simultaneously. Therefore, the wafer processing schedule becomes complicated, and even for wafers of the same semiconductor product, the storage time between processing steps is not always the same.

  For these reasons, a new management method is required to manage the defect occurrence rate due to moisture absorption of the low dielectric constant film and to assure the quality of the semiconductor device.

  An object of the present invention is to provide a technique capable of effectively reducing the occurrence rate of defects due to moisture absorption of a low dielectric constant film.

  The above and other objects and novel features of the present invention will be apparent from the description of this specification and the accompanying drawings.

  Of the inventions disclosed in the present application, the outline of typical ones will be briefly described as follows.

  The method of manufacturing a semiconductor device according to the present invention includes: (a) a step of forming an insulating film including a low dielectric constant film on a main surface of a plurality of semiconductor substrates; and (b) dry etching using a photoresist film as a mask. Forming a trench and a hole in the insulating film; (c) embedding a metal film on the insulating film including the inside of the trench and hole; and (d) forming the metal film on the insulating film with a chemical machine. Forming a wiring made of the metal film inside the trench and the hole by polishing, and after the completion of the step (a), the step (b), the step (c) or the step (d) The time elapsed until the start of the measurement is measured, the semiconductor substrate in which the time is greater than or equal to a predetermined value, and the semiconductor substrate in which the time is less than a predetermined value are selected, and the time is less than the predetermined value That only the semiconductor substrate is intended to proceed to the next step.

  Among the inventions disclosed in the present application, effects obtained by typical ones will be briefly described as follows.

  In a semiconductor device in which a metal wiring is formed on an interlayer insulating film including a low dielectric constant film by using a damascene method, the defect occurrence rate of the semiconductor device due to moisture absorption of the low dielectric constant film can be suppressed, so that the manufacturing yield of the semiconductor device improves.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. Note that components having the same function are denoted by the same reference symbols throughout the drawings for describing the embodiment, and the repetitive description thereof will be omitted.

(Embodiment 1)
FIG. 1 is a flowchart showing a wiring forming process according to the first embodiment of the present invention. Note that FIG. 1 shows only a process of forming a single layer of wiring. However, in an actual semiconductor device manufacturing process, a plurality of layers of wiring are formed by repeating the flow shown in FIG. Should be noted.

  1 includes an insulating film deposition step (301) for depositing an insulating film including a low dielectric constant film on a wafer, and a lithography step (exposure and development) by applying a photoresist film on the insulating film. 302), etching using the photoresist film as a mask, an insulating film etching step (303) for forming holes and trenches in the insulating film, and chemical mechanical polishing by embedding a Cu film inside the holes and trenches Metal embedding step (304). The method for forming the Cu wiring by the damascene method has been described with reference to FIGS. 7 to 12, and therefore, overlapping portions will not be described repeatedly.

  The processing apparatus used in each processing step shown in FIG. 1 is connected to the production control apparatus 200 via a signal line 201, and is instructed by the production control apparatus 200 among a plurality of preset processing conditions. The wafer is processed according to the processing conditions. The production control apparatus 200 is composed of, for example, a large computer (server), and inputs information necessary for processing wafers, such as processing steps and processing conditions for a plurality of wafers distinguished by different identification codes, in advance. Has been. When the wafer processing is completed, the processing apparatus transmits wafer processing information including a processing start time, a processing end time, a processing error occurrence status, and the like to the production control apparatus 200.

  The processed wafer is taken out from the processing apparatus and mounted on the transfer means. The production control device 200 instructs the processing device for the next process to the transfer means on which the wafer is mounted. The transfer means that has received an instruction from the production control apparatus 200 moves the wafer to the receiving port of the processing apparatus indicated by the production control apparatus 200. When the wafer arrives at the receiving port, the processing apparatus transmits the identification code of the wafer to the production control apparatus 200 and inquires about the processing conditions.

  On the other hand, the production control apparatus 200 performs wafer defect determination based on the processing result received from the processing apparatus of the previous process and the wafer processing history recorded in advance. That is, when the wafer reaches the receiving port of the processing apparatus of the next process, and subsequently the identification code of the wafer is read and transmitted to the production control apparatus 200, the production control apparatus 200 determines the defect of the wafer. . If the determination result is good, the processing condition inquired is searched from the processing conditions input in advance, and the processing apparatus is instructed to start processing according to the corresponding processing condition. On the other hand, if the determination result is defective, an instruction is given to exclude the wafer from the processing process.

  The purpose of the defect determination is to manage the moisture absorption amount of the low dielectric constant film formed on the wafer below a certain amount. Therefore, the relationship between the moisture absorption amount of the low dielectric constant film as shown in FIG. 2 and the defect occurrence rate is calculated in advance, and the defect determination is performed based on the moisture absorption amount at which the defect occurrence rate is below a certain level.

  Since the wafer is exposed to the atmosphere while being transferred from one processing step to the next processing step by the transfer means or during storage, the low dielectric constant film on the wafer absorbs moisture in the air. In addition, since cleaning using pure water or a chemical solution is performed during the treatment process, the low dielectric constant film absorbs moisture. However, even for wafers that are processed in the same processing process, the exposure time to the atmosphere varies from wafer to wafer depending on the idle time of the processing apparatus and the priority of the wafer. In addition, depending on the processing steps, since another insulating film or a photoresist film is laminated on the low dielectric constant film where moisture absorption occurs, it is difficult to directly measure the moisture absorption amount of the low dielectric constant film.

  Therefore, the relationship between the elapsed time between processing steps and the amount of moisture absorbed by the low dielectric constant film is calculated in advance, and a wafer whose elapsed time between processing steps exceeds the reference value is regarded as defective. Keep the amount below a certain amount. For example, in the process shown in FIG. 1, the failure determination is performed by measuring the elapsed time from the end of the insulating film deposition process or the lithography process to the start of the insulating film etching process or before the start of the metal filling process. As a result, it is possible to process only the wafer in which the quality variation due to the moisture absorption variation is suppressed in the next processing step.

  In addition, the reference value is calculated based on the humidity of the environment in which the wafer is transferred and stored, and the transfer and storage time, and the moisture absorption amount of the low dielectric constant film is kept constant by making the wafer that exceeds this reference value defective. It can also be suppressed below the amount. Usually, in a semiconductor manufacturing facility, a plurality of wafers are accommodated in a container (stocker) and transferred and stored. Therefore, by installing a hygrometer in the container (stocker), the humidity of the environment in which the wafer is transferred and stored can be measured.

  When the wafer is in another processing step preceding the processing step in which the wafer is determined to be defective, the production control apparatus 200 sequentially predicts the result of the failure determination from the processing history of the wafer and the subsequent processing steps that have been input. You can also. Based on this prediction, the wafer processing order in the subsequent processing steps is changed so that the wafer does not become defective.

  Description will be made using three wafers W1, W2, and W3 processed using the first processing apparatus and the second processing apparatus shown in FIG. In the first processing apparatus (for example, lithography apparatus) and the second processing apparatus (for example, etching apparatus), the processing is performed in the order of wafers W1, W2, and W3. Assume that wafers W2 and W3 are predicted to be defective. In the second processing apparatus and the subsequent processing apparatuses, it is assumed that when the processing proceeds in the order of wafers W3, W2, and W1, it is predicted that all the wafers (W1 to W3) are good.

  In this case, the production control apparatus 200 sequentially processes the three wafers (W1 to W3) by the first processing apparatus, then stores the wafers W1 and W2 in the wafer storage, and preferentially only the wafer W3 is the second. The conveying means is instructed to convey to the processing apparatus. In addition, the production control apparatus 200 instructs the transfer unit to transfer the wafers (W1 and W2) stored in the wafer storage to the second processing apparatus in the order of the wafers W2 and W1. As described above, by appropriately changing the wafer processing order based on the prediction of the defect determination result, the ratio of wafers determined to be defective can be reduced.

  As a method for processing a wafer determined to be defective by the defect determination, in addition to removing the wafer from the production line, another process can be performed to return the wafer to the production line. A specific example is shown with reference to FIG. FIG. 4 shows a case where the first defect determination is performed after the lithography process, and the second defect determination is performed after the metal filling process.

  First, the photoresist film is removed from the wafer determined to be defective in the first defect determination, and then the baking process is performed to remove moisture from the low dielectric constant film. Considering the heat resistance of the wafer, the baking temperature is preferably 100 ° C to 400 ° C. The wafer subjected to the baking process is handled in the same manner as the wafer after the insulating film deposition process and is transferred to the lithography process. When a defect is determined for a wafer returned to the production line, the elapsed time between processing steps is not after the insulating film deposition step is completed but after the baking step is completed.

  Similarly, the wafer determined to be defective in the second defect determination is baked to remove moisture from the low dielectric constant film. The wafer that has been baked is handled in the same manner as a wafer that is determined to be good in the second defect determination, and is returned to the production line. As described above, the number of wafers determined to be defective in a later process is reduced by performing processing different from that of a wafer determined to be good on the wafer determined to be defective and then returning to the original processing process. It becomes possible.

  As a determination criterion used for defect determination, for example, as shown in Equation 1, a conversion elapsed time obtained by multiplying a waiting time between processing steps by a weighting factor can be used. In Equation 1, i indicates a processing step.

Elapsed conversion time = Σi (waiting time between processing steps (i) x weighting coefficient (i)) (Equation 1)
The reason why the weighting is necessary is that, even if the waiting time between the processing steps is the same, the moisture absorption speed of the wafer differs depending on the content of the immediately preceding processing step. For example, in the lithography process, since the wafer is immersed in an aqueous solution or heated, moisture absorption from the end of the insulating film deposition process to the start of the lithography process can be ignored. Further, since the wafer surface is covered with the photoresist film from the end of the lithography process to the start of the insulating film etching process, it takes a relatively long time to absorb the low dielectric constant film. On the other hand, after the insulating film etching step is completed, the low dielectric constant film is exposed inside the hole and the trench, so that moisture absorption progresses in a short time. When the low dielectric constant film is damaged when the photoresist film is removed by ashing, moisture absorption further progresses in a shorter time. On the other hand, after completion of the metal filling step, the Cu film is buried in the holes and trenches, so that moisture absorption does not progress in a short time. For this reason, it is possible to perform a failure determination that more accurately reflects the amount of moisture absorbed by the low dielectric constant film by increasing the weight in a process step where moisture absorption progresses quickly and decreasing the weight in a process step where progress is slow. Become.

  In addition to the difference in moisture absorption rate depending on the contents of the processing steps, the above weighting coefficient may reflect the difference in the environment in which the wafer is transferred and stored. That is, the semiconductor manufacturing facility is managed so as to keep the humidity and temperature in the clean room constant, but the humidity is not always constant when viewed locally, for example, in the vicinity of a processing apparatus using a chemical solution. . Therefore, for example, as shown in Formula 2, it is possible to perform more accurate defect determination by using the converted elapsed time reflecting the humidity of the environment in which the wafer is transported and stored.

Elapsed conversion time = Σi (waiting time between processes (i) x weighting coefficient (i) x measured humidity (i) ÷ reference humidity) (Equation 2)
Equation 2 means that the weighting coefficient increases when the measured humidity is higher than the reference humidity, and the weighting coefficient decreases when the measured humidity is lower than the reference humidity. In order to measure the humidity of the environment in which wafers are transferred and stored, for example, the humidity in a storage room for temporarily storing wafers and the humidity in a container (stocker) used for transferring and storing wafers are measured. That's fine.

  As described above, according to the present embodiment, it is possible to suppress the occurrence of defects in the semiconductor device due to the moisture absorption of the low dielectric constant film, thereby improving the manufacturing yield of the semiconductor device using the low dielectric constant film as the interlayer insulating film material. be able to.

(Embodiment 2)
In order to remove moisture absorbed in the low dielectric constant film, it is effective to bake the wafer as described above. However, when the waiting time from the baking process to the next process is long, the wafer again absorbs moisture. As a countermeasure, it is effective to perform the baking process and the process of the next process as one consistent processing process and fix the waiting time after the baking process in a short time.

  FIG. 5 is a flowchart showing a wiring forming process to which baking is applied. Although there is no particular limitation, here, the insulating film etching process and the baking process are performed as one consistent processing process, and the insulating film deposition process and the baking process after the metal filling process are performed as one consistent processing process.

  In order to make the insulating film etching process and the baking process one consistent process, the transfer path between the baking apparatus and the etching apparatus is set to a vacuum environment. As a result, moisture absorption from the environment in which the wafer is transferred can be reliably suppressed. In the insulating film etching process, since the wafer is processed in a vacuum chamber, moisture in the low dielectric constant film is desorbed, and the etching characteristics may be changed. Therefore, performing the baking process immediately before the insulating film etching step also has an effect of stabilizing the etching characteristics. In the insulating film etching step, since a photoresist film is formed on the wafer, the baking process is performed at a temperature considering the heat resistance of the photoresist film. For example, in the case of an ArF photoresist film, it is desirable to perform the baking process at a temperature of 200 ° C. or lower.

  The insulating film deposition step after the metal burying step is a step of depositing an interlayer insulating film for forming the second-layer Cu wiring on the Cu wiring completed by the metal burying step. The interlayer insulating film deposited in the insulating film deposition step includes a barrier film, a low dielectric constant film, and a cap film (see FIG. 6). Of these insulating films, a material having low gas permeability is generally used for the cap film deposited on the low dielectric constant film. Therefore, the insulating film deposited in the insulating film deposition process after the metal burying process confines moisture absorbed in the lower interlayer insulating film in the film and causes corrosion of the Cu wiring. Therefore, by consistently performing the insulating film deposition process and the baking process after the metal filling process, the moisture absorbed in the lower interlayer insulating film is reduced, so that corrosion of the Cu wiring can be suppressed.

  As mentioned above, the invention made by the present inventor has been specifically described based on the embodiment. However, the present invention is not limited to the embodiment, and various modifications can be made without departing from the scope of the invention. Needless to say.

  The present invention is used in a semiconductor device in which metal wiring is formed in an interlayer insulating film including a low dielectric constant film.

It is a flowchart which shows an example of the wiring formation process which is one embodiment of this invention. It is a graph which shows the relationship between the moisture absorption of a low dielectric constant film | membrane, and defect incidence. It is a flowchart which shows another example of the wiring formation process which is one embodiment of this invention. It is a flowchart which shows another example of the wiring formation process which is one embodiment of this invention. It is a flowchart which shows another example of the wiring formation process which is one embodiment of this invention. It is sectional drawing which shows the formation method of Cu wiring by the damascene method. FIG. 7 is a cross-sectional view illustrating a method for forming a Cu wiring by a damascene method following FIG. 6. FIG. 8 is a cross-sectional view illustrating a method for forming a Cu wiring by a damascene method following FIG. 7. It is sectional drawing which shows the formation method of Cu wiring by the damascene method following FIG. It is sectional drawing which shows the formation method of Cu wiring by the damascene method following FIG. It is sectional drawing which shows the formation method of Cu wiring by the damascene method following FIG.

Explanation of symbols

100 Semiconductor substrate 101 Barrier film 102 Interlayer insulating film 103 Cap film 104 Antireflection film 105 Photoresist film 106 Hole 107 Antireflection film 108 Photoresist film 109 Trench 110 Cu film 110a Cu wiring 200 Production control device 201 Signal line

Claims (16)

(A) forming an insulating film including a low dielectric constant film on a main surface of a plurality of semiconductor substrates;
(B) forming a trench and a hole in the insulating film by dry etching using a photoresist film as a mask;
(C) burying a metal film on the insulating film including the inside of the trench and hole;
(D) forming a wiring made of the metal film inside the trench and hole by chemical mechanical polishing the metal film on the insulating film;
A method of manufacturing a semiconductor device including:
Measuring the time elapsed from the end of the step (a) to the start of the step (b), step (c) or step (d), the semiconductor substrate having the time equal to or greater than a predetermined value; A method of manufacturing a semiconductor device, wherein the semiconductor substrate having a time less than a predetermined value is selected, and only the semiconductor substrate having the time less than a predetermined value is advanced to the next process.   The humidity of the space where the semiconductor substrate is exposed during the period from the end of the step (a) to the start of the step (b), step (c) or step (d) is measured. The semiconductor substrate having a value calculated based on the above is a predetermined value or more and the semiconductor substrate having the value less than the predetermined value are selected, and only the semiconductor substrate having the value less than the predetermined value is selected. The method for manufacturing a semiconductor device according to claim 1, wherein the method proceeds to the next step.   After the step (a) is completed, the time elapsed from the completion of the step (a) until the formation of the photoresist film is equal to or greater than a predetermined value. After removing the photoresist film, the semiconductor substrate is baked. 2. The method of manufacturing a semiconductor device according to claim 1, wherein a photoresist film is formed again.   The semiconductor substrate in which the converted elapsed time obtained by multiplying the time by a weighting factor and accumulated is a predetermined value or more and the semiconductor substrate in which the converted elapsed time is less than a predetermined value are selected. 2. A method of manufacturing a semiconductor device according to 1.   5. The method of manufacturing a semiconductor device according to claim 4, wherein the weighting coefficient reflects a difference in moisture absorption rate depending on a content of a processing step.   5. The method of manufacturing a semiconductor device according to claim 4, wherein the weighting factor reflects a difference in moisture absorption rate depending on a content of a processing step and a difference in environment in which the semiconductor substrate is transported and stored. .   2. The method of manufacturing a semiconductor device according to claim 1, further comprising a step of baking the semiconductor substrate immediately before the step (b), the step (c), or the step (d).   8. The method of manufacturing a semiconductor device according to claim 7, wherein a transfer path of the semiconductor substrate between the baking process and a process immediately after the baking process is set to a vacuum environment. (A) an apparatus for forming an insulating film including a low dielectric constant film on a main surface of a plurality of semiconductor substrates;
(B) an apparatus for forming trenches and holes in the insulating film by dry etching using a photoresist film as a mask;
(C) an apparatus for embedding a metal film on the insulating film including the inside of the trench and hole;
(D) an apparatus for forming a wiring made of the metal film inside the trench and the hole by chemical mechanical polishing the metal film on the insulating film;
(E) A semiconductor manufacturing apparatus including means for measuring a time elapsed from the end of the step (a) to the start of the step (b), the step (c) or the step (d).   The apparatus further includes means for measuring the humidity of the space where the semiconductor substrate is exposed between the end of the step (a) and the start of the step (b), step (c) or step (d). The semiconductor manufacturing apparatus according to claim 9.   11. The semiconductor manufacturing apparatus according to claim 10, wherein the means for measuring the humidity of the space to which the semiconductor substrate is exposed is installed in a container used for transporting and storing the semiconductor substrate.   The semiconductor manufacturing apparatus according to claim 9, wherein the apparatus (b), the apparatus (c), or the apparatus (d) is provided with an apparatus for baking the semiconductor substrate.   13. The semiconductor manufacturing apparatus according to claim 12, wherein a transport path of the semiconductor substrate between the apparatus (b), the apparatus (c) or the apparatus (d) and the baking apparatus is a vacuum environment. (A) forming an insulating film including a low dielectric constant film on a main surface of a plurality of semiconductor substrates;
(B) forming a trench and a hole in the insulating film by dry etching using a photoresist film as a mask;
(C) burying a metal film on the insulating film including the inside of the trench and hole;
(D) forming a wiring made of the metal film inside the trench and hole by chemical mechanical polishing the metal film on the insulating film;
(E) The semiconductor substrate in which the time elapsed from the end of the step (a) to the start of the step (b), step (c) or step (d) is a predetermined value or more, and the time is predetermined. A control system for selecting the semiconductor substrate that is less than the value of
Semiconductor manufacturing system equipped with.   15. The semiconductor manufacturing method according to claim 14, wherein the control system predicts the sorting result in advance, and changes the processing order of the plurality of semiconductor substrates so that the predicted result becomes a desired result. system.   Means for measuring the humidity of the space where the semiconductor substrate is exposed between the end of the step (a) and the start of the step (b), step (c) or step (d); 15. The semiconductor substrate having a value calculated based on humidity and the time being equal to or greater than a predetermined value and the semiconductor substrate having the value less than a predetermined value are selected. Semiconductor manufacturing system.

Images