JP2007232945A - Display device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a display device capable of reducing electrostatic surge input externally without degrading a high speed video signal. <P>SOLUTION: This display device comprises a connector, a display part, and four surge absorbing circuits which are connected to the connector via the respective first transmission lines and also connected to the display part via the respective second transmission lines. Each of the four surge absorbing circuits comprises: (a) a first inductor with one end connected to the first transmission line; (b) a second inductor having one end connected to the other end of the first inductor and the other end connected to the second transmission line and is magnetically coupled to the first inductor; and (c) a surge absorbing element having one end connected to the other end of the first inductor and to one end of the second inductor, and having the other end connected to the ground terminal. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a display device.

Display devices for computers and television receivers are known. The display device includes a connector for connection with a computer main body, a television receiver, or the like (for example, Patent Documents 1 to 3).
Japanese Patent Laid-Open No. 7-5486 JP-A-8-87002 JP 2001-242800 A

  However, when the display device is not connected to a computer main body or a television receiver, an electrostatic surge is input from the outside through the connector, and the internal circuit element may be destroyed by the electrostatic surge. is there.

  As a countermeasure against the electrostatic surge, it is conceivable to use a surge absorbing element such as a varistor. However, surge absorbing elements such as varistors have stray capacitance components and stray inductive components. Therefore, when a surge absorbing element is applied to a display device that handles high-speed video signals, the video signals are degraded.

  Accordingly, an object of the present invention is to provide a display device capable of reducing an electrostatic surge input from the outside without degrading a high-speed video signal.

  The first display device of the present invention is provided between the connector, the display unit, and the connector and the display unit, and is connected to the connector via the first transmission line, respectively, and the second display device. And N surge absorbing circuits (N is an integer of 1 or more) connected to the display unit through a transmission line. Each of the N surge absorbing circuits includes: (a) a first inductor having one end connected to the first transmission line; (b) one end connected to the other end of the first inductor; A second inductor having an other end connected to the transmission line and electromagnetically coupled to the first inductor so as to increase inductance with each other; and (c) the other end of the first inductor. And a surge absorbing element having one end connected to one end of the second inductor and the other end connected to the ground terminal.

  Since the surge absorbing circuit of the first display device has a surge absorbing element excellent in reducing electrostatic surge, electrostatic surge can be reduced. Further, according to the surge absorbing circuit, since the first inductor and the second inductor that are electromagnetically coupled are provided, the first inductor and the second inductor are maintained so as to maintain a constant input impedance over a wide band. It is possible to set a coupling coefficient with the second inductor. Furthermore, according to this surge absorbing circuit, the stray capacitance component of the surge absorbing element is matched so that the input impedance of the surge absorbing circuit matches the characteristic impedance of the first transmission line and the characteristic impedance of the second transmission line. On the other hand, it is possible to set the inductance of the first inductor and the inductance of the second inductor. Therefore, this surge absorbing circuit is excellent in reducing electrostatic surges and enables impedance matching over a wide band. Therefore, the 1st display device provided with this surge absorption circuit can reduce the electrostatic surge input from the outside via a connector, without degrading a high-speed video signal.

  The second display device of the present invention is provided between the connector, the display unit, and the connector and the display unit, and is connected to the connector via the first transmission line, respectively. And N surge absorbing circuits (N is an integer of 1 or more) connected to the display unit through a transmission line. Each of the N surge absorption circuits further includes a capacitive element provided between one end of the first inductor and the other end of the second inductor, in addition to the surge absorption circuit included in the first display device. is doing.

  According to the surge absorbing circuit of the second display device, the coupling coefficient between the first inductor and the second inductor and the capacitance value of the capacitive element can be set so as to keep the input impedance constant over a wide band. Is possible. Furthermore, according to this surge absorbing circuit, the stray capacitance component of the surge absorbing element is matched so that the input impedance of the surge absorbing circuit matches the characteristic impedance of the first transmission line and the characteristic impedance of the second transmission line. In contrast, it is possible to set the respective inductances and coupling coefficients of the first inductor and the second inductor.

  Further, even when it is necessary to consider the floating inductive component of the surge absorbing element, negative induction that cancels the floating inductive component of the surge absorbing element by electromagnetic coupling between the first inductor and the second inductor. Ingredients can be obtained. Furthermore, each of the first inductor and the second inductor is such that the input impedance matches the characteristic impedance of the first transmission line and the characteristic impedance of the second transmission line and is kept constant over a wide band. The inductance, coupling coefficient, and capacitance value of the capacitive element can be set. Therefore, the second display device including the surge absorbing circuit can reduce electrostatic surge input from the outside through the connector without degrading a high-speed video signal.

  The third display device of the present invention is provided between the connector, the display unit, the connector and the display unit, and is connected to the connector via the first transmission line, respectively, and the second display device. And N surge absorbing circuits (N is an integer of 1 or more) connected to the display unit via a transmission line. Each of the N surge absorption circuits includes: (a) a first inductor having one end connected to the first transmission line; (b) one end connected to the other end of the first inductor; A second inductor having the other end connected to the transmission line; and (c) one end connected to the other end of the first inductor and one end of the second inductor, and the other end connected to the ground terminal. And (d) a capacitive element provided between one end of the first inductor and the other end of the second inductor.

  Since the surge absorbing circuit of the third display device has a surge absorbing element excellent in reducing electrostatic surge, it is possible to reduce electrostatic surge. Further, according to this surge absorbing circuit, it is possible to set the capacitance value of the capacitive element so as to keep the input impedance constant over a wide band. Furthermore, according to this surge absorbing circuit, the stray capacitance component of the surge absorbing element is matched so that the input impedance of the surge absorbing circuit matches the characteristic impedance of the first transmission line and the characteristic impedance of the second transmission line. On the other hand, it is possible to set the inductance of the first inductor and the inductance of the second inductor. Therefore, this surge absorbing circuit is excellent in reducing electrostatic surges and enables impedance matching over a wide band. Therefore, the third display device including the surge absorbing circuit can reduce electrostatic surge input from the outside through the connector without degrading the high-speed video signal.

  The fourth display device of the present invention is provided between the connector, the display unit, and the connector and the display unit, and is connected to the connector via the pair of first transmission lines, respectively. N surge absorbing circuits (N is an integer of 1 or more) connected to the display unit via the second transmission line. Each of the N surge absorption circuits includes: (a) a first inductor having one end connected to one first transmission line of the pair of first transmission lines; and (b) other than the first inductor. One end connected to one end and the other end connected to one second transmission line of the pair of second transmission lines, and electromagnetically with the first inductor so as to increase inductance with each other. A second inductor coupled; (c) a third inductor having one end connected to the other first transmission line of the pair of first transmission lines; and (d) other third inductor. One end connected to the other end and the other end connected to the other second transmission line of the pair of second transmission lines, and electromagnetically with the third inductor so as to increase the inductance to each other. Combined fourth inda And (e) a first surge absorbing element having one end connected to the other end of the first inductor and one end of the second inductor and the other end connected to the ground terminal, and (f) a third A second surge absorbing element having one end connected to the other end of the inductor and one end of the fourth inductor and the other end connected to the ground terminal.

  Since the surge absorbing circuit of the fourth display device has the first surge absorbing element and the second surge absorbing element that are excellent in reducing electrostatic surge, electrostatic surge can be reduced. In addition, according to the surge absorbing circuit, the first inductor and the second inductor coupled electromagnetically are provided, and the third inductor and the fourth inductor coupled electromagnetically are provided. Therefore, the coupling coefficient between the first inductor and the second inductor and the coupling coefficient between the third inductor and the fourth inductor can be set so that the input impedance is kept constant over a wide band. It is. Furthermore, according to this surge absorbing circuit, the first impedance so as to match the input impedance of the surge absorbing circuit with the characteristic impedance of the pair of first transmission lines and the characteristic impedance of the pair of second transmission lines. The inductance of the first inductor and the inductance of the second inductor can be set for the stray capacitance component of the surge absorbing element, and the third inductor can be set for the stray capacitance component of the second surge absorbing element. And the inductance of the fourth inductor can be set. Therefore, this surge absorbing circuit is excellent in reducing electrostatic surges and enables impedance matching over a wide band. Therefore, the fourth display device including the surge absorbing circuit can reduce electrostatic surge input from the outside through the connector without degrading the high-speed differential video signal.

  The fifth display device of the present invention is provided between the connector, the display unit, the connector and the display unit, and is connected to the connector via a pair of first transmission lines, and each pair N surge absorbing circuits (N is an integer of 1 or more) connected to the display unit via the second transmission line. Each of the N surge absorbing circuits includes a first capacitive element provided between one end of the first inductor and the other end of the second inductor in addition to the surge absorbing circuit included in the fourth display device. And a second capacitive element provided between one end of the third inductor and the other end of the fourth inductor.

  According to the surge absorbing circuit of the fifth display device, the coupling coefficient between the first inductor and the second inductor, the third inductor and the fourth inductor, so as to keep the input impedance constant over a wide band. The coupling coefficient, the capacitance value of the first capacitance element, and the capacitance value of the second capacitance element can be set. Furthermore, according to this surge absorption circuit, the first impedance so as to match the input impedance of the surge absorption circuit with the characteristic impedance of the pair of first transmission lines and the characteristic impedance of the pair of second transmission lines. With respect to the stray capacitance component of the surge absorber and the stray capacitance component of the second surge absorber, the inductances of the first inductor, the second inductor, the third inductor, and the fourth inductor, It is possible to set the coupling coefficient between the inductor and the second inductor and the coupling coefficient between the third inductor and the fourth inductor.

  Further, even when it is necessary to consider the floating inductive component of the first surge absorbing element and the second surge absorbing element, the first inductor and the second inductor can be coupled to each other by the electromagnetic coupling. A negative inductive component that cancels the floating inductive component of the surge absorbing element can be obtained, and a negative inductive component that cancels the floating inductive component of the second surge absorbing element is obtained by electromagnetic coupling between the third inductor and the fourth inductor. A sex-inducing component can be obtained. Further, the first inductor and the second inductor are matched so that the input impedance matches the characteristic impedance of the pair of first transmission lines and the characteristic impedance of the pair of second transmission lines and is kept constant over a wide band. It is possible to set the inductance and coupling coefficient of each inductor, the inductance and coupling coefficient of each of the third and fourth inductors, and the capacitance values of the first and second capacitive elements. It is. Therefore, the fifth display device including the surge absorbing circuit can reduce electrostatic surge input from the outside through the connector without degrading high-speed differential video signals.

  The sixth display device of the present invention is provided between the connector, the display unit, and the connector and the display unit, and is connected to the connector via a pair of first transmission lines, respectively. N surge absorbing circuits (N is an integer of 1 or more) connected to the display unit via the second transmission line. Each of the N surge absorption circuits includes: (a) a first inductor having one end connected to one first transmission line of the pair of first transmission lines; and (b) other than the first inductor. A second inductor having one end connected to the end and the other end connected to one second transmission line of the pair of second transmission lines; and (c) the other of the pair of first transmission lines. A third inductor having one end connected to the first transmission line; and (d) one end connected to the other end of the third inductor and the other second transmission line in the pair of second transmission lines. A fourth inductor having a connected other end; and (e) a first inductor having one end connected to the other end of the first inductor and one end of the second inductor and the other end connected to the ground terminal. And (f) a third inductor. It has a second surge absorption element having the other end connected to one end of the ground terminal connected to one end of the edge and a fourth inductor, a. The first inductor, the second inductor, the third inductor, and the fourth inductor are electromagnetically coupled to increase the inductance when a differential signal is applied.

  Since the surge absorbing circuit of the sixth display device has the first surge absorbing element and the second surge absorbing element that are excellent in reducing electrostatic surge, electrostatic surge can be reduced. In addition, according to the surge absorbing circuit, since the first inductor, the third inductor, the second inductor, and the fourth inductor that are electromagnetically coupled are provided, the input impedance is constant over a wide band. It is possible to set the respective coupling coefficients of the first inductor, the second inductor, the third inductor, and the fourth inductor so as to maintain the same. Furthermore, according to this surge absorbing circuit, the first impedance so as to match the input impedance of the surge absorbing circuit with the characteristic impedance of the pair of first transmission lines and the characteristic impedance of the pair of second transmission lines. Respective inductances of the first inductor, the second inductor, the third inductor, and the fourth inductor with respect to the stray capacitance component and the stray induction component of the surge absorber and the second surge absorber, respectively. It is possible to set the coupling coefficient. Therefore, this surge absorbing circuit is excellent in reducing electrostatic surges and enables impedance matching over a wide band. Therefore, the sixth display device including the surge absorbing circuit can reduce electrostatic surge input from the outside through the connector without degrading high-speed differential video signals.

  The seventh display device of the present invention is provided between the connector, the display unit, the connector and the display unit, and is connected to the connector via a pair of first transmission lines, respectively. N surge absorbing circuits (N is an integer of 1 or more) connected to the display unit via the second transmission line. Each of the N surge absorption circuits includes a first capacitance element provided between one end of the first inductor and the other end of the second inductor, in addition to the surge absorption circuit included in the sixth display device. And a second capacitive element provided between one end of the third inductor and the other end of the fourth inductor.

  According to the surge absorbing circuit of the seventh display device, the coupling with the first inductor, the second inductor, the third inductor, and the fourth inductor so as to keep the input impedance constant over a wide band. It is possible to set the coefficient and the capacitance value of each of the first capacitor element and the second capacitor element. Furthermore, according to this surge absorbing circuit, the first impedance so as to match the input impedance of the surge absorbing circuit with the characteristic impedance of the pair of first transmission lines and the characteristic impedance of the pair of second transmission lines. The inductance and coupling coefficient of each of the first inductor, the second inductor, the third inductor, and the fourth inductor can be set for the stray capacitance components of the surge absorbing element and the second surge absorbing element. Is possible.

  Even when it is necessary to consider the floating inductive component of the first surge absorbing element and the floating inductive component of the second surge absorbing element, the first inductor, the second inductor, the third inductor, And the negative induction component which cancels the floating induction component of a 1st surge absorption element and the floating induction component of a 2nd surge absorption element can be obtained by the electromagnetic coupling of a 4th inductor. Further, the first inductor, the second inductor, the second inductor, the second inductor so that the input impedance matches the characteristic impedance of the pair of first transmission lines and the characteristic impedance of the pair of second transmission lines and is maintained constant over a wide band. It is possible to set the inductance, the coupling coefficient, and the capacitance values of the first and second capacitive elements of the inductor, the third inductor, and the fourth inductor, respectively. Therefore, the seventh display device including the surge absorbing circuit can reduce electrostatic surge input from the outside through the connector without degrading the high-speed differential video signal.

  The eighth display device of the present invention is provided between the connector, the display unit, the connector and the display unit, and is connected to the connector via a pair of first transmission lines, and each pair N surge absorbing circuits (N is an integer of 1 or more) connected to the display unit via the second transmission line. Each of the N surge absorption circuits includes: (a) a first inductor having one end connected to one first transmission line of the pair of first transmission lines; and (b) other than the first inductor. A second inductor having one end connected to the end and the other end connected to one second transmission line of the pair of second transmission lines; and (c) the other of the pair of first transmission lines. A third inductor having one end connected to the first transmission line and electromagnetically coupled to the first inductor to increase mutual inductance when a differential signal is applied; (D) having one end connected to the other end of the third inductor and the other end connected to the other second transmission line of the pair of second transmission lines, to which a differential signal is applied So that the inductance increases with each other A fourth inductor that is electromagnetically coupled to the second inductor, and (e) one end connected to the other end of the first inductor and one end of the second inductor, and the other end connected to the ground terminal. A first surge absorbing element, and (f) a second surge absorbing element having one end connected to the other end of the third inductor and one end of the fourth inductor and the other end connected to the ground terminal. (G) a first capacitive element provided between one end of the first inductor and the other end of the second inductor; (h) one end of the third inductor and the other end of the fourth inductor; And a second capacitor element provided between the two.

  Since the surge absorbing circuit of the eighth display device has the first surge absorbing element and the second surge absorbing element that are excellent in reducing electrostatic surge, electrostatic surge can be reduced. Further, according to the surge absorbing circuit, the capacitance values of the first capacitor element and the second capacitor element can be set so as to keep the input impedance constant over a wide band. Further, according to the surge absorbing circuit, the first inductor and the third inductor that are electromagnetically coupled are provided, and the second inductor and the fourth inductor that are electromagnetically coupled are provided. Therefore, the first surge absorbing element and the second impedance are matched so that the input impedance of the surge absorbing circuit matches the characteristic impedance of the pair of first transmission lines and the characteristic impedance of the pair of second transmission lines. The first inductor, the second inductor, the third inductor, and the inductance of each of the fourth inductor and the coupling of the first inductor and the third inductor with respect to the stray capacitance component of the two surge absorbing elements It is possible to set a coefficient and a coupling coefficient between the second inductor and the fourth inductor. Therefore, this surge absorbing circuit is excellent in reducing electrostatic surges and enables impedance matching over a wide band. Therefore, the eighth display device including the surge absorbing circuit can reduce electrostatic surge input from the outside through the connector without degrading the high-speed differential video signal.

  The ninth display device of the present invention is provided between the connector, the display unit, the connector and the display unit, and is connected to the connector via a pair of first transmission lines, and each pair N surge absorbing circuits (N is an integer of 1 or more) connected to the display unit via the second transmission line. Each of the N surge absorption circuits includes: (a) a first inductor having one end connected to one first transmission line of the pair of first transmission lines; and (b) other than the first inductor. A second inductor having one end connected to the end and the other end connected to one second transmission line of the pair of second transmission lines; and (c) the other of the pair of first transmission lines. A third inductor having one end connected to the first transmission line; and (d) one end connected to the other end of the third inductor and the other second transmission line in the pair of second transmission lines. A fourth inductor having a connected other end; and (e) a first inductor having one end connected to the other end of the first inductor and one end of the second inductor and the other end connected to the ground terminal. And (f) a third inductor. A second surge absorbing element having one end connected to the end and one end of the fourth inductor and the other end connected to the ground terminal; and (g) one end of the first inductor and the other end of the second inductor. And (h) a second capacitive element provided between one end of the third inductor and the other end of the fourth inductor. .

  Since the surge absorbing circuit of the ninth display device includes the first surge absorbing element and the second surge absorbing circuit that are excellent in reducing electrostatic surge, electrostatic surge can be reduced. Further, according to this surge absorbing circuit, it is possible to set the capacitance value of the first capacitance element and the capacitance value of the second capacitance element so that the input impedance is kept constant over a wide band. Furthermore, according to this surge absorbing circuit, the first impedance so as to match the input impedance of the surge absorbing circuit with the characteristic impedance of the pair of first transmission lines and the characteristic impedance of the pair of second transmission lines. The inductance of the first inductor and the inductance of the second inductor can be set for the stray capacitance component of the surge absorbing element, and the third inductor can be set for the stray capacitance component of the second surge absorbing element. And the inductance of the fourth inductor can be set. Therefore, this surge absorbing circuit is excellent in reducing electrostatic surges and enables impedance matching over a wide band. Therefore, the ninth display device including the surge absorbing circuit can reduce electrostatic surge input from the outside via the connector without degrading the high-speed differential video signal.

  In each of the above fourth to ninth display devices, the N surge absorbing circuits are arranged so that adjacent surge absorbing circuits are not aligned with respect to a straight line orthogonal to a straight line connecting the connector and the display unit. It is preferable. At this time, (a) the pair of first transmission lines includes a first region, a second region, and a third region in order from the connector side, and (b) the pair of first transmission lines in the third region. The interval between the first transmission lines is wider than the interval between the pair of first transmission lines in the first region, and (c) the interval between the pair of first transmission lines in the second region is It is preferable that the width gradually increases from the region toward the third region. Moreover, (d) a pair of 2nd transmission line has a 4th area | region, a 5th area | region, and a 6th area | region in order from the display part side, (e) A pair of 6th area | region in a 6th area | region The distance between the second transmission lines is wider than the distance between the pair of second transmission lines in the fourth region, and (f) the distance between the pair of second transmission lines in the fifth region is It is preferable that the width gradually increases from the region toward the sixth region.

  According to this configuration, the N surge absorbing circuits are arranged so that adjacent surge absorbing circuits are not aligned with a straight line orthogonal to the straight line connecting the connector and the display unit, and the third region near the surge absorbing circuit is arranged. Since the pair of first transmission line intervals and the pair of second transmission line intervals in the sixth region are widened, a large-sized surge absorbing circuit that can sufficiently reduce electrostatic surges has a narrow terminal interval. A small mounting area can be disposed between the connector and the display portion. In addition, the lengths of 2N transmission lines including the first transmission line and the second transmission line that are electrically connected can be made the shortest and the same length. As a result, radiation noise from 2N sets of transmission lines can be reduced, and delay times in 2N sets of transmission lines can be matched. In addition, since the pair of first transmission line intervals in the second region and the pair of second transmission line intervals in the fifth region are gradually increased, the bending angle at the region boundary of the transmission line is reduced. It is possible to reduce reflection at the region boundary (bending portion) of the transmission line.

  Further, according to this configuration, since N surge absorbing circuits are arranged so that adjacent surge absorbing circuits are not aligned with a straight line orthogonal to a straight line connecting the connector and the display unit, N surge absorbing circuits are arranged. When the absorption circuit is mounted on the flexible substrate, the N surge absorption circuits can receive the stress generated in the flexible substrate due to bending or the like.

  It is preferable that the surge absorbing circuit of each of the first to ninth display devices described above is composed of a laminate having a conductor pattern inside and on the surface. According to this configuration, the surge absorption circuit can be downsized and the stray capacitance component can be reduced.

  ADVANTAGE OF THE INVENTION According to this invention, the display apparatus which can reduce the electrostatic surge input from the outside, without degrading a high-speed video signal is provided.

  DESCRIPTION OF EMBODIMENTS Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the drawings. In the drawings, the same or corresponding parts are denoted by the same reference numerals.

[First Embodiment]
FIG. 1 is a perspective view showing a display device according to the first embodiment of the present invention, and FIG. 2 is an enlarged view showing a portion A in the display device shown in FIG. FIG. 3 is a circuit diagram showing the display device according to the first embodiment of the present invention. The display device 10 includes a substrate 11 and a display panel 12.

  The substrate 11 has a first portion 11a and a second portion 11b. On the principal surface 11c of the first portion 11a, a plurality of conductor patterns extending in the direction of the axis X are provided side by side in a direction orthogonal to the axis X. The first portion 11 a and the plurality of conductor patterns function as the connector 13.

  On the main surface 11c of the second portion 11b, four first transmission lines 14a, 14b, 14c, 14d, four second transmission lines 15a, 15b, 15c, 15d, and four ground wirings are provided. 16a, 16b, 16c, 16d, four laminated surge absorbing parts 18, 19, 20, 21, an interface circuit 22 and a drive circuit 23 are provided.

  The four first transmission lines 14a, 14b, 14c, and 14d are conductor patterns extending in the direction of the axis X, respectively, on the main surface 11c of the second portion 11b so as to be provided along the direction orthogonal to the axis X. Is formed. One end of each of the four first transmission lines 15a, 15b, 15c, and 15d is connected to one of different conductor patterns in the connector 13.

  Similarly, each of the four second transmission lines 15a, 15b, 15c, and 15d is a conductor pattern extending in the direction of the axis X, and the main part of the second portion 11b is arranged side by side in a direction orthogonal to the axis X. It is formed on the surface 11c. One end of each of the four second transmission lines 15a, 15b, 15c, and 15d is connected to the interface circuit 22.

  The first transmission line 14a and the second transmission line 15a are aligned in the direction of the axis X, and a ground wiring 16a is provided between the first transmission line 14a and the second transmission line 15a. ing. Similarly, the first transmission lines 14b, 14c, and 14d and the second transmission lines 15b, 15c, and 15d are sequentially arranged in the axis X direction, and the first transmission lines 14b, 14c, and 14d are connected to the second transmission lines 14b, 14c, and 14d. Ground lines 16b, 16c, and 16d are provided between the transmission lines 15b, 15c, and 15d, respectively.

  The ground wirings 16a, 16b, 16c, and 16d are conductor patterns that extend in a direction orthogonal to the axis X direction. The ground wirings 16a, 16b, 16c, and 16d are connected to, for example, a ground pattern provided on the main surface facing the main surface 11c of the via and the substrate 11, or a ground pattern provided on the main surface 11a of the substrate 11. It is connected to the ground terminal (conductor pattern) in the connector 13 through this ground pattern. The ground wirings 16a, 16b, 16c, and 16d may be connected to a ground terminal (for example, a system ground terminal) provided separately from the connector 13.

  A laminated surge absorbing component 18 is mounted between the first transmission line 14a and the second transmission line 15a. Similarly, laminated surge absorbing parts 19, 20, and 21 are mounted between the first transmission lines 14b, 14c, and 14d and the second transmission lines 15b, 15c, and 15d, respectively.

  The laminated surge absorbing component 18 has a first electrode 30, a second electrode 32, and third electrodes 34 and 36 on the surface of a substantially rectangular parallelepiped laminated body 28. The first electrode 30 is connected to the other end of the first transmission line 14a, and the second electrode 32 is connected to the other end of the second transmission line 15a. The third electrodes 34 and 36 are connected to the ground wiring 18a. The laminated surge absorbing component 18 constitutes a surge absorbing circuit by a conductor pattern formed inside the laminated body 28. Details of the surge absorbing circuit will be described later.

  The laminated surge absorbing parts 19, 20, 21 also have the same configuration as the laminated surge absorbing part 18. The first electrode 30, the second electrode, and the third electrode 34, 36 in the laminated surge absorbing component 19 are respectively the other end of the first transmission line 14b, the other end of the second transmission line 15b, and the ground wiring 18b. The first electrode 30, the second electrode, and the third electrode 34, 36 in the laminated surge absorbing component 20 are respectively connected to the other end of the first transmission line 14c and the second transmission line 15c. The other end is connected to the ground wiring 18c. Similarly, the first electrode 30, the second electrode, and the third electrode 34, 36 in the laminated surge absorbing component 21 are respectively the other end of the first transmission line 14d, the other end of the second transmission line 15d, It is connected to the ground wiring 18d.

  The interface circuit 22 is an interface circuit for receiving a video signal, for example. The interface circuit 22 receives video signals from, for example, the second transmission lines 15 a, 15 b, 15 c, and 15 d, performs level conversion, and outputs the video signals to the drive circuit 23.

  The drive circuit 23 generates a signal for displaying a video on the display panel 12 based on the video signal received from the interface circuit 22, and outputs this signal to the display panel 12. In this way, an image is displayed on the display panel 12. Note that various displays such as a CRT display, a liquid crystal display, an organic EL display, and a plasma display can be applied to the display panel 12. In the present embodiment, the interface circuit 22, the drive circuit 23, and the display panel 12 function as the display unit 24.

  As described above, the display device 10 includes the connector 13, the display unit 24, and the four laminated surge absorbing parts 18, 19, 20, and 21 having a surge absorbing circuit therein, and is connected by the connector 13. The video signal sent from the external transmission circuit can be displayed on the display panel 12 in the display unit 24.

  Next, a surge absorption circuit applicable to the display device 10 according to the first embodiment will be described. FIG. 4 is a circuit diagram showing a surge absorbing circuit applicable to the display device according to the first embodiment. The surge absorption circuit 40 shown in FIG. 4 includes a first input / output terminal 40a, a second input / output terminal 40b, a third input / output terminal 40c, a first inductor 42, a second inductor 44, and surge absorption. An element 46 is included.

  The first input / output terminal 40a is the first electrode 30 of the laminated surge absorbing component 18-21, and the second input / output terminal 40b is the second electrode 32 of the laminated surge absorbing component 18-21. The third input / output terminal 40c is the third electrodes 34, 36 of the laminated surge absorbing parts 18-21.

  One end of the first inductor 42 is connected to the first input / output terminal 40a, and the other end of the first inductor 42 is connected to the node N1. One end of the second inductor 44 is further connected to the node N1, and the other end of the second inductor 44 is connected to the second input / output terminal 40b. The first inductor 42 and the second inductor 44 are electromagnetically coupled. Specifically, the first inductor 42 and the second inductor 44 are magnetically coupled so as to increase the inductance. That is, when a current flows in a direction from the first input / output terminal 40a toward the second input / output terminal 40b or in the opposite direction, a magnetic field generated in the first inductor 42 and the second inductor 44 by the current. Are coupled in such a manner that the inductances thereof are the same, and as a result, the mutual inductance increases. The coupling coefficient between the first inductor 42 and the second inductor 44 is preferably greater than 0.01 and equal to or less than 1.

  One end of the first surge absorbing element 46 is further connected to the node N1. The other end of the first surge absorbing element 46 is connected to the third input / output terminal 40c. In the present embodiment, the first surge absorbing element 46 is a varistor made of a metal oxide such as ZnO. The first surge absorbing element 46 has a large resistance value between the terminals when the voltage between the terminals is smaller than a predetermined voltage. On the other hand, when the voltage between the terminals is larger than the predetermined voltage, the first surge absorbing element 46 causes a current to flow between the terminals by reducing the resistance value between the terminals, and clamps the voltage between the terminals to the predetermined voltage. . The predetermined voltage is a value determined by the characteristics of the first surge absorbing element 46.

  Therefore, when a signal having a low voltage level is input to the first input / output terminal 40a, the surge absorbing circuit 40 has a large resistance value between the terminals of the first surge absorbing element 46, and therefore the signal is input to the second input / output terminal 40a. Output to the output terminal 40b. Similarly, when a signal having a low voltage level is input to the second input / output terminal 40b, the surge absorption circuit 40 has a large resistance value between the terminals of the first surge absorption element 46, so that the signal is transmitted to the first input / output terminal 40b. Output to the input / output terminal 40a.

  On the other hand, when an electrostatic surge is input to the first input / output terminal 40a, the surge absorbing circuit 40 is connected to the first input / output terminal 40a and the third input / output terminal 40c by the first surge absorbing element 46. The resistance value between the terminals decreases, a current flows between the first input / output terminal 40a and the third input / output terminal 40c, and the voltage at the node N1 is clamped. In this manner, the surge absorbing circuit 40 reduces the voltage output to the second input / output terminal 40b even if an electrostatic surge is input to the first input / output terminal 40a.

  Similarly, when an electrostatic surge is input to the second input / output terminal 40b, the surge absorbing circuit 40 is connected to the second input / output terminal 40b and the third input / output terminal 40c by the first surge absorbing element 46. The resistance value between the first and second input / output terminals 40b and 40c is reduced, and the voltage at the node N1 is clamped. In this manner, the surge absorbing circuit 40 reduces the voltage output to the first input / output terminal 40a even if an electrostatic surge is input to the second input / output terminal 40b.

  FIG. 5 is a circuit diagram equivalently showing the surge absorbing circuit shown in FIG. Since the first inductor 42 and the second inductor 44 are electromagnetically coupled, they can be equivalently represented by two inductors 48 and 50 and a negative inductor (negative inductive element) 52. The first surge absorbing element 46 can be equivalently expressed by a variable resistance element and a stray capacitance element (stray capacitance component) 54 connected in parallel. It can be approximated only by the capacitive element 54.

  In the equivalent circuit shown in FIG. 5, one end of the inductor 48 is connected to the first input / output terminal 40a, and the other end of the inductor 48 is connected to the node N2. One end of the inductor 50 is also connected to the node N2, and the other end of the inductor 50 is connected to the second input / output terminal 40b. One end of the negative inductor 52 is also connected to the node N2, and the other end of the negative inductor 52 is connected to one end of the stray capacitance element 54. The stray capacitance element 54 is connected to the third input / output terminal 40c.

Here, assuming that the inductance of the first inductor 42 and the inductance of the second inductor 44 are Lz, and the value of the coupling coefficient between the first inductor 42 and the second inductor 44 is Kz, the impedance of the inductor 48 and the inductor The inductance of 50 is “(1 + Kz) · Lz”, and the inductance of the negative inductor 52 is “−Kz · Lz”. The capacitance value of the stray capacitance element 54 is Cz. Accordingly, the input impedance of the surge absorbing circuit 40 shown in FIG. 5 is expressed by the following expression (1).

  According to the above equation (1), when Kz = ± 1, the second term including ω on the right side is 0, and the input impedance Zin is constant regardless of the frequency. However, when Kz = −1, Zin = 0, which is not appropriate.

Further, if Kz = 1 and Lz is set so as to satisfy the following expression (2), the input impedance Zin of the surge absorption circuit 40 is matched with the characteristic impedance Zo of the transmission line connected to the surge absorption circuit 40. Can do. In the surge absorbing circuit 40, the input impedance from the first input / output terminal 40a side and the input impedance from the second input / output terminal 40b side are the same.

  Thus, according to the surge absorbing circuit 40 of the present embodiment, the first surge absorbing element 46 that is excellent in reducing electrostatic surges is included, so that electrostatic surges can be reduced. Further, according to the surge absorption circuit 40 of the present embodiment, since the first inductor 42 and the second inductor 44 that are electromagnetically coupled are provided, the input impedance is maintained constant over a wide band. In addition, the coupling coefficient between the first inductor 42 and the second inductor 44 can be set. Furthermore, according to the surge absorption circuit 40 of the present embodiment, the input impedance of the surge absorption circuit 40, the characteristic impedance of the first transmission line 14a (or 14b, 14c, 14d), and the second transmission line 15a ( Alternatively, the inductance of the first inductor 42 and the inductance of the second inductor 44 are set with respect to the stray capacitance component of the first surge absorbing element 46 so as to match the characteristic impedance of 15b, 15c, 15d). It is possible. Therefore, the surge absorbing circuit 40 is excellent in reducing electrostatic surges and enables impedance matching over a wide band. Therefore, the display device 10 according to the present embodiment including the surge absorbing circuit 40 can reduce the electrostatic surge input from the outside through the connector 13 without degrading the high-speed video signal.

[First Modification of Surge Absorbing Circuit Applicable to Display Device of First Embodiment]
FIG. 6 is a circuit diagram showing a surge absorbing circuit according to Modification 1 applicable to the display device of the first embodiment. The surge absorption circuit 40A shown in FIG. 6 further includes a first capacitive element 56 in addition to the same elements as the surge absorption circuit 40.

  One end of the first capacitive element 56 is connected to a node N3 for connecting the first input / output terminal 40a and one end of the first inductor 42. The other end of the first capacitive element 56 is connected to a node N4 for connecting the second input / output terminal 40b and the other end of the second inductor 44.

  FIG. 7 is a circuit diagram equivalently representing the surge absorbing circuit shown in FIG. Similar to the surge absorption circuit 40, the first and second inductors 42 and 44 that are electromagnetically coupled can be represented by two inductors 48 and 50 and a negative inductor (negative inductive element) 52. it can. Further, the first surge absorbing element 46 can be approximated by only the stray capacitance element (stray capacitance component) 54 for a small high-speed signal.

When the inductance of the first inductor 42 and the inductance of the second inductor 44 are Lz, and the value of the coupling coefficient between the first inductor 42 and the second inductor 44 is Kz, the inductance of the inductor 48 and the inductance of the inductor 50 are set. Becomes “(1 + Kz) Lz”, and the inductance of the negative inductor 52 becomes “−KzLz”. The capacitance value of the first capacitor element 56 is Cs, and the capacitance value of the floating capacitor element 54 is Cz. Thus, the input impedance of the surge absorbing circuit 40A shown in FIG. 7 is expressed by the following expression (3).

  According to the above equation (3), it is understood that if Cs is set so as to satisfy the following equation (4), the input impedance Zin is constant regardless of the frequency.

Furthermore, if Cs is set so as to satisfy the following expression (4) and Lz is set so as to satisfy the following expression (5), the input impedance Zin of the surge absorption circuit 40A is transmitted to be connected to the surge absorption circuit 40A. It can be matched with the characteristic impedance Zo of the line. In the surge absorbing circuit 40A, the input impedance from the first input / output terminal 40a side and the input impedance from the second input / output terminal 40b side are the same.

  As can be seen from the equations (4) and (5), according to the surge absorbing circuit 40A of the first modification, Kz can be arbitrarily selected. That is, in the surge absorbing circuit 40A of the first modification, Cs and Lz can be changed by changing Kz, so that a circuit design with higher flexibility than the surge absorbing circuit 40 is possible.

  As described above, according to the surge absorbing circuit 40A of the first modification, the coupling coefficient between the first inductor 42 and the second inductor 44 and the first capacitive element 56 so as to maintain the input impedance constant over a wide band. Can be set. Furthermore, according to the surge absorbing circuit 40A of the first modification, the input impedance of the surge absorbing circuit 40A, the characteristic impedance of the first transmission line 14a (or 14b, 14c, 14d), and the second transmission line 15a (or 15b, 15c, and 15d), the inductances of the first inductor 42 and the second inductor 44 with respect to the stray capacitance component of the first surge absorbing element 46, and the The coupling coefficient between the first inductor 42 and the second inductor 44 can be set. Therefore, the display device 10 according to the present embodiment including the surge absorbing circuit 40A of the first modification instead of the surge absorbing circuit 40 does not deteriorate the high-speed video signal, and the static input from the outside via the connector 13 is not performed. Electric surge can be reduced.

  In the above description, the first surge absorbing element 46 is approximated by only the stray capacitance element 54, but actually, the first surge absorbing element 46 also includes a floating inductive element (floating inductive component). FIG. 8 is an equivalent circuit diagram of the first surge absorbing element. The first surge absorbing element 46 shown in FIG. 8 is represented by a variable resistance element 58 and a stray capacitance element 54 connected in parallel, and a stray induction element 59 connected in series thereto. The floating induction element 59 also causes the input impedance of the surge absorbing circuit 40 to fluctuate with respect to the frequency. That is, the floating inductive element 59 also causes deterioration of the high-speed signal.

ただし、Ｌｅは浮遊誘導素子５９のインダクタンスであり、ＫｚＬｚ≧Ｌｅである。上記（６）式を満たすようにＣｓを設定することによって、第１のサージ吸収素子４６に浮遊容量素子５４と浮遊誘導素子５９とが含まれていても、サージ吸収回路４０Ａの入力インピーダンスＺｉｎを、サージ吸収回路４０Ａに接続される伝送線路の特性インピーダンスＺｏに整合させることができる。 However, according to the surge absorbing circuit 40A of the first modification, the first inductor 42 and the second inductor 44 that are electromagnetically coupled have the negative inductor 52. The floating induction element 59 included in the surge absorbing element 46 can be canceled. However, since it appears to be the same as the state where the coupling is reduced, Ks and Lz are left as they are, and Cs is expressed by the following formula (6).

However, Le is the inductance of the floating induction element 59, and KzLz ≧ Le. By setting Cs so as to satisfy the above equation (6), the input impedance Zin of the surge absorbing circuit 40A can be reduced even if the first surge absorbing element 46 includes the floating capacitive element 54 and the floating inductive element 59. The transmission line connected to the surge absorbing circuit 40A can be matched with the characteristic impedance Zo.

  As described above, according to the surge absorbing circuit 40A of the first modification, the first inductor 42 and the second inductor 44 are electromagnetically coupled to each other to cancel the floating induction component of the first surge absorbing element 46. An induction component can be obtained. Furthermore, the input impedance matches the characteristic impedance of the first transmission line 14a (or 14b, 14c, 14d) and the characteristic impedance of the second transmission line 15a (or 15b, 15c, 15d), and is constant over a wide band. It is possible to set the respective inductances, coupling coefficients, and capacitance values of the first capacitive element 56 of the first inductor 42 and the second inductor 44 so as to be maintained. Therefore, the display device 10 according to the present embodiment including the surge absorbing circuit 40A of the first modification instead of the surge absorbing circuit 40 does not deteriorate the high-speed video signal, and the static input from the outside via the connector 13 is not performed. Electric surge can be reduced.

[Variation 2 of Surge Absorbing Circuit Applicable to Display Device of First Embodiment]
FIG. 9 is a circuit diagram showing a surge absorbing circuit according to the second modification applicable to the display device of the first embodiment. The surge absorption circuit 40B shown in FIG. 9 is different from the surge absorption circuit 40A of Modification 1 in that the first inductor and the second inductor are not electromagnetically coupled. Other configurations of the surge absorbing circuit 40B are the same as the surge absorbing circuit 40A of the first modification.

  In the surge absorption circuit 40A, the surge absorption circuit 40B replaces the first inductor 42 and the second inductor 44 that are electromagnetically coupled with each other, and the first inductor 60 and the second one that are not electromagnetically coupled with each other. Two inductors 62 are provided. The value of the coupling coefficient between the first inductor 60 and the second inductor 62 is preferably 0.01 or less.

Here, the inductance of the first inductor 60 and the inductance of the second inductor 62 are Lx, and the capacitance value of the first capacitive element 56 is Cx. The first surge absorbing element 46 is approximated only by a stray capacitance element (stray capacitance component) 54 for a small high-speed signal, and the capacitance value of the stray capacitance element 54 is Cz. Thus, the input impedance of the surge absorbing circuit 40B shown in FIG. 9 is expressed by the following equation (7).

  According to the above equation (7), it is understood that if Cx is set so as to satisfy the following equation (8), the input impedance Zin is constant regardless of the frequency.

Furthermore, if Cx is set so as to satisfy the following equation (8) and Lx is set so as to satisfy the following equation (9), the input impedance Zin of the surge absorption circuit 40B is transmitted to the surge absorption circuit 40B. It can be matched with the characteristic impedance Zo of the line. In the surge absorbing circuit 40B, the input impedance from the first input / output terminal 40a side and the input impedance from the second input / output terminal 40b side are the same.

  Thus, according to the surge absorbing circuit 40B of the second modification, the first surge absorbing element 46 that is excellent in reducing electrostatic surges is included, so that electrostatic surges can be reduced. Further, according to the surge absorbing circuit 40B of the second modification, the capacitance value of the first capacitive element 56 can be set so as to keep the input impedance constant over a wide band. Furthermore, according to the surge absorbing circuit 40B of the second modification, the input impedance of the surge absorbing circuit 40B, the characteristic impedance of the first transmission line 14a (or 14b, 14c, 14d), and the second transmission line 15a (or 15b, 15c, and 15d), the inductance of the first inductor 60 and the inductance of the second inductor 62 are set with respect to the stray capacitance component of the first surge absorber 46. Is possible. Therefore, the surge absorbing circuit 40B of Modification 2 is excellent in reducing electrostatic surges and enables impedance matching over a wide band. Therefore, the display device 10 according to the present embodiment including the surge absorbing circuit 40B according to the modified example 2 instead of the surge absorbing circuit 40 does not deteriorate a high-speed video signal, and is statically inputted from the outside through the connector 13. Electric surge can be reduced.

[Second Embodiment]
FIG. 10 is a diagram showing a portion A in the display device according to the second embodiment of the present invention. The display device 10A is different from the display device 10 of the first embodiment in that the display device 10A includes a substrate 11A instead of the substrate 11. Other configurations of the display device 10 </ b> A are the same as those of the display device 10.

  The substrate 11A is different from the substrate 11 in terms of the conductor pattern of the portion A on the substrate 11 and the mounted components. Specifically, the substrate 11A has four pairs of first transmission lines 66a instead of the four first transmission lines 14a, 14b, 14c, and 14d on the main surface 11c of the second portion 11b. , 66b, 66c, 66d, and four pairs of second transmission lines 67a, 67b, 67c, 67d instead of the four second transmission lines 15a, 15b, 15c, 15d. The substrate 11 is different from the substrate 11 in that ground wires 68a, 68b, 68c, and 68d are provided instead of the four ground wires 16a, 16b, 16c, and 16d. Further, the substrate 11A has four laminated surge absorbing parts 18A, 19A, 20A, 21A instead of the four laminated surge absorbing parts 18, 19, 20, 21 on the main surface 11c of the second portion 11b. It differs from the substrate 11 in that an interface circuit 22A is provided instead of the interface circuit 22. Other configurations of the substrate 11A are the same as those of the substrate 11.

  The four pairs of first transmission lines 66a, 66b, 66c, 66d are each a conductor pattern extending in the direction of the axis X, and the main surface of the second portion 11b so as to be provided along the direction orthogonal to the axis X 11c. One end of each of the four pairs of first transmission lines 66 a, 66 b, 66 c, 66 d is connected to one of the different conductor patterns in the connector 13. Each of the four pairs of first transmission lines 66a, 66b, 66c, 66d has a first region B, a second region C, and a third region D in order from the connector 13 side.

  Similarly, each of the four pairs of second transmission lines 67a, 67b, 67c, and 67d is a conductor pattern extending in the direction of the axis X, and the second portion 11b is provided side by side in a direction orthogonal to the axis X. Formed on the main surface 11c. One end of each of the four pairs of second transmission lines 67a, 67b, 67c, and 67d is connected to the interface circuit 22A. Each of the four pairs of second transmission lines 67a, 67b, 67c, and 67d has a fourth region E, a fifth region F, and a sixth region G in order from the interface circuit 22A side. .

  The distance between the pair of first transmission lines 66a in the third region D is wider than the distance between the pair of first transmission lines 66a in the first region B, and the pair of second transmission lines in the sixth region G. The interval between the transmission lines 67a is wider than the interval between the pair of second transmission lines 67a in the fourth region E. Similarly, the distance between the pair of first transmission lines 66b, 66c, 66d in the third region D is larger than the distance between the pair of first transmission lines 66b, 66c, 66d in the first region B, respectively. The distance between the pair of second transmission lines 67b, 67c, 67d in the sixth region G is wider than the distance between the pair of second transmission lines 67b, 67c, 67d in the fourth region E. .

  The distance between the pair of first transmission lines 66a in the second region C gradually increases from the first region B toward the third region D, and the pair of second transmission lines in the fifth region F The interval between the transmission lines 67a gradually increases from the fourth region E toward the sixth region G. Similarly, the distance between the pair of first transmission lines 66b, 66c, 66d in the second region C is gradually increased from the first region B to the third region D, The distance between the pair of second transmission lines 67 b, 67 c, 67 d in the region F of the second region F gradually increases from the fourth region E toward the sixth region G. For example, the pair of first transmission lines 66a in the second region C is preferably at an angle of 45 degrees with respect to the pair of first transmission lines 66a in the first region B and the third region D. Similarly, the distance between the pair of first transmission lines 66b, 66c, 66d in the second region C is the same as the pair of first transmission lines 66b, 66c, 66d in the first region B and the third region D, respectively. The angle is preferably 45 degrees with respect to 66d. The pair of second transmission lines 67a in the fifth region F is preferably at an angle of 45 degrees with respect to the pair of second transmission lines 67a in the fourth region E and the sixth region G. Similarly, the distance between the pair of second transmission lines 67b, 67c, 67d in the fifth region F is equal to the pair of second transmission lines 67b, 67c, 67d in the fourth region E and the sixth region G, respectively. The angle is preferably 45 degrees with respect to 67d.

  Between the pair of first transmission lines 66a in the third region D and between the pair of second transmission lines 67a in the sixth region G, a ground wiring 68a is provided. Similarly, between the pair of first transmission lines 66b, 66c, 66d in the third region D and between the pair of second transmission lines 67b, 67c, 67d in the sixth region G, respectively. Ground wirings 68b, 68c and 68d are provided.

  Each of the ground wirings 68a, 68b, 68c, and 68d is a conductor pattern that extends in the axis X direction. The ground wirings 68a, 68b, 68c, and 68d are connected to, for example, a ground pattern provided on the main surface facing the main surface 11c of the via and the substrate 11A, or a ground pattern provided on the main surface 11a of the substrate 11A. It is connected to the ground terminal (conductor pattern) in the connector 13 through this ground pattern. The ground wirings 68a, 68b, 68c, and 68d may be connected to a ground terminal (for example, a system ground terminal) provided separately from the connector 13.

  A laminated surge absorbing component 18A is mounted between the pair of first transmission lines 66a and the pair of second transmission lines 67a. Similarly, laminated surge absorbing parts 19A, 20A, and 21A are mounted between the pair of first transmission lines 66b, 66c, and 66d and the pair of second transmission lines 67b, 67c, and 67d, respectively. The four laminated surge absorbing parts 18A, 19A, 20A, 21A are arranged so that adjacent laminated surge absorbing parts are not aligned with respect to a straight line Y orthogonal to the axis X. In the present embodiment, the four laminated surge absorbing parts 18A, 19A, 20A, and 21A are orthogonal to the axis X so that adjacent laminated surge absorbing parts do not overlap when viewed from the straight line Y direction orthogonal to the axis X. The straight lines Y are alternately arranged in two rows. The four laminated surge absorbing parts 18A, 19A, 20A, and 21A are arranged with respect to a straight line Y perpendicular to the axis X so that adjacent laminated surge absorbing parts do not overlap when viewed from the straight line Y direction perpendicular to the axis X. May be alternately arranged in a plurality of rows.

  The laminated surge absorbing component 18A includes a first electrode 76, a second electrode 77, a third electrode 78, a fourth electrode 79, a fifth electrode 80, 81, and a first electrode on the surface of a substantially rectangular parallelepiped laminated body 74. 6 electrodes 82 and a seventh electrode 83. The first electrode 76 is connected to the other end of one first transmission line of the pair of first transmission lines 66a, and the second electrode 77 is one second of the pair of second transmission lines 67a. Is connected to the other end of the transmission line. The third electrode 78 is connected to the other end of the other first transmission line of the pair of first transmission lines 66a, and the fourth electrode 79 is the other second of the pair of second transmission lines 67a. Is connected to the other end of the transmission line. The fifth electrodes 80 and 81 are connected to the ground wiring 68a. The sixth electrode 82 and the seventh electrode 83 are provided in order to connect the conductor patterns formed in the multilayer body 74, respectively. The laminated surge absorbing component 18 </ b> A constitutes a surge absorbing circuit by a conductor pattern formed inside the laminated body 74. Details of the surge absorption circuit will be described later.

  The laminated surge absorbing parts 19A, 20A, and 21A also have the same configuration as the laminated surge absorbing part 18A. The first electrode 76, the second electrode 77, the third electrode 78, the fourth electrode 79, and the fifth electrodes 80 and 81 in the laminated surge absorbing component 19A are respectively connected to the pair of first transmission lines 66b. The other end of one first transmission line, the other end of one second transmission line in the pair of second transmission lines 67b, the other end of the other first transmission line in the pair of first transmission lines 66b The other end of the second transmission line of the pair of second transmission lines 67b is connected to the ground wiring 68b, and the first electrode 76, the second electrode 77, and the third electrode of the laminated surge absorbing component 20A. The electrode 78, the fourth electrode 79, and the fifth electrodes 80, 81 are respectively connected to the other end of one first transmission line in the pair of first transmission lines 66c and in the pair of second transmission lines 67c. One second transmission line The other end of the second transmission line of the pair of first transmission lines 66c, the other end of the other second transmission line of the pair of second transmission lines 67c, and the ground wiring 68c. ing. Similarly, the first electrode 76, the second electrode 77, the third electrode 78, the fourth electrode 79, and the fifth electrodes 80 and 81 in the laminated surge absorbing component 21A are each a pair of first transmissions. The other end of one first transmission line in the line 66d, the other end of one second transmission line in the pair of second transmission lines 67d, and the other first transmission line in the pair of first transmission lines 66d. The other end of the second transmission line 67d is connected to the other end of the second transmission line 67d and the ground wiring 68d.

  The interface circuit 22A is an interface circuit for receiving a video signal and a clock signal by, for example, a serial LVDS method. The interface circuit 22A receives three channels of differential video signals from the three pairs of second transmission lines 67a, 67b, 67c, and receives a differential clock signal from the other pair of second transmission lines 67d. The 3-channel differential video signal includes RGB signals and control signals. The interface circuit 22A receives the three-channel differential video signal and the differential clock signal by the LVDS circuit, respectively, converts the level, and outputs the converted signal to the drive circuit 23.

  The drive circuit 23 generates a signal for displaying an image on the display panel 12 based on the differential video signal and the differential clock signal received from the interface circuit 22A, and outputs this signal to the display panel 12. . In this way, an image is displayed on the display panel 12. In the present embodiment, the interface circuit 22A, the drive circuit 23, and the display panel 12 function as the display unit 24A.

  As described above, the display device 10A includes the connector 13, the display unit 24A, and the four laminated surge absorbing parts 18A, 19A, 20A, and 21A having a surge absorbing circuit therein, and is connected by the connector 13. The differential video signal transmitted from the external transmission circuit can be displayed on the display panel 12 in the display unit 24A.

  According to the display device 10A of the present embodiment, the laminated surge absorbing parts 18A to 21A are arranged so that adjacent laminated surge absorbing parts including the surge absorbing circuit are not aligned with respect to the straight line Y orthogonal to the axis X, and the laminated surge absorbing parts 18A to 21A are arranged. The distance between the pair of first transmission lines 66a (or 66b, 66c, 66d) in the third region D near the surge absorbing component 18A (or 19A, 20A, 21A) and the pair of second in the sixth region G. Since the interval between the transmission lines 67a (or 67b, 67c, 67d) is widened, the large-sized laminated surge absorbing parts 18A to 21A capable of sufficiently reducing electrostatic surges are connected to the small connector 13 having a small conductor pattern interval. The integrated interface circuit 22A can be arranged with a small mounting area.

  Further, the total length of one of the pair of first transmission lines 66a and one of the pair of second transmission lines 67a, the other of the pair of first transmission lines 66a and the other of the pair of second transmission lines 67a The total length of one of the pair of first transmission lines 66b and one of the pair of second transmission lines 67b, the other of the pair of first transmission lines 66b and the pair of second transmission lines 67b. The total length with the other, the total length of one of the pair of first transmission lines 66c and one of the pair of second transmission lines 67c, the other of the pair of first transmission lines 66c and the pair of second transmission lines 67c, the total length of one of the pair of first transmission lines 66d and one of the pair of second transmission lines 67d, and the other of the pair of first transmission lines 66d and a pair of seconds. The total length of the other transmission line 67d with the other can be made the shortest and the same length.As a result, radiation noise from these eight sets of transmission lines can be reduced, and the delay times in these eight sets of transmission lines can be matched.

  Further, the distance between the pair of first transmission lines 66a (or 66b, 66c, 66d) in the second region C and the distance between the pair of second transmission lines 67a (or 67b, 67c, 67d) in the fifth region F. Since the interval is gradually increased, the bending angle at the boundary between the transmission lines 66a, 67a (or 66b, 67b, 66c, 67c, 66d, 67d) is reduced, and the transmission lines 66a, 67a (or 66b, 67b) are reduced. , 66c, 67c, 66d, 67d), it is possible to reduce the reflection at the region boundary portion, that is, the bent portion. In particular, if the bending angle at the region boundaries of the transmission lines 66a to 66d and 67a to 67d is 45 degrees, the mounting area can be reduced while reducing reflection.

  In addition, since the four laminated surge absorbing parts 18A to 21A are arranged so that adjacent laminated surge absorbing parts are not aligned with respect to the straight line Y orthogonal to the axis X, even if the board 11A is a flexible board, The stress generated in the substrate 11A due to bending or the like can be received by the four laminated surge absorbing parts 18A, 19A, 20A, 21A in a distributed manner.

  Next, the surge absorption circuit of 2nd Embodiment is demonstrated. FIG. 11 is a circuit diagram showing a surge absorption circuit applicable to the display device of the second embodiment. The surge absorption circuit 86 includes a first input / output terminal 86a, a second input / output terminal 86b, a third input / output terminal 86c, a fourth input / output terminal 86d, a fifth input / output terminal 86e, and a first inductor. 88, a second inductor 90, a first surge absorbing element 92, a third inductor 94, a fourth inductor 96, and a second surge absorbing element 98.

  The first input / output terminal 86a is the first electrode 76 of the laminated surge absorbing parts 18A to 21A, and the second input / output terminal 86b is the second electrode 77 of the laminated surge absorbing parts 18A to 21A. The third input / output terminal 86c is the third electrode 78 of the laminated surge absorbing parts 18A to 21A, and the fourth input / output terminal 86d is the fourth electrode 79 of the laminated surge absorbing parts 18A to 21A. The fifth input / output terminal 86e is the fifth electrodes 80 and 81 of the laminated surge absorbing parts 18A to 21A.

  One end of the first inductor 88 is connected to the first input / output terminal 86a, and the other end of the first inductor 88 is connected to the node N5. One end of the second inductor 90 is further connected to the node N5, and the other end of the second inductor 90 is connected to the second input / output terminal 86b. The first inductor 88 and the second inductor 90 are electromagnetically coupled. Specifically, the first inductor 88 and the second inductor 90 are magnetically coupled so as to increase the inductance. That is, when a current flows in the direction from the first input / output terminal 86a toward the second input / output terminal 86b or in the opposite direction, the magnetic field generated in the first inductor 88 and the second inductor 90 by the current. Are coupled in such a manner that the inductances thereof are the same, and as a result, the mutual inductance increases. The coupling coefficient between the first inductor 88 and the second inductor 90 is preferably greater than 0.01 and less than or equal to 1.

  One end of the first surge absorbing element 92 is further connected to the node N5. The other end of the first surge absorbing element 92 is connected to the node N6, and a fifth input / output terminal 86e is further connected to the node N6. The first surge absorbing element 92 is a varistor made of a metal oxide such as ZnO, similarly to the first surge absorbing element 46 of the first embodiment.

  On the other hand, one end of the third inductor 94 is connected to the third input / output terminal 86c, and the other end of the third inductor 94 is connected to the node N7. One end of the fourth inductor 96 is further connected to the node N7, and the other end of the fourth inductor 96 is connected to the fourth input / output terminal 86d. The third inductor 94 and the fourth inductor 96 are electromagnetically coupled. Specifically, the third inductor 94 and the fourth inductor 96 are magnetically coupled to increase the inductance. That is, when a current flows in the direction from the third input / output terminal 86c to the fourth input / output terminal 86d or in the opposite direction, the magnetic field generated in the third inductor 94 and the fourth inductor 96 by the current. Are coupled in such a manner that the inductances thereof are the same, and as a result, the mutual inductance increases. The coupling coefficient between the third inductor 94 and the second inductor 96 is preferably greater than 0.01 and less than or equal to 1.

  One end of the second surge absorbing element 98 is further connected to the node N7. The other end of the second surge absorbing element 98 is connected to the node N6. The second surge absorbing element 98 is a varistor made of a metal oxide such as ZnO, similarly to the first surge absorbing element 46 of the first embodiment.

  Therefore, when a differential signal having a low voltage level is input to the first input / output terminal 86a and the third input / output terminal 86c, the resistance value between the terminals of the first surge absorbing element 92 and the second surge absorption. Since the resistance value between the terminals of the element 98 is large, the surge absorbing circuit 86 outputs a differential signal to the second input / output terminal 86b and the fourth input / output terminal 86d. Similarly, when a differential signal having a low voltage level is input to the second input / output terminal 86b and the fourth input / output terminal 86d, the resistance value between the terminals of the first surge absorbing element 92 and the second surge Since the resistance value between the terminals of the absorption element 98 is large, the surge absorption circuit 86 outputs a differential signal to the first input / output terminal 86a and the third input / output terminal 86c.

  On the other hand, when an electrostatic surge is input to the first input / output terminal 86a, the resistance value between the first input / output terminal 86a and the fifth input / output terminal 86e is reduced by the first surge absorbing element 92. The surge absorption circuit 86 is reduced in size, and a current flows between the first input / output terminal 86a and the fifth input / output terminal 86e, and the voltage of the node N5 is clamped. When an electrostatic surge is input to the third input / output terminal 86c, the second surge absorbing element 98 causes the resistance value between the third input / output terminal 86c and the fifth input / output terminal 86e to be changed. The surge absorption circuit 86 is reduced in size, and a current flows between the third input / output terminal 86c and the fifth input / output terminal 86e, and the voltage of the node N7 is clamped. In this way, the surge absorption circuit 86 is configured such that the second input / output terminal 86b or the fourth input / output terminal even if an electrostatic surge is input to the first input / output terminal 86a or the third input / output terminal 86c. The voltage output to 86d is reduced.

  Similarly, when an electrostatic surge is input to the second input / output terminal 86b, the resistance value between the second input / output terminal 86b and the fifth input / output terminal 86e by the first surge absorbing element 92. The surge absorption circuit 86 passes a current between the second input / output terminal 86b and the fifth input / output terminal 86e, and clamps the voltage at the node N5. When an electrostatic surge is input to the fourth input / output terminal 86d, the second surge absorbing element 98 causes the resistance value between the fourth input / output terminal 86d and the fifth input / output terminal 86e to be changed. The surge absorption circuit 86 is reduced in size, and a current flows between the fourth input / output terminal 86d and the fifth input / output terminal 86e, and the voltage of the node N7 is clamped. In this way, the surge absorbing circuit 86 is not limited to the first input / output terminal 86a or the third input / output terminal even if an electrostatic surge is input to the second input / output terminal 86b or the fourth input / output terminal 86d. The voltage output to 86c is reduced.

  FIG. 12 is a circuit diagram equivalently showing the surge absorbing circuit shown in FIG. Since the first inductor 88 and the second inductor 90 are electromagnetically coupled, they can be equivalently represented by two inductors 100 and 102 and a negative inductor (negative inductive element) 104. Similarly, since the third inductor 94 and the fourth inductor 96 are also electromagnetically coupled, they can be equivalently represented by two inductors 106 and 108 and a negative inductor (negative inductive element) 110. it can. Further, as described above, the first surge absorbing element 92 can be approximated only by the stray capacitance element (stray capacitance component) 112 for a small high-speed signal. Similarly, the second surge absorbing element 98 can be approximated by only the stray capacitance element (stray capacitance component) 114 for a small high-speed signal.

  In the equivalent circuit shown in FIG. 12, one end of the inductor 100 is connected to the first input / output terminal 86a, and the other end of the inductor 100 is connected to the node N8. One end of the inductor 102 is further connected to the node N8, and the other end of the inductor 102 is connected to the second input / output terminal 86b. One end of the negative inductor 104 is also connected to the node N8, and the other end of the negative inductor 104 is connected to one end of the stray capacitance element 112. The other end of the stray capacitance element 112 is connected to the node N6, and a fifth input / output terminal 86e is further connected to the node N6.

  On the other hand, one end of the inductor 106 is connected to the third input / output terminal 86c, and the other end of the inductor 106 is connected to the node N9. Further, one end of the inductor 108 is connected to the node N9, and the other end of the inductor 108 is connected to the fourth input / output terminal 86d. One end of the negative inductor 110 is also connected to the node N9, and the other end of the negative inductor 110 is connected to one end of the stray capacitance element 114. The other end of the stray capacitance element 114 is connected to the node N6.

Here, the impedance of each of the first inductor 88, the second inductor 90, the third inductor 94, and the fourth inductor 96 is Lz, and the coupling between the first inductor 88 and the second inductor 90 is performed. When the value of the coefficient and the value of the coupling coefficient between the third inductor 94 and the fourth inductor 96 are Kz, the inductances of the inductor 100, the inductor 102, the inductor 106, and the inductor 108 are “(1 + Kz) · Lz ”, and the inductances of the negative inductor 104 and the negative inductor 110 are“ −Kz · Lz ”. The capacitance values of the stray capacitance element 112 and the stray capacitance element 114 are Cz. Thus, the input impedance between the first input / output terminal 86a and the third input / output terminal 86c of the surge absorbing circuit 86 shown in FIG. 12 is expressed by the following equation (10). The input impedance between the second input / output terminal 86a and the fourth input / output terminal 86d of the surge absorbing circuit 86 is also expressed by the following equation (10).

  According to the above equation (10), when Kz = ± 1, the second term including ω on the right side is 0, and the input impedance Zin is constant without depending on the frequency. However, when Kz = −1, Zin = 0, which is not appropriate.

Furthermore, if Kz = 1 and Lz is set so as to satisfy the following expression (11), the input impedance Zin of the surge absorbing circuit 86 is the characteristic of the transmission line connected to each input / output terminal of the surge absorbing circuit 86. The impedance can be matched to twice the impedance Zo. In the surge absorption circuit 86, the input impedance from the first input / output terminal 86a and the third input / output terminal 86c side, and the input impedance from the second input / output terminal 86b and the fourth input / output terminal 86d side. Is the same.

  As described above, according to the surge absorbing circuit 86 of the present embodiment, the first surge absorbing element 92 and the second surge absorbing element 98 that are excellent in reducing electrostatic surge are included. Can be reduced. Moreover, according to the surge absorption circuit 86 of the present embodiment, the first inductor 88 and the second inductor 90 that are electromagnetically coupled are provided, and the third inductor 94 that is electromagnetically coupled is provided. And the fourth inductor 96, the coupling coefficient between the first inductor 88 and the second inductor 90 and the third inductor 94 and the fourth inductor so as to keep the input impedance constant over a wide band. The coupling coefficient with the inductor 96 can be set. Furthermore, according to the surge absorbing circuit 86 of the present embodiment, the input impedance of the surge absorbing circuit 86, the characteristic impedance of the pair of first transmission lines 66a (or 66b, 66c, 66d), and the pair of second impedances. The inductance of the first inductor 88 and the inductance of the second inductor 90 with respect to the stray capacitance component of the first surge absorbing element 92 so as to match the characteristic impedance of the transmission line 67a (or 67b, 67c, 67d). And the inductance of the third inductor 94 and the inductance of the fourth inductor 96 can be set for the stray capacitance component of the second surge absorbing element 98. Therefore, the surge absorbing circuit 86 of this embodiment is excellent in reducing electrostatic surges and enables impedance matching over a wide band. Therefore, the display device 10A according to the present embodiment including the surge absorbing circuit 86 can reduce the electrostatic surge input from the outside via the connector 13 without degrading the high-speed differential video signal. it can.

[Variation 1 of Surge Absorbing Circuit Applicable to Display Device of Second Embodiment]
FIG. 13 is a circuit diagram showing a surge absorbing circuit according to Modification 1 applicable to the display device according to the second embodiment. A surge absorbing circuit 86A shown in FIG. 13 further includes a first capacitive element 116 and a second capacitive element 118 in addition to the same elements as the surge absorbing circuit 86.

  One end of the first capacitive element 116 is connected to a node N10 for connecting the first input / output terminal 86a and one end of the first inductor 88. The other end of the first capacitive element 116 is connected to a node N11 for connecting the second input / output terminal 86b and the other end of the second inductor 90.

  One end of the second capacitive element 118 is connected to a node N12 for connecting the third input / output terminal 86c and one end of the third inductor 94. The other end of the second capacitive element 118 is connected to a node N13 for connecting the fourth input / output terminal 86d and the other end of the fourth inductor 96.

  FIG. 14 is a circuit diagram equivalently representing the surge absorbing circuit shown in FIG. Similar to the surge absorption circuit 86, the first and second inductors 88 and 90 that are electromagnetically coupled can be represented by two inductors 100 and 102 and a negative inductor (negative inductive element) 104. it can. The third inductor 94 and the fourth inductor 96 that are electromagnetically coupled can be represented by two inductors 106 and 108 and a negative inductor (negative inductive element) 110. Further, the first surge absorbing element 92 can be approximated by only the stray capacitance element (stray capacitance component) 112 for a small signal high speed signal, and the second surge absorbing element 98 is a small signal high speed signal. The signal can be approximated only by the stray capacitance element (stray capacitance component) 114.

The impedance of each of the first inductor 88, the second inductor 90, the third inductor 94, and the fourth inductor 96 is Lz, and the value of the coupling coefficient between the first inductor 88 and the second inductor 90, When the value of the coupling coefficient between the third inductor 94 and the fourth inductor 96 is Kz, the inductances of the inductor 100, the inductor 102, the inductor 106, and the inductor 108 are “(1 + Kz) · Lz”, which is negative. The inductances of the negative inductor 104 and the negative inductor 110 are “−Kz · Lz”. The capacitance values of the first capacitor element 116 and the second capacitor element 118 are Cs, and the capacitance values of the floating capacitor element 112 and the floating capacitor element 114 are Cz. Accordingly, the input impedance between the first input / output terminal 86a and the third input / output terminal 86c of the surge absorbing circuit 86A shown in FIG. 14 is expressed by the following expression (12). The input impedance between the second input / output terminal 86b and the fourth input / output terminal 86d of the surge absorbing circuit 86A is also expressed by the following equation (12).

  According to the above equation (12), it is understood that if Cs is set so as to satisfy the following equation (13), the input impedance Zin is constant regardless of the frequency.

Further, if Cs is set so as to satisfy the following expression (13) and Lz is set so as to satisfy the following expression (14), the input impedance Zin of the surge absorption circuit 86A is changed to each input / output of the surge absorption circuit 86A. The impedance can be matched to twice the characteristic impedance Zo of the transmission line connected to the terminal. In the surge absorption circuit 86A, the input impedance from the first input / output terminal 86a and the third input / output terminal 86c side, and the input impedance from the second input / output terminal 86b and the fourth input / output terminal 86d side are Are the same.

  As can be seen from the above equations (13) and (14), according to the surge absorbing circuit 86A of the first modification, Kz can be arbitrarily selected. That is, in the surge absorbing circuit 86A of the first modification, Cs and Lz can be changed by changing Kz, so that a more flexible circuit design than the surge absorbing circuit 86 is possible.

  As described above, according to the surge absorbing circuit 86A of the first modification, the coupling coefficient between the first inductor 88 and the second inductor 90, the third inductor 94, and the like so as to maintain the input impedance constant over a wide band. The coupling coefficient with the fourth inductor 96, the capacitance value of the first capacitor element 116, and the capacitance value of the second capacitor element 118 can be set. Furthermore, according to the surge absorbing circuit 86A of the first modification, the input impedance of the surge absorbing circuit 86A, the characteristic impedance of the pair of first transmission lines 66a (or 66b, 66c, 66d), and the pair of second transmissions. The stray capacitance component of the first surge absorbing element 92 and the stray capacitance component of the second surge absorbing element 98 are matched with the first impedance component so as to match the characteristic impedance of the line 67a (or 67b, 67c, 67d). Inductors 88, second inductor 90, third inductor 94, and inductance of each of fourth inductor 96, coupling coefficient between first inductor 88 and second inductor 90, and third inductor 94 It is possible to set a coupling coefficient with the fourth inductor 96. Therefore, the display device 10A according to the present embodiment including the surge absorbing circuit 86A of the first modification instead of the surge absorbing circuit 86 is input from the outside via the connector 13 without degrading the high-speed differential video signal. The electrostatic surge that is generated can be reduced.

  In the above description, the first surge absorbing element 92 and the second surge absorbing element 98 are approximated by only the stray capacitance element 112 and the stray capacitance element 114, respectively. As shown in FIG. 8, the second surge absorbing element 98 also includes a floating inductive element (floating inductive component). This floating inductive element also causes the input impedance of the surge absorbing circuit 86 to fluctuate with respect to frequency. That is, this floating inductive element also causes deterioration of the high-speed signal.

ただし、Ｌｅは浮遊誘導素子のインダクタンスであり、ＫｚＬｚ≧Ｌｅである。上記（１５）式を満たすようにＣｓを設定することによって、第１のサージ吸収素子９２および第２のサージ吸収素子９８に浮遊容量素子と浮遊誘導素子とが含まれていても、サージ吸収回路８６Ａの入力インピーダンスＺｉｎを、サージ吸収回路８６のそれぞれの入出力端子に接続される伝送線路の特性インピーダンスＺｏの２倍のインピーダンスに整合させることができる。 However, according to the surge absorbing circuit 86A of the first modification, the first inductor 88 and the second inductor 90 that are electromagnetically coupled have the negative inductor 104. The floating inductive element included in the surge absorbing element 92 can be canceled. Further, according to the surge absorbing circuit 86A of the first modification, since the third inductor 94 and the fourth inductor 96 that are electromagnetically coupled have the negative inductor 110, the negative inductor 110 causes the second inductor The floating inductive element included in the surge absorbing element 98 can be canceled. However, since it appears to be the same as the state where the coupling is reduced, Ks and Lz are left as they are, and Cs is expressed by the following equation (15).

Here, Le is the inductance of the floating inductive element, and KzLz ≧ Le. By setting Cs so as to satisfy the above equation (15), even if the first surge absorbing element 92 and the second surge absorbing element 98 include a stray capacitance element and a floating inductive element, the surge absorbing circuit The input impedance Zin of 86A can be matched with an impedance twice the characteristic impedance Zo of the transmission line connected to each input / output terminal of the surge absorbing circuit 86.

  As described above, according to the surge absorbing circuit 86A of the first modification, the first inductor 88 and the second inductor 90 are electromagnetically coupled to each other to cancel the floating inductive component of the first surge absorbing element 92. An inductive component can be obtained, and a negative inductive component that cancels the floating inductive component of the second surge absorbing element 98 can be obtained by electromagnetic coupling between the third inductor 94 and the fourth inductor 96. Furthermore, the input impedance matches the characteristic impedance of the pair of first transmission lines 66a (or 66b, 66c, 66d) and the characteristic impedance of the pair of second transmission lines 67a (or 67b, 67c, 67d), and Inductances and coupling coefficients of the first inductor 88 and the second inductor 90, and inductances and coupling coefficients of the third inductor 94 and the fourth inductor 96, respectively, so as to be kept constant over a wide band. Capacitance values of the first capacitor element 116 and the second capacitor element 118 can be set. Therefore, the display device 10A according to the present embodiment including the surge absorbing circuit 86A of the first modification instead of the surge absorbing circuit 86 is input from the outside via the connector 13 without degrading the high-speed differential video signal. The electrostatic surge that is generated can be reduced.

[Second Modification of Surge Absorbing Circuit Applicable to Display Device of Second Embodiment]
FIG. 15 is a circuit diagram showing a surge absorbing circuit according to Modification 2 applicable to the display device of the second embodiment. A surge absorbing circuit 86B shown in FIG. 15 includes a first inductor 120, a second inductor 122, instead of the first inductor 88, the second inductor 90, the third inductor 94, and the fourth inductor 96, respectively. , The third inductor 124 and the fourth inductor 126 are different from the surge absorbing circuit 86. First inductor 120, second inductor 122, third inductor 124, and fourth inductor 126 are electromagnetically coupled to each other.

  One end of the first inductor 120 is connected to the first input / output terminal 86a, and the other end of the first inductor 120 is connected to the node N5. One end of the second inductor 122 is further connected to the node N5, and the other end of the second inductor 120 is connected to the second input / output terminal 86b.

  On the other hand, one end of the third inductor 124 is connected to the third input / output terminal 86c, and the other end of the third inductor 124 is connected to the node N7. One end of the fourth inductor 126 is further connected to the node N7, and the other end of the fourth inductor 126 is connected to the fourth input / output terminal 86d.

  The first inductor 120, the second inductor 122, the third inductor 124, and the fourth inductor 126 are electromagnetically coupled to each other. Specifically, the first inductor 120 and the second inductor 122 are magnetically coupled so as to increase the inductance of each other, and the third inductor 124 and the fourth inductor 126 increase the inductance of each other. It is magnetically coupled so that The first inductor 120 and the third inductor 124 are magnetically coupled so as to increase the inductance when a differential signal is applied to each of the first inductor 120 and the third inductor 124. The inductor 126 is magnetically coupled so as to increase the inductance when a differential signal is applied to each. The coupling coefficient of the first inductor 120, the second inductor 122, the third inductor 124, and the fourth inductor 126 is preferably greater than 0.01 and less than or equal to 1.

  16 is a circuit diagram equivalently representing the surge absorbing circuit shown in FIG. Similar to the surge absorption circuit 86, the first inductor 120, the second inductor 122, the third inductor 124, and the fourth inductor 126 that are electromagnetically coupled are inductors 128, 130, 132, 134. And negative inductors (negative inductive elements) 136 and 138. Further, the first surge absorbing element 92 can be approximated by only the stray capacitance element (stray capacitance component) 112 for a small signal high speed signal, and the second surge absorbing element 98 is a small signal high speed signal. The signal can be approximated only by the stray capacitance element (stray capacitance component) 114.

  In the equivalent circuit shown in FIG. 16, one end of the inductor 128 is connected to the first input / output terminal 86a, and the other end of the inductor 128 is connected to the node N8. One end of the inductor 130 is further connected to the node N8, and the other end of the inductor 130 is connected to the second input / output terminal 86b. Further, one end of a negative inductor 136 is also connected to the node N8, and the other end of the negative inductor 136 is connected to one end of the stray capacitance element 112.

  One end of the inductor 132 is connected to the third input / output terminal 86c, and the other end of the inductor 132 is connected to the node N9. One end of the inductor 134 is also connected to the node N9, and the other end of the inductor 134 is connected to the fourth input / output terminal 86d. Further, one end of a negative inductor 138 is also connected to the node N9, and the other end of the negative inductor 138 is connected to one end of the stray capacitance element 114.

The impedance of each of the first inductor 120, the second inductor 122, the third inductor 124, and the fourth inductor 126 is Lz, and the value of the coupling coefficient between the first inductor 120 and the second inductor 122, The value of the coupling coefficient between the third inductor 124 and the fourth inductor 126 is Kz, the value of the coupling coefficient between the first inductor 120 and the third inductor 124, and the value of the second inductor 122 and the second inductor 126. 4 is Kc, the inductances of the inductor 128, the inductor 130, the inductor 132, and the inductor 134 are “(1 + Kz + Kc) · Lz”, and the negative inductor 136 and the negative inductor 138, respectively. The inductance of "-KzLz" The capacitance values of the stray capacitance element 112 and the stray capacitance element 114 are Cz. Accordingly, the input impedance between the first input / output terminal 86a and the third input / output terminal 86c of the surge absorbing circuit 86B shown in FIG. 16 is expressed by the following equation (16). The input impedance between the second input / output terminal 86b and the fourth input / output terminal 86d of the surge absorbing circuit 86B is also expressed by the following equation (16).

  According to the above equation (16), it is understood that if Kz and Kc are set so as to satisfy the following equation (17), the input impedance Zin becomes constant regardless of the frequency.

Furthermore, if Kz and Kc are set so as to satisfy the following expression (17) and Lz is set so as to satisfy the following expression (18), the input impedance Zin of the surge absorption circuit 86B is set to each of the surge absorption circuits 86B. The impedance can be matched to twice the characteristic impedance Zo of the transmission line connected to the input / output terminal. In the surge absorbing circuit 86B, the input impedance from the first input / output terminal 86a and the third input / output terminal 86c side, and the input impedance from the second input / output terminal 86b and the fourth input / output terminal 86d side are Are the same.

  As can be seen from the equations (17) and (18), according to the surge absorbing circuit 86B of the second modification, Kz and Kc can be arbitrarily selected. That is, in the surge absorption circuit 86B of the second modification, Lz can be changed by changing Kz and Kc, so that a circuit design with higher flexibility than the surge absorption circuit 86 can be achieved.

  As described above, according to the surge absorbing circuit 86B of the second modification, the first surge absorbing element 92 and the second surge absorbing element 98 that are excellent in reducing electrostatic surge are included, so that electrostatic surge is reduced. can do. Moreover, according to the surge absorbing circuit 86B of the modified example 2, the first inductor 120, the second inductor 122, the third inductor 124, and the fourth inductor 126 that are electromagnetically coupled are provided. Therefore, it is possible to set the coupling coefficients of the first inductor 120, the second inductor 122, the third inductor 124, and the fourth inductor 126 so as to keep the input impedance constant over a wide band. It is. Furthermore, according to the surge absorbing circuit 86B of the second modification, the input impedance of the surge absorbing circuit 86B, the characteristic impedance of the pair of first transmission lines 66a (or 66b, 66c, 66d), and the pair of second transmissions. The first inductor 120 is applied to the stray capacitance components of the first surge absorbing element 92 and the second surge absorbing element 98 so as to match the characteristic impedance of the line 67a (or 67b, 67c, 67d). The inductance and coupling coefficient of the second inductor 122, the third inductor 124, and the fourth inductor 126 can be set. Therefore, the surge absorbing circuit 86B of Modification 2 is excellent in reducing electrostatic surges and enables impedance matching over a wide band. Therefore, the display device 10A according to the present embodiment including the surge absorbing circuit 86B of Modification 2 instead of the surge absorbing circuit 86 is input from the outside via the connector 13 without degrading the high-speed differential video signal. The electrostatic surge that is generated can be reduced.

In the above description, the first surge absorbing element 92 and the second surge absorbing element 98 are approximated by only the stray capacitance element 112 and the stray capacitance element 114, respectively. As shown in FIG. 8, the second surge absorbing element 98 also includes a floating inductive element (floating inductive component). When the inductance of the floating inductive element is Le, the input impedance between the first input / output terminal 86a and the third input / output terminal 86c of the surge absorbing circuit 86B shown in FIG. expressed.

According to the above equation (19), it can be seen that if Kz, Kc, and Lz are set so as to satisfy the following equation (20), the input impedance Zin is constant regardless of the frequency.

  By setting Kz, Kc, and Lz so as to satisfy the above equation (20), the first surge absorbing element 92 and the second surge absorbing element 98 include the stray capacitance element and the floating inductive element. In addition, the input impedance Zin of the surge absorbing circuit 86B can be matched with an impedance twice as large as the characteristic impedance Zo of the transmission line connected to each input / output terminal of the surge absorbing circuit 86B.

  Thus, according to the surge absorbing circuit 86B of the second modification, the input impedance of the surge absorbing circuit 86B, the characteristic impedance of the pair of first transmission lines 66a (or 66b, 66c, 66d), and the pair of second impedances. The transmission line 67a (or 67b, 67c, 67d) of the first surge absorbing element 92 and the second surge absorbing element 98 are matched so as to match the characteristic impedance of the transmission line 67a (or 67b, 67c, 67d) and the input impedance is maintained constant over a wide band. With respect to the stray capacitance component and the stray induction component, it is possible to set the respective inductances and coupling coefficients of the first inductor 120, the second inductor 122, the third inductor 124, and the fourth inductor 126. It is.

[Variation 3 of the surge absorbing circuit applicable to the display device according to the second embodiment]
FIG. 17 is a circuit diagram illustrating a surge absorbing circuit according to Modification 3 that can be applied to the display device according to the second embodiment. A surge absorbing circuit 86C shown in FIG. 17 further includes a first capacitive element 116 and a second capacitive element 118 in addition to the same elements as the surge absorbing circuit 86B of the second modification.

  One end of the first capacitive element 116 is connected to a node N10 for connecting the first input / output terminal 86a and one end of the first inductor 120. The other end of the first capacitive element 116 is connected to a node N11 for connecting the second input / output terminal 86b and the other end of the second inductor 122.

  One end of the second capacitive element 118 is connected to a node N12 for connecting the third input / output terminal 86c and one end of the third inductor 124. The other end of the second capacitor 118 is connected to a node N13 for connecting the fourth input / output terminal 86d and the other end of the fourth inductor 126.

  FIG. 18 is a circuit diagram equivalently representing the surge absorbing circuit shown in FIG. Similar to the surge absorption circuit 86B, the first inductor 120, the second inductor 122, the third inductor 124, and the fourth inductor 126 that are electromagnetically coupled are inductors 128, 130, 132, 134, respectively. And negative inductors (negative inductive elements) 136 and 138. Further, the first surge absorbing element 92 can be approximated by only the stray capacitance element (stray capacitance component) 112 for a small signal high speed signal, and the second surge absorbing element 98 is a small signal high speed signal. The signal can be approximated only by the stray capacitance element (stray capacitance component) 114.

The impedance of each of the first inductor 120, the second inductor 122, the third inductor 124, and the fourth inductor 126 is Lz, and the value of the coupling coefficient between the first inductor 120 and the second inductor 122, The value of the coupling coefficient between the third inductor 124 and the fourth inductor 126 is Kz, the value of the coupling coefficient between the first inductor 120 and the third inductor 124, and the value of the second inductor 122 and the second inductor 126. 4 is Kc, the inductances of the inductor 128, the inductor 130, the inductor 132, and the inductor 134 are “(1 + Kz + Kc) · Lz”, and the negative inductor 136 and the negative inductor 138, respectively. The inductance of "-KzLz" The capacitance values of the first capacitor element 116 and the second capacitor element 118 are Cs, and the capacitance values of the floating capacitor element 112 and the floating capacitor element 114 are Cz. Thus, the input impedance between the first input / output terminal 86a and the third input / output terminal 86c of the surge absorbing circuit 86C shown in FIG. 18 is expressed by the following equation (21). The input impedance between the second input / output terminal 86b and the fourth input / output terminal 86d of the surge absorbing circuit 86C is also expressed by the following equation (21).

  According to the above equation (21), it is understood that if Cs is set so as to satisfy the following equation (22), the input impedance Zin is constant regardless of the frequency.

Furthermore, if Cs is set so as to satisfy the following expression (22) and Lz is set so as to satisfy the following expression (23), the input impedance Zin of the surge absorption circuit 86C is changed to each input / output of the surge absorption circuit 86C. The impedance can be matched to twice the characteristic impedance Zo of the transmission line connected to the terminal. In the surge absorption circuit 86C, the input impedance from the first input / output terminal 86a and the third input / output terminal 86c side, and the input impedance from the second input / output terminal 86b and the fourth input / output terminal 86d side are Are the same.

  As can be seen from the equations (22) and (23), according to the surge absorbing circuit 86C of the third modification, Kz and Kc can be arbitrarily selected. That is, in the surge absorbing circuit 86C of the third modification, Cs and Lz can be changed by changing Kz and Kc, so that a more flexible circuit design than the surge absorbing circuit 86 is possible.

  As described above, according to the surge absorbing circuit 86C of the third modification, the first inductor 120, the second inductor 122, the third inductor 124, and the fourth inductor so as to maintain the input impedance constant over a wide band. The coupling coefficient with the inductor 126 and the capacitance values of the first capacitor element 116 and the second capacitor element 118 can be set. Furthermore, according to the surge absorbing circuit 86C of the third modification, the input impedance of the surge absorbing circuit 86C, the characteristic impedance of the pair of first transmission lines 66a (or 66b, 66c, 66d), and the pair of second transmissions. In order to match the characteristic impedance of the line 67a (or 67b, 67c, 67d), the first inductor 120, the second inductor with respect to the stray capacitance components of the first surge absorber 92 and the second surge absorber 98 are matched. The inductance and coupling coefficient of each of the second inductor 122, the third inductor 124, and the fourth inductor 126 can be set. Therefore, the display device 10A according to the present embodiment including the surge absorbing circuit 86C according to the modified example 3 instead of the surge absorbing circuit 86 is input from the outside via the connector 13 without degrading the high-speed differential video signal. The electrostatic surge that is generated can be reduced.

  In the above description, the first surge absorbing element 92 and the second surge absorbing element 98 are approximated by only the stray capacitance element 112 and the stray capacitance element 114, respectively. As shown in FIG. 8, the second surge absorbing element 98 also includes a floating inductive element (floating inductive component).

ただし、Ｌｅは浮遊誘導素子のインダクタンスであり、ＫｚＬｚ≧Ｌｅである。上記（２４）式を満たすようにＣｓを設定することによって、第１のサージ吸収素子９２および第２のサージ吸収素子９８に浮遊容量素子と浮遊誘導素子とが含まれていても、サージ吸収回路８６Ｃの入力インピーダンスＺｉｎを、サージ吸収回路８６Ｃのそれぞれの入出力端子に接続される伝送線路の特性インピーダンスＺｏの２倍のインピーダンスに整合させることができる。 However, according to the surge absorbing circuit 86C of Modification 3, the first inductor 120, the second inductor 122, the third inductor 124, and the fourth inductor 126 that are electromagnetically coupled are negative inductors. 136 and 138, the floating inductor included in the first surge absorber 92 can be canceled by the negative inductor 136, and the floating inductor included in the second surge absorber 98 by the negative inductor 138. Can be canceled. However, since it appears to be the same as the state in which the coupling is reduced, Ks and Lz are left as they are, and Cs is expressed by the following equation (24).

Here, Le is the inductance of the floating inductive element, and KzLz ≧ Le. By setting Cs so as to satisfy the above equation (24), even if the first surge absorbing element 92 and the second surge absorbing element 98 include a stray capacitance element and a floating inductive element, the surge absorbing circuit The input impedance Zin of 86C can be matched with an impedance twice as large as the characteristic impedance Zo of the transmission line connected to each input / output terminal of the surge absorbing circuit 86C.

  Thus, according to the surge absorbing circuit 86C of the third modification, the first inductor 120, the second inductor 122, the third inductor 124, and the fourth inductor 126 are electromagnetically coupled to each other. A negative inductive component that cancels the floating inductive component of the surge absorbing element 92 and the floating inductive component of the second surge absorbing element 98 can be obtained. Furthermore, the input impedance matches the characteristic impedance of the pair of first transmission lines 66a (or 66b, 66c, 66d) and the characteristic impedance of the pair of second transmission lines 67a (or 67b, 67c, 67d), and Inductance, coupling coefficient, and first capacitance element 116 of each of the first inductor 120, the second inductor 122, the third inductor 124, and the fourth inductor 126 are maintained constant over a wide band. The capacitance value of each of the second capacitor element 118 and the second capacitor element 118 can be set. Therefore, the display device 10A according to the present embodiment including the surge absorbing circuit 86C according to the modified example 3 instead of the surge absorbing circuit 86 is input from the outside via the connector 13 without degrading the high-speed differential video signal. The electrostatic surge that is generated can be reduced.

[Variation 4 of the surge absorbing circuit applicable to the display device of the second embodiment]
FIG. 19 is a circuit diagram showing a surge absorbing circuit according to Modification 4 applicable to the display device of the second embodiment. A surge absorbing circuit 86D shown in FIG. 19 includes a first inductor 140, a second inductor 90, a second inductor 90, a third inductor 94, and a fourth inductor 96, respectively. 142, the third inductor 144, and the fourth inductor 146 are different from the surge absorbing circuit 86A. In the surge absorbing circuit 86D, the first inductor 140 and the third inductor 144 are electromagnetically coupled, and the second inductor 142 and the fourth inductor 146 are electromagnetically coupled.

  One end of the first inductor 140 is connected to the first input / output terminal 86a, and the other end of the first inductor 140 is connected to the node N5. One end of the second inductor 142 is further connected to the node N5, and the other end of the second inductor 142 is connected to the second input / output terminal 86b.

  On the other hand, one end of the third inductor 144 is connected to the first input / output terminal 86c, and the other end of the third inductor 144 is connected to the node N7. One end of the fourth inductor 146 is further connected to the node N7, and the other end of the fourth inductor 146 is connected to the second input / output terminal 86d.

  The first inductor 140 and the third inductor 144 are electromagnetically coupled, and the second inductor 142 and the fourth inductor 146 are electromagnetically coupled. Specifically, the first inductor 140 and the third inductor 144 are magnetically coupled to increase the inductance when a differential signal is applied to each of the first inductor 140 and the third inductor 144. The fourth inductor 146 is magnetically coupled to increase the inductance when a differential signal is applied to each of the fourth inductor 146. The coupling coefficient between the first inductor 140 and the third inductor 144 and the coupling coefficient between the second inductor 142 and the fourth inductor 146 are preferably greater than 0.01 and equal to or less than 1.

The impedance of each of the first inductor 140, the second inductor 142, the third inductor 144, and the fourth inductor 146 is Lz, and the value of the coupling coefficient between the first inductor 140 and the third inductor 144, The value of the coupling coefficient between the second inductor 142 and the fourth inductor 146 is Kc. The capacitance values of the first capacitor element 116 and the second capacitor element 118 are Cs. The first surge absorbing element 92 and the second surge absorbing element 98 can be approximated only by a stray capacitance element (stray capacitance component) with respect to a high-speed signal of a small signal, and the capacitance value of the stray capacitance element can be calculated. Let Cz. Thus, the input impedance between the first input / output terminal 86a and the third input / output terminal 86c of the surge absorbing circuit 86D shown in FIG. 19 is expressed by the following equation (25). The input impedance between the second input / output terminal 86b and the fourth input / output terminal 86d of the surge absorbing circuit 86D is also expressed by the following equation (25).

  According to the above equation (25), it is understood that if Cs is set so as to satisfy the following equation (26), the input impedance Zin becomes constant regardless of the frequency.

Furthermore, if Cs is set so as to satisfy the following expression (26) and Lz is set so as to satisfy the following expression (27), the input impedance Zin of the surge absorption circuit 86D is changed to each input / output of the surge absorption circuit 86D. The impedance can be matched to twice the characteristic impedance Zo of the transmission line connected to the terminal. In the surge absorbing circuit 86D, the input impedance from the first input / output terminal 86a and the third input / output terminal 86c side, and the input impedance from the second input / output terminal 86b and the fourth input / output terminal 86d side are Are the same.

  As can be seen from the above equation (27), according to the surge absorbing circuit 86D of the fourth modification, Kc can be arbitrarily selected. That is, in the surge absorption circuit 86D of the fourth modification, Lz can be changed by changing Kc, so that a circuit design with higher flexibility than the surge absorption circuit 86 is possible.

  As described above, according to the surge absorbing circuit 86D of the modified example 4, since the first surge absorbing element 92 and the second surge absorbing element 98 excellent in reducing electrostatic surge are included, the electrostatic surge is reduced. can do. Further, according to the surge absorption circuit 86D of the fourth modification, the capacitance values of the first capacitor element 116 and the second capacitor element 118 can be set so as to maintain the input impedance constant over a wide band. is there. Furthermore, according to the surge absorbing circuit 86D of the fourth modification, the first inductor 140 and the third inductor 144 which are electromagnetically coupled are provided, and the second inductor 142 which is electromagnetically coupled is provided. Since the fourth inductor 146 is included, the input impedance of the surge absorbing circuit 86D, the characteristic impedance of the pair of first transmission lines 66a (or 66b, 66c, 66d), and the pair of second transmission lines 67a (or 67b, 67c, 67d) with respect to the stray capacitance component of each of the first surge absorbing element 92 and the second surge absorbing element 98 so as to match the characteristic impedance of 67a (or 67b, 67c, 67d). The inductances of the second inductor 142, the third inductor 144, and the fourth inductor 146, respectively, It is possible to set the coupling coefficient between the inductor 140 and the third inductor 144 and the coupling coefficient between the second inductor 142 and the fourth inductor 146. Therefore, the surge absorbing circuit 86D of Modification 4 is excellent in reducing electrostatic surges and enables impedance matching over a wide band. Therefore, the display device 10A according to the present embodiment including the surge absorbing circuit 86D of the fourth modification instead of the surge absorbing circuit 86 is input from the outside via the connector 13 without degrading the high-speed differential video signal. The electrostatic surge that is generated can be reduced.

[Variation 5 of Surge Absorption Circuit Applicable to Display Device of Second Embodiment]
FIG. 20 is a circuit diagram showing a surge absorbing circuit according to Modification Example 5 applicable to the display device of the second embodiment. A surge absorption circuit 86E shown in FIG. 20 differs from the surge absorption circuit 40A in that the first inductor, the second inductor, the third inductor, and the fourth inductor are not electromagnetically coupled to each other. . Other configurations of the surge absorbing circuit 86E are the same as those of the surge absorbing circuit 86A of the first modification.

  In the surge absorption circuit 86E, the value of the coupling coefficient between the first inductor 148 and the second inductor 150 is preferably 0.01 or less, and the coupling between the third inductor 152 and the fourth inductor 154 The coefficient value is preferably 0.01 or less.

Here, let Lx be the inductance of each of the first inductor 148, the second inductor 150, the third inductor 152, and the fourth inductor 154, and the capacitances of the first capacitor element 116 and the second capacitor element 118. Let Cx be the value. The first surge absorbing element 92 approximates a high-speed signal of a small signal only by a stray capacitance element (stray capacitance component), and the capacitance value of this stray capacitance element is Cz. Thus, the input impedance between the first input / output terminal 86a and the third input / output terminal 86c of the surge absorbing circuit 86E shown in FIG. 20 is expressed by the following equation (28). The input impedance between the second input / output terminal 86b and the fourth input / output terminal 86d of the surge absorbing circuit 86E is also expressed by the following equation (28).

  According to the above equation (28), it is understood that if Cs is set so as to satisfy the following equation (29), the input impedance Zin is constant regardless of the frequency.

Furthermore, if Cx is set so as to satisfy the following expression (29) and Lx is set so as to satisfy the following expression (30), the input impedance Zin of the surge absorption circuit 86E is changed to each input / output of the surge absorption circuit 86E. The impedance can be matched to twice the characteristic impedance Zo of the transmission line connected to the terminal. In the surge absorption circuit 86E, the input impedance from the first input / output terminal 86a and the third input / output terminal 86c side, and the input impedance from the second input / output terminal 86b and the fourth input / output terminal 86d side are Are the same.

  Thus, according to the surge absorbing circuit 86E of the modified example 5, since the first surge absorbing element 92 and the second surge absorbing circuit 98 excellent in reducing electrostatic surge are included, the electrostatic surge is reduced. can do. Further, according to the surge absorbing circuit 86E of the fifth modification, the capacitance value of the first capacitive element 116 and the capacitance value of the second capacitive element 118 can be set so as to keep the input impedance constant over a wide band. Is possible. Furthermore, according to the surge absorbing circuit 86E of the modified example 5, the input impedance of the surge absorbing circuit 86E, the characteristic impedance of the pair of first transmission lines 66a (or 66b, 66c, 66d), and the pair of second transmissions. The inductance of the first inductor 148 and the inductance of the second inductor 150 with respect to the stray capacitance component of the first surge absorbing element 92 so as to match the characteristic impedance of the line 67a (or 67b, 67c, 67d) And the inductance of the third inductor 152 and the inductance of the fourth inductor 154 can be set for the stray capacitance component of the second surge absorbing element 98. Therefore, the surge absorbing circuit 86E of Modification 5 is excellent in reducing electrostatic surges and enables impedance matching over a wide band. Therefore, the display device 10A according to the present embodiment including the surge absorbing circuit 86E of the modified example 5 instead of the surge absorbing circuit 86 is input from the outside via the connector 13 without degrading the high-speed differential video signal. The electrostatic surge that is generated can be reduced.

  Next, the structure of the laminated surge absorbing component constituting the surge absorbing circuit described above will be described in detail.

[Structure of laminated surge absorbing component for surge absorbing circuit of modification 1 of first embodiment]
FIG. 21 is a partially broken perspective view showing a laminated surge absorbing component for a surge absorbing circuit according to Modification 1 of the display device of the first embodiment. The laminated surge absorbing parts 18 to 21 shown in FIG. 21 are composed of a laminated body 28 having a substantially rectangular parallelepiped shape, a first electrode 30, a second electrode 32, and third electrodes 34 and 36. .

  The first electrode 30 is provided on the first surface 28a perpendicular to the axis X of the stacked body 28 and a part on the first surface 28a side in each of the four surfaces orthogonal to the first surface 28a. ing.

  The second electrode 32 includes a second surface 28b facing the first surface 28a in the axis X direction of the stacked body 28, and a second surface 28b side in each of four surfaces orthogonal to the second surface 28b. And is provided in part of.

  The third electrode 34 is provided so as to extend in the stacking direction of the stacked body 28 at the center of the third surface 28 c parallel to the axis X of the stacked body 28. Similarly, the fourth electrode 36 is provided so as to extend in the stacking direction at the center of the fourth surface 28 d parallel to the axis X of the stacked body 28. As materials for the first electrode 30, the second electrode 32, and the third electrodes 34 and 36, conductors such as gold, platinum, silver, copper, lead, and alloys thereof are used.

  FIG. 22 is an exploded perspective view showing the laminated body shown in FIG. 21 in an exploded manner for each layer. The laminated body 28 is configured by insulating layers 200, 202, 204, 206, 208, a semiconductor layer 210 and an insulating layer 212, and conductor patterns provided in these insulating layers and semiconductor layers.

  The insulating layer 200 is an insulating material and is made of a dielectric material such as glass epoxy resin, fluororesin, or ceramic. The insulating layer 200 is provided on one main surface 202 a of the insulating layer 202.

  The insulating layer 202 is made of the same material as the insulating layer 200, for example. On one main surface 202a of the insulating layer 200, a conductor pattern 214 is formed. The conductor pattern 214 is covered with the insulating layer 200. The conductor pattern 214 includes a substantially rectangular conductor pattern 214a and a thin conductor pattern 214b extending in the axis X direction. One end 214 c of the conductor pattern 214 b is provided along one edge of the insulating layer 202 that forms part of the first surface 28 a of the multilayer body 28, and is connected to the first electrode 30. The other end of the conductor pattern 214b is connected to the conductor pattern 214a. The insulating layer 202 provided with the conductor pattern 214 is provided on one main surface 204 a of the insulating layer 204.

  A conductor pattern 216 is provided on one main surface 204 a of the insulating layer 204. The conductor pattern 216 includes conductor patterns 216a and 216b. The conductor pattern 216a is provided to face the conductor pattern 214a. One end 216 c of the conductor pattern 216 b is provided along one edge of the insulating layer 204 that forms the second surface 28 b of the multilayer body 28, and is connected to the second electrode 32. The other end of the conductor pattern 216b is connected to the conductor pattern 216a.

  The conductor pattern 214 and the conductor pattern 216 are made of a conductor such as gold, platinum, silver, copper, lead, or an alloy thereof. The insulating layer 202 and the insulating layer 204 are made of the same material as the insulating layer 200, for example.

  The conductor pattern 214 a of the conductor pattern 214 and the conductor pattern 216 a of the conductor pattern 216 overlap each other in the stacking direction of the stacked body 28. In this way, the first capacitive element 56 is formed by the conductor pattern 214, the conductor pattern 216, and the insulating layer 202.

  The insulating layer 204 provided with the conductor pattern 216 is provided on one main surface 206 a of the insulating layer 206. A coil 218 is provided on one main surface 206 a of the insulating layer 206. The coil 218 is configured as a conductor pattern. Such a conductor pattern is made of the same material as that of the conductor pattern 214, and the insulating layer 206 is made of the same material as that of the insulating layer 200.

  The coil 218 has one end 218a and the other end 218b. One end 218 a of the coil 218 is provided along one edge of the insulating layer 206 constituting a part of the first surface 28 a of the stacked body 28, and is connected to the first electrode 30. The coil 218 is used as the first inductor 42 described above, and the other end 218b is connected to one end 220a of the coil 220 through a via. This coil 220 is used as the second inductor 44.

  The coil 220 is a conductor pattern provided on one main surface 208 a of the insulating layer 208. The insulating layer 208 is made of the same material as the insulating layer 200, and the coil 220 is made of the same material as the conductor pattern 214.

  The coil 220 is provided so as to at least partially overlap the coil 218 in the stacking direction orthogonal to the axis X. That is, the coil 218 and the coil 220 are electromagnetically coupled to each other so as to obtain a desired coupling coefficient.

  The other end 220 b of the coil 220 is provided along one edge of the insulating layer 208 constituting a part of the second surface 28 b of the stacked body 28, and is connected to the second electrode 32. One end 220a of the coil 220 is connected to the conductor pattern 222 through a via.

  The conductor pattern 222 is provided on one main surface 210 a of the semiconductor layer 210. The conductor pattern 222 extends in a direction orthogonal to the axis X direction. A conductor pattern 224 is provided on one main surface 212 a of the insulating layer 212 so as to face the conductor pattern 222 via the semiconductor layer 210. The conductor pattern 224 extends in a direction orthogonal to the axis X direction, and one end 224a and the other end 224b thereof are provided along the third surface 28c and the fourth surface 28d of the multilayer body 28, respectively. The third electrodes 34 and 36 are connected.

  The conductor patterns 222 and 224 are made of the same material as the conductor pattern 214, for example, and the insulating layer 212 is made of the same material as the insulating layer 200, for example. The semiconductor layer 210 is made of a semiconductor ceramic material mainly composed of ZnO. Thus, the conductor pattern 222, the conductor pattern 224, and the semiconductor layer 210 sandwiched between the conductor pattern 222 and the conductor pattern 224 constitute a varistor, that is, the surge absorbing element 46.

  The laminated body 28 is formed by laminating the layers on which the conductor patterns are formed as described above and press-bonding them, and then firing them integrally. Each of the conductor patterns is formed by, for example, a printing technique or an etching technique. Further, by forming the first electrode 30, the second electrode 32, and the third electrodes 34 and 36 on the surface of the laminate 28, the laminated surge absorbing parts 18 to 21 shown in FIG. 21 are formed. The

  The surge absorbing circuit 40A according to the first modification composed of such laminated surge absorbing parts 18 to 21 is small in size and has a small stray capacitance component because the inductor, the surge absorbing element and the capacitive element are integrally formed. can do.

  Note that the laminated surge absorbing component for the surge absorbing circuit 40 in the display device of the first embodiment includes the insulating layer 202 provided with the conductor pattern 214 and the insulating layer 202 provided with the conductor pattern 216 in the laminate 28 described above. The structure excluding the layer 204 can be employed.

[Structure of laminated surge absorbing part for surge absorbing circuit according to modification 2 of first embodiment]
Next, a laminated surge absorbing component for the surge absorbing circuit 40B according to Modification 2 of the display device of the first embodiment will be described. The laminated surge absorbing component for the surge absorbing circuit 40B is formed on the surface of the substantially rectangular parallelepiped laminated body 28A, like the laminated surge absorbing components 18 to 21 shown in FIG. 21, and the first electrode 30, the second electrode 32, and the second electrode. 3 electrodes 34 and 36 are provided.

  FIG. 23 is an exploded perspective view showing the laminated body of the laminated surge absorbing component for the surge absorbing circuit according to the second modification of the display device of the first embodiment, exploded for each layer. A laminated body 28A shown in FIG. 23 includes an insulating layer 226 provided with a coil 230 and a conductor pattern 232 instead of the insulating layer 206 provided with a coil 218, and an insulating material provided with the coil 220. It differs from the laminated body 28 in that it has an insulating layer 228 provided with a coil 234 and a conductor pattern 236 instead of the layer 208. The laminated body 28A has a configuration excluding the insulating layer 202 provided with the conductor pattern 214 and the insulating layer 204 provided with the conductor pattern 216. Other configurations of the stacked body 28 </ b> A are the same as those of the stacked body 28.

  A coil 230 is provided on one main surface 226 a of the insulating layer 226. The coil 230 is configured as a conductor pattern. The coil 230 is used as the first inductor 60 described above. One end 230 a of the coil 230 is provided along one edge of the insulating layer 226 constituting a part of one surface orthogonal to the axis X, and is connected to the first electrode 30. The other end 230b of the coil 230 is connected to one end 234a of the coil 234 through a via.

  The coil 234 is provided on one main surface 228 a of the insulating layer 228. The coil 234 is configured as a conductor pattern. The coil 234 is used as the second inductor 62 described above. The other end 234 b of the coil 234 is provided along one edge of the insulating layer 228 constituting a part of the other surface orthogonal to the axis X, and is connected to the second electrode 32.

  The coil 230 and the coil 234 are provided so as not to overlap each other in the stacking direction orthogonal to the axis X. That is, the coil 230 and the coil 234 are formed so that the magnetic field generated by the coil 230 and the magnetic field generated by the coil 234 do not affect each other and the coupling coefficient is 0.01 or less.

  Further, a conductor pattern 232 is further provided on one main surface 226 a of the insulating layer 226. The conductor pattern 232 includes a substantially rectangular conductor pattern 232a and a conductor pattern 232b. One end 232c of the conductor pattern 232b is connected to, for example, the first electrode 30, and the other end of the conductor pattern 232b is connected to the conductor pattern 232a.

  A conductor pattern 236 is further provided on one main surface 228 a of the insulating layer 228. The conductor pattern 236 includes a rectangular conductor pattern 236a and a conductor pattern 236b. For example, one end 236c of the conductor pattern 236b is connected to the second electrode 32, and the other end of the conductor pattern 236b is connected to the conductor pattern 236a.

  The conductor pattern 232a and the conductor pattern 236a overlap in the stacking direction orthogonal to the axis X direction. Thus, the capacitive element 56 is configured by the conductor pattern 232 and the conductor pattern 236 that face each other in the direction of the axis X, and the insulating layer 226 sandwiched between the conductor pattern 232 and the conductor pattern 236.

  The insulating layer 226 and the insulating layer 228 are made of the same material as that of the insulating layer 200, for example, and the coil 230, the conductor pattern 232, the coil 234, and the conductor pattern 236 are made of the same material as that of the conductor pattern 214, for example.

  The surge absorbing circuit 40B of Modification 2 made of such a laminated surge absorbing component is small in size and has a small stray capacitance component because the inductor, the surge absorbing element, and the capacitive element are integrally formed. be able to.

[Structure of laminated surge absorbing component for surge absorbing circuit according to Modification 1 of Second Embodiment]
FIG. 24 is a perspective view showing a laminated surge absorbing component for a surge absorbing circuit according to Modification 1 of the display device according to the second embodiment. The laminated surge absorbing parts 18A to 21A shown in FIG. 24 include a laminated body 74 having a substantially rectangular parallelepiped shape, a first electrode 76, a second electrode 77, a third electrode 78, and a fourth electrode 79. , Fifth electrodes 80 and 81, sixth electrode 82, and seventh electrode 83.

  The first electrode 76, the fifth electrode 80, and the third electrode 78 are provided side by side on the first surface 74 a that is orthogonal to the axis X of the stacked body 74. The first electrode 76, the fifth electrode 80, and the third electrode 78 are each formed to extend in the stacking direction orthogonal to the axis X.

  On the other hand, the second electrode 77, the fifth electrode 81, and the fourth electrode 79 are provided side by side on the second surface 74 b facing the first surface 74 a in the axis X direction of the multilayer body 74. ing. The second electrode 77, the fifth electrode 81, and the fourth electrode 79 are each formed to extend in the stacking direction orthogonal to the axis X.

  The sixth electrode 82 is provided to extend in the stacking direction of the stacked body 74 at the center of the third surface 74 c parallel to the axis X of the stacked body 74. Similarly, the seventh electrode 83 is provided so as to extend in the stacking direction of the stacked body 74 at the center portion of the fourth surface 74d facing the third surface 74c parallel to the axis X of the stacked body 74. . The material of these first electrode 76, second electrode 77, third electrode 78, fourth electrode 79, fifth electrode 80, 81, sixth electrode 82, and seventh electrode 83 is used. In this case, a conductor such as gold, platinum, silver, copper, lead, or an alloy thereof is used.

  FIG. 25 is an exploded perspective view showing the laminated body shown in FIG. 24 in an exploded manner for each layer. The stacked body 74 includes insulating layers 240, 242, 244, 246, 248, a semiconductor layer 250 and an insulating layer 252, and a conductor pattern provided in these insulating layers and semiconductor layers.

  The insulating layer 240 is a material having an insulating property, and is made of a dielectric material such as glass epoxy resin, fluorine resin, or ceramic. The insulating layer 240 is provided on one main surface 242 a of the insulating layer 242.

  The insulating layer 242 is made of the same material as the insulating layer 240, for example. Conductive patterns 254 and 255 are formed on one main surface 242 a of the insulating layer 240. The conductor patterns 254 and 255 are covered with an insulating layer 240. The conductor pattern 254 includes a substantially rectangular conductor pattern 254a and a thin conductor pattern 254b extending in the axis X direction. One end 254 c of the conductor pattern 254 b is provided along one edge of the insulating layer 242 that forms part of the second surface 74 b of the multilayer body 74, and is connected to the second electrode 77. The other end of the conductor pattern 254b is connected to the conductor pattern 254a.

  On the other hand, the conductor pattern 255 includes a substantially rectangular conductor pattern 255a and a thin conductor pattern 255b extending in the axis X direction. One end 255 c of the conductor pattern 255 b is provided along one edge of the insulating layer 242 that forms part of the second surface 74 b of the multilayer body 74, and is connected to the fourth electrode 79. The other end of the conductor pattern 255b is connected to the conductor pattern 255a. The insulating layer 242 provided with the conductor patterns 254 and 255 is provided on one main surface 244 a of the insulating layer 244.

  Conductive patterns 256 and 257 are provided on one main surface 244 a of the insulating layer 244. The conductor pattern 256 includes conductor patterns 256a and 256b. The conductor pattern 256a is provided to face the conductor pattern 254a. One end 256 c of the conductor pattern 256 b is provided along one edge of the insulating layer 244 that forms the first surface 74 a of the multilayer body 74, and is connected to the first electrode 76. The other end of the conductor pattern 256b is connected to the conductor pattern 256a.

  On the other hand, the conductor pattern 257 includes conductor patterns 257a and 257b. The conductor pattern 257a is provided so as to face the conductor pattern 255a. The one end 257 c of the conductor pattern 257 b is provided along one edge of the insulating layer 244 that forms the first surface 74 a of the multilayer body 74, and is connected to the third electrode 78. The other end of the conductor pattern 257b is connected to the conductor pattern 257a.

  The conductor patterns 254 and 255 and the conductor patterns 256 and 257 are made of a conductor such as gold, platinum, silver, copper, lead, or an alloy thereof. The insulating layer 242 and the insulating layer 244 are made of the same material as the insulating layer 240, for example.

  The conductor pattern 254 a of the conductor pattern 254 and the conductor pattern 256 a of the conductor pattern 256 overlap each other in the stacking direction of the stacked body 74. In this manner, the first capacitor element 116 is formed by the conductor pattern 254 and the conductor pattern 256 and the insulating layer 242 sandwiched between the conductor pattern 254 and the conductor pattern 256.

  In addition, the conductor pattern 255 a of the conductor pattern 255 and the conductor pattern 257 a of the conductor pattern 257 overlap each other in the stacking direction of the stacked body 74. In this manner, the second capacitor element 118 is formed by the conductor pattern 255 and the conductor pattern 257 and the insulating layer 242 sandwiched between the conductor pattern 255 and the conductor pattern 257.

  The insulating layer 244 provided with the conductor patterns 256 and 257 is provided on one main surface 246 a of the insulating layer 246. Coils 258 and 259 are formed on one main surface 246 a of the insulating layer 246. The coils 258 and 259 are each configured as a conductor pattern. Such a conductor pattern is made of the same material as that of the conductor pattern 254, and the insulating layer 246 is made of the same material as that of the insulating layer 240.

  The coil 258 has one end 258a and the other end 258b. One end 258 a of the coil 218 is provided along one edge of the insulating layer 246 constituting a part of the first surface 74 a of the multilayer body 74, and is connected to the first electrode 76. The coil 258 is used as the first inductor 88 described above. The other end 258 b of the coil 258 is provided along one edge of the insulating layer 246 that constitutes a part of the third surface 74 c of the stacked body 74, and one end 260 a of the coil 260 via the sixth electrode 82. It is connected to the. This coil 260 is used as the second inductor 90.

  On the other hand, the coil 259 has one end 259a and the other end 259b. One end 259 a of the coil 259 is provided along one edge of the insulating layer 246 that constitutes a part of the first surface 74 a of the multilayer body 74, and is connected to the third electrode 78. The coil 259 is used as the third inductor 94 described above. The other end 259 b of the coil 259 is provided along one edge of the insulating layer 246 that constitutes a part of the fourth surface 74 d of the multilayer body 74, and one end 261 a of the coil 261 via the seventh electrode 83. It is connected to the. This coil 261 is used as the fourth inductor 96.

  Coils 260 and 261 are conductor patterns provided on one main surface 248a of insulating layer 248, respectively. The insulating layer 248 is made of the same material as the insulating layer 240, and the coils 260 and 261 are made of the same material as the conductor pattern 254, respectively.

  The coil 260 is provided so as to at least partially overlap the coil 258 in the stacking direction orthogonal to the axis X. That is, the coil 258 and the coil 260 are electromagnetically coupled to each other so as to obtain a desired coupling coefficient. The coil 261 is provided so as to at least partially overlap the coil 259 in the stacking direction orthogonal to the axis X. That is, the coil 259 and the coil 261 are electromagnetically coupled to each other so as to obtain a desired coupling coefficient.

  The other end 260 b of the coil 260 is provided along one edge of the insulating layer 248 that constitutes a part of the second surface 74 b of the multilayer body 74, and is connected to the second electrode 77. Further, one end 260 a of the coil 260 is connected to one end 262 a of the conductor pattern 262 through the sixth electrode 82.

  On the other hand, the other end 261 b of the coil 261 is provided along one edge of the insulating layer 248 that constitutes a part of the second surface 74 b of the multilayer body 74, and is connected to the fourth electrode 79. Further, one end 261 a of the coil 261 is connected to one end 263 a of the conductor pattern 263 through the seventh electrode 83.

  The conductor patterns 262 and 263 are provided on one main surface 250 a of the semiconductor layer 250. The conductor pattern 262 extends in a direction intersecting the axis X direction. Similarly, the conductor pattern 263 extends in a direction crossing the axis X direction. A conductor pattern 264 is provided on one main surface 252a of the insulating layer 252 so as to face the other end 262b of the conductor pattern 262 and the other end 263b of the conductor pattern 263 via the semiconductor layer 250. Yes. The conductor pattern 264 extends in the direction of the axis X, and one end 264a and the other end 264b thereof are respectively provided along the first surface 74a and the second surface 74b of the multilayer body 74, and the fifth electrode 80 and 81 are connected.

  The conductor patterns 262, 263, and 264 are made of the same material as the conductor pattern 254, for example, and the insulating layer 252 is made of the same material as the insulating layer 240, for example. The semiconductor layer 250 is made of a semiconductor ceramic material mainly composed of ZnO. Thus, the other end portion 262b of the conductor pattern 262, a part of the conductor pattern 264 facing the other end portion 262b, and the semiconductor layer 250 sandwiched between the conductor pattern 262 and the conductor pattern 264 are: A varistor, that is, a first surge absorbing element 92 is configured.

  Similarly, the other end portion 263b of the conductor pattern 263, a part of the conductor pattern 264 facing the other end portion 263b, and the semiconductor layer 250 sandwiched between the conductor pattern 263 and the conductor pattern 264 include a varistor, That is, the second surge absorbing element 98 is configured.

  The surge absorbing circuit 86A according to the first modification composed of the laminated surge absorbing parts 18A to 21A is small in size and has a small stray capacitance component because the inductor, the surge absorbing element and the capacitive element are integrally formed. can do.

  The surge absorbing circuit 86 according to the second embodiment excludes the insulating layer 242 provided with the conductor patterns 254 and 255 and the insulating layer 244 provided with the conductor patterns 256 and 257 in the laminate 74 described above. What is necessary is just to be comprised from a laminated surge absorption component.

[Structure of laminated surge absorbing part for surge absorbing circuit according to modification 3 of second embodiment]
Next, a laminated surge absorbing component for the surge absorbing circuit 86C according to Modification 3 of the display device according to the second embodiment will be described. A laminated surge absorbing component for the surge absorbing circuit 86C is formed on the surface of a substantially rectangular parallelepiped laminated body 74A, like the laminated surge absorbing components 18A to 21A shown in FIG. The third electrode 78, the fourth electrode 79, the fifth electrodes 80 and 81, the sixth electrode 82, and the seventh electrode 83 are provided.

  FIG. 26 is an exploded perspective view showing the laminated body of the laminated surge absorbing component for the surge absorbing circuit according to Modification 3 in the display device of the second embodiment, broken down for each layer. The laminated body 74A includes an insulating layer 266 provided with a coil 274 and an insulating layer provided with a coil 275 instead of the insulating layer 246 provided with the coils 258 and 259 and the insulating layer 248 provided with the coils 260 and 261. 268, an insulating layer 270 provided with a coil 276, and an insulating layer 272 provided with a coil 277, which is different from the stacked body 74. The other configuration of the stacked body 74A is the same as that of the stacked body 74.

  A coil 274 is provided on one main surface 266 a of the insulating layer 266. The coil 274 is configured as a conductor pattern. The coil 274 is used as the fourth inductor 126 described above. One end 274 a of the coil 274 is provided along one edge of the insulating layer 266 that constitutes a part of one surface orthogonal to the axis X, and is connected to the fourth electrode 79. The other end 274 b of the coil 274 is provided along one edge of the insulating layer 266 that constitutes a part of one surface parallel to the axis X, and is connected to the one end 275 a of the coil 275 via the seventh electrode 83. It is connected.

  The coil 275 is provided on one main surface 268 a of the insulating layer 268. The coil 275 is configured as a conductor pattern. The coil 275 is used as the third inductor 124 described above. The other end 275 b of the coil 275 is provided along one edge of the insulating layer 268 constituting a part of the other surface orthogonal to the axis X, and is connected to the third electrode 78. The insulating layer 268 on which the coil 275 is formed is provided on one main surface 270 a of the insulating layer 270.

  A coil 276 is provided on one main surface 270 a of the insulating layer 270. The coil 276 is configured as a conductor pattern. The coil 276 is used as the first inductor 120 described above. One end 276 a of the coil 276 is provided along one edge of the insulating layer 270 constituting a part of one surface orthogonal to the axis X, and is connected to the first electrode 76. The other end 276 b of the coil 276 is provided along one edge of the insulating layer 270 constituting a part of the other surface parallel to the axis X, and is connected to the one end 277 a of the coil 277 via the sixth electrode 82. It is connected.

  The coil 277 is provided on one main surface 272 a of the insulating layer 272. The coil 277 is configured as a conductor pattern. The coil 277 is used as the second inductor 122 described above. The other end 277 b of the coil 277 is provided along one edge of the insulating layer 272 constituting a part of the other surface orthogonal to the axis X, and is connected to the second electrode 77.

  The coil 274, the coil 275, the coil 276, and the coil 277 are provided so that at least a part thereof overlaps with each other in the stacking direction orthogonal to the axis X. That is, the coil 274, the coil 275, the coil 276, and the coil 277 are electromagnetically coupled to each other so as to obtain a desired coupling coefficient.

  The coils 274, 275, 276, and 277 are made of the same material as that of the conductor pattern 254, for example, and the insulating layers 266, 268, 270, and 272 are made of the same material as that of the insulating layer 240, for example.

  The surge absorbing circuit 86C of Modification 3 made of such a laminated surge absorbing component is small in size and has a small stray capacitance component because the inductor, the surge absorbing element, and the capacitive element are integrally formed. be able to.

  The surge absorbing circuit 86B according to the second modification of the second embodiment includes an insulating layer 242 provided with the conductor patterns 254 and 255 and an insulating layer provided with the conductor patterns 256 and 257 in the laminate 74A. What is necessary is just to be comprised from the lamination | stacking surge absorption components except 244.

[Structure of Laminated Surge Absorbing Component for Surge Absorbing Circuit According to Modification 4 of Second Embodiment]
Next, a laminated surge absorbing component for the surge absorbing circuit 86D according to Modification 4 of the second embodiment will be described. A laminated surge absorbing component for the surge absorbing circuit 86D is formed on the surface of a substantially rectangular parallelepiped laminated body 74B in the same manner as the laminated surge absorbing components 18A to 21A shown in FIG. The third electrode 78, the fourth electrode 79, the fifth electrodes 80 and 81, the sixth electrode 82, and the seventh electrode 83 are provided.

  FIG. 27 is an exploded perspective view showing a layered structure of a laminated surge absorbing component for a surge absorbing circuit according to Modification 4 in the display device of the second embodiment, exploded for each layer. The laminated body 74B is provided with an insulating layer 246 provided with coils 258 and 259, an insulating layer 248 provided with coils 260 and 261, a semiconductor layer 250 provided with conductor patterns 262 and 263, and a conductor pattern 264. Instead of the insulating layer 252, the insulating layer 280 provided with the coils 288, 290, 292, 294, the insulating layer 282 provided with the coils 289, 293, the insulating layer 284 provided with the conductor patterns 296, 297, and The laminated body 74 is different from the laminated body 74 in that it has an insulating layer 286 provided with a conductor pattern 298. The other configuration of the stacked body 74B is the same as that of the stacked body 74.

  Coils 288, 290, 292, and 294 are provided on one main surface 280 a of the insulating layer 280. The coils 288, 290, 292, and 294 are each configured as a conductor pattern. One end 288 a of the coil 288 is provided along one edge of the insulating layer 280 that constitutes a part of one surface orthogonal to the axis X, and is connected to the first electrode 76. The other end 288b of the coil 288 is connected to one end 289a of the coil 289 through a via.

  On the other hand, one end 292 a of the coil 292 is provided along one edge of the insulating layer 280 constituting a part of one surface orthogonal to the axis X, and is connected to the third electrode 78. The other end 292b of the coil 292 is connected to one end 293a of the coil 293 through a via.

  The coil 289 and the coil 293 are provided on one main surface 282 a of the insulating layer 282. The coil 289 and the coil 293 are configured as a conductor pattern. The coil 289 has a first portion 289b and a second portion 289c that are substantially bisected. Similarly, the coil 293 has a first portion 293b and a second portion 293c that are substantially bisected. The first portion 289b and the coil 288 of the coil 289 are used as the first inductor 140, and the first portion 293b and the coil 292 of the coil 293 are used as the third inductor 144. is there.

  The other end 289d of the coil 289 is connected to one end 290a of the coil 290 provided in the insulating layer 280 through a via. The other end 293d of the coil 293 is connected to one end 294a of the coil 294 provided in the insulating layer 280 through a via. The other end 290 b of the coil 290 is provided along one edge of the insulating layer 280 constituting a part of the other surface orthogonal to the axis X, and is connected to the second electrode 77. The other end 294 b of the coil 294 is provided along one edge of the insulating layer 280 constituting a part of the other surface orthogonal to the axis X, and is connected to the fourth electrode 79. The coil 290 and the second portion 289c of the coil 289 are used as the second inductor 142, and the coil 294 and the second portion 293c of the coil 293 are used as the fourth inductor 146. It is.

  The coil 288 and the coil 292 are provided close to each other. That is, the coil 288 and the coil 292 are electromagnetically coupled to each other so that a desired coupling coefficient is obtained. Similarly, the coil 290 and the coil 294 are close to each other and are electromagnetically coupled to each other so as to obtain a desired coupling coefficient.

  The coils 288, 289, 290, 292, 293, and 294 are made of the same material as the conductor pattern 254, for example, and the insulating layers 280 and 282 are made of the same material as the insulating layer 240, for example.

  A portion between the first portion 289b and the second portion 289c of the coil 289 is connected to the conductor pattern 296 through a via, and the first portion 293b and the second portion 293c of the coil 293 are connected to each other. The portion in between is connected to the conductor pattern 297 through a via.

  Conductive patterns 296 and 297 are provided on one main surface 284 a of semiconductor layer 284. The semiconductor layer 284 is provided on one main surface 286 a of the insulating layer 286. A conductor pattern 298 is provided on one main surface 286a of the insulating layer 286. The conductor pattern 298 includes a conductor pattern 298a extending in the axis X direction and a conductor pattern 298b orthogonal to the axis X direction. One end 298c and the other end 298d of the conductor pattern 298a are provided along one surface and the other surface orthogonal to the axis X of the multilayer body 74B, respectively, and are connected to the fifth electrodes 80 and 81. . The conductor pattern 298b is provided so as to overlap the conductor pattern 296 and the conductor pattern 297 in the stacking direction orthogonal to the axis X direction. One end of the conductor pattern 298b is connected to the conductor pattern 298a.

  The conductor patterns 296, 297, and 298 are made of the same material as that of the conductor pattern 254, for example, and the insulating layer 286 is made of the same material as that of the insulating layer 240, for example. The semiconductor layer 284 is made of a semiconductor ceramic material containing ZnO as a main component. Thus, the conductor pattern 296, a part of the conductor pattern 298 opposite to the conductor pattern 296, and the semiconductor layer 284 sandwiched between the conductor pattern 296 and the conductor pattern 298 are varistors, that is, the first A surge absorbing element 92 is configured.

  Similarly, the conductor pattern 297, a part of the conductor pattern 298 opposite to the conductor pattern 297, and the semiconductor layer 284 sandwiched between the conductor pattern 297 and the conductor pattern 298 are varistors, that is, a second surge absorbing element. An element 98 is configured.

  The surge absorbing circuit 86D of Modification 4 made of such a laminated surge absorbing component is small in size and can reduce the stray capacitance component because the inductor, the surge absorbing element and the capacitive element are integrally formed. it can.

[Structure of laminated surge absorbing component for surge absorbing circuit according to Modification 5 of Second Embodiment]
Next, a laminated surge absorbing part for surge absorbing circuit 86E according to Modification 5 of the display device of the second embodiment will be described. A laminated surge absorbing component for the surge absorbing circuit 86E is formed on the surface of a substantially rectangular parallelepiped laminated body 74C in the same manner as the laminated surge absorbing components 18A to 21A shown in FIG. The third electrode 78, the fourth electrode 79, the fifth electrodes 80 and 81, the sixth electrode 82, and the seventh electrode 83 are provided.

  FIG. 28 is an exploded perspective view showing the laminated body of the laminated surge absorbing component for the surge absorbing circuit according to the modified example 5 of the display device of the second embodiment, exploded for each layer. The laminated body 74C includes an insulating layer 246 provided with coils 258 and 259, and an insulating layer 300 provided with coils 304, 306, 308, and 310 instead of the insulating layer 248 provided with coils 260 and 261. The laminated body 74 is different from the laminated body 74 in that it has an insulating layer 302 provided with coils 305 and 309. The other configuration of the stacked body 74C is the same as that of the stacked body 74.

  On one main surface 300a of the insulating layer 300, coils 304, 306, 308, and 310 are provided. The coils 304, 306, 308, 310 are each configured as a conductor pattern. One end 304 a of the coil 304 is provided along one edge of the insulating layer 300 constituting a part of one surface orthogonal to the axis X, and is connected to the first electrode 76. The other end 304b of the coil 304 is connected to one end 305a of the coil 305 through a via.

  On the other hand, one end 308 a of the coil 308 is provided along one edge of the insulating layer 300 constituting a part of one surface orthogonal to the axis X, and is connected to the third electrode 78. The other end 308b of the coil 308 is connected to one end 309a of the coil 309 through a via.

  The coil 305 and the coil 309 are provided on one main surface 302 a of the insulating layer 302. The coil 305 and the coil 309 are configured as conductor patterns. The coil 305 has a first portion 305b and a second portion 305c that are substantially divided into two equal parts. Similarly, the coil 309 has a first portion 309b and a second portion 309c that are substantially bisected. The first portion 305 b and the coil 304 of the coil 305 are used as the first inductor 148, and the first portion 309 b of the coil 309 and the coil 308 are used as the third inductor 152. is there.

  The other end 305d of the coil 305 is connected to one end 306a of the coil 306 provided in the insulating layer 300 through a via. The other end 309d of the coil 309 is connected to one end 310a of the coil 310 provided in the insulating layer 300 through a via. The other end 306 b of the coil 306 is provided along one edge of the insulating layer 300 constituting a part of the other surface orthogonal to the axis X, and is connected to the second electrode 77. The other end 310 b of the coil 310 is provided along one edge of the insulating layer 300 constituting a part of the other surface orthogonal to the axis X, and is connected to the fourth electrode 79. The coil 306 and the second portion 305c of the coil 305 are used as the second inductor 150, and the coil 310 and the second portion 309c of the coil 309 are used as the fourth inductor 154. It is.

  The coils 304, 306, 308, and 310 are separated from each other, and the coil 305 and the coil 309 are separated from each other. That is, the magnetic field generated by each of the coils 304, 306, 308, and 310 does not affect the magnetic field of other coils in the coils 304, 306, 308, and 310, and the coupling coefficient is 0.01 or less. Coils 304, 306, 308, and 310 are formed. Further, the coil 305 and the coil 309 are formed so that the magnetic field generated by the coil 305 and the magnetic field generated by the coil 309 do not affect each other and the coupling coefficient is 0.01 or less.

  A portion between the first portion 305b and the second portion 305c of the coil 305 is connected to the sixth electrode 82, and a portion between the first portion 309b and the second portion 309c of the coil 309 is Are connected to the seventh electrode 83.

  For example, the coils 304, 305, 306, 308, 309, and 310 are made of the same material as that of the conductor pattern 254, and the insulating layers 300 and 302 are made of the same material as that of the insulating layer 240.

  The surge absorbing circuit 86E of Modification 5 made of such laminated surge absorbing parts is small in size and can reduce the stray capacitance component because the inductor, the surge absorbing element and the capacitive element are integrally formed. it can.

  The present invention is not limited to the above-described embodiment, and various modifications can be made.

  In the second embodiment, an example of a display device using the single LVDS method has been described. However, the aspect of the present invention can also be applied to a display device using a parallel LVDS method (dual LVDS method) or other various transmission methods. is there. In this case, the number of surge absorption circuits may be increased or decreased according to the number of channels. Similarly, also in the first embodiment, it is possible to increase or decrease the number of surge absorbing circuits in accordance with the number of channels.

  In the second embodiment, the display device including one differential surge absorbing circuit is illustrated for the pair of differential transmission lines. However, the display device of the second embodiment is different from the display device in the second embodiment. In place of the dynamic type surge absorption circuit, two single type surge absorption circuits of the first embodiment are provided, and one single type surge absorption circuit is provided for each of the pair of differential transmission lines. Also good. An example is shown in FIG. FIG. 29 is a diagram showing a portion A in a display device according to a modification of the present embodiment. As shown in FIG. 29, the display device 10B is the same as the display device 10A according to the second embodiment, but instead of the laminated surge absorbing parts 18A, 19A, 20A, and 21A having a differential surge absorbing circuit. Surge absorbing parts 18, 19, 20, 21 may be provided.

  In this embodiment, a varistor made of a metal oxide such as ZnO is used as the surge absorbing element. However, the surge absorbing element is a PN junction element made of a semiconductor such as Si, or a surge absorbing element made of molybdenum. In addition, a gap-type discharge element using discharge between electrodes can be applied.

  In the present embodiment, the laminated surge absorbing component that realizes the surge absorbing circuit is illustrated, but the method for realizing the surge absorbing circuit is not limited to this embodiment. The configuration of the laminated body of the laminated surge absorbing component is not limited to the present embodiment, and may be various forms. Further, the surge absorbing circuit may be directly formed on the above-described substrates 11 and 11A.

1 is a perspective view showing a display device according to a first embodiment of the present invention. It is a figure which expands and shows the part A in the display apparatus shown in FIG. 1 is a circuit diagram showing a display device according to a first embodiment of the present invention. It is a circuit diagram which shows the surge absorption circuit applicable to the display apparatus of 1st Embodiment. FIG. 5 is a circuit diagram equivalently showing the surge absorbing circuit shown in FIG. 4. It is a circuit diagram which shows the surge absorption circuit which concerns on the modification 1 applicable to the display apparatus of 1st Embodiment. FIG. 7 is a circuit diagram equivalently representing the surge absorbing circuit shown in FIG. 6. It is an equivalent circuit diagram of the 1st surge absorption element. It is a circuit diagram which shows the surge absorption circuit which concerns on the modification 2 applicable to the display apparatus of 1st Embodiment. It is a figure which shows the part A in the display apparatus which concerns on the 2nd Embodiment of this invention. It is a circuit diagram which shows the surge absorption circuit applicable to the display apparatus of 2nd Embodiment. FIG. 12 is a circuit diagram equivalently showing the surge absorbing circuit shown in FIG. 11. It is a circuit diagram which shows the surge absorption circuit which concerns on the modification 1 applicable to the display apparatus of 2nd Embodiment. FIG. 14 is a circuit diagram equivalently representing the surge absorbing circuit shown in FIG. 13. It is a circuit diagram which shows the surge absorption circuit which concerns on the modification 2 applicable to the display apparatus of 2nd Embodiment. FIG. 16 is a circuit diagram equivalently representing the surge absorbing circuit shown in FIG. 15. It is a circuit diagram which shows the surge absorption circuit which concerns on the modification 3 applicable to the display apparatus of 2nd Embodiment. FIG. 18 is a circuit diagram equivalently representing the surge absorbing circuit shown in FIG. 17. It is a circuit diagram which shows the surge absorption circuit which concerns on the modification 4 applicable to the display apparatus of 2nd Embodiment. It is a circuit diagram which shows the surge absorption circuit which concerns on the modification 5 applicable to the display apparatus of 2nd Embodiment. It is a perspective view which fractures | ruptures and shows partially the laminated surge absorption component for surge absorption circuits which concerns on the modification 1 in the display apparatus of 1st Embodiment. It is a disassembled perspective view which decomposes | disassembles and shows the laminated body shown in FIG. 21 for every layer. It is a disassembled perspective view which decomposes | disassembles and shows the laminated body of the laminated surge absorption components for surge absorption circuits which concern on the modification 2 in the display apparatus of 1st Embodiment for every layer. It is a perspective view which shows the lamination | stacking surge absorption component for surge absorption circuits which concerns on the modification 1 in the display apparatus of 2nd Embodiment. It is a disassembled perspective view which decomposes | disassembles and shows the laminated body shown in FIG. 24 for every layer. It is a disassembled perspective view which decomposes | disassembles and shows the laminated body of the laminated surge absorption components for surge absorption circuits which concern on the modification 3 in the display apparatus of 2nd Embodiment for every layer. It is a disassembled perspective view which decomposes | disassembles and shows the laminated body of the laminated surge absorption components for surge absorption circuits which concern on the modification 4 in the display apparatus of 2nd Embodiment for every layer. It is a disassembled perspective view which decomposes | disassembles and shows the laminated body of the laminated surge absorption components for surge absorption circuits which concern on the modification 5 in the display apparatus of 2nd Embodiment for every layer. It is a figure which shows the part A in the display apparatus which concerns on the modification of this Embodiment.

Explanation of symbols

DESCRIPTION OF SYMBOLS 10 ... Display apparatus, 12 ... Display panel, 13 ... Connector (including ground terminal), 14a, 14b, 14c, 14d ... First transmission line, 15a, 15b, 15c, 15d ... Second transmission line, 18, 19 , 20, 21 ... laminated surge absorbing component, 22 ... interface circuit, 23 ... drive circuit, 24 ... display unit, 40 ... surge absorbing circuit, 42 ... first inductor, 44 ... second inductor, 46 ... surge absorbing element 56: Capacitance elements.

Claims (10)

A connector;
A display unit;
N pieces provided between the connector and the display unit, each connected to the connector via a first transmission line and each connected to the display unit via a second transmission line Surge absorption circuit (N is an integer of 1 or more),
With
Each of the N surge absorbing circuits is
A first inductor having one end connected to the first transmission line;
One end connected to the other end of the first inductor and the other end connected to the second transmission line are electromagnetically coupled to the first inductor so as to increase the inductance of each other. A second inductor,
A surge absorbing element having one end connected to the other end of the first inductor and the one end of the second inductor and the other end connected to a ground terminal;
Having
Display device. The surge absorbing circuit further includes a capacitive element provided between the one end of the first inductor and the other end of the second inductor.
The display device according to claim 1. A connector;
A display unit;
N pieces provided between the connector and the display unit, each connected to the connector via a first transmission line and each connected to the display unit via a second transmission line Surge absorption circuit (N is an integer of 1 or more),
With
Each of the N surge absorbing circuits is
A first inductor having one end connected to the first transmission line;
A second inductor having one end connected to the other end of the first inductor and the other end connected to the second transmission line;
A surge absorbing element having one end connected to the other end of the first inductor and the one end of the second inductor and the other end connected to a ground terminal;
A capacitive element provided between the one end of the first inductor and the other end of the second inductor;
Having
Display device. A connector;
A display unit;
Provided between the connector and the display unit, each connected to the connector via a pair of first transmission lines and each connected to the display unit via a pair of second transmission lines N surge absorbing circuits (N is an integer of 1 or more),
With
Each of the N surge absorbing circuits is
A first inductor having one end connected to one first transmission line of the pair of first transmission lines;
One end connected to the other end of the first inductor and the other end connected to one second transmission line of the pair of second transmission lines so as to increase inductance with each other A second inductor electromagnetically coupled to the first inductor;
A third inductor having one end connected to the other first transmission line of the pair of first transmission lines;
One end connected to the other end of the third inductor and the other end connected to the other second transmission line of the pair of second transmission lines so as to increase inductance with each other A fourth inductor electromagnetically coupled to the third inductor;
A first surge absorbing element having one end connected to the other end of the first inductor and the one end of the second inductor and the other end connected to a ground terminal;
A second surge absorbing element having one end connected to the other end of the third inductor and the one end of the fourth inductor and the other end connected to the ground terminal;
Having
Display device. A connector;
A display unit;
Provided between the connector and the display unit, each connected to the connector via a pair of first transmission lines and each connected to the display unit via a pair of second transmission lines N surge absorbing circuits (N is an integer of 1 or more),
With
Each of the N surge absorbing circuits is
A first inductor having one end connected to one first transmission line of the pair of first transmission lines;
A second inductor having one end connected to the other end of the first inductor and the other end connected to one second transmission line of the pair of second transmission lines;
A third inductor having one end connected to the other first transmission line of the pair of first transmission lines;
A fourth inductor having one end connected to the other end of the third inductor and the other end connected to the other second transmission line of the pair of second transmission lines;
A first surge absorbing element having one end connected to the other end of the first inductor and the one end of the second inductor and the other end connected to a ground terminal;
A second surge absorbing element having one end connected to the other end of the third inductor and the one end of the fourth inductor and the other end connected to the ground terminal;
Have
The first inductor, the second inductor, the third inductor, and the fourth inductor are electromagnetically coupled to increase the inductance when a differential signal is applied. ,
Display device. The surge absorbing circuit is
A first capacitive element provided between the one end of the first inductor and the other end of the second inductor;
A second capacitive element provided between the one end of the third inductor and the other end of the fourth inductor;
Further having
The display device according to claim 4 or 5. A connector;
A display unit;
Provided between the connector and the display unit, each connected to the connector via a pair of first transmission lines and each connected to the display unit via a pair of second transmission lines N surge absorbing circuits (N is an integer of 1 or more),
With
Each of the N surge absorbing circuits is
A first inductor having one end connected to one first transmission line of the pair of first transmission lines;
A second inductor having one end connected to the other end of the first inductor and the other end connected to one second transmission line of the pair of second transmission lines;
One end of the pair of first transmission lines connected to the other first transmission line, and the first inductor and the electromagnetic so as to increase each other when a differential signal is applied. A third inductor coupled in a mechanical manner;
One end connected to the other end of the third inductor and the other end connected to the other second transmission line of the pair of second transmission lines, and a differential signal was applied A fourth inductor that is electromagnetically coupled to the second inductor so as to increase the inductance in each case;
A first surge absorbing element having one end connected to the other end of the first inductor and the one end of the second inductor and the other end connected to a ground terminal;
A second surge absorbing element having one end connected to the other end of the third inductor and the one end of the fourth inductor and the other end connected to the ground terminal;
A first capacitive element provided between the one end of the first inductor and the other end of the second inductor;
A second capacitive element provided between the one end of the third inductor and the other end of the fourth inductor;
Having
Display device. A connector;
A display unit;
Provided between the connector and the display unit, each connected to the connector via a pair of first transmission lines and each connected to the display unit via a pair of second transmission lines N surge absorbing circuits (N is an integer of 1 or more),
With
Each of the N surge absorbing circuits is
A first inductor having one end connected to one first transmission line of the pair of first transmission lines;
A second inductor having one end connected to the other end of the first inductor and the other end connected to one second transmission line of the pair of second transmission lines;
A third inductor having one end connected to the other first transmission line of the pair of first transmission lines;
A fourth inductor having one end connected to the other end of the third inductor and the other end connected to the other second transmission line of the pair of second transmission lines;
A first surge absorbing element having one end connected to the other end of the first inductor and the one end of the second inductor and the other end connected to a ground terminal;
A second surge absorbing element having one end connected to the other end of the third inductor and the one end of the fourth inductor and the other end connected to the ground terminal;
A first capacitive element provided between the one end of the first inductor and the other end of the second inductor;
A second capacitive element provided between the one end of the third inductor and the other end of the fourth inductor;
Having
Display device. The N surge absorbing circuits are arranged so that adjacent surge absorbing circuits are not aligned with a straight line orthogonal to a straight line connecting the connector and the display unit,
The pair of first transmission lines has a first region, a second region, and a third region in order from the connector side,
The distance between the pair of first transmission lines in the third region is wider than the distance between the pair of first transmission lines in the first region,
The distance between the pair of first transmission lines in the second region is gradually increased from the first region toward the third region,
The pair of second transmission lines have a fourth region, a fifth region, and a sixth region in order from the display unit side,
The distance between the pair of second transmission lines in the sixth region is wider than the distance between the pair of second transmission lines in the fourth region,
The distance between the pair of second transmission lines in the fifth region is gradually increased from the fourth region to the sixth region.
The display apparatus as described in any one of Claims 4-8. The display device according to claim 1, wherein the surge absorbing circuit is configured by a laminated body having a conductor pattern inside and on a surface.

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