JP2007220845A - Antireflection film and exposure method - Google Patents

Antireflection film and exposure method Download PDF

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JP2007220845A
JP2007220845A JP2006038803A JP2006038803A JP2007220845A JP 2007220845 A JP2007220845 A JP 2007220845A JP 2006038803 A JP2006038803 A JP 2006038803A JP 2006038803 A JP2006038803 A JP 2006038803A JP 2007220845 A JP2007220845 A JP 2007220845A
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JP4715541B2 (en
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Nobuyuki Matsuzawa
伸行 松澤
Thunnakart Boontarika
ブンタリカ トゥンナカート
Ken Ozawa
謙 小澤
Toshihiro Kurobe
利博 黒部
Yoko Watanabe
陽子 渡辺
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Sony Corp
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<P>PROBLEM TO BE SOLVED: To provide an antireflection film capable of sufficiently reducing reflectance on an interface between a resist layer and a silicon semiconductor substrate, even if exposure light is made incident obliquely by one layer in a liquid immersion lithography technique, and to provide an exposure method. <P>SOLUTION: The double layer structure antireflection film is used in exposing a resist layer in an exposure system having a wavelength of 190-195 nm and having a numerical aperture of 1.0-1.1, and is formed between the resist layer and a silicon nitride film formed on the surface of the silicon semiconductor substrate. When complex refractive indexes N<SB>1</SB>, N<SB>2</SB>of upper layer and lower layer constituting the antireflection film are expressed by the expressions; N<SB>1</SB>=n<SB>1</SB>-k<SB>1</SB>i, N<SB>2</SB>=n<SB>2</SB>-k<SB>2</SB>i, film thicknesses of the upper layer and lower layer are d<SB>1</SB>, d<SB>2</SB>and a predetermined combination is selected as the combination of values [n<SB>10</SB>, k<SB>10</SB>, d<SB>10</SB>, n<SB>20</SB>, k<SB>20</SB>, d<SB>20</SB>], n<SB>1</SB>, k<SB>1</SB>, d<SB>1</SB>, n<SB>2</SB>, k<SB>2</SB>, d<SB>2</SB>satisfy the following relation: ä(n<SB>1</SB>-n<SB>10</SB>)/(n<SB>1m</SB>-n<SB>10</SB>)}<SP>2</SP>+ä(k<SB>1</SB>-k<SB>10</SB>)/(k<SB>1m</SB>-k<SB>10</SB>)}<SP>2</SP>+ä(d<SB>1</SB>-d<SB>10</SB>)/(d<SB>1m</SB>-d<SB>10</SB>)}<SP>2</SP>+ä(n<SB>2</SB>-n<SB>20</SB>)/(n<SB>2m</SB>-n<SB>20</SB>)}<SP>2</SP>+ä(k<SB>2</SB>-k<SB>20</SB>)/(k<SB>2m</SB>-k<SB>20</SB>)}<SP>2</SP>+ä(d<SB>2</SB>-d<SB>20</SB>)/(d<SB>2m</SB>-d<SB>20</SB>)}<SP>2</SP>≤1. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

本発明は、半導体装置の製造工程においてレジスト層を露光する際に用いられる反射防止膜、及び、係る反射防止膜を用いた露光方法に関する。   The present invention relates to an antireflection film used when a resist layer is exposed in a manufacturing process of a semiconductor device, and an exposure method using the antireflection film.

半導体装置の分野においては、半導体装置の高集積化に伴い、例えば65nm以下の極微細パターンの加工を可能とする新たなプロセス技術の確立が急務となっている。そして、微細パターンの加工には、所謂フォトリソグラフィ技術が不可欠であり、露光光(照明光)の波長の短波長化によって光学的な解像度を向上させ、極微細加工に対応するために、現在、波長193nmのアルゴン−フッ素(ArF)エキシマレーザを露光光源として用いている。   In the field of semiconductor devices, with the high integration of semiconductor devices, there is an urgent need to establish a new process technology that enables processing of ultrafine patterns of, for example, 65 nm or less. And so-called photolithography technology is indispensable for processing fine patterns, and in order to improve optical resolution by shortening the wavelength of exposure light (illumination light), and to cope with ultra-fine processing, An argon-fluorine (ArF) excimer laser having a wavelength of 193 nm is used as an exposure light source.

シリコン半導体基板のパターニングは、窒化膜で覆われたシリコン半導体基板の表面に塗布、形成された光感光性のレジスト層を用いて行うが、レジスト層とその下地であるシリコン窒化膜との界面での露光光(照明光)の反射率が大きい場合、レジスト層内で定在波が顕著に誘起される。その結果、現像によってパターニングされたレジスト層の側面が、定在波の形状に従って凹凸となり、良好な矩形状のパターンをレジスト層に形成できないという問題がある。尚、レジスト層に形成されたパターンをレジストパターンと呼ぶ場合がある。例えば、波長193nmの露光光において、屈折率1.70を有するレジスト層を、シリコン半導体基板の表面に形成された厚さ100nmのシリコン窒化膜の上に設けた場合の反射率は、露光光を垂直入射としたとき、約10%と非常に大きい値である。   The patterning of the silicon semiconductor substrate is performed using a photosensitive resist layer applied and formed on the surface of the silicon semiconductor substrate covered with the nitride film, but at the interface between the resist layer and the underlying silicon nitride film. When the reflectance of the exposure light (illumination light) is large, a standing wave is remarkably induced in the resist layer. As a result, the side surface of the resist layer patterned by development becomes uneven according to the shape of the standing wave, and there is a problem that a good rectangular pattern cannot be formed on the resist layer. A pattern formed on the resist layer may be called a resist pattern. For example, in the case of exposure light having a wavelength of 193 nm, the reflectivity when a resist layer having a refractive index of 1.70 is provided on a silicon nitride film having a thickness of 100 nm formed on the surface of a silicon semiconductor substrate When normal incidence is assumed, this is a very large value of about 10%.

このような問題を解決するために、従来の波長193nmの露光光を用いるフォトリソグラフィ技術では、シリコン半導体基板とレジスト層との間に単層の反射防止膜を形成している。例えば、シリコン半導体基板の表面に形成された厚さ100nmのシリコン窒化膜の上に、複素屈折率をN0(但し、N0=n0−k0i)としたとき、n0=1.75、k0=0.30といった値を有する厚さ100nmの反射防止膜を形成し、更にその上に、屈折率1.70を有するレジスト層を形成した場合、露光光が垂直入射する場合、レジスト層と反射防止膜との界面での反射率は約0.3%と大きく低減される。 In order to solve such a problem, in a conventional photolithography technique using exposure light having a wavelength of 193 nm, a single-layer antireflection film is formed between the silicon semiconductor substrate and the resist layer. For example, when a complex refractive index is N 0 (where N 0 = n 0 -k 0 i) on a silicon nitride film having a thickness of 100 nm formed on the surface of a silicon semiconductor substrate, n 0 = 1. When an antireflection film having a thickness of 100 nm having a value of 75, k 0 = 0.30 is formed, and a resist layer having a refractive index of 1.70 is further formed thereon, when exposure light is vertically incident, The reflectance at the interface between the resist layer and the antireflection film is greatly reduced to about 0.3%.

特開2001−242630JP 2001-242630 A ブンタリカ、小澤、染矢、第65回応用物理学会学術講演会 講演予稿集、2p−R−9Buntarika, Ozawa, Someya, Proceedings of the 65th Japan Society of Applied Physics, 2p-R-9

ところで、フォトリソグラフィ技術における限界解像度は、露光光の波長に0.3を乗じた程度である。従って、波長193nmのArFエキシマレーザを露光光源としたフォトリソグラフィ技術にあっては、限界解像度は約60nmとなる。   By the way, the limiting resolution in the photolithography technique is about the product of 0.3 of the wavelength of exposure light. Therefore, in a photolithography technique using an ArF excimer laser with a wavelength of 193 nm as an exposure light source, the limit resolution is about 60 nm.

そして、60nm程度よりも微細なパターンをシリコン半導体基板に形成する技術として、露光系(照明系)とレジスト層との間を、空気よりも屈折率の高い媒体(例えば、水から成る液浸液)によって満たすことにより、更なる高解像度を実現する、液浸リソグラフィ技術の開発が進められている。   As a technique for forming a pattern finer than about 60 nm on a silicon semiconductor substrate, a medium having a higher refractive index than air (for example, an immersion liquid made of water) is provided between the exposure system (illumination system) and the resist layer. ), The development of immersion lithography technology that achieves higher resolution is being promoted.

液浸液を介して露光を行うことにより、露光光の実効波長は、真空中の露光光の波長を液浸液の屈折率で除したものとなり、より高い解像性能を達成することが可能となる。例えば、波長193nmのArFエキシマレーザを露光光源とし、液浸液として水(193nmでの屈折率は1.44である)を用いた場合、実効波長は約134nmとなり、限界解像度は、これに0.3を乗じて、約40nmとなる。即ち、水を用いた液浸リソグラフィ技術により、60nm程度よりも微細なパターンをシリコン半導体基板に形成することが可能となる。   By performing exposure through the immersion liquid, the effective wavelength of the exposure light is obtained by dividing the wavelength of the exposure light in vacuum by the refractive index of the immersion liquid, enabling higher resolution performance to be achieved. It becomes. For example, when an ArF excimer laser having a wavelength of 193 nm is used as an exposure light source and water is used as the immersion liquid (refractive index at 193 nm is 1.44), the effective wavelength is about 134 nm, and the limit resolution is 0. Multiply .3 to obtain approximately 40 nm. That is, a pattern finer than about 60 nm can be formed on the silicon semiconductor substrate by the immersion lithography technique using water.

また、露光時の焦点裕度(DOF)は、以下の式で与えられる。ここで、nLiqは液浸液の屈折率、K2はプロセスに依存する定数、λは真空中での露光光(照明光)の波長、NAは露光系(照明系)の開口数である。 Further, the focus tolerance (DOF) at the time of exposure is given by the following equation. Here, n Liq is the refractive index of the immersion liquid, K 2 is a process-dependent constant, λ is the wavelength of exposure light (illumination light) in vacuum, and NA is the numerical aperture of the exposure system (illumination system). .

DOF=nLiq・K2・λ/NA2 DOF = n Liq・ K 2・ λ / NA 2

従って、開口数NAが一定の場合、焦点裕度DOFは、液浸リソグラフィ技術の場合、空気中での露光による従来のフォトリソグラフィ技術の場合と比べて、nLiq倍となる。即ち、水を液浸液として用いた液浸リソグラフィ技術の場合、焦点裕度DOFは、1.44倍となり、より余裕をもった量産プロセスの構築が可能となる。 Therefore, when the numerical aperture NA is constant, the focus tolerance DOF is n Liq times in the case of the immersion lithography technique as compared with the case of the conventional photolithography technique by exposure in air. That is, in the case of the immersion lithography technique using water as the immersion liquid, the focus tolerance DOF is 1.44 times, and it is possible to construct a mass production process with more margin.

しかしながら、このような液浸リソグラフィ技術にあっては、従来の単層の反射防止膜が有効に機能しないという問題がある。   However, such an immersion lithography technique has a problem that the conventional single-layer antireflection film does not function effectively.

露光光は、入射媒体を伝わり、レジスト層に入射し、更に、反射防止膜に入射する。ここで、露光光が入射媒体からレジスト層へ入射するときの入射角をθin、入射媒体の屈折率をnin、露光光がレジスト層からシリコン半導体基板あるいは反射防止膜へ入射するときの入射角をθIF、レジスト層を構成するレジスト材料の屈折率をnResとすると、以下の式を満たす。尚、従来のフォトリソグラフィ技術では、入射媒体は空気であるので、nin=1、液浸リソグラフィ技術では、例えば、水を液浸液とした場合、入射媒体は水であるので、nin=1.44である。 The exposure light travels through the incident medium, enters the resist layer, and further enters the antireflection film. Here, the incident angle when the exposure light is incident on the resist layer from the incident medium is θ in , the refractive index of the incident medium is n in , and the incident light when the exposure light is incident on the silicon semiconductor substrate or the antireflection film from the resist layer When the angle is θ IF and the refractive index of the resist material constituting the resist layer is n Res , the following equation is satisfied. In the conventional photolithography technique, since the incident medium is air, n in = 1. In the immersion lithography technique, for example, when water is an immersion liquid, the incident medium is water, so n in = 1.44.

NA=nin・sin(θin)=nRes・sin(θIFNA = n in · sin (θ in ) = n Res · sin (θ IF )

上式から、θinが一定の場合、従来のフォトリソグラフィ技術(nin=1.0)に対して、液浸リソグラフィ技術では、開口数NAがnLiq倍になることが判る。即ち、レジスト層を構成するレジスト材料の屈折率nResを一定とすると、sin(θIF)がより大きくなることになり、これは、液浸リソグラフィ技術では、θIFが増大することを意味する。つまり、液浸リソグラフィ技術では、従来のフォトリソグラフィ技術に比べて、一層、斜めの方向から露光光が入射すると云える。 From the above equation, it can be seen that when θ in is constant, the numerical aperture NA is n Liq times in the immersion lithography technique compared to the conventional photolithography technique (n in = 1.0). That is, if the refractive index n Res of the resist material constituting the resist layer is constant, sin (θ IF ) becomes larger, which means that θ IF increases in the immersion lithography technique. . That is, in the immersion lithography technique, it can be said that the exposure light is incident from an oblique direction as compared with the conventional photolithography technique.

一方、単層の反射防止膜を用いた場合、露光光が垂直に入射するときの反射率は、充分低くすることができるが、斜め入射の時の反射率を充分に低減することができないという問題がある。   On the other hand, when a single-layer antireflection film is used, the reflectance when the exposure light is incident vertically can be sufficiently lowered, but the reflectance when obliquely incident cannot be sufficiently reduced. There's a problem.

シリコン半導体基板の表面に形成された厚さ100nmのシリコン窒化膜の上に、n0=1.75、k0=0.30といった値の複素屈折率N0を有する厚さ100nmの反射防止膜を形成し、更にその上に、屈折率1.70を有するレジスト層を形成した場合、レジスト層と反射防止膜との界面での反射率は、露光光が垂直入射する場合(即ち、入射角θIF=0度)、約0.3%と大きく低減される。しかしながら、入射角θIFが60度程度になると、s波の反射率は、約4%と大きく増大する。 An antireflection film having a thickness of 100 nm and having a complex refractive index N 0 of n 0 = 1.75 and k 0 = 0.30 on a silicon nitride film having a thickness of 100 nm formed on the surface of the silicon semiconductor substrate When a resist layer having a refractive index of 1.70 is further formed thereon, the reflectance at the interface between the resist layer and the antireflection film is as follows when the exposure light is perpendicularly incident (that is, the incident angle). θ IF = 0 degree), which is greatly reduced to about 0.3%. However, when the incident angle θ IF is about 60 degrees, the reflectance of the s wave greatly increases to about 4%.

一方、微細化の進展により、シリコン半導体基板の表面に形成されたシリコン窒化膜とレジスト層との界面における反射率の許容最大値は、年々、小さくなってきており、特に、液浸リソグラフィ技術が適用されるような微細な世代での反射率の許容最大値は、ライン・アンド・スペース・パターンにおいては、0.4%(ブンタリカ、小澤、染矢、第65回応用物理学会学術講演会 講演予稿集、2p−R−9)と非常に小さい。   On the other hand, with the progress of miniaturization, the allowable maximum value of the reflectance at the interface between the silicon nitride film formed on the surface of the silicon semiconductor substrate and the resist layer is decreasing year by year. The maximum allowable reflectance in the fine generation as applied is 0.4% for the line and space pattern (Buntarica, Ozawa, Someya, 65th JSAP Scientific Lecture Presentation 2p-R-9).

また、液浸リソグラフィが適用されるであろう45nm世代において、形成されるコンタクトホールのサイズは、おおよそ90nm(ピッチ140nm)と想定される。この条件において、開口数NAを液浸リソグラフィに該当する1.05として、KLA−Tencor社製の光学プロファイル計算ソフトウェアProlith ver.8.1にて、定在波形状より、コンタクトホールの直径バラツキの反射率依存性を計算した結果を、図1に示す。   In the 45 nm generation where immersion lithography will be applied, the size of the contact hole formed is assumed to be approximately 90 nm (pitch 140 nm). Under these conditions, the numerical aperture NA is set to 1.05 corresponding to immersion lithography, and optical profile calculation software Prolith ver. Manufactured by KLA-Tencor is used. FIG. 1 shows the result of calculating the reflectance dependency of the contact hole diameter variation from the standing wave shape in 8.1.

90nmのコンタクトホール径に対して、その直径のバラツキを5nm以下に抑える必要がある。図1から、そのためには、反射率を約0.4%以下とする必要があることが分かる。   For a contact hole diameter of 90 nm, it is necessary to suppress the variation in diameter to 5 nm or less. From FIG. 1, it can be seen that for this purpose, the reflectance needs to be about 0.4% or less.

即ち、ライン・アンド・スペース・パターンの場合でも、コンタクトホール・パターンの場合でも、反射率を0.4%以下に抑える必要がある。   That is, in the case of a line and space pattern or a contact hole pattern, the reflectance needs to be suppressed to 0.4% or less.

然るに、従来のフォトリソグラフィ技術で用いられてきた単層の反射防止膜は、液浸リソグラフィ技術において、露光光が一層斜めに入射することもあり、充分に反射率を低減することができない。そして、反射率を充分に下げられないが故に、レジスト層中に定在波が顕著に現れる結果、良好な矩形状のパターンをレジスト層に形成できないという問題を解決することができない。   However, the single-layer antireflection film that has been used in the conventional photolithography technique may not sufficiently reduce the reflectance because exposure light may be incident more obliquely in the immersion lithography technique. Since the reflectance cannot be lowered sufficiently, the standing wave appears remarkably in the resist layer, so that the problem that a good rectangular pattern cannot be formed on the resist layer cannot be solved.

従って、本発明の目的は、露光系(照明系)の開口数を大きくすることで、大きな焦点裕度を達成するためのフォトリソグラフィ技術、例えば液浸リソグラフィ技術において、露光光(照明光)がレジスト層に一層斜めに入射する場合であっても、シリコン半導体基板の表面に形成されたシリコン窒化膜とレジスト層との界面における反射率を充分に低減することができる反射防止膜、及び、係る反射防止膜を用いた露光方法を提供することにある。   Accordingly, an object of the present invention is to increase the numerical aperture of the exposure system (illumination system) so that exposure light (illumination light) is generated in a photolithography technique for achieving a large focus tolerance, such as an immersion lithography technique. An antireflection film capable of sufficiently reducing the reflectance at the interface between the silicon nitride film formed on the surface of the silicon semiconductor substrate and the resist layer even when entering the resist layer at an angle, and An object of the present invention is to provide an exposure method using an antireflection film.

上記の目的を達成するための本発明の反射防止膜は、半導体装置の製造工程において使用され、190nm乃至195nmの波長を有し、開口数NAが 1.0<NA≦1.1 である露光系にてレジスト層を露光する際に用いられる、レジスト層と、シリコン半導体基板の表面に形成された以下の値の膜厚T(単位:nm)を有するシリコン窒化膜との間に設けられた2層構造を有する反射防止膜である。また、上記の目的を達成するための本発明の露光方法は、半導体装置の製造工程において使用され、190nm乃至195nmの波長を有し、開口数NAが 1.0<NA≦1.1 である露光系にて、レジスト層と、シリコン半導体基板の表面に形成された以下の値の膜厚T(単位:nm)を有するシリコン窒化膜との間に2層構造を有する反射防止膜を設けた状態で、該レジスト層を露光する露光方法である。   An antireflection film of the present invention for achieving the above object is used in a manufacturing process of a semiconductor device, has a wavelength of 190 nm to 195 nm, and has an aperture NA of 1.0 <NA ≦ 1.1. Provided between the resist layer used when exposing the resist layer in the system and a silicon nitride film having a thickness T (unit: nm) of the following value formed on the surface of the silicon semiconductor substrate This is an antireflection film having a two-layer structure. The exposure method of the present invention for achieving the above object is used in a manufacturing process of a semiconductor device, has a wavelength of 190 nm to 195 nm, and has a numerical aperture NA of 1.0 <NA ≦ 1.1. In the exposure system, an antireflection film having a two-layer structure is provided between the resist layer and a silicon nitride film having the following thickness T (unit: nm) formed on the surface of the silicon semiconductor substrate. An exposure method for exposing the resist layer in a state.

そして、本発明の反射防止膜あるいは本発明の露光方法は、
反射防止膜を構成する上層の複素屈折率N1、下層の複素屈折率N2を、それぞれ、
1=n1−k1
2=n2−k2
とし、上層の膜厚をd1(単位:nm)、下層の膜厚をd2(単位:nm)とし、
[n10,k10,d10,n20,k20,d20]の値の組合せとして、シリコン窒化膜の膜厚Tに依存して以下のいずれかを選択したとき、
1,k1,d1,n2,k2,d2が、以下の関係式を満足することを特徴とし、あるいは、係る反射防止膜を用いることを特徴とする。
And the antireflection film of the present invention or the exposure method of the present invention comprises:
The upper-layer complex refractive index N 1 and the lower-layer complex refractive index N 2 constituting the antireflection film are respectively expressed as follows:
N 1 = n 1 −k 1 i
N 2 = n 2 −k 2 i
The upper layer thickness is d 1 (unit: nm), the lower layer thickness is d 2 (unit: nm),
When one of the following is selected as a combination of values of [n 10 , k 10 , d 10 , n 20 , k 20 , d 20 ] depending on the film thickness T of the silicon nitride film,
n 1 , k 1 , d 1 , n 2 , k 2 , and d 2 satisfy the following relational expression, or use such an antireflection film.

{(n1−n10)/(n1m−n10)}2+{(k1−k10)/(k1m−k10)}2+{(d1−d10)/(d1m−d10)}2+{(n2−n20)/(n2m−n20)}2+{(k2−k20)/(k2m−k20)}2+{(d2−d20)/(d2m−d20)}2≦1 {(N 1 −n 10 ) / (n 1m −n 10 )} 2 + {(k 1 −k 10 ) / (k 1m −k 10 )} 2 + {(d 1 −d 10 ) / (d 1m −d 10 )} 2 + {(n 2 −n 20 ) / (n 2m −n 20 )} 2 + {(k 2 −k 20 ) / (k 2m −k 20 )} 2 + {(d 2 − d 20 ) / (d 2m −d 20 )} 2 ≦ 1

但し、n1とn10の大小関係に基づき当該ケースにおけるn1mの値を採用し、k1とk10の大小関係に基づき当該ケースにおけるk1mの値を採用し、d1とd10の大小関係に基づき当該ケースにおけるd1mの値を採用し、n2とn20の大小関係に基づき当該ケースにおけるn2mの値を採用し、k2とk20の大小関係に基づき当該ケースにおけるk2mの値を採用し、d2とd20の大小関係に基づき当該ケースにおけるd2mの値を採用する。 However, the value of n 1m in the case is adopted based on the magnitude relationship between n 1 and n 10 , the value of k 1m in the case is adopted based on the magnitude relationship between k 1 and k 10 , and d 1 and d 10 The value of d 1m in the case is adopted based on the magnitude relationship, the value of n 2m in the case is adopted based on the magnitude relationship between n 2 and n 20 , and the value of k in the case based on the magnitude relationship between k 2 and k 20 is adopted. adopts a value of 2m, adopts the value of d 2m in the case based on the magnitude relation between d 2 and d 20.

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本発明の露光方法は、例えば、半導体装置における極微細パターンの加工に適用され、具体的には、シリコン半導体基板の表面に形成されたシリコン窒化膜上に本発明の反射防止膜を成膜、形成する工程と、感光作用を有するレジスト層を反射防止膜上に塗布、形成する工程と、レジスト層を露光光(紫外線)で選択的に露光して感光させる工程と、レジスト層を現像することによって所定のレジストパターンを得る工程とを備える。   The exposure method of the present invention is applied to, for example, processing of an extremely fine pattern in a semiconductor device. Specifically, the antireflection film of the present invention is formed on a silicon nitride film formed on the surface of a silicon semiconductor substrate. A step of forming, a step of coating and forming a resist layer having a photosensitive action on the antireflection film, a step of selectively exposing the resist layer with exposure light (ultraviolet light) to sensitize, and developing the resist layer And obtaining a predetermined resist pattern.

本発明の反射防止膜あるいは本発明の露光方法(以下、これらを総称して、単に、本発明と呼ぶ場合がある)において、露光光(紫外線)は、190nm乃至195nmの波長を有するが、好ましくは、192nm乃至194nmの波長を有することが望ましく、より具体的には、波長193nmのArFエキシマレーザを露光光源として用いることが一層望ましい。   In the antireflection film of the present invention or the exposure method of the present invention (hereinafter, these may be collectively referred to simply as the present invention), the exposure light (ultraviolet rays) has a wavelength of 190 nm to 195 nm, preferably Preferably has a wavelength of 192 nm to 194 nm, and more specifically, it is more desirable to use an ArF excimer laser with a wavelength of 193 nm as an exposure light source.

また、d1≦250を満足し、且つ、d2≦250を満足すること、云い換えれば、反射防止膜の上層の膜厚は250nmを超えず、しかも、下層の膜厚も250nmを超えないことが好ましい。上層の膜厚が250nmを超え、あるいは又、下層の膜厚が250nmを超えると、レジスト層を露光光によって露光し、現像した後、係るレジスト層をエッチング用マスクとしてシリコン半導体基板をエッチング加工する工程において、レジスト層のレジストパターン寸法と実際のシリコン半導体基板におけるエッチング加工寸法の差である所謂加工変換差(寸法変換量あるいは寸法シフトとも呼ばれる)が大きくなり過ぎ、シリコン半導体基板において所望の形状若しくはサイズを有するパターンが得られなくなる虞がある。 Further, d 1 ≦ 250 and d 2 ≦ 250 are satisfied, in other words, the thickness of the upper layer of the antireflection film does not exceed 250 nm, and the thickness of the lower layer does not exceed 250 nm. It is preferable. If the upper layer thickness exceeds 250 nm or the lower layer thickness exceeds 250 nm, the resist layer is exposed with exposure light and developed, and then the silicon semiconductor substrate is etched using the resist layer as an etching mask. In the process, a so-called process conversion difference (also referred to as a dimension conversion amount or a dimension shift), which is a difference between the resist pattern dimension of the resist layer and the actual etching processing dimension in the silicon semiconductor substrate, becomes too large. There is a possibility that a pattern having a size cannot be obtained.

更には、レジスト層の屈折率は、1.60乃至1.80であることが望ましい。この範囲にないレジスト材料から成るレジスト層を用いる場合、上述した(n1,k1,d1,n2,k2,d2)の条件の種々の組のいずれかをたとえ満たす反射防止膜であっても、該当する開口数に対応する露光光の入射角(最大入射角θin-max)から垂直入射(最小入射角θin-min、具体的には0度)までの全領域に亙って、シリコン半導体基板の表面に形成されたシリコン窒化膜とレジスト層との界面における反射率を0.4%以下とすることが困難となり、良好なレジストパターン形状が得られない虞がある。 Further, the refractive index of the resist layer is desirably 1.60 to 1.80. When a resist layer made of a resist material not in this range is used, an antireflection film that satisfies any of the various combinations of the above-described conditions (n 1 , k 1 , d 1 , n 2 , k 2 , d 2 ) Even in the entire region from the incident angle (maximum incident angle θ in-max ) to vertical incident (minimum incident angle θ in-min , specifically 0 degree) corresponding to the corresponding numerical aperture. Therefore, it becomes difficult to reduce the reflectance at the interface between the silicon nitride film formed on the surface of the silicon semiconductor substrate and the resist layer to 0.4% or less, and a good resist pattern shape may not be obtained. .

更には、屈折率が1.44±0.02の媒体でレジスト層と露光系との間が満たされていることが、云い換えれば、液浸液として屈折率が1.44±0.02の媒体を用いることが望ましく、媒体として水を用いることが一層望ましい。屈折率が、この値から大きくはずれると、上述した(n1,k1,d1,n2,k2,d2)の条件の種々の組のいずれかをたとえ満たす反射防止膜であっても、該当する開口数に対応する露光光の入射角(最大入射角θin-max)から垂直入射(最小入射角θin-min、具体的には0度)までの全領域に亙って、シリコン半導体基板の表面に形成されたシリコン窒化膜とレジスト層との界面における反射率を0.4%以下とすることが困難となり、良好なレジストパターン形状が得られない虞がある。 Furthermore, the fact that the space between the resist layer and the exposure system is filled with a medium having a refractive index of 1.44 ± 0.02, in other words, the refractive index as an immersion liquid is 1.44 ± 0.02. It is desirable to use the above medium, and it is more desirable to use water as the medium. When the refractive index deviates greatly from this value, the antireflection film satisfies any of the various sets of conditions (n 1 , k 1 , d 1 , n 2 , k 2 , d 2 ) described above. In addition, over the entire region from the incident angle (maximum incident angle θ in-max ) to vertical incident (minimum incident angle θ in-min , specifically 0 degree) corresponding to the corresponding numerical aperture. The reflectance at the interface between the silicon nitride film formed on the surface of the silicon semiconductor substrate and the resist layer becomes difficult to be 0.4% or less, and a good resist pattern shape may not be obtained.

また、本発明の露光方法において、レジスト層の上(具体的には上層の上)にトップコート層を形成することが望ましい。トップコート層が存在しないと、液浸液とレジスト層の相互作用(例えば、レジスト層が液浸液と接触することによってレジスト層に欠陥が発生するといった現象等)の発生を抑制することができず、良好なレジストパターン形状が得られない虞がある。ここで、トップコート層を構成する材料として、有機物や無機物、具体的には、例えば、ポリビニルアルコールやアモルファスフルオロポリマー、NaClを例示することができる。   In the exposure method of the present invention, it is desirable to form a topcoat layer on the resist layer (specifically, on the upper layer). If the topcoat layer is not present, the interaction between the immersion liquid and the resist layer (for example, a phenomenon in which a defect occurs in the resist layer when the resist layer comes into contact with the immersion liquid) can be suppressed. Therefore, a good resist pattern shape may not be obtained. Here, examples of the material constituting the top coat layer include organic substances and inorganic substances, specifically, for example, polyvinyl alcohol, amorphous fluoropolymer, and NaCl.

尚、以下の説明において、該当する開口数に対応する露光光の入射角(最大入射角θin-max)から垂直入射(最小入射角θin-min)までの全領域を、「該当する露光系の開口数NAに対応する入射角全領域」、あるいは、単に、「入射角全領域」と呼ぶ場合がある。 In the following description, the entire area from the incident angle (maximum incident angle θ in-max ) to the normal incident angle (minimum incident angle θ in-min ) of the exposure light corresponding to the corresponding numerical aperture is referred to as “corresponding exposure. It may be referred to as “the entire incident angle corresponding to the numerical aperture NA of the system” or simply “the entire incident angle”.

また、レジスト層の膜厚は、形成しようとする最小のレジストパターンサイズの2倍乃至5倍程度であることが好ましい。レジスト層の膜厚が、最小のレジストパターンサイズの2倍未満の場合、レジスト層を所定のパターンにパターニングすることは可能であるが、レジスト層のパターニング後にシリコン半導体基板をエッチングをする際、良好なエッチングができなくなる虞がある。加えて、レジスト層中の膜欠陥数が増大する虞もある。一方、レジスト層の膜厚が、最小のレジストパターンサイズの5倍を超える場合、パターニングされたレジスト層が倒れてしまい、シリコン半導体基板の良好なパターニングができなくなる虞がある。   Further, the film thickness of the resist layer is preferably about 2 to 5 times the minimum resist pattern size to be formed. When the thickness of the resist layer is less than twice the minimum resist pattern size, it is possible to pattern the resist layer into a predetermined pattern, but good when etching the silicon semiconductor substrate after patterning the resist layer There is a possibility that the etching cannot be performed. In addition, the number of film defects in the resist layer may increase. On the other hand, when the film thickness of the resist layer exceeds 5 times the minimum resist pattern size, the patterned resist layer may fall down and good patterning of the silicon semiconductor substrate may not be possible.

反射防止膜の上層及び下層を構成する材料は、上述した(n1,k1,d1,n2,k2,d2)の条件の種々の組を満たすものであれば、どのような材料であってもよい。例えば、上層、下層を構成する材料として、高分子材料、無機酸化物材料、金属材料、及び、これらのハイブリッド材料を挙げることができ、具体的には、例えば、ポリイミド、SiCH膜、SiCHN膜、SiCOH膜、エポキシ系熱硬化樹脂、アクリル系熱硬化樹脂、エポキシ系紫外線硬化樹脂、アクリル系紫外線硬化樹脂を挙げることができる。 Any material can be used as the material constituting the upper and lower layers of the antireflection film as long as it satisfies various combinations of the above-mentioned conditions (n 1 , k 1 , d 1 , n 2 , k 2 , d 2 ). It may be a material. For example, examples of the material constituting the upper layer and the lower layer include polymer materials, inorganic oxide materials, metal materials, and hybrid materials thereof. Specifically, for example, polyimide, SiCH film, SiCHN film, Examples thereof include a SiCOH film, an epoxy thermosetting resin, an acrylic thermosetting resin, an epoxy ultraviolet curing resin, and an acrylic ultraviolet curing resin.

また、反射防止膜の上に形成されるレジスト層と、反射防止膜との間の密着性等の改善のために、反射防止膜を構成する上層の表面に対して、シランカップリング処理等による、表面改質処理を行ってもよい。   Further, in order to improve adhesion between the resist layer formed on the antireflection film and the antireflection film, the surface of the upper layer constituting the antireflection film is subjected to silane coupling treatment or the like. A surface modification treatment may be performed.

通常、単層の反射防止膜では、その膜厚及び複素屈折率をどのように変化させても、該当する露光系の開口数NAに対応する入射角全領域に亙って、反射率を0.4%以下にすることはできない。また、反射防止膜の膜厚が厚すぎると、レジスト層を露光光によって露光し、現像した後、シリコン半導体基板をエッチング加工する工程において、加工変換差の問題が生じてしまう。   In general, a single-layer antireflection film has a reflectivity of 0 over the entire incident angle region corresponding to the numerical aperture NA of the exposure system, regardless of how the film thickness and complex refractive index are changed. It cannot be less than 4%. On the other hand, if the thickness of the antireflection film is too thick, a problem of processing conversion difference occurs in the step of etching the silicon semiconductor substrate after exposing the resist layer with exposure light and developing it.

一方、本発明にあっては、シリコン半導体基板の表面に形成されたシリコン窒化膜とレジスト層との間に、膜厚及び複素屈折率が所定の範囲にある2層構成の反射防止膜を形成することで、該当する露光系の開口数NAに対応する入射角全領域に亙って、反射率を0.4%以下にすることが可能となり、より優れた形状を有するレジストパターンを得ることができ、これまで以上の極微細加工が可能となる。云い換えれば、露光系の開口数NAが1.0<NA≦1.1の場合において、2層構成の反射防止膜における膜厚及び複素屈折率が上記の条件を満たすことで、該当する開口数NAに対応する露光光の入射角から垂直入射までの全領域に亙って反射率を0.4%以下とすることができる結果、良好なレジストパターン形状を得ることができる。また、加工変換差を小さく抑えることができる。   On the other hand, in the present invention, a two-layer antireflection film having a film thickness and a complex refractive index within a predetermined range is formed between the silicon nitride film formed on the surface of the silicon semiconductor substrate and the resist layer. As a result, the reflectance can be reduced to 0.4% or less over the entire incident angle region corresponding to the numerical aperture NA of the corresponding exposure system, and a resist pattern having a more excellent shape can be obtained. This makes it possible to perform ultrafine processing more than ever. In other words, when the numerical aperture NA of the exposure system is 1.0 <NA ≦ 1.1, the film thickness and the complex refractive index in the antireflection film having a two-layer structure satisfy the above conditions, so that the corresponding aperture is obtained. As a result of the reflectivity being 0.4% or less over the entire region from the incident angle of exposure light corresponding to several NA to the normal incidence, a good resist pattern shape can be obtained. In addition, the processing conversion difference can be reduced.

以下、図面を参照して、実施例に基づき本発明を説明するが、先ず、本発明を適用した場合に、該当する露光系の開口数NAに対応する入射角全領域(露光系の開口数NAに対応する露光光の入射角から垂直入射まで全領域)に亙って、反射率が0.4%以下となる理由を説明する。   Hereinafter, the present invention will be described based on embodiments with reference to the drawings. First, when the present invention is applied, the entire incident angle corresponding to the numerical aperture NA of the corresponding exposure system (the numerical aperture of the exposure system). The reason why the reflectance is 0.4% or less over the entire range from the incident angle of the exposure light corresponding to NA to the vertical incidence) will be described.

反射防止膜の上層の膜厚d1を10nmから200nmまで、10nm刻みで、また、下層の膜厚d2についても、10nmから200nmまで、10nm刻みで、各組合せにおいて、露光系の開口数NAを1.0<NA≦1.1(具体的には1.1)としたとき、対応する最も斜めからの入射角(最大入射角θin-max)から垂直入射(最小入射角θin-min=0度)までの、即ち、入射角全領域における反射率を最小にするような、上層と下層の複素屈折率N1,N2の最適化シミュレーションを、シリコン窒化膜の膜厚が2nm以上でしかも205nm以下の場合について行った。 The upper layer of the thickness d 1 of the antireflection film from 10nm to 200 nm, at 10nm increments, As for the lower layer of thickness d 2, from 10nm to 200 nm, at 10nm increments, in each combination, a numerical aperture NA of the exposure system Is 1.0 <NA ≦ 1.1 (specifically 1.1), the corresponding incident angle from the most oblique angle (maximum incident angle θ in-max ) to normal incidence (minimum incident angle θ in- min = 0 degree), that is, optimization simulation of the complex refractive indexes N 1 and N 2 of the upper layer and the lower layer to minimize the reflectance in the entire incident angle region, the film thickness of the silicon nitride film is 2 nm. This was performed for the case of 205 nm or less.

この計算において、2層反射防止膜の反射率の計算は、各層におけるフレネル係数を計算する計算手法(参考:光学薄膜の基礎理論、小檜山光信著、平成15年、オプトロニクス社発行)を採用した。また、上層と下層の複素屈折率の最適化には、Fletcher−Reevesの最適化法(参考:非線形最適化問題、J.コワリック、M.R.オズボーン著、山本善之、小山健夫訳、昭和45年、培風館発行)を採用した。   In this calculation, the reflectance of the two-layer antireflection film was calculated using a calculation method for calculating the Fresnel coefficient in each layer (reference: basic theory of optical thin film, Mitsunobu Koisoyama, published by Optronics, 2003). For optimization of the complex refractive index of the upper and lower layers, Fletcher-Reeves optimization method (reference: nonlinear optimization problem, written by J. Korick, MR Osborne, Yoshiyuki Yamamoto, Takeo Koyama, Showa 45 Year, issued by Baifukan).

最適化にあたっては、入射角全領域を22等分した。そして、各入射角における反射率を計算し、各入射角における反射率の自乗和を最小化する形で行った。   In the optimization, the entire incident angle region was divided into 22 equal parts. Then, the reflectance at each incident angle was calculated, and the sum of squares of the reflectance at each incident angle was minimized.

このようにして、露光系の開口数NAを1.1とし、上層の膜厚d1を10nmから250nmまで、10nm刻みとし、更には、下層の膜厚d2についても、10nmから250nmまで、10nm刻みとして変化させた場合の、それぞれの場合について、上記の方法により、上層と下層の複素屈折率の最適化を行うことによって、上層と下層の最適な複素屈折率N1,N2を得ることができた。 In this way, the numerical aperture NA of the exposure system is 1.1, the upper layer thickness d 1 is from 10 nm to 250 nm in increments of 10 nm, and the lower layer thickness d 2 is also from 10 nm to 250 nm. For each case when changing in increments of 10 nm, the complex refractive indexes N 1 and N 2 of the upper and lower layers are obtained by optimizing the complex refractive indexes of the upper and lower layers by the above method. I was able to.

尚、250nmよりも厚い膜厚の場合の計算を行わなかったのは、これ以上の膜厚になると、エッチング工程における加工変換差が大きくなり、良好なシリコン半導体基板の加工ができなくなるためである。   The reason why the calculation in the case of a film thickness thicker than 250 nm was not performed is that when the film thickness is larger than this, the processing conversion difference in the etching process becomes large, and it becomes impossible to process a good silicon semiconductor substrate. .

ついで、上記の計算結果から、露光系の開口数NAを1.1、上層の膜厚d1を10nmから250nmまで、10nm刻みとし、下層の膜厚d2についても、10nmから250nmまで、10nm刻みとして変化させた場合の、それぞれの場合について、上層と下層の複素屈折率の最適化後の、最適化のための評価関数である反射率の自乗和を極小とするような膜厚条件を求めた。 Then, from the above calculation results, the numerical aperture NA of the exposure system is 1.1, the upper layer thickness d 1 is from 10 nm to 250 nm in increments of 10 nm, and the lower layer thickness d 2 is also from 10 nm to 250 nm, 10 nm. For each case when changing the increment, the film thickness conditions are set so that the sum of squares of reflectivity, which is an evaluation function for optimization, is minimized after optimization of the complex refractive index of the upper and lower layers. Asked.

そして、この膜厚条件を元に、更に、上層の膜厚d1及び下層の膜厚d2を一層細かく刻み、膜厚条件の対応する上層と下層の複素屈折率が、最も好適な複素屈折率の詳細を求めた。 Based on this film thickness condition, the upper layer film thickness d 1 and the lower layer film thickness d 2 are further finely divided, and the complex refractive index of the upper layer and the lower layer corresponding to the film thickness condition is the most suitable complex refraction. The details of the rate were sought.

その結果、以下の最も好適な複素屈折率と膜厚の組合せが得られた。即ち、2層の反射防止膜における上層(シリコン窒化膜を表面に有するシリコン半導体基板表面から遠いところに位置する層)の複素屈折率をN1、下層(シリコン窒化膜を表面に有するシリコン半導体基板表面の近いところに位置する層)の複素屈折率をN2としたとした、n10、n20、k10、及び、k20を、それぞれ、
1=n10−k10
2=n20−k20
で定義される量とし、d10を上層の膜厚(単位:nm)、d20を下層の膜厚(単位:nm)としたとき、以下の表1−A〜表1−T(開口数NA:1.0<NA≦1.1)に示す[n10,n20,k10,k20,d10,d20]の値の組合せが、最も好適な組合せ、即ち、反射率の極小値が得られる組合せである。
As a result, the following most preferable combination of complex refractive index and film thickness was obtained. That is, the complex refractive index of the upper layer (layer located far from the surface of the silicon semiconductor substrate having the silicon nitride film on the surface) in the two-layer antireflection film is N 1 , and the lower layer (silicon semiconductor substrate having the silicon nitride film on the surface) N 10 , n 20 , k 10 , and k 20 , where the complex refractive index of the layer located near the surface) is N 2 ,
N 1 = n 10 −k 10 i
N 2 = n 20 −k 20 i
The following Table 1-A to Table 1-T (numerical aperture) where d 10 is the upper layer thickness (unit: nm) and d 20 is the lower layer thickness (unit: nm) The combination of the values of [n 10 , n 20 , k 10 , k 20 , d 10 , d 20 ] shown in NA: 1.0 <NA ≦ 1.1) is the most preferable combination, that is, the minimum of reflectance. A combination that yields a value.

尚、表1−Aあるいは後述する表2−Aにおける[ケースA−01]〜[ケースA−26]はシリコン窒化膜の膜厚が2nm以上であって15nm以下における値であり、
表1−Bあるいは後述する表2−Bにおける[ケースB−01]〜[ケースB−22]はシリコン窒化膜の膜厚が15nmより大きく25nm以下における値であり、
表1−Cあるいは後述する表2−Cにおける[ケースC−01]〜[ケースC−24]はシリコン窒化膜の膜厚が25nmより大きく35nm以下における値であり、
表1−Dあるいは後述する表2−Dにおける[ケースD−01]〜[ケースD−25]はシリコン窒化膜の膜厚が35nmより大きく45nm以下における値であり、
表1−Eあるいは後述する表2−Eにおける[ケースE−01]〜[ケースE−22]はシリコン窒化膜の膜厚が45nmより大きく55nm以下における値であり、
表1−Fあるいは後述する表2−Fにおける[ケースF−01]〜[ケースF−20]はシリコン窒化膜の膜厚が55nmより大きく65nm以下における値であり、
表1−Gあるいは後述する表2−Gにおける[ケースG−01]〜[ケースG−24]はシリコン窒化膜の膜厚が65nmより大きく75nm以下における値であり、
表1−Hあるいは後述する表2−Hにおける[ケースH−01]〜[ケースH−21]はシリコン窒化膜の膜厚が75nmより大きく85nm以下における値であり、
表1−Iあるいは後述する表2−Iにおける[ケースI−01]〜[ケースI−19]はシリコン窒化膜の膜厚が85nmより大きく95nm以下における値であり、
表1−Jあるいは後述する表2−Jにおける[ケースJ−01]〜[ケースJ−21]はシリコン窒化膜の膜厚が95nmより大きく105nm以下における値であり、
表1−Kあるいは後述する表2−Kにおける[ケースK−01]〜[ケースK−23]はシリコン窒化膜の膜厚が105nmより大きく115nm以下における値であり、
表1−Lあるいは後述する表2−Lにおける[ケースL−01]〜[ケースL−20]はシリコン窒化膜の膜厚が115nmより大きく125nm以下における値であり、
表1−Mあるいは後述する表2−Mにおける[ケースM−01]〜[ケースM−20]はシリコン窒化膜の膜厚が125nmより大きく135nm以下における値であり、
表1−Nあるいは後述する表2−Nにおける[ケースN−01]〜[ケースN−23]はシリコン窒化膜の膜厚が135nmより大きく145nm以下における値であり、
表1−Oあるいは後述する表2−Oにおける[ケースO−01]〜[ケースO−23]はシリコン窒化膜の膜厚が145nmより大きく155nm以下における値であり、
表1−Pあるいは後述する表2−Pにおける[ケースP−01]〜[ケースP−21]はシリコン窒化膜の膜厚が155nmより大きく165nm以下における値であり、
表1−Qあるいは後述する表2−Qにおける[ケースQ−01]〜[ケースQ−19]はシリコン窒化膜の膜厚が165nmより大きく175nm以下における値であり、
表1−Rあるいは後述する表2−Rにおける[ケースR−01]〜[ケースR−23]はシリコン窒化膜の膜厚が175nmより大きく185nm以下における値であり、
表1−Sあるいは後述する表2−Sにおける[ケースS−01]〜[ケースS−21]はシリコン窒化膜の膜厚が185nmより大きく195nm以下における値であり、
表1−Tあるいは後述する表2−Tにおける[ケースT−01]〜[ケースT−20]はシリコン窒化膜の膜厚が195nmより大きく205nm以下における値である。
[Case A-01] to [Case A-26] in Table 1-A or Table 2-A to be described later are values when the thickness of the silicon nitride film is 2 nm or more and 15 nm or less.
[Case B-01] to [Case B-22] in Table 1-B or Table 2-B to be described later are values when the film thickness of the silicon nitride film is greater than 15 nm and less than 25 nm.
[Case C-01] to [Case C-24] in Table 1-C or Table 2-C described later are values when the thickness of the silicon nitride film is greater than 25 nm and not greater than 35 nm.
[Case D-01] to [Case D-25] in Table 1-D or Table 2-D to be described later are values when the thickness of the silicon nitride film is greater than 35 nm and less than 45 nm.
[Case E-01] to [Case E-22] in Table 1-E or Table 2-E described later are values when the thickness of the silicon nitride film is greater than 45 nm and less than or equal to 55 nm.
[Case F-01] to [Case F-20] in Table 1-F or Table 2-F to be described later are values when the thickness of the silicon nitride film is greater than 55 nm and less than or equal to 65 nm.
[Case G-01] to [Case G-24] in Table 1-G or Table 2-G to be described later are values when the film thickness of the silicon nitride film is greater than 65 nm and less than or equal to 75 nm.
[Case H-01] to [Case H-21] in Table 1-H or Table 2-H to be described later are values when the film thickness of the silicon nitride film is greater than 75 nm and less than 85 nm.
[Case I-01] to [Case I-19] in Table 1-I or Table 2-I described later are values when the thickness of the silicon nitride film is greater than 85 nm and less than or equal to 95 nm.
[Case J-01] to [Case J-21] in Table 1-J or Table 2-J to be described later are values when the thickness of the silicon nitride film is greater than 95 nm and less than or equal to 105 nm.
[Case K-01] to [Case K-23] in Table 1-K or Table 2-K to be described later are values when the thickness of the silicon nitride film is greater than 105 nm and less than or equal to 115 nm.
[Case L-01] to [Case L-20] in Table 1-L or Table 2-L to be described later are values when the thickness of the silicon nitride film is greater than 115 nm and less than or equal to 125 nm.
[Case M-01] to [Case M-20] in Table 1-M or Table 2-M to be described later are values when the thickness of the silicon nitride film is greater than 125 nm and less than or equal to 135 nm.
[Case N-01] to [Case N-23] in Table 1-N or Table 2-N to be described later are values when the film thickness of the silicon nitride film is greater than 135 nm and less than or equal to 145 nm.
[Case O-01] to [Case O-23] in Table 1-O or Table 2-O to be described later are values when the thickness of the silicon nitride film is greater than 145 nm and less than or equal to 155 nm.
[Case P-01] to [Case P-21] in Table 1-P or Table 2-P to be described later are values when the film thickness of the silicon nitride film is larger than 155 nm and not larger than 165 nm.
[Case Q-01] to [Case Q-19] in Table 1-Q or Table 2-Q to be described later are values when the thickness of the silicon nitride film is larger than 165 nm and not larger than 175 nm.
[Case R-01] to [Case R-23] in Table 1-R or Table 2-R described later are values when the thickness of the silicon nitride film is greater than 175 nm and less than 185 nm.
[Case S-01] to [Case S-21] in Table 1-S or Table 2-S to be described later are values when the thickness of the silicon nitride film is larger than 185 nm and not larger than 195 nm.
[Case T-01] to [Case T-20] in Table 1-T or Table 2T described later are values when the thickness of the silicon nitride film is greater than 195 nm and equal to or less than 205 nm.

即ち、以上に説明した条件にあっては、開口数NAが1.0<NA≦1.1の場合、
シリコン窒化膜の膜厚が2nm以上であって15nm以下においては26点(26箇の[n10,n20,k10,k20,d10,d20]の組合せ)で反射率の極小値を得ることができ、
シリコン窒化膜の膜厚が15nmより大きく25nm以下においては22点(22箇の[n10,n20,k10,k20,d10,d20]の組合せ)で反射率の極小値を得ることができ、
シリコン窒化膜の膜厚が25nmより大きく35nm以下においては24点(24箇の[n10,n20,k10,k20,d10,d20]の組合せ)で反射率の極小値を得ることができ、
シリコン窒化膜の膜厚が35nmより大きく45nm以下においては25点(25箇の[n10,n20,k10,k20,d10,d20]の組合せ)で反射率の極小値を得ることができ、
シリコン窒化膜の膜厚が45nmより大きく55nm以下においては22点(22箇の[n10,n20,k10,k20,d10,d20]の組合せ)で反射率の極小値を得ることができ、
シリコン窒化膜の膜厚が55nmより大きく65nm以下においては20点(20箇の[n10,n20,k10,k20,d10,d20]の組合せ)で反射率の極小値を得ることができ、
シリコン窒化膜の膜厚が65nmより大きく75nm以下においては24点(24箇の[n10,n20,k10,k20,d10,d20]の組合せ)で反射率の極小値を得ることができ、
シリコン窒化膜の膜厚が75nmより大きく85nm以下においては21点(21箇の[n10,n20,k10,k20,d10,d20]の組合せ)で反射率の極小値を得ることができ、
シリコン窒化膜の膜厚が85nmより大きく95nm以下においては19点(19箇の[n10,n20,k10,k20,d10,d20]の組合せ)で反射率の極小値を得ることができ、
シリコン窒化膜の膜厚が95nmより大きく105nm以下においては21点(21箇の[n10,n20,k10,k20,d10,d20]の組合せ)で反射率の極小値を得ることができ、
シリコン窒化膜の膜厚が105nmより大きく115nm以下においては23点(23箇の[n10,n20,k10,k20,d10,d20]の組合せ)で反射率の極小値を得ることができ、
シリコン窒化膜の膜厚が115nmより大きく125nm以下においては20点(20箇の[n10,n20,k10,k20,d10,d20]の組合せ)で反射率の極小値を得ることができ、
シリコン窒化膜の膜厚が125nmより大きく135nm以下においては20点(20箇の[n10,n20,k10,k20,d10,d20]の組合せ)で反射率の極小値を得ることができ、
シリコン窒化膜の膜厚が135nmより大きく145nm以下においては23点(23箇の[n10,n20,k10,k20,d10,d20]の組合せ)で反射率の極小値を得ることができ、
シリコン窒化膜の膜厚が145nmより大きく155nm以下においては23点(23箇の[n10,n20,k10,k20,d10,d20]の組合せ)で反射率の極小値を得ることができ、
シリコン窒化膜の膜厚が155nmより大きく165nm以下においては21点(21箇の[n10,n20,k10,k20,d10,d20]の組合せ)で反射率の極小値を得ることができ、
シリコン窒化膜の膜厚が165nmより大きく175nm以下においては19点(19箇の[n10,n20,k10,k20,d10,d20]の組合せ)で反射率の極小値を得ることができ、
シリコン窒化膜の膜厚が175nmより大きく185nm以下においては23点(23箇の[n10,n20,k10,k20,d10,d20]の組合せ)で反射率の極小値を得ることができ、
シリコン窒化膜の膜厚が185nmより大きく195nm以下においては21点(21箇の[n10,n20,k10,k20,d10,d20]の組合せ)で反射率の極小値を得ることができ、
シリコン窒化膜の膜厚が195nmより大きく205nm以下においては20点(20箇の[n10,n20,k10,k20,d10,d20]の組合せ)で反射率の極小値を得ることができた。
That is, under the conditions described above, when the numerical aperture NA is 1.0 <NA ≦ 1.1,
When the thickness of the silicon nitride film is 2 nm or more and 15 nm or less, the minimum value of the reflectance at 26 points (a combination of 26 [n 10 , n 20 , k 10 , k 20 , d 10 , d 20 ]). Can get the
When the thickness of the silicon nitride film is greater than 15 nm and less than or equal to 25 nm, the minimum value of reflectance is obtained at 22 points (a combination of 22 [n 10 , n 20 , k 10 , k 20 , d 10 , d 20 ]). It is possible,
When the film thickness of the silicon nitride film is greater than 25 nm and less than or equal to 35 nm, the minimum value of reflectance is obtained at 24 points (a combination of 24 [n 10 , n 20 , k 10 , k 20 , d 10 , d 20 ]). It is possible,
When the thickness of the silicon nitride film is greater than 35 nm and less than or equal to 45 nm, the minimum value of the reflectance is obtained at 25 points (a combination of 25 [n 10 , n 20 , k 10 , k 20 , d 10 , d 20 ]). It is possible,
When the thickness of the silicon nitride film is greater than 45 nm and less than or equal to 55 nm, the minimum value of reflectance is obtained at 22 points (a combination of 22 [n 10 , n 20 , k 10 , k 20 , d 10 , d 20 ]). It is possible,
When the film thickness of the silicon nitride film is greater than 55 nm and less than or equal to 65 nm, the minimum value of reflectance is obtained at 20 points (a combination of 20 [n 10 , n 20 , k 10 , k 20 , d 10 , d 20 ]). It is possible,
When the thickness of the silicon nitride film is greater than 65 nm and less than or equal to 75 nm, the minimum value of the reflectance is obtained at 24 points (a combination of 24 [n 10 , n 20 , k 10 , k 20 , d 10 , d 20 ]). It is possible,
When the thickness of the silicon nitride film is greater than 75 nm and less than or equal to 85 nm, the minimum value of reflectance is obtained at 21 points (a combination of 21 [n 10 , n 20 , k 10 , k 20 , d 10 , d 20 ]). It is possible,
When the film thickness of the silicon nitride film is greater than 85 nm and less than or equal to 95 nm, the minimum value of reflectance is obtained at 19 points (a combination of 19 [n 10 , n 20 , k 10 , k 20 , d 10 , d 20 ]). It is possible,
When the film thickness of the silicon nitride film is greater than 95 nm and less than or equal to 105 nm, the minimum value of reflectance is obtained at 21 points (a combination of 21 [n 10 , n 20 , k 10 , k 20 , d 10 , d 20 ]). It is possible,
When the thickness of the silicon nitride film is greater than 105 nm and less than or equal to 115 nm, the minimum value of reflectance is obtained at 23 points (a combination of 23 [n 10 , n 20 , k 10 , k 20 , d 10 , d 20 ]). It is possible,
When the thickness of the silicon nitride film is greater than 115 nm and less than or equal to 125 nm, the minimum value of reflectance is obtained at 20 points (a combination of 20 [n 10 , n 20 , k 10 , k 20 , d 10 , d 20 ]). It is possible,
When the film thickness of the silicon nitride film is greater than 125 nm and less than or equal to 135 nm, the minimum value of reflectance is obtained at 20 points (a combination of 20 [n 10 , n 20 , k 10 , k 20 , d 10 , d 20 ]). It is possible,
When the film thickness of the silicon nitride film is greater than 135 nm and less than or equal to 145 nm, the minimum value of reflectance is obtained at 23 points (a combination of 23 [n 10 , n 20 , k 10 , k 20 , d 10 , d 20 ]). It is possible,
When the film thickness of the silicon nitride film is greater than 145 nm and less than or equal to 155 nm, the minimum value of reflectance is obtained at 23 points (a combination of 23 [n 10 , n 20 , k 10 , k 20 , d 10 , d 20 ]). It is possible,
When the film thickness of the silicon nitride film is greater than 155 nm and less than or equal to 165 nm, the minimum value of reflectivity is obtained at 21 points (a combination of 21 [n 10 , n 20 , k 10 , k 20 , d 10 , d 20 ]). It is possible,
When the film thickness of the silicon nitride film is larger than 165 nm and smaller than 175 nm, the minimum value of the reflectance is obtained at 19 points (a combination of 19 [n 10 , n 20 , k 10 , k 20 , d 10 , d 20 ]). It is possible,
When the film thickness of the silicon nitride film is greater than 175 nm and less than 185 nm, the minimum value of the reflectance is obtained at 23 points (a combination of 23 [n 10 , n 20 , k 10 , k 20 , d 10 , d 20 ]). It is possible,
When the film thickness of the silicon nitride film is greater than 185 nm and less than or equal to 195 nm, the minimum value of the reflectance is obtained at 21 points (a combination of 21 [n 10 , n 20 , k 10 , k 20 , d 10 , d 20 ]). It is possible,
When the thickness of the silicon nitride film is greater than 195 nm and less than or equal to 205 nm, the minimum value of the reflectance is obtained at 20 points (a combination of 20 [n 10 , n 20 , k 10 , k 20 , d 10 , d 20 ]). I was able to.

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反射率の極小値を得ることができる上記の[n10,n20,k10,k20,d10,d20]の値の組合せを用いれば、所定の開口数NAであって、それぞれのシリコン膜厚において、該当する露光系の開口数NAに対応する入射角全領域に亙って反射率を0.4%以下とすることができる。即ち、上記の組合せは、対応する開口数NAよりも小さい開口数NAの場合でも、反射率を0.4%以下にできるという観点から、有効な組合せである。 If a combination of the above values of [n 10 , n 20 , k 10 , k 20 , d 10 , d 20 ] that can obtain the minimum value of reflectance is used, a predetermined numerical aperture NA can be obtained. In the silicon film thickness, the reflectivity can be 0.4% or less over the entire incident angle region corresponding to the numerical aperture NA of the corresponding exposure system. That is, the above combination is an effective combination from the viewpoint that the reflectance can be reduced to 0.4% or less even when the numerical aperture NA is smaller than the corresponding numerical aperture NA.

上記の[n10,n20,k10,k20,d10,d20]の値の組合せの各場合において、これら6つの変数のうち、5つの変数を固定したときに、残りの1つの変数が、どこまで変動すると、反射率が0.4%を超えるかに関して、シミュレーションを行った。その結果、以下の表2−A〜表2−T(開口数NA:1.0<NA≦1.1)に示す変動許容範囲が得られた。 In each case of the above combinations of values of [n 10 , n 20 , k 10 , k 20 , d 10 , d 20 ], when 5 of these 6 variables are fixed, the remaining 1 A simulation was performed as to how far the variable fluctuated and the reflectivity exceeded 0.4%. As a result, the allowable fluctuation range shown in the following Table 2-A to Table 2-T (numerical aperture NA: 1.0 <NA ≦ 1.1) was obtained.

尚、以下において、
1-min:反射率が0.4%を超えないときのn10の最小値
1-max:反射率が0.4%を超えないときのn10の最大値
1-min:反射率が0.4%を超えないときのk10の最小値
1-max:反射率が0.4%を超えないときのk10の最大値
1-min:反射率が0.4%を超えないときのd10の最小値
1-max:反射率が0.4%を超えないときのd10の最大値
2-min:反射率が0.4%を超えないときのn20の最小値
2-max:反射率が0.4%を超えないときのn20の最大値
2-min:反射率が0.4%を超えないときのk20の最小値
2-max:反射率が0.4%を超えないときのk20の最大値
2-min:反射率が0.4%を超えないときのd20の最小値
2-max:反射率が0.4%を超えないときのd20の最大値
とする。
In the following,
n 1-min : Minimum value of n 10 when reflectance does not exceed 0.4% n 1-max : Maximum value of n 10 when reflectance does not exceed 0.4% k 1-min : Reflection the minimum value k 1-max of k 10 when the rate does not exceed 0.4% maximum value d 1-min of k 10 when the reflectance does not exceed 0.4%: reflectance of 0.4% D 10 -minimum value d 1 -max when the reflectance does not exceed 0.4% d 2 -min maximum value of d 10 when the reflectance does not exceed 0.4% n when the reflectance does not exceed 0.4% 20 minimum value n 2-max : Maximum value of n 20 when the reflectance does not exceed 0.4% k 2-min : Minimum value of k 20 when the reflectance does not exceed 0.4% k 2 -max: maximum value d 2-min of k 20 when the reflectance does not exceed 0.4%: minimum d 2-max of d 20 when the reflectance does not exceed 0.4%: reflectance The maximum value of d 20 when 0.4% is not exceeded.

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[n10,n20,k10,k20,d10,d20]の値の組合せは、該当する露光系の開口数NAに対応する入射角全領域における反射率を極小(最小)にする組合せである。即ち、この極小化(最小化)のための評価関数をfとしたとき、評価関数fはn10、n20、k10、k20、d10、及び、d20の関数であり、f(n10,n20,k10,k20,d10,d20)を極小化(最小化)する組合せが、上に挙げたような[n10,n20,k10,k20,d10,d20]の値の組合せである。即ち、評価関数fは、上に挙げたような[n10,n20,k10,k20,d10,d20]の値の組合せで、極小化されている。 The combination of the values of [n 10 , n 20 , k 10 , k 20 , d 10 , d 20 ] minimizes (minimizes) the reflectance in the entire incident angle region corresponding to the numerical aperture NA of the corresponding exposure system. It is a combination. That is, when the evaluation function for minimization (minimization) is f, the evaluation function f is a function of n 10 , n 20 , k 10 , k 20 , d 10 , and d 20 , and f ( n 10 , n 20 , k 10 , k 20 , d 10 , d 20 ) is a combination that minimizes (minimizes) [n 10 , n 20 , k 10 , k 20 , d 10]. , D 20 ]. That is, the evaluation function f is minimized by a combination of the values [n 10 , n 20 , k 10 , k 20 , d 10 , d 20 ] as described above.

一般に、多変数関数f(xi)(i=0,1,2,・・・n)が、
i=xi-min
で極小となるとき、この極小値の近傍では、f(xi)を以下の式(1)で表すことができる。即ち、2次関数で近似することができる。但し、記号「Σ」は、i=0,1,2,・・・nにおける総和を意味する。式(2)においても同様である。
In general, the multivariable function f (x i ) (i = 0, 1, 2,... N) is
x i = x i-min
In the vicinity of this minimum value, f (x i ) can be expressed by the following formula (1). That is, it can be approximated by a quadratic function. However, the symbol “Σ” means the sum in i = 0, 1, 2,... N. The same applies to equation (2).

f(xi)=Σai(xi−xi-min2+b (1) f (x i ) = Σa i (x i −x i−min ) 2 + b (1)

そして、この場合、f(xi)が、bよりも大きい、或る一定の数c以下となるための条件は、以下の式(2)の楕円関数型で表すことができる。ここで、xi-cは、他の変数の全て固定してxiのみを変動させたときに、f(xi)=cとなるxiの値である。 In this case, the condition for f (x i ) to be equal to or smaller than a certain number c greater than b can be expressed by an elliptic function type of the following equation (2). Here, x ic is a value of x i where f (x i ) = c when only x i is varied with all other variables fixed.

Σ(xi−x1-min2/(xi-c−xi-min2≦1 (2) Σ (x i −x 1−min ) 2 / (x ic −x i−min ) 2 ≦ 1 (2)

よって、1つの変数のみを変化させて、他の変数を固定し、反射率が0.4%となる各変数の値であるn1-max、n1-min、k1-max、k1-min、d1-max、d1-min、n2-max、n2-min、k2-max、k2-min、d2-max、d2-minの値を用いることにより、以下の式(3)を満たすn10、n20、k10、n20、k20、及び、d20を採用すれば、反射率は0.4%を超えないことになる。 Therefore, only one variable is changed, the other variables are fixed, and n 1-max , n 1-min , k 1-max , k 1 , which are values of each variable with a reflectance of 0.4%. -min, d 1-max, d 1-min, n 2-max, n 2-min, k 2-max, k 2-min, d 2-max, by using a value of d 2-min, or less If n 10 , n 20 , k 10 , n 20 , k 20 , and d 20 satisfying the expression (3) are adopted, the reflectance does not exceed 0.4%.

{(n1−n10)/(n1m−n10)}2+{(k1−k10)/(k1m−k10)}2+{(d1−d10)/(d1m−d10)}2+{(n2−n20)/(n2m−n20)}2+{(k2−k20)/(k2m−k20)}2+{(d2−d20)/(d2m−d20)}2≦1 (3) {(N 1 −n 10 ) / (n 1m −n 10 )} 2 + {(k 1 −k 10 ) / (k 1m −k 10 )} 2 + {(d 1 −d 10 ) / (d 1m −d 10 )} 2 + {(n 2 −n 20 ) / (n 2m −n 20 )} 2 + {(k 2 −k 20 ) / (k 2m −k 20 )} 2 + {(d 2 − d 20 ) / (d 2m −d 20 )} 2 ≦ 1 (3)

但し、n1m、k1m、d1m、n2m、k2m、d2mは、以下の値をとる。 However, n 1m , k 1m , d 1m , n 2m , k 2m , and d 2m take the following values.

1m:n1≧n10のときn1-max,n1<n10のときn1-min
1m:k1≧k10のときk1-max,k1<k10のときk1-min
1m:d1≧d10のときd1-max,d1<d10のときd1-min
2m:n2≧n20のときn2-max,n2<n20のときn2-min
2m:k2≧k20のときk2-max,k2<k20のときk2-min
2m:d2≧d20のときd2-max,d2<d20のときd2-min
n 1m: n 1-max when the n 1 ≧ n 10, when n 1 <n 10 n 1- min
k 1m: k 1-max when the k 1 ≧ k 10, when the k 1 <k 10 k 1- min
d 1m: d 1-max when d 1 ≧ d 10, when d 1 <d 10 d 1- min
n 2m: n 2-max when the n 2 ≧ n 20, when n 2 <n 20 n 2- min
k 2m: k 2-max when k 2 ≧ k 20, when k 2 <k 20 k 2- min
d 2m: when d 2 ≧ d 20 d 2- max, when d 2 <d 20 d 2- min

尚、n1m、k1m、d1m、n2m、k2m、d2mの値を、n1、n2、k1、n2、k2、及び、d2が、それぞれ、n10、n20、k10、n20、k20、及び、d20と比べたときの大小で分けた理由は、
1-max−n10=n10−n1-min
1-max−k10=k10−k1-min
1-max−d10=d10−d1-min
2-max−n20=n20−n2-min
2-max−k20=k20−k2-min
2-max−d20=d20−d2-min
では、必ずしもないため、式(2)で規定される楕円体の径の定義を、n1、n2、k1、n2、k2、及び、d2が、それぞれ、n10、n20、k10、n20、k20、及び、d20と比べたときの大小の場合で分けた。云い換えれば、楕円体の曲率が、例えば、n1≧n10のときと、n1<n10のときでは異なるからであり、k10,d10,n20,k20,d20についても同様のことが云えるからである。
Note that the values of n 1m , k 1m , d 1m , n 2m , k 2m , and d 2m are the same as n 1 , n 2 , k 1 , n 2 , k 2 , and d 2 , respectively, n 10 , n 20 , k 10 , n 20 , k 20 , and d 20 when compared with d 20
n 1−max −n 10 = n 10 −n 1−min
k 1-max −k 10 = k 10 −k 1-min
d 1-max −d 10 = d 10 −d 1-min
n 2-max -n 20 = n 20 -n 2-min
k 2-max -k 20 = k 20 -k 2-min
d 2−max −d 20 = d 20 −d 2−min
In the definition of the ellipsoid diameter defined by the equation (2), n 1 , n 2 , k 1 , n 2 , k 2 , and d 2 are n 10 , n 20 , respectively. , K 10 , n 20 , k 20 , and d 20 . In other words, the curvature of the ellipsoid is different when, for example, n 1 ≧ n 10 and n 1 <n 10 , and k 10 , d 10 , n 20 , k 20 , and d 20 are also different. This is because the same can be said.

こうして、[n10,k10,d10,n20,k20,d20]の値の組合せとして、開口数NAが1.0<NA≦1.1の場合であって、
2(nm)≦T≦15(nm)場合、ケース[A−01]〜ケース[A−26]のいずれか、
15(nm)<T≦25(nm)場合、ケース[B−01]〜ケース[B−22]のいずれか、
25(nm)<T≦35(nm)場合、ケース[C−01]〜ケース[C−24]のいずれか、
35(nm)<T≦45(nm)場合、ケース[D−01]〜ケース[D−25]のいずれか、
45(nm)<T≦55(nm)場合、ケース[E−01]〜ケース[E−22]のいずれか、
55(nm)<T≦65(nm)場合、ケース[F−01]〜ケース[F−20]のいずれか、
65(nm)<T≦75(nm)場合、ケース[G−01]〜ケース[G−24]のいずれか、
75(nm)<T≦85(nm)場合、ケース[H−01]〜ケース[H−21]のいずれか、
85(nm)<T≦95(nm)場合、ケース[I−01]〜ケース[I−19]のいずれか、
95(nm)<T≦105(nm)場合、ケース[J−01]〜ケース[J−21]のいずれか、
105(nm)<T≦115(nm)場合、ケース[K−01]〜ケース[K−23]のいずれか、
115(nm)<T≦125(nm)場合、ケース[L−01]〜ケース[L−20]のいずれか、
125(nm)<T≦135(nm)場合、ケース[M−01]〜ケース[M−20]のいずれか、
135(nm)<T≦145(nm)場合、ケース[N−01]〜ケース[N−23]のいずれか、
145(nm)<T≦155(nm)場合、ケース[O−01]〜ケース[O−23]のいずれか、
155(nm)<T≦165(nm)場合、ケース[P−01]〜ケース[P−21]のいずれか、
165(nm)<T≦175(nm)場合、ケース[Q−01]〜ケース[Q−19]のいずれか、
175(nm)<T≦185(nm)場合、ケース[R−01]〜ケース[R−23]のいずれか、
185(nm)<T≦195(nm)場合、ケース[S−01]〜ケース[S−21]のいずれか、
195(nm)<T≦205(nm)場合、ケース[T−01]〜ケース[T−20]のいずれか、
を選択することで、反射率が0.4%を超えないことが保証され、しかも、
1とn10の大小関係に基づき当該ケースにおけるn1mの値を採用し、
1とk10の大小関係に基づき当該ケースにおけるk1mの値を採用し、
1とd10の大小関係に基づき当該ケースにおけるd1mの値を採用し、
2とn20の大小関係に基づき当該ケースにおけるn2mの値を採用し、
2とk20の大小関係に基づき当該ケースにおけるk2mの値を採用し、
2とd20の大小関係に基づき当該ケースにおけるd2mの値を採用することで、
当該ケースにおけるn1mの最大値(n1-max)と最小値(n1-min)の範囲内にn1があり、
当該ケースにおけるk1mの最大値(k1-max)と最小値(k1-min)の範囲内にk1があり、
当該ケースにおけるd1mの最大値(d1-max)と最小値(d1-min)の範囲内にd1があり、
当該ケースにおけるn2mの最大値(n2-max)と最小値(n2-min)の範囲内にn2があり、
当該ケースにおけるk2mの最大値(k2-max)と最小値(k2-min)の範囲内にk2があり、
当該ケースにおけるd2mの最大値(d2-max)と最小値(d2-min)の範囲内にd2がある場合には、反射防止膜は、シリコン半導体基板からの反射率が0.4%を超えないことが保証される結果、良好なレジストパターンを得ることができる。
Thus, as a combination of values of [n 10 , k 10 , d 10 , n 20 , k 20 , d 20 ], the numerical aperture NA is 1.0 <NA ≦ 1.1,
In the case of 2 (nm) ≦ T ≦ 15 (nm), any one of case [A-01] to case [A-26],
In the case of 15 (nm) <T ≦ 25 (nm), any one of case [B-01] to case [B-22],
In the case of 25 (nm) <T ≦ 35 (nm), any of case [C-01] to case [C-24],
When 35 (nm) <T ≦ 45 (nm), any of case [D-01] to case [D-25],
When 45 (nm) <T ≦ 55 (nm), any of case [E-01] to case [E-22],
When 55 (nm) <T ≦ 65 (nm), any of case [F-01] to case [F-20],
When 65 (nm) <T ≦ 75 (nm), any of case [G-01] to case [G-24],
When 75 (nm) <T ≦ 85 (nm), any one of case [H-01] to case [H-21],
When 85 (nm) <T ≦ 95 (nm), any of case [I-01] to case [I-19],
When 95 (nm) <T ≦ 105 (nm), any of case [J-01] to case [J-21],
In the case of 105 (nm) <T ≦ 115 (nm), any of the case [K-01] to the case [K-23],
In the case of 115 (nm) <T ≦ 125 (nm), any of case [L-01] to case [L-20],
In the case of 125 (nm) <T ≦ 135 (nm), any of the case [M-01] to the case [M-20],
In the case of 135 (nm) <T ≦ 145 (nm), any one of case [N-01] to case [N-23],
In the case of 145 (nm) <T ≦ 155 (nm), any one of case [O-01] to case [O-23],
In the case of 155 (nm) <T ≦ 165 (nm), any one of case [P-01] to case [P-21],
In the case of 165 (nm) <T ≦ 175 (nm), any one of case [Q-01] to case [Q-19],
In the case of 175 (nm) <T ≦ 185 (nm), any one of case [R-01] to case [R-23],
In the case of 185 (nm) <T ≦ 195 (nm), any one of case [S-01] to case [S-21],
In the case of 195 (nm) <T ≦ 205 (nm), any one of case [T-01] to case [T-20],
To ensure that the reflectivity does not exceed 0.4%,
Based on the magnitude relationship between n 1 and n 10 , the value of n 1m in this case is adopted,
the value of k 1 m in the case is adopted based on the magnitude relationship between k 1 and k 10,
Based on the magnitude relationship between d 1 and d 10 , the value of d 1m in the case is adopted,
Based on the magnitude relationship between n 2 and n 20 , the value of n 2m in this case is adopted,
The value of k 2m in the case is adopted based on the magnitude relation of k 2 and k 20,
By adopting the value of d 2m in this case based on the magnitude relationship between d 2 and d 20 ,
N 1 is within the range of the maximum value (n 1-max ) and the minimum value (n 1-min ) of n 1m in the case,
K 1 is within the range of the maximum value (k 1-max ) and the minimum value (k 1-min ) of k 1m in the case,
D 1 is within the range of the maximum value (d 1-max ) and the minimum value (d 1-min ) of d 1m in the case,
N 2 is within the range of the maximum value (n 2-max ) and the minimum value (n 2-min ) of n 2m in the case,
K 2 is within the range of the maximum value (k 2-max ) and the minimum value (k 2-min ) of k 2m in the case,
When d 2 is within the range of the maximum value (d 2−max ) and the minimum value (d 2−min ) of d 2m in the case, the antireflection film has a reflectivity of 0. As a result of ensuring that it does not exceed 4%, a good resist pattern can be obtained.

即ち、中心が(n10,n20,k10,k20,d10,d20)であり、径が(n1m−n10)、(k1m−k10)、(d1m−d10)、(n2m−n20)、(k2m−k20)、(d2m−d20)の絶対値である、(n1,k1,d1,n2,k2,d2)の6つを変数とした6次元の楕円を想定したとき、この楕円の内部に入る範囲における(n1,k1,d1,n2,k2,d2)の任意の値の組合せを選択すれば、反射防止膜の反射率を0.4%以下とすることができる。 That is, the center is (n 10 , n 20 , k 10 , k 20 , d 10 , d 20 ), and the diameters are (n 1m −n 10 ), (k 1m −k 10 ), (d 1m −d 10 ). ), (N 2m −n 20 ), (k 2m −k 20 ), (d 2m −d 20 ) (n 1 , k 1 , d 1 , n 2 , k 2 , d 2 ) Assuming a 6-dimensional ellipse with these six variables, a combination of arbitrary values of (n 1 , k 1 , d 1 , n 2 , k 2 , d 2 ) within the range that falls inside this ellipse If selected, the reflectance of the antireflection film can be 0.4% or less.

特開2001−242630、及び、Proceedings of SPIE 2003,5039,152(K.Babich他)等に記載のプラズマエンハンスCVD法により、後述する表3に示す屈折率及び膜厚を有する2層の反射防止膜をシリコン窒化膜が成膜されたシリコン半導体基板の表面に形成した。尚、シリコン窒化膜のシリコン基板上への成膜は、熱CVD法で行った。具体的には、CVD法におけるソースガスとしてSiH4+NH3を用い、反応温度を400゜Cに設定して行った。 Antireflection of two layers having a refractive index and a film thickness shown in Table 3 to be described later by plasma enhanced CVD method described in JP-A-2001-242630 and Proceedings of SPIE 2003, 5039, 152 (K. Babich et al.) The film was formed on the surface of a silicon semiconductor substrate on which a silicon nitride film was formed. The silicon nitride film was formed on the silicon substrate by a thermal CVD method. Specifically, SiH 4 + NH 3 was used as a source gas in the CVD method, and the reaction temperature was set to 400 ° C.

プラズマエンハンスCVD法は、上記の参考文献に詳述されているように、平行電極反応器中で行われる成膜方法であり、シリコン半導体基板を一方の電極に載置する。シリコン半導体基板には、この電極によって負のバイアスが印加され、反応器内の圧力、反応器に導入する反応前駆物質の種類(テトラメチルシラン、トリメチルシラン、テトラメチルテトラシロキサン、テトラメチルゲルマン、酸素等)及び流量、基板温度を制御することにより、種々の値の複素屈折率を有する層を成膜、形成することができる。   The plasma enhanced CVD method is a film forming method performed in a parallel electrode reactor as described in detail in the above-mentioned reference, and a silicon semiconductor substrate is placed on one electrode. A negative bias is applied to the silicon semiconductor substrate by this electrode, the pressure in the reactor, the type of reaction precursor introduced into the reactor (tetramethylsilane, trimethylsilane, tetramethyltetrasiloxane, tetramethylgermane, oxygen Etc.), flow rate, and substrate temperature can be controlled to form and form layers having various values of complex refractive index.

尚、表3中、実施例は本発明の条件を満たす反射防止膜であり、一方、比較例は本発明の条件を満たさない比較対象用の反射防止膜である。   In Table 3, Examples are antireflection films that satisfy the conditions of the present invention, while Comparative Examples are antireflection films for comparison that do not satisfy the conditions of the present invention.

Figure 2007220845
Figure 2007220845

より詳細には、1.0<NA≦1.1における評価結果を示す表3において、実施例1−1は、シリコン窒化膜の膜厚(T)が 45(nm)<T≦55(nm) の場合の本発明の条件を満たす反射防止膜であり、実施例1−2は、55(nm)<T≦65(nm) の場合の本発明の条件を満たす反射防止膜であり、実施例1−3は、95(nm)<T≦105(nm) の場合の本発明の条件を満たす反射防止膜であり、実施例1−4は、145(nm)<T≦155(nm) の場合の本発明の条件を満たす反射防止膜であり、実施例1−5は、175(nm)<T≦185(nm) の場合の本発明の条件を満たす反射防止膜である。一方、比較例1−1は、45(nm)<T≦55(nm) の場合の本発明の条件を満たさない反射防止膜であり、比較例1−2は、55(nm)<T≦65(nm) の場合の本発明の条件を満たさない反射防止膜であり、比較例1−3、比較例1−4は、95(nm)<T≦105(nm) の場合の本発明の条件を満たさない反射防止膜であり、比較例1−5は、145(nm)<T≦155(nm) の場合の本発明の条件を満たさない反射防止膜であり、比較例1−6は、175(nm)<T≦185(nm) の場合の本発明の条件を満たさない反射防止膜である。   More specifically, in Table 3 showing the evaluation results in 1.0 <NA ≦ 1.1, in Example 1-1, the film thickness (T) of the silicon nitride film is 45 (nm) <T ≦ 55 (nm ), And Example 1-2 is an antireflection film satisfying the conditions of the present invention when 55 (nm) <T ≦ 65 (nm). Example 1-3 is an antireflection film that satisfies the conditions of the present invention when 95 (nm) <T ≦ 105 (nm). Example 1-4 is 145 (nm) <T ≦ 155 (nm). In Example 1, the antireflection film satisfies the conditions of the present invention when 175 (nm) <T ≦ 185 (nm). On the other hand, Comparative Example 1-1 is an antireflection film that does not satisfy the conditions of the present invention in the case of 45 (nm) <T ≦ 55 (nm). Comparative Example 1-2 has 55 (nm) <T ≦ It is an antireflection film that does not satisfy the conditions of the present invention in the case of 65 (nm), and Comparative Examples 1-3 and 1-4 are those of the present invention in the case of 95 (nm) <T ≦ 105 (nm). It is an antireflection film that does not satisfy the conditions, and Comparative Example 1-5 is an antireflection film that does not satisfy the conditions of the present invention when 145 (nm) <T ≦ 155 (nm). 175 (nm) <T ≦ 185 (nm) An antireflection film that does not satisfy the conditions of the present invention.

ここで、表3の実施例及び比較例における反射防止膜の上層及び下層を構成する材料はSiCOHである。また、各膜の複素屈折率は、SOPRA社製のエリプソメータにより測定を行った。   Here, the material constituting the upper and lower layers of the antireflection film in the examples and comparative examples in Table 3 is SiCOH. The complex refractive index of each film was measured with an ellipsometer manufactured by SOPRA.

これらの2層の反射防止膜上に、レジスト層として、JSR株式会社製のフォトレジストARX2014Jを膜厚が100nmになるようにスピンコートした後、105゜C、60秒間、ベーキング処理を行い、次いで、トップコート層として同社製のトップコート材TCX001を膜厚が30nmになるようにスピンコートした。その後、膜全体を100゜Cで30秒間、ベーキング処理を行った。   On these two antireflection films, as a resist layer, a photoresist ARX2014J made by JSR Corporation was spin-coated so as to have a film thickness of 100 nm, followed by baking at 105 ° C. for 60 seconds, As a top coat layer, a top coat material TCX001 manufactured by the same company was spin-coated so as to have a film thickness of 30 nm. Thereafter, the entire film was baked at 100 ° C. for 30 seconds.

このようにして作製したサンプルに対して、二光束干渉露光装置により露光を行った。この二光束干渉露光装置にあっては、光源としてArFエキシマレーザを用い、レーザの光路上に、三角形若しくは五角形の断面を有するプリズムが設置されている。プリズムの下面に、サンプルとプリズム下面の距離が1mmとなるように、サンプルを配置した。例えば、三角形断面のプリズムを用いる場合、プリズムの頂点をレーザの光路の中央部に配置し、この頂点に対向する面をプリズムの下面とする。プリズムの上方からプリズムの下面方向に向けてプリズムにレーザ光を照射すると、プリズムの2つの側面に入射したレーザ光は、各側面と入射レーザ光との角度に依存して屈折し、その光路の向きが変わる。2つの側面からのそれぞれの、進行方向の異なるレーザ光がプリズム下面において干渉することにより、サンプル上に周期的な光学強度分布を得ることができ、これにより、レジスト層を感光することができる。尚、1.0<NA≦1.1における評価において用いたプリズムの換算開口数NAは、1.05である。   The sample thus prepared was exposed using a two-beam interference exposure apparatus. In this two-beam interference exposure apparatus, an ArF excimer laser is used as a light source, and a prism having a triangular or pentagonal cross section is installed on the optical path of the laser. The sample was placed on the lower surface of the prism so that the distance between the sample and the lower surface of the prism was 1 mm. For example, when a prism having a triangular cross section is used, the apex of the prism is arranged at the center of the optical path of the laser, and the surface facing the apex is the lower surface of the prism. When laser light is irradiated onto the prism from above the prism toward the lower surface of the prism, the laser light incident on the two side surfaces of the prism is refracted depending on the angle between each side surface and the incident laser light, and the optical path The direction changes. A laser light having a different traveling direction from each of the two side surfaces interferes with the lower surface of the prism, so that a periodic optical intensity distribution can be obtained on the sample, whereby the resist layer can be exposed. The converted numerical aperture NA of the prism used in the evaluation in 1.0 <NA ≦ 1.1 is 1.05.

サンプルとプリズム下面の間隙、1mmの部分に毛細管現象を用いて水を導入することにより、水を液浸液とする液浸露光を実行した。   Immersion exposure using water as an immersion liquid was performed by introducing water into the 1 mm gap between the sample and the lower surface of the prism using a capillary phenomenon.

露光を行ったサンプルに、120゜Cで90秒間、ベーキング処理を施し、その後、2.38%のTMAH(テトラメチルアンモニウムハイドロオキサイド)から成る標準現像液で、現像し、レジストパターン観察用サンプルとした。レジスト層の形状観察は、シリコン半導体基板を割った後、その断面を走査電子顕微鏡で観察すると共に、オプティカルスキャテッドメトリー(KLA−Tencor社製SCD−100)を用いて40μm×40μmの範囲の散乱光の分布による加工形状の精度を測定した。   The exposed sample was baked at 120 ° C for 90 seconds, then developed with a standard developer solution of 2.38% TMAH (tetramethylammonium hydroxide), and a resist pattern observation sample did. The shape of the resist layer is observed by dividing the silicon semiconductor substrate, observing the cross section with a scanning electron microscope, and scattering in the range of 40 μm × 40 μm using optical scatterometry (SCD-100 manufactured by KLA-Tencor). The accuracy of the machining shape due to the light distribution was measured.

観察結果として、良好な矩形の断面を有するレジストパターンが得られたものを丸印「○」、そうではなく、良好な矩形断面の得られなかったものをバツ印「×」として、表3に纏めた。   As a result of the observation, a resist pattern having a good rectangular cross section was obtained as a circle “◯”, and otherwise a good rectangular cross section was obtained as a cross “X” in Table 3. I summarized it.

表3からも明らかなように、本発明を適用した2層構成の反射防止膜は、本発明を適用していない2層構成の反射防止膜に比べて、良好なレジストの断面形状を得ることできることが判る。   As is clear from Table 3, the antireflection film having the two-layer structure to which the present invention is applied can obtain a better resist cross-sectional shape than the antireflection film having the two-layer structure to which the present invention is not applied. I understand that I can do it.

以上のように、本発明を適用して、複素屈折率、膜厚が特定の範囲にある2層構成の反射防止膜をレジスト層と、シリコン窒化膜が形成されたシリコン半導体基板の表面との間に形成することにより、一定の範囲の露光系の開口数NAに対応する反射防止膜において、シリコン半導体基板からの反射率を低減させ、良好なレジストパターンを得ることができる。   As described above, by applying the present invention, a two-layer antireflection film having a complex refractive index and a film thickness in a specific range is formed between a resist layer and the surface of a silicon semiconductor substrate on which a silicon nitride film is formed. By forming in between, in the antireflection film corresponding to the numerical aperture NA of the exposure system in a certain range, the reflectance from the silicon semiconductor substrate can be reduced and a good resist pattern can be obtained.

尚、上記の実施例においては、プラズマエンハンスCVD法にて形成した2層構成の反射防止膜を例に挙げて説明したが、本発明はこれに限られるものではなく、例えば、スピンコート法等、その他の方法で形成した2層構成の反射防止膜を用いることもできる。   In the above-described embodiment, the antireflection film having a two-layer structure formed by the plasma enhanced CVD method has been described as an example. However, the present invention is not limited to this, for example, a spin coating method or the like. A two-layer antireflection film formed by other methods can also be used.

本発明の2層構成の反射防止膜を用いて半導体装置を製造した。尚、露光用マスクとして位相シフトマスクを使用し、露光光の光源としてArFエキシマレーザ(波長λ:193nm)を使用し、輪帯照明法を採用した。また、レジスト層の表面を水層で覆った。そして、所望のパターンが、線幅や形状の変動無しで、レジスト層に形成できるかを検証した。その結果、いずれの場合においても、所望のパターンが、線幅や形状の変動無しで、レジスト層に形成できることが判った。しかも、いずれの場合においても、反射率が0.4%以下であった。   A semiconductor device was manufactured using the antireflection film having a two-layer structure of the present invention. A phase shift mask was used as the exposure mask, an ArF excimer laser (wavelength λ: 193 nm) was used as the exposure light source, and an annular illumination method was adopted. The surface of the resist layer was covered with an aqueous layer. And it verified whether a desired pattern could be formed in a resist layer, without the fluctuation | variation of a line width or a shape. As a result, it has been found that in any case, a desired pattern can be formed on the resist layer without variation in line width or shape. Moreover, in any case, the reflectance was 0.4% or less.

具体的には、トレンチ構造を有する素子分離領域の形成を行った。即ち、シリコン窒化膜が表面に形成されたシリコン半導体基板の上に2層構造を有する反射防止膜を形成し、その上にレジスト層を形成し、レジスト層を露光・現像して、パターニングされたレジスト層を得た。次いで、このパターニングされたレジスト層をエッチング用マスクとして、RIE法にてシリコン窒化膜が表面に形成されたシリコン半導体基板を所定の深さまでエッチングし、シリコン半導体基板にトレンチを形成した。その後、トレンチを含むシリコン半導体基板の全面に絶縁膜を形成し、シリコン半導体基板表面上の絶縁膜を除去することで、シリコン半導体基板に形成されたトレンチに絶縁膜が埋め込まれたトレンチ構造を有する素子分離領域を得ることができた。   Specifically, an element isolation region having a trench structure was formed. That is, an antireflection film having a two-layer structure is formed on a silicon semiconductor substrate having a silicon nitride film formed on the surface, a resist layer is formed thereon, and the resist layer is exposed and developed to be patterned. A resist layer was obtained. Next, using the patterned resist layer as an etching mask, the silicon semiconductor substrate having the silicon nitride film formed on the surface was etched to a predetermined depth by RIE to form a trench in the silicon semiconductor substrate. Thereafter, an insulating film is formed on the entire surface of the silicon semiconductor substrate including the trench, and the insulating film on the surface of the silicon semiconductor substrate is removed, thereby having a trench structure in which the insulating film is embedded in the trench formed in the silicon semiconductor substrate. An element isolation region was obtained.

以上、本発明を好ましい実施例に基づき説明したが、本発明はこれらの実施例に限定されるものではない。実施例における反射防止膜の構成、反射防止膜を構成する各層の膜厚や複素屈折率は例示であり、適宜、変更することができる。   As mentioned above, although this invention was demonstrated based on the preferable Example, this invention is not limited to these Examples. The configuration of the antireflection film and the film thickness and complex refractive index of each layer constituting the antireflection film in the examples are examples, and can be appropriately changed.

図1は、コンタクトホールの直径バラツキの反射率依存性を計算した結果を示すグラフである。FIG. 1 is a graph showing the result of calculating the dependency of contact hole diameter variation on reflectance.

Claims (9)

半導体装置の製造工程において使用され、190nm乃至195nmの波長を有し、開口数NAが 1.0<NA≦1.1 である露光系にてレジスト層を露光する際に用いられる、レジスト層と、シリコン半導体基板の表面に形成された以下の値の膜厚T(単位:nm)を有するシリコン窒化膜との間に設けられた2層構造を有する反射防止膜であって、
反射防止膜を構成する上層の複素屈折率N1、下層の複素屈折率N2を、それぞれ、
1=n1−k1
2=n2−k2
とし、上層の膜厚をd1(単位:nm)、下層の膜厚をd2(単位:nm)とし、
[n10,k10,d10,n20,k20,d20]の値の組合せとして、シリコン窒化膜の膜厚Tに依存して以下のいずれかを選択したとき、
1,k1,d1,n2,k2,d2が、以下の関係式を満足することを特徴とする反射防止膜。
{(n1−n10)/(n1m−n10)}2+{(k1−k10)/(k1m−k10)}2+{(d1−d10)/(d1m−d10)}2+{(n2−n20)/(n2m−n20)}2+{(k2−k20)/(k2m−k20)}2+{(d2−d20)/(d2m−d20)}2≦1
但し、n1とn10の大小関係に基づき当該ケースにおけるn1mの値を採用し、k1とk10の大小関係に基づき当該ケースにおけるk1mの値を採用し、d1とd10の大小関係に基づき当該ケースにおけるd1mの値を採用し、n2とn20の大小関係に基づき当該ケースにおけるn2mの値を採用し、k2とk20の大小関係に基づき当該ケースにおけるk2mの値を採用し、d2とd20の大小関係に基づき当該ケースにおけるd2mの値を採用する。
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A resist layer used in a manufacturing process of a semiconductor device and used when exposing a resist layer in an exposure system having a wavelength of 190 nm to 195 nm and a numerical aperture NA of 1.0 <NA ≦ 1.1 An antireflection film having a two-layer structure provided between a silicon nitride film having a thickness T (unit: nm) formed on the surface of a silicon semiconductor substrate and having the following value:
The upper-layer complex refractive index N 1 and the lower-layer complex refractive index N 2 constituting the antireflection film are respectively expressed as follows:
N 1 = n 1 −k 1 i
N 2 = n 2 −k 2 i
The upper layer thickness is d 1 (unit: nm), the lower layer thickness is d 2 (unit: nm),
When one of the following is selected as a combination of values of [n 10 , k 10 , d 10 , n 20 , k 20 , d 20 ] depending on the film thickness T of the silicon nitride film,
An antireflection film, wherein n 1 , k 1 , d 1 , n 2 , k 2 , and d 2 satisfy the following relational expression.
{(N 1 −n 10 ) / (n 1m −n 10 )} 2 + {(k 1 −k 10 ) / (k 1m −k 10 )} 2 + {(d 1 −d 10 ) / (d 1m −d 10 )} 2 + {(n 2 −n 20 ) / (n 2m −n 20 )} 2 + {(k 2 −k 20 ) / (k 2m −k 20 )} 2 + {(d 2 − d 20 ) / (d 2m −d 20 )} 2 ≦ 1
However, the value of n 1m in the case is adopted based on the magnitude relationship between n 1 and n 10 , the value of k 1m in the case is adopted based on the magnitude relationship between k 1 and k 10 , and d 1 and d 10 The value of d 1m in the case is adopted based on the magnitude relationship, the value of n 2m in the case is adopted based on the magnitude relationship between n 2 and n 20 , and the value of k in the case based on the magnitude relationship between k 2 and k 20 is adopted. adopts a value of 2m, adopts the value of d 2m in the case based on the magnitude relation between d 2 and d 20.
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1≦250を満足し、且つ、d2≦250を満足することを特徴とする請求項1に記載の反射防止膜。 The antireflection film according to claim 1, wherein d 1 ≦ 250 is satisfied and d 2 ≦ 250 is satisfied. レジスト層の屈折率は、1.60乃至1.80であることを特徴とする請求項1に記載の反射防止膜。   The antireflective film according to claim 1, wherein the resist layer has a refractive index of 1.60 to 1.80. 半導体装置の製造工程において使用され、190nm乃至195nmの波長を有し、開口数NAが 1.0<NA≦1.1 である露光系にて、レジスト層と、シリコン半導体基板の表面に形成された以下の値の膜厚T(単位:nm)を有するシリコン窒化膜との間に2層構造を有する反射防止膜を設けた状態で、該レジスト層を露光する露光方法であって、
反射防止膜を構成する上層の複素屈折率N1、下層の複素屈折率N2を、それぞれ、
1=n1−k1
2=n2−k2
とし、上層の膜厚をd1(単位:nm)、下層の膜厚をd2(単位:nm)とし、
[n10,k10,d10,n20,k20,d20]の値の組合せとして、シリコン窒化膜の膜厚Tに依存して以下のいずれかを選択したとき、
1,k1,d1,n2,k2,d2が、以下の関係式を満足する反射防止膜を用いることを特徴とする露光方法。
{(n1−n10)/(n1m−n10)}2+{(k1−k10)/(k1m−k10)}2+{(d1−d10)/(d1m−d10)}2+{(n2−n20)/(n2m−n20)}2+{(k2−k20)/(k2m−k20)}2+{(d2−d20)/(d2m−d20)}2≦1
但し、n1とn10の大小関係に基づき当該ケースにおけるn1mの値を採用し、k1とk10の大小関係に基づき当該ケースにおけるk1mの値を採用し、d1とd10の大小関係に基づき当該ケースにおけるd1mの値を採用し、n2とn20の大小関係に基づき当該ケースにおけるn2mの値を採用し、k2とk20の大小関係に基づき当該ケースにおけるk2mの値を採用し、d2とd20の大小関係に基づき当該ケースにおけるd2mの値を採用する。
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It is used in the manufacturing process of a semiconductor device, and is formed on the surface of a resist layer and a silicon semiconductor substrate in an exposure system having a wavelength of 190 nm to 195 nm and a numerical aperture NA of 1.0 <NA ≦ 1.1. An exposure method in which the resist layer is exposed in a state where an antireflection film having a two-layer structure is provided between a silicon nitride film having a film thickness T (unit: nm) having the following value:
The upper-layer complex refractive index N 1 and the lower-layer complex refractive index N 2 constituting the antireflection film are respectively expressed as follows:
N 1 = n 1 −k 1 i
N 2 = n 2 −k 2 i
The upper layer thickness is d 1 (unit: nm), the lower layer thickness is d 2 (unit: nm),
When one of the following is selected as a combination of values of [n 10 , k 10 , d 10 , n 20 , k 20 , d 20 ] depending on the film thickness T of the silicon nitride film,
An exposure method wherein an antireflection film in which n 1 , k 1 , d 1 , n 2 , k 2 , and d 2 satisfy the following relational expressions is used.
{(N 1 −n 10 ) / (n 1m −n 10 )} 2 + {(k 1 −k 10 ) / (k 1m −k 10 )} 2 + {(d 1 −d 10 ) / (d 1m −d 10 )} 2 + {(n 2 −n 20 ) / (n 2m −n 20 )} 2 + {(k 2 −k 20 ) / (k 2m −k 20 )} 2 + {(d 2 − d 20 ) / (d 2m −d 20 )} 2 ≦ 1
However, the value of n 1m in the case is adopted based on the magnitude relationship between n 1 and n 10 , the value of k 1m in the case is adopted based on the magnitude relationship between k 1 and k 10 , and d 1 and d 10 The value of d 1m in the case is adopted based on the magnitude relationship, the value of n 2m in the case is adopted based on the magnitude relationship between n 2 and n 20 , and the value of k in the case based on the magnitude relationship between k 2 and k 20 is adopted. adopts a value of 2m, adopts the value of d 2m in the case based on the magnitude relation between d 2 and d 20.
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1≦250を満足し、且つ、d2≦250を満足することを特徴とする請求項4に記載の露光方法。 The exposure method according to claim 4, wherein d 1 ≦ 250 is satisfied and d 2 ≦ 250 is satisfied. レジスト層の屈折率は、1.60乃至1.80であることを特徴とする請求項4に記載の露光方法。   The exposure method according to claim 4, wherein the refractive index of the resist layer is 1.60 to 1.80. レジスト層の上にトップコート層が形成されていることを特徴とする請求項4に記載の露光方法。   The exposure method according to claim 4, wherein a topcoat layer is formed on the resist layer. 屈折率が1.44±0.02の媒体でレジスト層と露光系との間が満たされていることを特徴とする請求項4に記載の露光方法。   5. The exposure method according to claim 4, wherein a space between the resist layer and the exposure system is filled with a medium having a refractive index of 1.44 ± 0.02. 媒体は水であることを特徴とする請求項8に記載の露光方法。
The exposure method according to claim 8, wherein the medium is water.
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Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000195791A (en) * 1998-12-28 2000-07-14 Infineon Technol North America Corp Method of reducing resist reflectance in lithography
JP2002124518A (en) * 1997-07-02 2002-04-26 Yamaha Corp Wiring forming method
JP2002214793A (en) * 2001-01-22 2002-07-31 Mitsubishi Electric Corp Antireflection film and method for producing semiconductor device
JP2004031892A (en) * 2002-12-27 2004-01-29 Fujitsu Ltd Method for manufacturing semiconductor device using amorphous carbon
JP2005136244A (en) * 2003-10-31 2005-05-26 Semiconductor Leading Edge Technologies Inc Exposure method
JP2005142339A (en) * 2003-11-06 2005-06-02 Semiconductor Leading Edge Technologies Inc Pattern formation method

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002124518A (en) * 1997-07-02 2002-04-26 Yamaha Corp Wiring forming method
JP2000195791A (en) * 1998-12-28 2000-07-14 Infineon Technol North America Corp Method of reducing resist reflectance in lithography
JP2002214793A (en) * 2001-01-22 2002-07-31 Mitsubishi Electric Corp Antireflection film and method for producing semiconductor device
JP2004031892A (en) * 2002-12-27 2004-01-29 Fujitsu Ltd Method for manufacturing semiconductor device using amorphous carbon
JP2005136244A (en) * 2003-10-31 2005-05-26 Semiconductor Leading Edge Technologies Inc Exposure method
JP2005142339A (en) * 2003-11-06 2005-06-02 Semiconductor Leading Edge Technologies Inc Pattern formation method

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