JP2007194556A - Method for manufacturing semiconductor wafer - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a semiconductor wafer for carrying out an alternative process for making it unnecessary to use lapping liquid instead of a lapping process using lapping liquid. <P>SOLUTION: A method for manufacturing a semiconductor wafer includes a step of carrying out a grinding process for grinding and flattening the both faces of the wafer instead of a process for flattening a beveled wafer, that is, a lapping process, and carrying out a dry etching process (for example, sandblast) for putting uniform scratches on the back face of the wafer after the grinding process. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a method of manufacturing a semiconductor wafer whose one side is mirror-finished, that is, a so-called single-side polished wafer, and in particular, surface grinding or mirror polishing is performed instead of conventional lapping, and then the backside of the wafer is processed. Is.

  Semiconductor wafers are classified into single side polished (SSP) wafers with one side mirror-polished and double side polished (DSP) wafers with both sides mirror polished. Currently, most of small-diameter (200 mm or less) wafers are SSPs, and many of large-diameter (about 300 mm) wafers are DSPs, but there are also small-diameter DSP wafers. In the following description, the SSP wafer will be described.

  FIG. 2 shows a conventional SSP wafer manufacturing process. As shown in FIG. 2, the conventional SSP wafer manufacturing process includes a slicing process for slicing an ingot to obtain a wafer (step S21), a chamfering process for cutting the edge of the wafer (step S22), and both surfaces of the wafer. It has a lapping process for lapping and flattening (step S23), an etching process for etching the wafer (step S24), and a polishing process for mirror polishing the surface of the wafer (step S25).

  In the lapping step shown in FIG. 2, a wafer is loaded into a hole provided in the carrier, and the carrier is sandwiched between upper and lower surface plates of the wrapping apparatus. When the wrapping apparatus is operated, the carrier rotates between the upper and lower surface plates, and both surfaces of the wafer are flattened. Along with the rotation of the carrier, a lapping solution containing abrasive grains is supplied to the front and back surfaces of the wafer. Oil is used for the lapping liquid in order to uniformly disperse abrasive grains (for example, alumina) in the liquid.

  Oil remains on the wafer after lapping. In order to remove oil from the wafer, alkali cleaning using an alkali solution is performed.

  Although both sides of the wafer are flattened by lapping, at the same time, nonuniform scratches are made in the surface. The wafer surface is subjected to finish polishing after etching. Then, the wafer surface becomes a mirror surface by removing in-plane uneven scratches. The back surface of the wafer is not particularly processed after etching. Then, the back side of the wafer becomes satin. The following advantages 1 to 3 are obtained when the back surface of the wafer is satin.

  Advantage 1) When forming a device on the front surface of a wafer, it is necessary to distinguish the front and back surfaces of the wafer. In order to distinguish the front and back surfaces of the wafer, the reflectance on the front and back surfaces of the wafer is measured, and the difference is judged. If the wafer surface is a mirror surface and the back surface is matte, the reflectances are different from each other, making it easy to distinguish the front and back surfaces of the wafer.

  Advantage 2) At the wafer manufacturing site, there is a case where the wafer is carried on a carrying belt. If the back surface of the wafer is satin, the coefficient of friction on the back surface of the wafer becomes large, and slipping of the wafer on the transport zone is prevented.

  Advantage 3) When the wafer is attracted to the sample stage, a voltage is applied between the sample stage and the wafer to form a dielectric layer, and the back surface of the wafer is attracted by the Coulomb force generated between the two. Chuck is done. When peeling the wafer from the sample stage, a reverse voltage is applied between the sample stage and the wafer. At this time, if the back surface of the wafer is a mirror surface, it is difficult to peel the wafer from the sample stage. On the other hand, if the back surface of the wafer is satin, it is easy to peel off the wafer from the sample stage.

In Patent Document 1, it is disclosed that large irregularities remain on the back surface of a wafer that has finished the polishing process as a specific problem when a mixed acid is used as an etchant in the etching process. In order to solve this problem It is disclosed that the back surface of the wafer after the polishing process is sandblasted to make the back surface of the wafer a satin finish.
Japanese Patent No. 2853506

  In the wafer manufacturing process, various impurities adhere to the wafer. Of the impurities, nickel and copper have a great influence on the electrical characteristics of the wafer, so it is desirable to eliminate them as much as possible. Nickel and copper have the property of diffusing inside the wafer at room temperature, and the property that diffusion is further promoted by an alkaline solution. Nevertheless, alkali cleaning is required after the lapping step as described above. During this alkali cleaning, contamination of the wafer may be promoted.

  In recent years, environmental pollution such as environmental hormones has become a hot topic, and the oil contained in the wrapping liquid is one of the factors that induce such environmental pollution.

  In the lapping process, many consumables such as upper and lower surface plates and lapping liquid are used, which increases the manufacturing cost of the wafer.

  As described above, various adverse effects are caused by performing the lapping process.

  The present invention has been made in view of such a situation, and an object of the present invention is to provide a semiconductor wafer manufacturing method that performs an alternative process that does not use a wrapping liquid instead of a wrapping process that uses a wrapping liquid. It is.

The first invention is
In the manufacturing method of a semiconductor wafer that performs the process of flattening both sides of the chamfered wafer,
In the above process, a grinding process for flattening both surfaces of the wafer by surface grinding is performed,
Further, the present invention is characterized in that after the grinding step, a satin finishing process is performed in which uneven scratches are made on the back surface of the wafer to make a satin finish.

The method for producing a semiconductor wafer according to the second invention comprises:
A slicing step of slicing the ingot to obtain a wafer;
Chamfering process to cut the edge of the sliced wafer;
A grinding process of flattening both surfaces of the chamfered wafer by surface grinding;
A satin finish processing process that puts non-uniform scratches on the backside of the surface ground wafer to make a satin finish;
Etching process to etch the satin processed wafer;
A polishing step of mirror polishing the surface of the etched wafer;
Have

The third invention is
In the manufacturing method of a semiconductor wafer that performs the process of flattening both sides of the chamfered wafer,
In the above process, a polishing process is performed in which both surfaces of the wafer are mirror-polished and flattened,
Further, after the polishing step, a satin finishing process is performed in which uneven scratches are made on the back surface of the wafer to make a satin finish.

The method for producing a semiconductor wafer according to the fourth aspect of the invention comprises:
A slicing step of slicing the ingot to obtain a wafer;
Chamfering process to cut the edge of the sliced wafer;
A polishing step of mirror polishing both surfaces of the chamfered wafer;
A satin finish processing step to make uneven finish on the backside of the mirror polished wafer,
Etching process that etches the back side while protecting the surface of the processed wafer,
Have

5th invention is 1st invention thru | or 4th invention,
In the matte processing step, sandblasting is performed by spraying an abrasive on the back surface of the wafer.

  The present invention provides a semiconductor wafer manufacturing method in which instead of a chamfered wafer flattening process, that is, a lapping process, a grinding process is performed by planarly grinding both surfaces of the wafer and planarizing the wafer after the grinding process. A satin finishing process is performed to make a satin finish with uneven scratches on the back surface (first invention).

  In the grinding process, the back surface of the wafer is flattened, but at the same time, tool marks are formed on the wafer. In the matte processing process, the tool mark on the back side of the wafer is removed, and uneven scratches occur in the surface. In this way, a wafer having a flat front and back surface and a satin surface on the back surface is produced.

  More specifically, the method for manufacturing a semiconductor wafer according to the present invention roughly includes slicing an ingot, chamfering the sliced wafer, surface grinding the both surfaces of the chamfered wafer, and unevenly scratching the back surface of the surface ground wafer. Are processed in order, such as etching the etched wafer and mirror polishing the surface of the etched wafer (second invention).

  Further, the present invention performs a polishing process for polishing and flattening both surfaces of a wafer instead of a process for flattening a chamfered wafer in a semiconductor wafer manufacturing method, that is, a lapping process, and further after this polishing process. A matte processing step is performed in which uneven scratches are made on the back surface of the wafer to make the matte (third invention).

  Further, the semiconductor wafer manufacturing method according to the present invention is roughly divided into an ingot, chamfered edges of the sliced wafer, mirror polishing of both surfaces of the chamfered wafer, and unevenness on the back surface of the mirror polished wafer. A process of sequentially etching the back surface while protecting the surface of the processed and satin-finished wafer (fourth invention).

  When the back surface of the wafer is satin-finished in the first to fourth inventions, sandblasting is performed by spraying a fine granular abrasive on the back surface of the wafer (fifth invention).

  According to the present invention, a grinding process or a polishing process is performed in place of the lapping process performed after the chamfering process, and then a matte processing process is performed. Thus, since the lapping process is not performed in the manufacturing process of the semiconductor wafer, it is not necessary to perform alkali cleaning for removing oil contained in the lapping solution. Therefore, promotion of wafer contamination due to alkali cleaning can be prevented. Moreover, environmental pollution due to oil disposal can be prevented. In addition, since no wrapping device is used, the number of consumable parts is reduced, and the manufacturing cost of the semiconductor wafer is reduced.

Hereinafter, embodiments of the present invention will be described with reference to the drawings.
FIG. 1 shows a manufacturing process of an SSP wafer according to the present invention. As shown in FIG. 1, the SSP wafer manufacturing process according to the present invention includes a slicing process for slicing an ingot to obtain a wafer (step S11), a chamfering process for cutting the edge of the wafer (step S12), A grinding process for flattening both surfaces by flat grinding (Step S13), a matte finishing process for finishing the back surface of the wafer (Step S14), an etching process for etching the wafer (Step S15), and a surface of the wafer as a mirror surface A polishing step of polishing (step S16).

  The difference between the manufacturing process of the SSP wafer according to the present invention shown in FIG. 1 and the manufacturing process of the conventional SSP wafer shown in FIG. 2 is that the chamfering process (step S22) and etching are performed in the manufacturing process of the conventional SSP wafer. While the lapping process (step S23) is performed between the processes (step S24), in the SSP wafer manufacturing process according to the present invention, the chamfering process (step S12) and the etching process (step S15) are performed. The grinding process (step S13) and the satin finishing process (step S14) are performed.

  The grinding process is a process of flattening both surfaces of the wafer by surface grinding with a grindstone. At this time, both surfaces of the wafer may be surface ground simultaneously, or the front surface and the back surface of the wafer may be separately surface ground.

  Regarding the planarization of the wafer, the results of the lapping process and the grinding process may be considered equivalent. However, when surface grinding is performed using a grindstone, grinding marks called tool marks remain on the front and back surfaces of the wafer. In the case of a conventional semiconductor wafer manufacturing method, the wafer surface is etched and mirror-polished after planarization, while the wafer back surface is only etched after planarization. According to the inventors, it has been found that tool marks are removed by mirror polishing, but not by chemical polishing such as etching. That is, simply replacing the conventional lapping process with a grinding process leaves a tool mark on the backside of the wafer.

  Although the tool mark is only a slight step, it ultimately causes a defective wafer. For this reason, it is necessary to remove the tool mark on the back surface of the wafer. If mechanical polishing is performed like the wafer surface, the tool mark is removed, but if you do so, the back side of the wafer will not be textured, and “Wafer front / back side discrimination”, “Wafer slipping on the transfer zone” Advantages such as “prevention” and “prevention of adsorption between wafer and sample stage” cannot be obtained. Therefore, the present inventors decided to remove the tool mark by subjecting the back surface of the wafer to surface finishing after surface grinding.

  The satin processing step is a step in which fine and non-uniform scratches are made on the back surface of the wafer to make it satin. Any method may be applied as long as the back surface of the wafer is textured. In the present embodiment, sandblasting is performed as satin processing.

  In sand blasting, fine granular abrasives are sprayed on the wafer back surface using air compressed by a compressor or using centrifugal force. It is desirable to use silica powder (SiO2), which is the same material as the silicon wafer, as the abrasive. By spraying the abrasive, the back surface of the wafer is unevenly scratched, and the tool mark is removed.

  After sandblasting, acid cleaning is performed to remove silica powder remaining on the back surface of the wafer. Even if nickel or copper adheres to the wafer, acid cleaning is safe cleaning because it does not promote diffusion of nickel or copper unlike alkali cleaning.

  In the present embodiment, sand blasting is performed as the satin processing, but other blasting, for example, ice blasting or the like may be performed, or another matting process may be performed. In short, it is only necessary that the tool mark on the back surface of the wafer is removed and the surface becomes satin, and any processing may be performed as long as such a result is obtained.

  In the present invention, instead of the lapping process, a double-sided grinding process is performed, and a matte finishing process is performed. However, instead of the lapping process, a double-sided polishing process is performed, and a satin finishing process may be performed. Is possible. In this case, if mirror polishing is performed in the polishing process performed instead of the lapping process, and the wafer surface is protected with a resist during etching, the subsequent polishing process, that is, the polishing process shown in step S16 of FIG. 1 is omitted. Is also possible. It is also conceivable to omit the etching itself.

  According to the present invention, a grinding process or a polishing process is performed in place of the lapping process performed after the chamfering process, and then a matte processing process is performed. Thus, since the lapping process is not performed in the manufacturing process of the semiconductor wafer, it is not necessary to perform alkali cleaning for removing oil contained in the lapping solution. Therefore, promotion of wafer contamination due to alkali cleaning can be prevented. Moreover, environmental pollution due to oil disposal can be prevented. In addition, since no wrapping device is used, the number of consumable parts is reduced, and the manufacturing cost of the semiconductor wafer is reduced.

  Further, the scratches given to the wafer by grinding are smaller than the scratches given to the wafer by lapping. For this reason, in this invention, the allowance of an etching becomes small and the effect that an etching process is shortened is also acquired.

FIG. 1 is a diagram showing a manufacturing process of an SSP wafer according to the present invention. FIG. 1 is a diagram showing a conventional SSP wafer manufacturing process.

Claims (5)

In the manufacturing method of a semiconductor wafer that performs the process of flattening both sides of the chamfered wafer,
In the above process, a grinding process for flattening both surfaces of the wafer by surface grinding is performed,
Furthermore, after the said grinding process, the finishing process process which puts a non-uniform damage | wound on the back surface of a wafer and makes it a satin finish is performed, The manufacturing method of the semiconductor wafer characterized by the above-mentioned. A slicing step of slicing the ingot to obtain a wafer;
Chamfering process to cut the edge of the sliced wafer;
A grinding process of flattening both surfaces of the chamfered wafer by surface grinding;
A satin finish processing process that puts non-uniform scratches on the backside of the surface ground wafer to make a satin finish;
Etching process to etch the satin processed wafer;
A polishing step of mirror polishing the surface of the etched wafer;
The manufacturing method of the semiconductor wafer which has this. In the manufacturing method of a semiconductor wafer that performs the process of flattening both sides of the chamfered wafer,
In the above process, a polishing process is performed in which both surfaces of the wafer are mirror-polished and flattened,
Furthermore, after the said grinding | polishing process, the finishing process process which puts a non-uniform damage | wound on the back surface of a wafer and makes it a satin finish is performed, The manufacturing method of the semiconductor wafer characterized by the above-mentioned. A slicing step of slicing the ingot to obtain a wafer;
Chamfering process to cut the edge of the sliced wafer;
A polishing step of mirror polishing both surfaces of the chamfered wafer;
A satin finish processing step to make uneven finish on the backside of the mirror polished wafer,
Etching process that etches the back side while protecting the surface of the processed wafer,
The manufacturing method of the semiconductor wafer which has this.   4. The method of manufacturing a semiconductor wafer according to claim 1, wherein in the matte processing step, sand blasting is performed by spraying an abrasive on the back surface of the wafer.

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