JP2007194372A - Semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a semiconductor integrated circuit wherein a fixed voltage to be supplied to a certain interconnection can be easily changed. <P>SOLUTION: A fixed voltage unit 10 includes an output interconnection 16 to which either a first fixed voltage Vdd or a second fixed voltage GND which is different from the first fixed voltage Vdd is selectively applied. The fixed voltage unit 10 supplies either the first fixed voltage Vdd or the second fixed voltage GND to a circuit block to be connected via the output interconnection 16. In the manufacturing process of the semiconductor device, a first connection element 14a for applying the first fixed voltage Vdd to the output interconnection 16 or a second connection element 14b for applying the second fixed voltage GND to the output interconnection 16 is selectively formed at a predetermined place in the device. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a semiconductor integrated circuit, and more particularly to fixing a potential of a wiring.

  Inside an electronic device, a semiconductor integrated circuit configured by forming circuit elements such as transistors, resistors, and capacitors on a semiconductor substrate such as silicon is widely used. Semiconductor integrated circuits have been miniaturized year by year, and along with this, element arrangement and wiring tend to be complicated.

  When designing such a semiconductor integrated circuit, a design method is often used in which cells for realizing predetermined functions are prepared in a library and the cells are arranged. For example, when a specific wiring in a certain circuit is electrically fixed to a high level (Vdd) or a low level (GND), two types of cells, a high level fixing cell and a low level fixing cell, are prepared. A necessary voltage is supplied by arranging a high-level fixing cell at a required location and arranging a low-level fixing cell at a location requiring a low level.

JP 2003-168734 A JP 2001-257314 A

  While semiconductor integrated circuits have the advantage that many circuit elements can be integrated in a small area compared to the case where the circuit is composed of discrete components, once the design is completed, the circuit elements are replaced and the constants are changed. It is difficult to change the design such as changing wiring connections. For example, once a specific wiring is fixed at a high level, and it is desired to fix it at a low level by a design change, it is necessary to replace the high-level fixing cell with a low-level fixing cell. May need to be changed, or the location of the cell itself may need to be changed.

  In recent semiconductor integrated circuits that have been miniaturized, signal processing timing and the like are affected by the resistance between wirings and the capacitance between wirings, so that there is a case where a large correction is required.

  The present invention has been made in view of these problems, and an object thereof is to provide a semiconductor device capable of easily changing a fixed voltage supplied to a certain wiring.

  A semiconductor device according to an aspect of the present invention includes a voltage fixing unit including an output wiring to which either the first fixed voltage or the second fixed voltage different from the first fixed voltage is selectively applied. This voltage fixing unit supplies either the first fixed voltage or the second fixed voltage to the circuit block to be connected via the output wiring. In the manufacturing process of the semiconductor device, either the first connection element that applies the first fixed voltage to the output wiring or the second connection element that applies the second fixed voltage to the output wiring is selectively selected at a predetermined location. By forming, either one of the first and second fixed voltages is supplied to the circuit block.

  According to this aspect, since the first connection element or the second connection element is selectively formed at a predetermined location, either the first fixed voltage or the second fixed voltage is output from the output wiring. Even if it exists, only arrangement | positioning of the circuit element which comprises a 1st connection element and a 2nd connection element should just be changed. As a result, it is possible to switch the voltage supplied to a certain circuit block while reducing the influence on other circuit arrangements.

The voltage fixing unit further includes a first resistor to which a first fixed voltage is applied at one end and a second resistor to which a second fixed voltage is applied at one end. The first connection element is formed between the other end of the first resistor and the output wiring, and the second connection element is formed between the other end of the second resistance and the output wiring.
In this case, the circuit operation can be stabilized by using the first resistor and the second resistor as pull-up or pull-down resistors.

  The output wiring may include an overlapping wiring laid so as to overlap a part of the first resistance and the second resistance. Each of the first and second connection elements may include first and second via holes that are selectively formed at an overlap portion between the first and second resistors and the overlap wiring. The overlap wiring may be connected to either the first resistor or the second resistor depending on the presence or absence of the first and second via holes.

The first resistor and the second resistor are arranged in a straight line on substantially the same plane, and the overlap wiring is projected on the substrate on a wiring layer different from the first and second resistors. You may lay so that it may be on the same straight line as resistance.
In this case, the projection of the first resistor, the second resistor, and the overlap wiring on the substrate is arranged on a straight line, and the wiring connected to each of the first resistance, the second resistance, and the overlap wiring can be arranged in parallel. It becomes easy.

  The voltage fixing unit may be a cell registered in advance in a library used when designing a semiconductor integrated circuit. By preparing the voltage fixing unit having the above configuration as a cell, the design of the semiconductor integrated circuit can be further simplified.

  The semiconductor device may include a plurality of voltage fixing units, and the plurality of voltage fixing units may be regularly arranged at predetermined positions of the semiconductor device. The semiconductor device may be virtually divided into a plurality of regions, and the voltage fixing unit may be provided for each region.

  The voltage fixing unit may function as a memory in which the first and second fixed voltages are associated with digital values of 1 or 0, respectively. In this case, the change of the digital values of 0 and 1 can be realized by selecting whether the first connection element or the second connection element is formed for each voltage fixing unit.

  It should be noted that any combination of the above-described constituent elements, or those obtained by replacing constituent elements and expressions of the present invention with each other among methods, apparatuses, systems, etc. are also effective as an aspect of the present invention.

  According to the semiconductor device of the present invention, the fixed voltage supplied to a certain wiring can be easily changed.

  FIG. 1 is an equivalent circuit diagram of a voltage fixing unit 10 used in a semiconductor device according to an embodiment of the present invention. The semiconductor device 100 includes at least one voltage fixing unit 10 shown in FIG. The voltage fixing unit 10 supplies either a first fixed voltage or a second fixed voltage different from the first fixed voltage to the circuit block to be connected via the output wiring 16. For example, in the present embodiment, the first fixed voltage is the power supply voltage Vdd corresponding to the high level, and the second fixed voltage is the ground voltage GND (0 V) corresponding to the low level. The semiconductor device may be any of a digital circuit, an analog circuit, and an analog / digital mixed circuit, and the manufacturing process thereof may be any of a complementary metal oxide semiconductor (CMOS), bipolar, or BiCMOS process.

  The voltage fixing unit 10 includes a first resistor R1, a second resistor R2, a first connection element 14a, a second connection element 14b, and an output wiring 16. A circuit block (not shown) to which a fixed voltage is to be supplied by the voltage fixing unit 10 is connected to the output terminal 12. One end of an output wiring 16 is connected to the output terminal 12. The output wiring 16 is not limited to the one formed in one wiring layer, and may be composed of a plurality of wirings laid in a plurality of wiring layers connected via via holes.

  A power supply voltage Vdd is applied to the power supply line 20 as the first fixed voltage. One end of the first resistor R1 is connected to the power line 20. The first connection element 14a is formed between the other end of the first resistor R1 and the output wiring 16, and is provided on a path from the power supply line 20 to the output wiring 16 via the first resistance R1.

  The ground line 22 is applied with the ground voltage GND as the second fixed voltage. One end of the second resistor R2 is connected to the ground line 22. The second connection element 14b is formed between the other end of the second resistor R2 and the output wiring 16, and is provided on a path from the ground line 22 to the output wiring 16 via the second resistance R2.

  Here, the first connection element 14a and the second connection element 14b are circuit elements that are selectively formed. For example, the first connection element 14a and the second connection element 14b are configured by wiring, via holes, resistors, or combinations of these elements. be able to. The first connection element 14 a and the second connection element 14 b are selectively formed at predetermined locations in the manufacturing process of the semiconductor device including the voltage fixing unit 10. This will be described later.

  For example, in FIG. 1, when the first connection element 14a is formed and the second connection element 14b is not formed, the output wiring 16 is pulled up to the power supply voltage Vdd via the first connection element 14a and the first resistor R1. Is done. As a result, the power supply voltage Vdd, that is, the first fixed voltage is output from the output terminal 12. On the other hand, when the second connection element 14b is formed and the first connection element 14a is not formed, the output wiring 16 is pulled down to the ground voltage GND through the second connection element 14b and the second resistor R2. As a result, the ground voltage GND, that is, the second fixed voltage is output from the output terminal 12.

  FIG. 2 is a plan view showing the configuration of the voltage fixing unit 10 of FIG. 3 is a cross-sectional view of the voltage fixing unit 10 of FIG. 2 taken along line 3-3. In FIG. 2 and FIG. 3, the size and interval of each circuit element are appropriately reduced for ease of viewing, and do not limit or suggest the actual circuit element size or the like.

  As shown in FIG. 3, the semiconductor device 100 in which the voltage fixing unit 10 is integrated has a multilayer wiring structure. In the present embodiment, three wiring layers (L1 to L3) are shown, but the present invention is not limited to this. In the semiconductor device 100 according to the present embodiment, the laying directions of the wirings formed on a certain wiring layer are the same, and the laying directions of the wiring layers adjacent to each other are orthogonal. That is, the laying direction of the first wiring layer L1 and the third wiring layer L3 is the same, and the laying direction of the second wiring layer is orthogonal thereto. Such wiring is often used in digital circuits.

  The semiconductor substrate 30 is a semiconductor substrate such as silicon, silicon germanium, or gallium arsenide. A first resistor R1 and a second resistor R2 are formed in the semiconductor substrate 30 by using a diffusion resistor in which impurities are diffused. One end of each of the first resistor R1 and the second resistor R2 is connected to the power supply line 20 and the ground line 22 formed in the first wiring layer L1 via via holes V1 and V2. However, the first resistor R1 and the second resistor R2 are not limited to diffused resistors, and may be configured by resistor elements having other structures such as polysilicon resistors.

  The output wiring 16 of FIG. 1 connects the overlapping wiring 16a of the second wiring layer L2, the wiring 16b of the third wiring layer L3, and the second wiring layer L2 and the third wiring layer L3 in FIGS. This is indicated by a via hole 16c. The wiring 16b is connected to a circuit block (not shown), and either the first fixed voltage or the second fixed voltage is supplied to the circuit block.

  The overlap wiring 16a of the output wiring 16 is laid so as to overlap a part of the first resistance R1 and the second resistance R2. Furthermore, the first connection element 14a and the second connection element 14b are respectively formed in the first via hole V4a, the first resistor R1, the second resistor R2, and the first via hole V4a selectively formed in the overlapping portion of the overlapping wiring 16a. 2 via holes V4b are included. The overlap wiring 16a is connected to either the first resistor R1 or the second resistor R2 depending on the presence or absence of the via hole. In the present embodiment, the via holes V3 and V4 and the contact metal MC1 function as a part of the first connection elements 14a and 14b.

  In the present embodiment, as shown in FIGS. 2 and 3, the first resistor R1 and the second resistor R2 are arranged on a straight line on substantially the same plane. Furthermore, the overlapping wiring 16a is projected on the wiring layer L2 different from the first resistance R1 and the second resistance R2 so that the projection onto the semiconductor substrate 30 is on the same straight line as the first resistance R1 and the second resistance R2. Laid. Thus, by arranging the first resistor R1, the second resistor R2 and the overlap wiring 16a on a straight line, the wiring 16c connected to the circuit block to be supplied with voltage can be connected to the power supply line 20 and the ground line 22. As a result, it is easy to install in parallel with the wiring layout, which contributes to the convenience of wiring layout.

  The other ends of the first resistor R1 and the second resistor R2 are connected to the overlap wiring 16a of the output wiring 16 through the first connection element 14a and the second connection element 14b that are selectively formed. 2 and 3 show a case where the first connection element 14a is formed and the second connection element 14b is not formed.

  The basic structure of the first connection element 14a and the second connection element 14b is the same, but as described above, since either one is selectively formed, the formed state (also referred to as a connected state). The structure is different in a state where it is not formed (also referred to as a non-connected state).

  The first connection element 14a shown in FIG. 3 corresponds to the connection state. The via hole V3a between the semiconductor substrate 30 and the first wiring layer L1, the contact metal MC1 formed in the first wiring layer L1, the contact metal MC1. And a first via hole V4a connecting the wiring 16a. The first connection element 14 a is formed so as to connect the first resistor R 1 and the output wiring 16.

  On the other hand, in the second connection element 14b corresponding to the non-connected state, the second via hole V4b corresponding to the first via hole V4a of the first connection element 14a is not formed. In this state, since the overlap wiring 16a and the second resistor R2 are not connected, a non-connected state is realized. Instead of the via hole V4, the non-connected state may be realized by not forming the contact metal MC1, the via hole V3, or a combination thereof. However, in order to reduce the influence of the peripheral circuit, it is desirable that the configuration of the connection element be as close as possible between the connected state and the non-connected state.

  When the voltage fixing unit 10 according to the present embodiment is used, which of the first fixed voltage and the second fixed voltage is supplied to a certain circuit block is determined by the first connecting element 14a and the second connecting element 14b. It can be changed depending on which one is formed. Since the first connection element 14a and the second connection element 14b are formed at predetermined locations, the circuit arrangement is substantially the same when formed and when not formed. In other words, the mask may be corrected with respect to the masks such as via holes and contact metal constituting the first connection element 14a and the second connection element 14b, and other wiring layers are used as they are regardless of whether or not they are changed. Has the advantage of being able to.

  In addition, the voltage can be changed with only a few mask modifications, and the main wiring does not change before and after the change, so there is no change in inter-wiring capacitance or wiring resistance, affecting the surrounding circuits. In addition, there is a high possibility that functions equivalent to those before the change can be realized without performing timing adjustment again. Further, since the number of mask correction points can be minimized, the labor for checking the mask can be reduced.

  The voltage fixing unit 10 is preferably designed as a cell registered in advance in a library used when designing a semiconductor integrated circuit. In this case, a first cell in which the first connection element 14a is formed and the second connection element 14b is not formed, and a second cell in which the second connection element 14b is formed and the first connection element 14a is not formed are formed. Two types are registered in the library as cells.

  In the case of designing as a cell, the first cell and the second cell may be interchanged according to the voltage required in a certain circuit block, so the designer can change the first connection element 14a, the second connection element 14b, etc. Circuit design can be performed without being aware of the details of the circuit. Further, by registering in the library, it is possible to cope with circuit design by manual layout, automatic layout tool, or automatic wiring tool, and the design of the semiconductor integrated circuit can be further simplified. When designing with an automatic layout tool, the voltage fixing unit 10 can be suitably arranged in an empty space, and space saving can also be realized.

  The semiconductor device 100 according to the present embodiment includes at least one voltage fixing unit 10 described with reference to FIGS. In an embodiment, the voltage fixing unit 10 is used as a memory.

  FIG. 4 is a plan view showing the configuration of the semiconductor device 100a. The semiconductor device 100a includes a plurality of voltage fixing units 10 that function as memories. Each voltage fixing unit 10 functions as a memory cell in which the first and second fixed voltages are associated with a digital value of 1 or 0, respectively. The semiconductor device 100a of FIG. 4 includes eight voltage fixing units 10 and functions as a 3-bit ROM (Road Only Memory). The plurality of voltage fixing units 10 are connected to the interface circuit 40.

  In the semiconductor device 100a of FIG. 4, the digital value stored in the memory is changed depending on which of the first connection element 14a and the second connection element 14b is formed in the manufacturing process of the semiconductor integrated circuit as described above. be able to. When the digital value is changed, only the mask including the layers constituting the first connection element 14a and the second connection element 14b needs to be corrected, so that the design period can be shortened. When registering as a cell, the first cell and the second cell may be switched.

  FIG. 5 is a plan view showing another configuration example of the semiconductor integrated circuit. The semiconductor device 100b of FIG. 5 includes a plurality of voltage fixing units 10 functioning as a ROM, a decoder circuit 42, and a controlled circuit 44. The voltage fixing unit 10 holds a digital value of 1 or 0. The decoder circuit 42 can read digital values held in the plurality of voltage fixing units 10 and cause the controlled circuit 44 to execute predetermined processing according to the digital values.

  According to the semiconductor device 100b of FIG. 5, in the plurality of voltage fixing units 10, the process to be executed by the controlled circuit 44 can be switched by switching the first fixed voltage and the second fixed voltage.

  6A and 6B are layout diagrams of the semiconductor device 100 according to the embodiment. Signal input / output pads (not shown) are arranged on the outer periphery of the semiconductor substrate, and I / O cells such as an input buffer, an output buffer, and a protection circuit are arranged around each pad. A functional circuit block is disposed inside the semiconductor substrate. In FIG. 6A, the plurality of voltage fixing units 10 are irregularly arranged. When the voltage fixing unit 10 is arranged in a space remaining as a result of the layout of each circuit element, or when the voltage fixing unit 10 is arranged for each necessary circuit block, such an irregular arrangement is obtained.

  In FIG. 6B, the plurality of voltage fixing units 10 are collected and arranged at predetermined positions on the semiconductor substrate. As shown in FIG. 4 or FIG. 5, when the voltage fixing unit 10 is used as a memory, it may be regularly arranged as shown in FIG. 6 (b). In the semiconductor device 100 according to the present embodiment, the plurality of voltage fixing units 10 may be arranged as shown in FIGS. 6 (a) and 6 (b).

  The embodiments are exemplifications, and it will be understood by those skilled in the art that various modifications can be made to combinations of the respective constituent elements and processing processes, and such modifications are within the scope of the present invention. .

  In the embodiment, the first fixed voltage and the second fixed voltage are applied to the output wiring 16 via the first resistor R1 and the second resistor R2, but the present invention is not limited to this. Without being limited, the first resistor R1 and the second resistor R2 are not necessarily provided. In this case, the power supply line 20 and the ground line 22 may be connected to the first connection element 14a and the second connection element 14b through wiring or via holes.

  The configuration of the voltage fixing unit 10 shown in FIGS. 2 and 3 is an example, and can be changed without departing from the gist of the present invention.

It is an equivalent circuit diagram of a voltage fixing unit used in the semiconductor integrated circuit according to the embodiment. It is a top view which shows the structure of the voltage fixing unit of FIG. FIG. 3 is a cross-sectional view of the voltage fixing unit of FIG. 2 taken along line 3-3. 1 is a plan view showing a configuration of a semiconductor integrated circuit according to an embodiment. It is a top view which shows another structural example of a semiconductor integrated circuit. 6A and 6B are layout diagrams of the semiconductor device according to the embodiment.

Explanation of symbols

  R1 first resistor, R2 second resistor, 10 voltage fixing unit, 12 output terminal, 14a first connection element, 14b second connection element, 16 output wiring, 16a overlap wiring, 20 power supply line, 22 grounding line, 30 semiconductor Substrate, 100 semiconductor device.

Claims (7)

A voltage fixing unit including an output wiring to which either the first fixed voltage or the second fixed voltage different from the first fixed voltage is selectively applied is provided, and the voltage fixing unit is a circuit block to be connected. For supplying either the first fixed voltage or the second fixed voltage via the output wiring,
In the manufacturing process of the semiconductor device, either the first connection element that applies the first fixed voltage to the output wiring or the second connection element that applies the second fixed voltage to the output wiring By selectively forming the first and second fixed voltages, the semiconductor device is supplied to the circuit block. The voltage fixing unit is:
A first resistor to which the first fixed voltage is applied at one end;
A second resistor to which the second fixed voltage is applied at one end;
Further including
The first connection element is formed between the other end of the first resistor and the output wiring,
The semiconductor device according to claim 1, wherein the second connection element is formed between the other end of the second resistor and the output wiring. The output wiring includes an overlapping wiring laid so as to overlap a part of the first resistance and the second resistance,
Each of the first and second connection elements includes first and second via holes that are selectively formed at an overlap portion between the first and second resistors and the overlap wiring,
3. The semiconductor device according to claim 2, wherein the overlap wiring is connected to either the first resistor or the second resistor depending on the presence or absence of the first and second via holes. The first resistor and the second resistor are arranged on a straight line substantially on the same plane,
The overlap wiring is laid on a wiring layer different from the first and second resistors so that the projection onto the substrate is on the same straight line as the first and second resistors. 3. The semiconductor device according to 3.   4. The semiconductor device according to claim 1, wherein the voltage fixing unit is a cell registered in advance in a library used when designing a semiconductor integrated circuit.   4. The semiconductor device according to claim 1, further comprising a plurality of voltage fixing units, wherein the plurality of voltage fixing units are regularly arranged at predetermined positions of the semiconductor device. Semiconductor device.   4. The semiconductor device according to claim 1, wherein the voltage fixing unit functions as a memory in which the first and second fixed voltages are respectively associated with digital values of 1 or 0. 5.

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