JP2007189879A - Control method of power supply and apparatus employing that power supply - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To ensure safety by driving a fan forcibly upon a failure of an intermittent oscillation circuit thereby suppressing a temperature rise of a power supply, and to ensure safety for temperature rise due to a failure of an intermittent oscillation circuit by performing signal detection including failure a detection of the intermittent oscillation circuit without increasing the signal pins of a control chip (CPU). <P>SOLUTION: An apparatus includes a power supply for supplying normal power to a load under a steady state and supplying power of a predetermined frequency obtained through an intermittent operation with a predetermined duty to the load during standby, a fan for cooling the power supply, and a section for controlling an intermittent operation of the power supply and rotation of the fan wherein the fan is stopped by designating the intermittent operation of the power supply during standby but the fan is rotated forcibly when the intermittent operation of the power supply is not detected. A decision is made that an intermittent operation circuit for letting the power supply to carry out the intermittent operation has failed if rotation of the fan is detected when intermittent operation is designated and the operator is informed of failure. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a power supply control method and a device using the power supply. In particular, in a low-voltage power supply apparatus that performs an energy saving operation by performing intermittent oscillation during standby, a power supply control method that ensures safety when an intermittent oscillation circuit breaks down and enables a user to respond to an abnormality, and the The present invention relates to a device using a power source.

  Since the conventional flyback power supply device is designed to have high efficiency with a steady load, the power supply efficiency is low when the power is low, such as during standby.

  Therefore, in the power supply device disclosed in Patent Document 1, the flyback power supply is intermittently oscillated at a set frequency and ON_Duty during standby (corresponding to, for example, power storage in Patent Document 1), and high even at low power. We are trying to maintain efficiency.

  FIG. 9 is a diagram for explaining a block diagram of a conventional power supply apparatus.

  Reference numeral 1 denotes a CPU that controls the power supply device 2 and the entire device driven by the power supply device 2. Reference numeral 2 denotes a power supply device. Reference numeral 3 denotes a FAN that cools the power supply device 2 and is turned ON / OFF by a FAN_ON / OFF signal 4 from the CPU 1. Reference numeral 5 denotes a lock signal which is information indicating whether or not FAN 3 is rotating. For example, CPU 1 detects a failure of FAN 3 by outputting “H” when FAN 3 is rotated (ON) and outputting “L” when it is stopped (OFF). belongs to. 6 is a load connected to the power supply device 2, and 7 is a load current flowing to the load 6. Reference numeral 8 denotes a standby pulse signal for intermittently transmitting the power supply device 2 when the load is small as in standby.

  FIG. 10 is a detailed circuit diagram for explaining the operation of the block diagram described in FIG. 9, and illustrates a partial resonance type flyback power source as an example.

  Reference numeral 10 denotes a commercial AC power source. Reference numeral 11 denotes a diode bridge that rectifies the voltage of the AC input power supply 10, and reference numeral 12 denotes a primary smoothing capacitor that smoothes the voltage rectified by the diode bridge 11. Reference numeral 13 denotes an FET for switching the primary winding 15 of the power transformer 14 for converting the primary voltage to the secondary voltage, and the switching ON / OFF timing is controlled by the power controller 16 for controlling the power. Here, the package in which the FET 13 and the power control unit 16 are combined is referred to as a power IC 17.

  The current flowing through the FET 13 passes from the primary winding 15 via the drain terminal 18 of the FET 13, via the GND / source terminal 19 of the power supply control unit 16, and via the current detection resistor 20 for preventing overcurrent. Flows to the negative terminal of the primary smoothing capacitor 12. The GND terminal / source terminal 19 of the power supply IC 17 is based on the GND reference of the power supply control unit 16, and each terminal of the power supply control unit 16 operates based on the GND terminal / source terminal 19 of the power supply IC 17. Subsequently, a voltage is generated at both ends of the current detection resistor 20 due to the current flowing through the current detection resistor 20, and this voltage passes through the noise removal resistor 22 and detects the overcurrent of the power supply control unit 16. / OCP terminal 21 is transmitted. Reference numeral 23 denotes a noise removing capacitor for constituting a noise removing resistor 22 and a primary low-pass filter. Note that the bottom detection / OCP terminal 21 is also used as a function of detecting the timing for obtaining the minimum voltage of the resonance voltage waveform generated between the drain and the source of the FET 13 when the FET 13 described later is turned off.

  The power supply control unit 16 is activated by the activation resistor 24 that supplies initial power to the power supply control unit 16 immediately after the power is turned on. When the FET 13 starts oscillating, a voltage is generated at the secondary output, and power is continuously supplied to the power supply control unit 16 by the auxiliary winding 26 that supplies power to the power supply terminal 25 of the power supply control unit 16. When the power is turned off, the charge of the primary smoothing capacitor 12 is discharged by the discharge resistor 60. The voltage output from the auxiliary winding 26 is reduced by a surge voltage reduction resistor 27 for reducing a surge voltage generated when the FET 13 is switched, rectified by a rectifier diode 28 that rectifies the DC voltage, and a smoothing capacitor 29. It is smoothed with.

  Next, the resonance operation of the power supply device and the turn-on operation of the FET 13 at the bottom point will be described. When the FET 13 is turned off, the drain-source voltage of the FET 13 resonates with the inductance of the primary winding 15 and the capacitance of the resonant capacitor 30. In order to shape only the positive voltage signal from the resonance waveform, the bottom detection signal rectifier diode 31 rectifies the waveform. Then, a bottom detection signal protection resistor 32 for reducing the voltage so that an excessive voltage is not applied to the power supply control unit 16 is provided, and the minimum value of the resonance voltage waveform of the power supply control unit 16 is provided via the OCP signal protection diode 33. Is output to the bottom detection / OCP terminal 21.

  The power supply control unit 16 detects the timing when the positive voltage of the signal input to the bottom detection / OCP terminal 21 becomes 0 V, and turns on the FET 13 after a predetermined time has elapsed from the timing. Reference numeral 34 denotes a bottom point adjusting capacitor for setting a minute delay time of the resonance voltage waveform so that the FET 13 is turned on at the timing when the voltage generated between the drain and source of the FET 13 is minimized. To be adjusted. The secondary current output from the secondary winding 35 of the power transformer 14 is rectified by the secondary rectifier diode 36 for rectifying the secondary current and smoothed by the secondary smoothing capacitor 37.

  Next, the operation of the power control unit 16 will be described. Reference numeral 38 denotes a voltage control operational amplifier for negatively feeding back an error amount of the output voltage on the secondary side. The secondary side voltage is divided by the secondary side voltage dividing resistor 39 and compared with the voltage of the reference voltage Zener diode 40 that generates the reference voltage of the secondary side voltage. The reference voltage Zener diode 40 is supplied with a bias current from a bias resistor 41 and generates a constant voltage. Reference numerals 42 and 43 denote phase compensation resistors and capacitors, and reference numeral 44 denotes a gain adjustment resistor for adjusting the gain of the voltage control operational amplifier. 45 is a photocoupler for transmitting a voltage error amount on the secondary side to the primary side, and a current inversely proportional to the output voltage of the voltage control operational amplifier 38 flows to the light emitting diode of the photocoupler 45, and the light emitting diode Is received by the phototransistor and the error amount is transmitted to the primary side. The current output from the phototransistor passes through a photocoupler current limiting resistor 46 for limiting the current amount, and the error amount is transmitted to the FB terminal 47 of the power supply control unit 16. Reference numerals 48 and 49 denote primary side phase compensation resistors and capacitors.

  Next, the overload protection circuit will be described. When the secondary output terminal is short-circuited, a current proportional to the secondary current flows through the current detection resistor 20, and the FET 13 is forcibly turned off when a predetermined current is reached. When the flyback operation of the power transformer 14 is completed, the FET 13 is turned on again. The power supply control unit 13 recognizes an overload state when the forcible OFF operation of the FET 13 by the overcurrent detection is continuously performed, and the overload protection function operates. Specifically, when a current flows from the overload detection terminal 50 to the overload detection capacitor 51 and the voltage across the overload detection capacitor 51 reaches a predetermined voltage, the power control unit 16 The oscillation of the IC 17 is stopped.

  Next, the heat countermeasure circuit and the energy saving control circuit will be described. Reference numeral 3 denotes a FAN for cooling the power supply device 2, and the FAN is turned on / off by the FAN_ON / OFF signal 4. The driving current to the FAN 3 is supplied by FAN driving transistors 52 and 53. Reference numeral 54 denotes a base resistance of the FAN driving transistor 52, and reference numeral 55 denotes a base bias resistance of the FAN driving transistor 53. Reference numeral 56 denotes a regenerative diode for regenerating a counter electromotive voltage generated when the FAN 3 is turned off. When the FAN 3 detects that it is not rotating despite the ON state, it outputs an abnormal state to the CPU 1 by the lock signal 5. The FAN 3 is in an ON state in order to cool the power supply in a normal state, and is in an OFF state in order to save energy during standby.

  Further, the power supply device 2 has low standby efficiency in order to improve normal efficiency. Therefore, in general, the power source device 2 is intermittently oscillated in the standby state, the load is instantaneously set at the ON timing, and the FET oscillation is stopped at the OFF timing to improve efficiency. Yes. Specifically, the FET 13 is turned off by forcibly flowing the current of the photocoupler 45 intermittently by the standby pulse signal 8. The frequency and duty of the standby pulse signal 8 are values set in advance, and are values that allow the device driven by the power supply device 2 to operate. Reference numeral 57 denotes a photocoupler forcibly driving transistor for forcibly passing the current of the photocoupler 45, 58 denotes a base resistance of the photocoupler forcibly driving transistor 57, and 59 denotes a photocoupler forcibly driving transistor 57. This is a photocoupler forcible driving transistor current limiting resistor for limiting the current flowing through the transistor.

As described above, in the conventional power supply device, the FAN is rotated in order to cool the power supply device in the normal state, the FAN is turned off in order to save energy in the standby state, and the power supply device is intermittently operated. Control to oscillate.
JP2001-037219

  However, the conventional example has the following problems.

  In the standby state, the FAN for cooling the power supply device is turned off to save energy. However, when a circuit that performs intermittent oscillation of the power supply device fails, there is a problem that the temperature of the power supply device rises and the safety margin with respect to the element temperature decreases.

  In view of the above-described problems of the prior art, the present invention provides means for ensuring safety with a simple configuration even when the intermittently oscillating circuit fails, and notifying the user of the failure. The purpose of this is to forcibly drive the FAN when the intermittent oscillation circuit breaks down and to ensure safety by suppressing the temperature rise of the power supply device.

  The second object is to inform the user that the intermittent oscillation circuit has failed and promptly repair the failure.

  The third object is to continue the printing operation even if the failure of the intermittent oscillation circuit is detected, thereby reducing the troublesomeness for the user.

  The fourth object is to further expand the technical scope, apply the present invention, and perform detection signals including failure detection of the intermittent oscillation circuit without increasing the signal pins of the control chip (CPU). .

  In order to achieve the above object, a device of the present invention is a device that performs power saving at a low load by causing a power supply device to perform intermittent operation at a predetermined frequency, and intermittently operates at the predetermined frequency. Stop instruction means for instructing stop of the fan that cools the power supply device when the operation is instructed, and intermittent operation for determining whether the power supply device is intermittently operating at the predetermined frequency Even when the determination means and the stop instruction means instruct an intermittent operation at a predetermined frequency, the intermittent operation determination means determines that the intermittent operation at a predetermined frequency is not being performed. And forcibly rotating means for rotating the fan.

  Here, the intermittent operation determination means has a value corresponding to the integration of the conduction time of the transistor that repeats conduction when power supply is stopped and non-conduction when power is supplied in response to the intermittent operation instruction signal of the predetermined frequency. Based on this, it is determined whether or not an intermittent operation at the predetermined frequency is being performed. The forced rotation means includes a logic circuit that inverts a stop signal for instructing to stop the fan into a rotation signal for forcibly instructing rotation. Further, when there is a rotation detection means for detecting the rotation of the fan and a fan stop instruction from the stop instruction means, and the rotation detection means detects the rotation of the fan, the intermittent operation circuit is faulty. It further includes failure determination means for determining and notification means for notifying that the intermittent operation circuit is in failure. The failure determination means has a table for storing a determination result including a failure of the intermittent operation circuit in association with a combination of a fan rotation / stop instruction signal and a fan rotation / stop detection signal. In addition, the intermittent operation circuit is configured such that the failure does not affect the normal operation of the power supply device, and the device operates normally even if the intermittent operation circuit fails.

  Further, the device of the present invention is a component that performs a predetermined function, and has a component that receives an instruction signal instructing operation or stop and transmits a detection signal that detects the operation or stop. A logic element that inverts the instruction signal so as to instruct an operation by a predetermined signal when the instruction signal instructs to stop, and when the instruction signal instructs to stop, The information of the predetermined signal is acquired corresponding to whether the detection signal indicates an operation or a stop.

  Here, the component is a fan, and the predetermined signal is a signal representing operation / non-operation of a power saving circuit in a power supply device cooled by the fan. The device is an image forming apparatus, the component is a fan, and the predetermined signal is an output signal of a paper presence sensor. The power supply device is a low-voltage power supply device, and includes a diode bridge for rectifying an AC input voltage waveform, a primary smoothing capacitor for smoothing the voltage rectified by the diode bridge, a primary winding, and an auxiliary winding. A switching element that is connected between a transformer having a wire and a secondary winding, and a primary winding of the transformer and a DC power source smoothed by the smoothing capacitor, and switches the primary winding of the transformer; A rectifying / smoothing unit that smoothes the AC voltage generated from the secondary winding of the transformer, and a control that controls the switching element according to the DC voltage supplied from the auxiliary winding and output from the rectifying / smoothing unit , A starting resistor for supplying power at the start of driving from the primary smoothing capacitor to the control unit, and a current flowing through the primary winding An overcurrent protection circuit for turning off the switching element when a current exceeding a predetermined current flows, and when the overcurrent protection continues for a predetermined time, the switching element is shut off and the control circuit An overload protection circuit that stops the control circuit, and a latch circuit that holds the control circuit in a stopped state until the power supply voltage of the control circuit falls below a predetermined voltage when the overload protection circuit operates, and the latch When the AC power is turned off while the circuit is operating, the smoothing capacitor connected to the power supply of the control unit and the charge of the primary smoothing capacitor in the previous period to the negative terminal of the primary capacitor Driven by a low-voltage power supply having a discharge resistance for discharging to GND, FAN for cooling the low-voltage power supply, and power supplied from the low-voltage power supply A CPU for controlling the system that controls the FAN to be turned on when the system is in a steady state and the FAN to be turned off when the system is in a standby state; An intermittent operation circuit that performs a standby intermittent operation in which the switching element is intermittently operated with a set frequency and ON_Duty with a pulse that is output from time to time, and information on the presence or absence of rotation of FAN to FAN is transmitted to the CPU as a lock detection signal. A lock detection circuit, an intermittent operation detection circuit for detecting the presence or absence of a standby intermittent operation from the output of the intermittent operation circuit, and forcing the FAN when the intermittent operation detection circuit detects that no intermittent operation is being performed And a forced FAN drive circuit to be turned on.

  Further, the control method of the power supply device of the present invention provides a normal power to the load in a steady state, and a power source that provides the load with a power intermittently operated at a predetermined duty of a predetermined frequency at the time of standby, A method for controlling a power supply apparatus, comprising: a fan that rotates to cool the power supply; and a controller that controls the intermittent operation of the power supply and the rotation of the fan; A step of stopping the fan during an intermittent operation during standby, a step of detecting the intermittent operation of the power supply, and a step of forcibly rotating the fan when the intermittent operation of the power supply is not detected. To do. Here, when the rotation of the fan is detected when there is an instruction for the intermittent operation, a step of determining that the intermittent operation circuit that performs the intermittent operation is failed, and a step of notifying the determined failure of the intermittent operation circuit are provided. Also have.

  As described above, according to the present invention, when the intermittent oscillation circuit fails, it is possible to forcibly drive the FAN to suppress the temperature rise of the power supply device and to ensure safety.

  Further, it is possible to notify the user that the intermittent oscillation circuit has failed, and promptly repair the failure.

  Further, even if the failure of the intermittent oscillation circuit is detected, the printing operation can be continued and the trouble for the user can be reduced.

  Furthermore, if the present invention is applied with the technical scope expanded, detection signals including failure detection of the intermittent oscillation circuit can be performed without increasing the signal pins of the control chip (CPU).

  Embodiments of the present invention will be described below in detail with reference to the drawings.

<Configuration Example for Realizing the Power Supply Control Method of the Present Embodiment>
(Schematic block configuration example)
FIG. 1 is a diagram for explaining a block configuration example for realizing the power supply control method of the present embodiment. Since the basic connection is the same as the conventional example of FIG. 9, the contents changed and added in the present embodiment will be described.

  Reference numeral 70 denotes an intermittent oscillation detection signal for outputting the intermittent oscillation state of the power supply device 2, which outputs “L” when in the intermittent state and outputs “H” when not in the intermittent state. Subsequently, the intermittent oscillation detection signal 70 is input to an OR circuit 71, and when it is detected by the intermittent oscillation detection signal 70 that intermittent oscillation is not being performed, "H" regardless of the state of the FAN_ON / OFF signal 4. Is output, and FAN3 is forcibly turned ON.

(Detailed circuit example)
FIG. 2 is a diagram illustrating a detailed circuit example of the present embodiment.

  Since the basic configuration is the same as the conventional example of FIG. 10, the contents changed and added in this embodiment will be described.

  First, a circuit for generating the above-described intermittent oscillation detection signal 70 will be described. The photocoupler forced drive transistor 57 is in an OFF state when intermittent oscillation is not performed. Further, since the photodiode of the photocoupler 45 is in a controlled state, a bias current flows and is in an ON state. Therefore, the collector voltage of the photocoupler forced drive transistor 57 is a voltage obtained by subtracting the photodiode potential difference Vf from the secondary output voltage. On the other hand, when the intermittent operation is performed, the standby pulse signal 8 may be “H” or “L”. When it is “H”, the photocoupler forced drive transistor 57 is in an ON state, and the collector voltage of the photocoupler forced drive transistor 57 is 0 V as described above. When it is “L”, the photocoupler forced drive transistor 57 is in an OFF state, and the collector voltage of the photocoupler forced drive transistor 57 is a voltage obtained by subtracting Vf of the photodiode from the secondary output voltage. Become. Therefore, according to the standby pulse signal 8, the collector voltage of the photocoupler forced drive transistor 57 outputs a rectangular wave.

  By integrating the collector voltage of the photocoupler forced drive transistor 57 with a low-pass filter, a signal having a voltage difference with or without the intermittent oscillation is obtained. The resistors and capacitors of the low-pass filter are referred to as a low-pass filter resistor 72 and a low-pass filter capacitor 73. The output signal of the low-pass filter is input to the comparator 75 for comparison with the set threshold voltage 74. The threshold voltage is set to a value that can identify the voltage difference of the output voltage of the low-pass filter that is generated depending on the presence or absence of the standby pulse 8. Here, the output of the comparator is set to “H” when the standby pulse 8 is not output, and is set to “L” when it is output conversely.

  The output of the comparator 75 is input to the OR circuit 71. Since the OR circuit 71 is a logical sum, if any of the inputs is “H”, the output is “H” regardless of the state of the other inputs. In other words, when the standby pulse signal 8 is not output, the FAN driving transistor 52 is turned on regardless of the state of the FAN_ON / OFF signal 4. In the circuit configuration, the points different from the conventional example are as described above.

  Next, a mechanism for detecting an intermittent oscillation circuit failure will be described. In the intermittent oscillation, as described above, the standby pulse signal 8 passes through the base resistor 58 of the photocoupler forcibly driving transistor to turn on / off the photocoupler forcibly driving transistor 57, thereby causing the power supply device 2 to oscillate intermittently. In other words, the circuit components that perform intermittent oscillation are the photocoupler forced drive transistor 57 and the base resistor 58 of the photocoupler forced drive transistor. If the two circuit components fail for some reason or the substrate pattern around the two circuit components is cut, the intermittent oscillation cannot be performed. The purpose of performing the intermittent oscillation operation is to improve power supply efficiency when the secondary load is low, such as during standby, and further, control is performed to turn off the previous period FAN3 in order to reduce the secondary load. Since the FAN 3 is turned off during standby, if the circuit that performs the intermittent oscillation fails, the efficiency of the power supply 2 is not improved, and further, the temperature of the power supply rises because the FAN 3 is turned off. End up. However, as described with reference to the circuit diagram of FIG. 2, since the FAN 3 is forcibly turned on when no intermittent oscillation occurs, the temperature rise of the power supply device is suppressed, and the reliability of the power supply device 2 is improved.

<Configuration Example of Control Unit of Device Having Power Supply Control of Embodiment>
FIG. 3A is a block diagram illustrating a configuration example of an apparatus having power control according to the present embodiment. In FIG. 3A, although illustrated as a control unit of a device including the CPU 1 that performs the power control, the CPU 1 and the control unit of the device may be connected to perform distributed control. In the case of distributed control, a command or the like for instructing whether the power supply is normal control or standby control is sent from the control unit of the apparatus to the CPU 1, and a status such as a FAN lock signal is returned from the CPU 1 to the control unit of the apparatus. FIG. 3A shows only the components necessary for explaining the operation of the present embodiment.

  In FIG. 3A, reference numeral 200 denotes an arithmetic control CPU that controls the apparatus of this embodiment. The CPU 200 may be shared with the CPU 1 or provided separately. A ROM 201 stores process data 201a and a fixed program 201b. If the power supply control program of this embodiment is also fixed, it may be stored in the ROM 201. A RAM 203 is used by the CPU 200 for temporary storage of data and programs. The RAM 203 includes a data storage area and a program load area. The data storage area includes a flag 203a for storing the power ON / OFF state of the device and a flag 203b for storing whether the device is in a normal operation or a standby (power saving) operation. Note that there is one flag 203a, 203b if there is one power source, and a plurality if there are a plurality of power sources. Further, it has a flag 203c for storing ON / OFF of FAN1 to n (n is an integer) for cooling the device (particularly power supply), and a flag 203d for storing a lock state of whether FAN1 to n is rotating / stopping. Further, the status / error table 203e shown in FIG. 3B and FIG. 5 for determining an error from the status determined by the state of the flag 203c and the state of the flag 203d, the frequency for the signal for intermittently oscillating the power supply during standby, The area 203f stores the duty ratio, and further includes a paper presence / absence flag 203g used in an application example to an image forming apparatus described later.

  Reference numeral 204 denotes an external storage unit such as a disk, which includes a data storage area and a program storage area. The data storage area is a status / error table 204a shown in FIGS. 3B and 5 for determining an error from the status determined by the state of the flag 203c and the state of the flag 203d, and a signal for intermittently oscillating the power supply during standby. The area 204b for storing the frequency / duty ratio of the. The program storage area includes a device operation control program 204c indicating the operation control procedure of the device, a power control routine 204d indicating the power control procedure of the present embodiment, and an error detection routine 204e indicating the error detection procedure of the present embodiment. .

  Reference numeral 205 denotes an input interface for interfacing with an input signal from the outside. For example, an operation unit 205a including a power ON / OFF switch of the apparatus and various sensors 205b including a FAN lock sensor of this example are connected. On the other hand, reference numeral 206 denotes an output interface that interfaces output signals to the outside. For example, the display unit 206a that displays an error state of the device, various control signals including the FAN_ON / OFF signal and the standby pulse signal of this example. 206b is connected.

  FIG. 3B is a diagram illustrating logic for detecting a failure of the intermittent operation circuit in consideration of the above-described operation state, and corresponds to the status / error tables 203e and 204a of FIG. 3A.

  Status 1 is a state in which the FAN 3 is stopped and an intermittent oscillation operation is performed. The lock signal 5 is “L”, indicating that the FAN is stopped. This state is determined to be normal.

  Status 2 is a state in which the FAN is not rotating because the lock signal 5 is “L” even though the FAN 3 is being driven. This state is determined as a FAN failure.

  Since the status 3 indicates that the lock signal 5 is “H”, that is, the FAN is rotating, even though the FAN 3 is stopped, it is determined that the intermittent oscillation circuit has failed.

  Status 4 indicates that the FAN 3 is driven and the lock signal 5 is “H”, indicating that the FAN is operating normally, and that the operation is normal.

  When the status 3 is entered, the CPU 1 determines that the photocoupler forcible drive transistor 57, the base resistor 58 of the photocoupler forcible drive transistor have failed, and the peripheral pattern is disconnected. Then, the failure is displayed on the display unit 206a connected to the device driven by the power supply device, and the user is notified. By notifying the user, quick failure response in the market can be achieved and serviceability can be improved. Further, even if the intermittent oscillation circuit fails, the FAN 3 is forcibly driven, so that the safety of the power supply device 2 is not impaired. Therefore, even in the above state, there is no problem in operating the equipment connected to the power supply device 2 normally.

  In the description of FIG. 3B, the determination of the related part of determining the failure of the FAN and the failure of the intermittent oscillation circuit from the FAN_ON / OFF signal and the FAN lock signal has been described as an example. Other information can be transmitted by utilizing the technical idea that it is possible to transmit information on faults in intermittent oscillation circuits that are not directly related to the FAN lock signal and the combination of control signals and detection signals of certain functional components. It can be extended as a technology that makes it possible. The following other application examples are conceived from the extension of the technical idea.

<Example of Operation Procedure of Control Unit of Device Having Power Supply Control of Present Embodiment>
An example of the operation procedure of the control unit in the configuration example of FIG. 3A will be described below.

  FIG. 3C shows a flowchart of an operation procedure example of the control unit of the apparatus having the power control according to the present embodiment. Since this flowchart follows the configuration of the control unit of the apparatus, each control is performed serially, and the routine cannot be clearly separated as shown in FIG. 3A. On the other hand, when the device performs distributed control as described above, device control and power supply control operate in parallel while exchanging information with each other, and the routine is separated more clearly as shown in FIG. 3A. it can.

  First, in step S31, it is determined whether or not the power is turned on by the power ON / OFF switch. When the power is turned on, the process proceeds to step S32, and the FAN is rotated (ON) together with the power-on process.

  Next, in step S33, it is determined whether the device is to be operated normally / standby (power saving). If it is a normal operation, the process proceeds to step S34, and normal processing (details are not described) is performed. If the operation is a standby operation, the process proceeds to step S35, where a standby pulse signal for saving power by intermittently oscillating the power supply is output, and at least the power supply FAN is turned off. The determination of the normal operation / standby operation may be based on an operator's operation, or may be a case where the apparatus does not perform a normal operation for a predetermined time, and various determinations can be made by the apparatus. .

  Next, in step S36, it is determined whether or not the device has an error state. If there is an error state, that fact is displayed on the display unit 206a in step S37. One example of the determination of the error state has already been described with reference to FIG. 3B, but the determination of the error state in step S36 is not limited to the example of FIG. 3B.

  In step S38, it is determined whether or not the power is turned off by the power on / off switch. If the power is not OFF, the process returns to step S33 and the process is repeated. If the power is off, the process ends.

  In the present embodiment, the intermittent oscillation detection is performed from the collector voltage of the photocoupler forcibly driving transistor 57. However, the intermittent oscillation detection may be performed from a voltage at a location where another intermittent oscillation operation is performed.

<Configuration Example for Extending the Power Supply Control Method of the Present Embodiment>
This extended example relates to an example in which a plurality of power supply units are present and a cooling FAN is provided for each. Since the circuit configuration for one power supply device is the same as that of the above embodiment, the description thereof is omitted. This extended example will be described using an example in which there are three power supply units.

(Schematic block configuration example)
FIG. 4 is a block diagram illustrating a configuration example for extending the power supply control method of the present embodiment.

  Reference numeral 1 denotes a CPU that controls each power supply apparatus according to the present embodiment and the entire apparatus driven by the power supply apparatus. Reference numerals 2-1, 2-2, and 2-3 denote the power supply devices. Reference numerals 3-1, 3-2, and 3-3 are FANs for cooling the respective power supply devices, and are turned on / off by FAN_ON / OFF signals 4-1, 4-2, and 4-3 output from the CPU 1. To do. 5-1, 5-2, and 5-3 are lock signals that are information indicating whether or not each of the FANs 3-1, 3-2, and 3-3 has been rotated. To output “L”. 6-1, 6-2, 6-3 are loads connected to the power supply devices 2-1, 2-2, 2-3, respectively, 7-1, 7-2, 7-3 are Load currents flowing to the loads 6-1, 6-2, and 6-3, respectively. 8-1, 8-2, and 8-3 are standby pulse signals for intermittently transmitting the power supply devices 2-1, 2-2, and 2-3 when the load is small as in standby.

  The configuration of the CPU 1 is the same as that of FIG. 3A except that the number of power sources is the flag 203a for storing the power ON / OFF state and the flag 203b for storing whether the apparatus is in the normal operation or standby (power saving) operation.

  FIG. 5 is a diagram showing logic for detecting a failure of the intermittent operation circuit in consideration of the operation state, and corresponds to the status / error tables 203e and 204a of FIG. 3A as in FIG. 3B.

  Status 1 is a state in which the FAN 3-1 is stopped and an intermittent oscillation operation is performed. The lock signal 5-1 is “L”, indicating that the FAN is stopped. In this state, the power supply device 2-1 is determined to be normal.

  Status 2 is a state in which the FAN 3-1 is not rotating because the lock signal 5-1 is “L” even though the FAN 3-1 is being driven. In this state, it is determined that the FAN 3-1 is out of order.

  Since the status 3 indicates that the lock signal 5-1 is “H”, that is, the FAN 3-1 is rotating, although the FAN 3-1 is stopped, the power supply device 2- It is determined that one of the intermittent oscillation circuits has failed.

  Status 4 indicates that the FAN 3-1 is driven and the lock signal 5-1 is “H” and the FAN 3-1 is operating normally, and the power supply device 2-1 determines that it is operating normally. .

  Status 5 is a state in which the FAN 3-2 is stopped and an intermittent oscillation operation is performed. The lock signal 5-2 is “L”, indicating that the FAN is stopped. In this state, the power supply device 2-2 is determined to be normal.

  Status 6 is a state in which the FAN 3-2 is not rotating because the lock signal 5-2 is “L” even though the FAN 3-2 is driven. In this state, it is determined that the FAN 3-2 is out of order.

  Since the status 7 indicates that the lock signal 5-2 is “H”, that is, the FAN 3-2 is rotating even though the FAN 3-2 is stopped, the power supply device 2- 2 is determined to be faulty.

  Status 8 indicates that the FAN 3-2 is driven and the lock signal 5-2 is “H”, indicating that the FAN 3-2 is operating normally, and the power supply device 2-2 determines that it is operating normally. .

  Status 9 is a state in which the FAN3-3 is stopped and an intermittent oscillation operation is performed. The lock signal 5-3 is “L”, indicating that the FAN is stopped. In this state, it is determined that the power supply device 2-3 is normal.

  The status 10 is a state in which the FAN 3-3 is not rotating because the lock signal 5-3 is “L” even though the FAN 3-3 is driven. In this state, it is determined that the FAN3-3 is out of order.

  Since the status 11 indicates that the lock signal 5-3 is “H”, that is, the FAN 3-3 is rotating even though the FAN 3-3 is stopped, the power supply device 2- 3 is determined to be faulty.

  The status 12 indicates that the FAN 3-3 is driven and the lock signal 5-3 is “H”, indicating that the FAN 3-3 is operating normally, and the power supply device 2-3 determines that it is operating normally. .

  As described above, by confirming the FAN lock signal and the FAN ON / OFF signal, it is possible to identify the failure location of the intermittent oscillation circuit of each power supply device. Further, by forcibly driving the FAN of the failed power supply device, the temperature rise of the power supply device during standby can be suppressed, and safety is improved. In order to realize this extended example, it is desirable to provide a CPU dedicated to power supply control considering the load on the CPU 1.

<Another application example of the power supply control method of this embodiment>
In the above example, it has been described that a failure of the intermittent oscillation circuit of the power supply apparatus can be detected without increasing the number of CPU pins by combining the FAN ON / OFF signal and the lock signal. However, failure detection need not be limited to the intermittent oscillation circuit, and failure and abnormal states can be detected without increasing the number of CPU pins even in failure detection and state detection of other components. In this other application, as an example, the detection of the presence or absence of the sheet material in the cassette in which the sheet material is stacked in the image forming apparatus will be described as an example.

(Schematic block configuration example)
FIG. 6 is a diagram illustrating a block configuration example in this other application example. The basic configuration is the same as in the first and second embodiments. Differences will be described below.

  Reference numeral 90 denotes an ASIC that controls the image forming apparatus 80. A paper presence sensor 83 is input to the OR circuit 71. When the paper presence sensor 83 detects that the sheet material 81 is not stacked on the cassette 82, the FAN 3 is forcibly turned on. Here, the ASIC 90 corresponds to the CPU 1 in FIGS. 1 and 4. The configuration of the ASIC 90 is the same as that in FIG. 3A.

(Configuration example of image processing apparatus to which this example is applied)
FIG. 7 is a diagram illustrating a configuration example of an image forming apparatus to which this example is applied.

  Reference numeral 80 denotes an image forming apparatus. Reference numeral 81 denotes a sheet material for printing, and is loaded on the cassette 82. A paper presence sensor 83 detects whether the sheet material 81 is stacked in the cassette 82. When the print signal is received, the main motor 84 that feeds and conveys the image forming apparatus 80 is driven, and then the sheet material 81 is fed by the sheet feeding pad 85 and fed to the conveyance path 86 by the sheet feeding roller 87. It is conveyed by. The fed sheet material 81 is transported by a transport roller 88 to a TOP sensor 89 that detects the leading edge and the trailing edge of the sheet material 81. The output of the TOP sensor 89 is transmitted to the ASIC 90 that controls the image forming apparatus 80.

  When the TOP sensor 89 detects the leading edge of the sheet material 81, the ASIC 90 outputs an exposure start command to the laser scanner unit 91 for forming an electrostatic latent image, and the laser scanner unit 91 outputs the electrostatic latent image. A laser beam 93 is radiated to the photosensitive drum 92 for forming the image via the reflection mirror 94. The photosensitive drum 92 on which the electrostatic latent image is drawn develops the toner from the toner container 95, and the toner is transferred to the sheet material 81 by the transfer roller 96. 97 is a cleaner blade that removes toner remaining on the photosensitive drum after the transfer, and 98 is a static eliminator that erases the electrostatic latent image and resets the photosensitive drum.

  The sheet material 81 to which the toner has been transferred is fixed to the sheet material 81 by heat and pressure in the fixing unit 99, and then the leading end of the fixed sheet material is detected to detect the presence or absence of paper discharge. Is discharged to a paper discharge tray 102 by a paper discharge roller 101.

  A power source 2 supplies power to the image forming apparatus, and supplies power to the ASIC 90, the main motor 84, the FAN 3, and the like.

<Example of Operation Procedure of Control Unit of Device to which Power Supply Control of Present Embodiment is Applied>
FIG. 8 is a flowchart showing the control for performing paper absence and detection. In the detection in this embodiment, since the FAN lock signal is confirmed when the FAN is OFF, the flowchart is considered separately for the FAN OFF state and the ON state. In FIG. 8, the two cases will be described.

  When the image forming apparatus receives a print command in a state where the FAN 3 is OFF (S103), the lock signal 5 is confirmed (S104). When the FAN 3 is in the rotation (ON) state by the lock signal 5, it is determined that the sheet material 81 is stacked in the cassette 82, and printing is started (S106). On the other hand, when the FAN 3 is in the OFF state by the lock signal 5, it is determined that the sheet material 81 is not stacked in the cassette 82, and it is determined that there is no paper error (S105).

  On the other hand, when the sheet material 81 is fed from the state where the FAN 3 is ON, the sheet material 81 is not detected by the TOP sensor 89 despite the sheet feeding instruction during the continuous printing (S107) (S108). Either the sheet material 81 is not stacked in the cassette 82 or the sheet material 81 is stacked but not fed. In order to make the determination, the FAN 3 is subsequently turned off (S109), and the lock signal 5 is confirmed (S104). When the FAN 3 is in the rotation (ON) state by the lock signal 5, it is determined that the sheet material 81 is not stacked in the cassette 82, and it is determined that there is no paper error (S105). On the other hand, if the FAN 3 is stopped (OFF) by the lock signal 5, it is determined that the sheet material 81 is stacked in the cassette 82, and it is determined that a paper feed error has occurred (S110).

  In this application example, the FAN ON / OFF signal and the lock signal are positively used, and a signal necessary for controlling the other ASIC 90 (in this example, a signal from the paper presence sensor 83) is transmitted to It can be acquired from the stop.

  That is, when the present invention is understood as a broad technical idea, when a specific functional component (in this example, FAN) controls an operation / stop instruction signal and an operation / stop detection signal as a pair, A configuration is disclosed that makes it possible to know the state of the detection target without a new signal destination and input terminal by OR-connecting the detection target signal to the stop instruction signal.

  Therefore, in the present embodiment, the present invention has been described by paying attention to the FAN of the power supply, but the present invention can be applied to any functional component having the above conditions, and these are also included in the present invention.

  Note that the present invention may be applied to a system or an integrated apparatus constituted by a plurality of devices (for example, a host computer, an interface device, a printer, etc.) or an apparatus constituted by a single device.

  Another object of the present invention is to supply a storage medium (or recording medium) in which a program code of software for realizing the functions of the above-described embodiments is recorded to a system or apparatus, and to perform a computer (or CPU or CPU) of the system or apparatus. Needless to say, this can also be achieved by the MPU) reading and executing the program code stored in the storage medium. In this case, the program code itself read from the storage medium realizes the functions of the above-described embodiments, and the storage medium storing the program code constitutes the present invention. Further, by executing the program code read by the computer, not only the functions of the above-described embodiments are realized, but also an operating system (OS) running on the computer based on the instruction of the program code. It goes without saying that a case where the function of the above-described embodiment is realized by performing part or all of the actual processing and the processing is included.

  Furthermore, after the program code read from the storage medium is written into a memory provided in a function expansion card inserted into the computer or a function expansion unit connected to the computer, the function is determined based on the instruction of the program code. It goes without saying that the CPU or the like provided in the expansion card or the function expansion unit performs part or all of the actual processing and the functions of the above-described embodiments are realized by the processing.

  When the present invention is applied to the storage medium, the storage medium stores program codes corresponding to the flowcharts described above.

It is a block diagram which shows the structural example which implement | achieves the power supply control method of this embodiment. It is a figure explaining the detailed circuit example of the power supply device of this embodiment. It is a block diagram which shows the structural example of the control part of the apparatus which implement | achieves the power supply control method of this embodiment. It is the figure which showed the control logic state made into object by this embodiment. It is a flowchart which shows the example of an operation | movement procedure of the control part of the apparatus of this embodiment. It is a block diagram which shows the example of an extension which implement | achieves the power supply control method of this embodiment. It is the figure which showed the control logic state made into object by this embodiment. It is a block diagram which shows the other application example which implement | achieves the power supply control method of this embodiment. FIG. 2 is a cross-sectional view for explaining a configuration and an operation example of the image forming apparatus of the present embodiment. 6 is a flowchart illustrating an example of an operation procedure when the image forming apparatus according to the present exemplary embodiment determines whether or not paper exists. It is a block diagram which shows the structural example which implement | achieves the power supply control method in the past. It is a figure explaining the detailed circuit example of the conventional power supply device.

Explanation of symbols

1: CPU
2: Power supply 3: FAN
4: FAN ON / OFF signal 5: Lock signal 6: Load 7: Load current 8: Standby pulse signal 80: Image forming apparatus 81: Sheet material 82: Cassette 83: Paper presence sensor

Claims (12)

A device that allows the power supply device to perform intermittent operation at a predetermined frequency to save power at low load,
A stop instructing means for instructing to stop a fan for cooling the power supply device when instructing an intermittent operation of the predetermined frequency;
Intermittent operation determination means for determining whether or not the power supply device is intermittently operating at the predetermined frequency;
Even when the stop instructing means instructs an intermittent operation at a predetermined frequency, the fan is turned on when the intermittent operation determining means determines that an intermittent operation at a predetermined frequency is not being performed. Forcibly rotating means for rotating the device.   The intermittent operation determination means is based on a value corresponding to integration of the conduction time of a transistor that repeats conduction when power supply is stopped and non-conduction when power is supplied in response to the instruction signal for intermittent operation of the predetermined frequency, The device according to claim 1, wherein it is determined whether or not an intermittent operation at the predetermined frequency is being performed.   2. The apparatus according to claim 1, wherein the forced rotation means includes a logic circuit that inverts a stop signal that instructs to stop the fan into a rotation signal that forcibly instructs rotation. Rotation detection means for detecting rotation of the fan;
When there is a fan stop instruction from the stop instruction means, when the rotation detection means detects the rotation of the fan, a failure determination means that determines that the intermittent operation circuit is defective,
The apparatus according to claim 1, further comprising notification means for notifying that the intermittent operation circuit is faulty.   The said failure determination means has a table which memorize | stores the determination result including a failure of an intermittent operation circuit in association with the combination of a fan rotation / stop instruction signal and a fan rotation / stop detection signal. 4. The device according to 4.   5. The intermittent operation circuit is configured such that the failure does not affect a normal operation of the power supply device, and the device operates normally even if the intermittent operation circuit fails. The equipment described. In a device having a component that performs a predetermined function and that receives a command signal instructing operation or stop and transmits a detection signal that detects operation or stop,
A logic element that inverts the instruction signal so as to instruct an operation by a predetermined signal when the instruction signal instructs to stop;
An apparatus for acquiring information on the predetermined signal corresponding to whether the detection signal indicates an operation or a stop when the instruction signal indicates a stop.   8. The apparatus according to claim 7, wherein the component is a fan, and the predetermined signal is a signal representing operation / non-operation of a power saving circuit in a power supply device cooled by the fan.   The apparatus according to claim 7, wherein the apparatus is an image forming apparatus, the component is a fan, and the predetermined signal is an output signal of a paper presence sensor. The power supply device is a low voltage power supply device,
A diode bridge for rectifying an AC input voltage waveform; a primary smoothing capacitor for smoothing a voltage rectified by the diode bridge; a transformer having a primary winding, an auxiliary winding, and a secondary winding; A switching element that is connected between the primary winding of the transformer and a DC power source smoothed by the smoothing capacitor, and that switches the primary winding of the transformer, and an AC voltage generated from the secondary winding of the transformer. A rectifying / smoothing unit for smoothing; a control unit for controlling the switching element in accordance with a DC voltage supplied from the auxiliary winding and output from the rectifying / smoothing unit; and from the primary smoothing capacitor to the control unit. Before the start-up resistor that supplies power at the start of driving and the current that flows through the primary winding is detected and a current that exceeds a predetermined current flows An overcurrent protection circuit for turning off a switching element; an overload protection circuit for shutting off the switching element and stopping the control circuit when the overcurrent protection is continued for a predetermined time; and the overload protection. When the circuit operates, the AC power supply is turned off while the latch circuit is in operation and the latch circuit that holds the control circuit in a stopped state until the power supply voltage of the control circuit becomes equal to or lower than a predetermined voltage. A smoothing capacitor connected to the power supply of the control unit, and a low-voltage power supply having a discharge resistor for discharging the charge of the primary smoothing capacitor in the previous period to the primary side GND which is the negative terminal of the primary capacitor; A CPU for controlling a FAN that cools the low-voltage power supply and a system driven by the electric power supplied from the low-voltage power supply. The FAN is turned on when the system is in a steady state, and the FAN is turned off when the system is in a standby state. An intermittent operation circuit that performs a standby intermittent operation that performs an intermittent operation at a set frequency and ON_Duty, a lock detection circuit that transmits rotation presence / absence information of the FAN to the CPU as a lock detection signal, and an output of the intermittent operation circuit An intermittent operation detection circuit for detecting the presence or absence of a standby intermittent operation, and a forced FAN drive circuit for forcibly turning on the FAN when the intermittent operation detection circuit detects that the intermittent operation is not being performed. 9. A device according to claim 6 or 8, characterized in that A power supply that provides normal power to the load during steady state, and supplies power to the load that is intermittently operated at a predetermined duty of a predetermined frequency during standby; a fan that rotates to cool the power supply; A control method of a power supply device having a control unit for controlling intermittent operation of the power supply and rotation of the fan,
Instructing the power supply to operate intermittently during standby;
A step of stopping the fan during intermittent operation during standby;
Detecting the intermittent operation of the power source;
And a step of forcibly rotating the fan when an intermittent operation of the power source is not detected. When the rotation of the fan is detected when there is an instruction for the intermittent operation, a step of determining a failure of the intermittent operation circuit that performs the intermittent operation;
The method for controlling a power supply device according to claim 11, further comprising a step of notifying a failure of the determined intermittent operation circuit.

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