JP2007184854A - Active inductance circuit, filter circuit, and receiving circuit - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide an active inductance circuit which has improved distortion characteristics in a low power supply voltage state, then, can be stably operated, and can be designed with high degree of freedom. <P>SOLUTION: The active inductance circuit is constituted of: a differential 90-degree phase shifter 130 formed by adding a capacitor (capacitor 108) to a high impedance part of a high impedance circuit in which negative resistance is feedbacked to positive resistance; a first differential pair circuit 140 for converting an input signal into current to cause the current flow to the 90-degree phase shifter 130; and a second differential pair circuit 150 for converting an output voltage of the 90-degree phase shifter 130 into current to return the current to the input side of the phase shifter 130, wherein impedance viewing from the input side of the 90-degree phase shifter 130 is operated as inductance of a two-terminal. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to an active inductance circuit, a filter circuit, and a receiving circuit. For example, the active inductance circuit is suitable for use in a radio receiver, a television receiver, a satellite broadcast receiver, a video tape recorder (VTR), a mobile communication device, and the like. The present invention relates to an active inductance circuit, a filter circuit, and a receiving circuit suitable for use in a radio receiver, a television receiver, a satellite broadcast receiver, a video tape recorder (VTR), a mobile communication device, and the like.

  In devices such as a radio receiver, a television receiver, a satellite broadcast receiver, a video tape recorder (VTR), and a mobile communication device, a filter circuit is used as part of the circuit configuration. Therefore, when such a filter circuit is constructed in an integrated circuit (IC), for example, a resistor or a capacitor can be conventionally formed of a two-terminal element, but a so-called inductance component is included in the IC. It was not easy to form with two terminals.

  Therefore, conventionally, for example, a circuit configuration for forming an inductance component called a biquad circuit as shown in FIG. 22 has been used.

  In the circuit shown in FIG. 22, two operational amplifiers 91 and 92 are provided in cascade. The input signal Vin is supplied to the non-inverting input of the operational amplifier 91, the output of the operational amplifier 91 is supplied to the non-inverting input of the operational amplifier 92, and the output signal Vout of the operational amplifier 92 is taken out. Vout is fed back to the inverting inputs of the operational amplifiers 91 and 92. Accordingly, in this circuit, an inductance component is formed by a feedback circuit constituted by two sets of integrators of operational amplifiers 91 and 92.

  However, in this circuit, since voltage feedback is applied in terms of circuit, when a so-called high-Q filter circuit is formed, an offset voltage is generated between the input and output, which makes circuit design extremely difficult. In the case of this circuit, since the input / output of the integrator is single, the entire circuit also becomes a single input with a single input and lacks differential characteristics. This is a fatal defect particularly when the circuit is made into an IC.

  That is, in the above-described circuit, an inductance component cannot be formed in the IC circuit alone, and therefore, a distributed constant type filter such as a Chebyshev type exhibiting a particularly steep cutoff characteristic cannot be assembled.

  Therefore, the present applicant has previously proposed a configuration of an active inductance circuit as shown in Patent Document 1 in which an inductance component is formed as a single two-terminal element in an IC circuit. This active inductance circuit is shown in FIG.

  In the configuration shown in FIG. 23, the output voltage of the 90-degree phase shifter is converted into a current through a pair of differential pairs, and this current is returned to the input side of the 90-degree phase shifter. That is, one ends of the differential signal source voltage sources 1 and 2 (Vin, −Vin) are connected to each other, the connection midpoint is grounded, and the other end is connected to the bases of the transistors 3 and 4. Three, four collectors are connected to the power supply path 5 of the power supply Vcc. The emitters of these transistors 3 and 4 are connected to the collectors of transistors 8 and 9 constituting a differential pair through resistors 6 and 7 (R). Further, the emitters of the transistors 8 and 9 are grounded through the current sources 10 and 11 (I0), the resistor 12 (2R) is connected between the emitters, the capacitor 13 (C / 2) is connected between the collectors, and the collector. Are connected to the bases of the transistors 16,17. The emitters of the transistors 16 and 17 are grounded through the current sources 18 and 19 (I1), the resistor 20 (2Re) is connected between the emitters, and the collector is the connection between the signal source voltage sources 1 and 2 and the bases of the transistors 3 and 4. Connected to midpoint. Further, output terminals 14 and 15 for output signals Va and Vb are derived from the collectors of the transistors 8 and 9. According to the configuration shown in FIG. 23, at the time of single input, it can be operated as a complete 2-terminal inductance component as shown in FIG.

Japanese Patent Laid-Open No. 11-97981

  By the way, in the configuration shown in FIG. 23, the 90-degree phase shifter is composed of three transistors and resistors including the transistor constituting the current source, so that the maximum signal is required for operation without distortion. Assuming that the amplitude is Vmax, the base-emitter voltage of the transistor is Vbe, and the power supply voltage is Vcc, the following [Equation 1] is established.

  In general, Vbe is approximately 0.75 V to 0.8 V. For example, when the power supply voltage Vcc is 9 V, Vmax is 2.25 V to 2.2 V, which is large, but when the power supply voltage Vcc is 3 V, Vmax is 0.25 V to There is a limit to the circuit configuration in the low power supply voltage state at 0.2 V, and there has been a problem that it causes troubles for use in recent battery-powered mobile devices.

  The inductance value L includes the resistance value R of the resistors 6, 7, and 12 used in the 90-degree phase shifter, the capacitance value C of the capacitor 13, and the resistance value of the resistance 20 between the emitters of the differential pair of the transistors 16 and 17. The following [Equation 2] is determined by Re.

  In order to optimize the 90-degree phase shifter, it is necessary to increase the value of R. However, in order to reduce the desired inductance value L, it is necessary to decrease the value of R. Both conditions do not necessarily match. As a result, there is a problem that the degree of freedom of design becomes narrow.

  The present invention has been made in view of the above-described circumstances, and can improve the distortion specification in a low power supply voltage state such as a battery-powered mobile device and can stabilize the operation. It is an object of the present invention to provide an active inductance circuit, a filter circuit, and a receiving circuit that can improve the degree of freedom.

  In order to solve the above-described problem, an active inductance circuit according to the present invention is a differential type 90 formed by adding a capacitor to a high impedance portion of a high impedance circuit in which a negative resistance is fed back with respect to a positive resistance. A phase shifter, a first differential pair that converts an input signal into a current and flows the current into the 90-degree phase shifter, and an output voltage of the 90-degree phase shifter is converted into a current to the input side. The second differential pair to be returned is used, and the impedance viewed from the input side of the 90-degree phase shifter is made to act as an inductance of two terminals.

  Here, it is preferable to set the bias of the high impedance circuit using a resistor in the high impedance circuit itself independently of the input signal. Further, the inductance value can be varied by changing the conversion coefficient of the voltage-current conversion unit of the differential pair or by changing the capacitance value of the capacitor constituting the 90-degree phase shifter.

  Further, in order to solve the above-mentioned problem, the active inductance circuit according to the present invention is a differential type formed by adding a capacitor to a high impedance portion of a high impedance circuit in which a negative resistance is fed back with respect to a positive resistance. 90-degree phase shifter, first and second differential pairs that convert two sets of differential signals into current and flow currents in opposite polarities into the 90-degree phase shifter, and the 90-degree phase shift The third and fourth differential pairs that convert the output voltage of the converter into current and return the opposite polarities to the input side are configured to be mutually connected from the two sets of input sides of the 90-degree phase shifter. The observed impedance is caused to act as an inductance of four terminals.

  Moreover, the filter circuit according to the present invention is an LC ladder type filter circuit configured using an active inductance circuit in order to solve the above-described problems, and the active inductance circuit has a negative resistance with respect to a positive resistance. A differential 90 degree phase shifter formed by adding a capacitor to the high impedance part of the high impedance circuit that has fed back the current, and two sets of differential signals are converted into currents, and current is sent to the 90 degree phase shifter. And the third and fourth differential pairs that convert the output voltage of the 90-degree phase shifter into a current and return the opposite polarity to the input side. And the impedance viewed from the two input sides of the 90-degree phase shifter is made to act as an inductance of four terminals.

  In addition, in order to solve the above-described problem, the filter circuit according to the present invention is a positive circuit composed of two LC ladder filters using an active inductance circuit and a current adding circuit including three pairs of differential pairs. A complex filter having a frequency characteristic that allows only a frequency or a negative frequency to pass. The active inductance circuit includes a capacitor added to a high impedance portion of a high impedance circuit in which a negative resistance is fed back to a positive resistance. A differential 90 degree phase shifter formed, and first and second differential pairs that convert two sets of differential signals into currents and flow currents in opposite polarities to the 90 degree phase shifter; A third and a fourth differential pair for converting the output voltage of the 90-degree phase shifter into a current and returning them to opposite polarities on the input side, from the two sets of input sides of the 90-degree phase shifter; Saw each other And wherein the impedance is one that is configured to act as an inductance for the 4 terminals.

  Further, in order to solve the above-described problem, the receiving circuit according to the present invention includes two LC ladder type filters using an active inductance circuit and three pairs of filters as a filter for suppressing the image channel signal in the received signal. A reception circuit using a complex filter having a frequency characteristic that allows only a positive frequency or a negative frequency to pass, which is configured by a current adding circuit using a differential pair, wherein the active inductance circuit has a negative resistance to a positive resistance. A differential 90 degree phase shifter formed by adding a capacitor to the high impedance part of the high impedance circuit that has fed back the current, and two sets of differential signals are converted into currents, and current is sent to the 90 degree phase shifter. The first and second differential pairs that flow in opposite polarities to each other, and the output voltage of the 90-degree phase shifter is converted into current and returned to the opposite polarity on the input side. And a fourth differential pair, is characterized in that which is configured to act as an inductance of 4 terminal impedance viewed each other from two sets of input side of the 90 degree phase shifter.

  According to the present invention, the bias of the high-impedance circuit can be set by the high-impedance circuit itself independently of the input signal, and no current source is required to define the operating current of the high-impedance circuit. Can be configured in two stages, and operation with a low power supply voltage is possible. In addition, since the maximum signal amplitude range with respect to the power supply voltage can be expanded, distortion characteristics can be improved when the mobile device or the like is driven at a low power supply voltage.

  In addition, according to the present invention, a high-selectivity filter such as an LC ladder filter can be configured by causing the impedance viewed from the two sets of input sides of the 90-degree phase shifter to act as an inductance of four terminals. Also, by connecting an integrator using a high impedance circuit to the input end of the active inductance circuit, setting the input potential while maintaining a high impedance, the potential between the terminals when connected in cascade Can be set, and a complicated filter circuit can be configured. In addition, a filter can be configured without using an OPAMP (operational amplifier), frequency characteristics, distortion characteristics, and noise characteristics that are restricted by OPAMP can be avoided, and power consumption can be reduced and the circuit scale can be reduced. It becomes possible to do. Furthermore, by configuring the receiver using a complex filter, it is possible to suppress the interference caused by the image channel and improve the characteristics of the receiving circuit.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

[First Embodiment]
FIG. 1 is a circuit diagram showing a configuration example of an active impedance circuit according to the first embodiment of the present invention. The first embodiment of the present invention includes a differential 90-degree phase shifter formed by adding a capacitor to a high impedance portion of a high impedance circuit in which a negative resistance is fed back with respect to a positive resistance, A first differential pair that converts an input signal into current and flows the current into the 90-degree phase shifter, and a second differential that converts the output voltage of the 90-degree phase shifter into current and returns it to the input side In this configuration, the impedance viewed from the input side of the 90-degree phase shifter is made to act as an inductance of two terminals.

  In FIG. 1, signal source voltage sources 124 and 125 for forming differential input signals Vin and −Vin are provided, one ends of these voltage sources 124 and 125 are connected to each other, and a midpoint of connection is grounded. The other ends of the signal source voltage sources 124 and 125 are connected to the input terminals 101 and 102. Input terminals 101 and 102 are connected to the bases of transistors 114 and 115, respectively. The collectors of the transistors 114 and 115 are connected to both ends 126 and 127 of the capacitor 108 having a capacitance value C / 2. The emitters of the transistors 114 and 115 are grounded through resistors 117 and 118 having a resistance value R4, respectively, and are connected to each other by an inter-emitter resistance (resistor 116) having a resistance value 2 × R5. Configure.

  Both ends (output terminals 126 and 127) of the capacitor 108 are connected to the emitters of the transistors 103 and 104 through resistors 106 and 107 having a resistance value R1, and at the same time, the terminal 126 is connected to the base of the transistor 109, the collector of the transistor 110, and the transistor 119. The base 127 is connected to the base of the transistor 110, the collector of the transistor 109, and the base of the transistor 120. The collectors and bases of the transistors 103 and 104 are connected to the Vcc power source 105. The emitters of the transistors 109 and 110 are grounded through resistors 112 and 113 each having a resistance value R2, and are connected to each other by an inter-emitter resistance (resistor 111) having a resistance value 2 × R3.

  The emitters of the transistors 119 and 120 are grounded through resistors 122 and 123 having a resistance value R6, respectively, and are connected to each other by an inter-emitter resistance (resistor 121) having a resistance value 2 × R7. Configure. The collectors of the transistors 119 and 120 are connected to the input terminals 101 and 102.

  In the circuit of FIG. 1, a portion 130 surrounded by a broken line is a 90 degree phase shifter. The first differential pair circuit 140 including the transistors 114 and 115 converts the input signal into a current and flows the current into the 90-degree phase shifter 130, and the second differential pair circuit 150 including the transistors 119 and 120 includes The output voltage from the 90-degree phase shifter 130 is converted into a current and returned to the input side. Hereinafter, the emitter currents of the transistors 103 and 104 of the 90-degree phase shifter 130 are denoted by ia, the collector currents of the transistors 109 and 110 are denoted by ib, and the current ic flowing through the capacitor 108, and the transistors 114 and 115 of the first differential pair circuit 140 are denoted. The collector current of the second differential pair circuit 150 is assumed to be i1, and the collector current of the transistors 119 and 120 of the second differential pair circuit 150 is assumed to be i2.

  When the input signal voltage is Vin and the signal voltages of the output terminals 126 and 127 at both ends of the capacitor 108 are + Va and −Va, respectively, the signal currents i1, ia, ib, ic, and i2 are expressed by the following [Equation 3]. .

  The following [Equation 4] is established between the currents ia, ib, ic, and i1 in [Equation 3].

  In this [Equation 4], when the resistance value is selected so that the following equation [Equation 5] is satisfied, the following [Equation 6] is obtained.

  As is clear from this [Equation 6], the active inductance circuit having the configuration of FIG. 1 matches the form in which the inductance 128 is connected between the terminals 101 and 102 as shown in FIG.

  Here, the inductance value can be determined by C, Ra, and Rc irrespective of the resistance values R1, R2, and R3 constituting the 90-degree phase shifter 130, and in order to optimize the 90-degree phase shifter 130. It is necessary to increase the resistance values R1, R2, and R3. However, if it is desired to reduce the desired inductance value L, the resistance values Ra and Rc may be decreased. Design becomes possible.

  The direct current is determined by the resistance values R2, R4, and R6 of each resistor connected between the emitter of each transistor and GND (ground). When the following [Equation 7] is satisfied, the transistor The direct currents flowing through the transistors 114, 115, 109, and 110 coincide with each other, and the direct current flowing through the transistors 103 and 104 flows twice as much.

  As a result, the DC potential at both ends of the capacitor 108 becomes an intermediate voltage of the power supply voltage, that is, Vcc / 2, and the amplitude range can be taken from the center in the vertical direction, so that the maximum voltage width can be maximized. Note that the potential can be determined more strictly by setting the transistor sizes of the transistors 103 and 104 to be twice the emitter size of the transistors 114, 115, 109, and 110.

  Here, when the maximum signal amplitude is Vmax, the base-emitter voltage of the transistor is Vbe, and the power supply voltage is Vcc, the following relationship is established.

  Comparing [Equation 8] with [Equation 1] of the above-mentioned conventional example, it can be seen that Vmax is expanded and is advantageous for use in a recent battery-powered mobile device.

  In the preceding example shown in FIG. 23, since the bias of the high impedance circuit depends on the bias of the input signal, in order to define the operating current of the high impedance circuit, it is necessary to separately set a direct current by a current source. was there. For this reason, the transistor of the high impedance circuit has a three-stage configuration.

  In the circuit according to the embodiment of the present invention as shown in FIG. 1, the bias of the high impedance circuit can be set by the high impedance circuit itself independently of the input signal, and the current source is used to define the operating current of the high impedance circuit. The transistor of the high-impedance circuit can be configured in two stages and can be reduced by one stage compared to the previous example, so that operation with a lower power supply voltage is possible.

  Although the circuit of this embodiment is represented by a bipolar transistor used for conventional analog signal processing, the same configuration is applied to a CMOS transistor and a silicon germanium transistor that have recently been used. In particular, when applied to a silicon-germanium transistor having excellent high-frequency characteristics, a filter circuit in a frequency band higher than that achieved with the bipolar transistor can be realized.

  Here, the silicon-germanium transistor has a current technical limit. Only the NPN transistor has excellent frequency characteristics, and the PNP transistor has a frequency characteristic that is not superior to that of the conventional bipolar transistor. The conventional filter circuit is configured using OPAMP (operational amplifier). Since OPAMP generally requires both NPN type and PNP type transistors, the high frequency characteristics of silicon germanium transistors are utilized. Although there is a possibility that this circuit cannot be used, this circuit can be composed of only an NPN type transistor, so that the excellent high frequency characteristics of the silicon-germanium transistor can be utilized.

  According to the first embodiment of the present invention as described above, the inductance value can be determined regardless of the resistance value constituting the 90-degree phase shifter, so that the degree of freedom in design is improved. Further, the DC potential at the capacitor end of the 90-degree phase shifter can be set to an intermediate voltage of the power supply voltage, that is, Vcc / 2, and the amplitude range can be taken from the center in the vertical direction, so that the maximum voltage width can be maximized. Furthermore, since the maximum signal amplitude range with respect to the power supply voltage can be expanded, distortion characteristics can be improved when driving a low power supply voltage of a mobile device or the like.

[Second Embodiment]
Next, a configuration example of the second embodiment of the present invention will be described with reference to FIGS. This second embodiment is different from the first embodiment of FIG. 1 described above in that the resistance between the emitters (resistor 116) of the first differential pair circuit 140 and the emitter of the second differential pair circuit 150 are the same. The inductance value to be synthesized is varied by varying the inter-resistance (resistor 121).

  In the specific example shown in FIG. 3 of the second embodiment, the resistor 202 between the emitters of the first differential pair circuit 141 and the resistor 201 between the emitters of the second differential pair circuit 151 can be varied. An active inductance circuit is configured by using a large resistance. That is, in the active inductance circuit shown in FIG. 3, the resistor 116 between the emitters of the first differential pair circuit 140 is a variable resistor 202 with respect to the configuration of the first embodiment of FIG. The first differential pair circuit 141 is used, and the second differential pair circuit 151 in which the resistor 121 between the emitters of the second differential pair circuit 150 is the variable resistor 201 is used. The details of the operation are the same as those in the first embodiment described above, and a description thereof will be omitted. According to the active inductance circuit of the second embodiment, as a result, as shown in FIG. 4, a circuit equivalent to a circuit in which the variable inductance 203 is connected between the terminal 101 and the terminal 102 can be configured.

  As another specific example of varying the resistance value between the emitters in the second embodiment, FIG. 5 shows a method using a MOS transistor. In the specific example of FIG. 5, an NMOS transistor 205 is connected between the emitters of the first differential pair circuit 142, an NMOS transistor 204 is connected between the emitters of the second differential pair circuit 152, and the NMOS transistor 205 is connected. , 204 is supplied with a control voltage 206. Here, the operating condition of the NMOS transistor is desirably in the triode region, but is not limited thereto. In addition, although an NMOS transistor is illustrated as a MOS transistor, a PMOS transistor may be used, and the same operation can be realized by using both an NMOS transistor and a PMOS transistor.

  As still another specific example of varying the resistance value between the emitters in the second embodiment, FIG. 6 shows a method of switching a plurality of resistance values with a switch, that is, the total resistance by turning on / off the switch. Shows how to change the value. In the specific example shown in FIG. 6, a resistor 213 and a switch 214 are connected in series between the emitters of the first differential pair circuit 143, and a resistor 215 and a switch 216 are connected in series in parallel with this. In parallel with this, a resistor 217 and a switch 218 connected in series are connected. Similarly, a resistor 207 and a switch 208 connected in series between the emitters of the second differential pair circuit 153, a resistor 209 and a switch 210 connected in series in parallel therewith, and so on. In parallel with this, a resistor 211 and a switch 212 connected in series are connected. By turning these switches ON / OFF, the connection of resistors can be switched and the total resistance value can be varied. In the specific example of FIG. 6, a diagram in which resistors are connected in parallel is shown, but the same operation can be realized regardless of whether the resistors are connected in series or connected in parallel and in series.

  Here, in each specific example of the second embodiment described above, the resistance value is varied for both the first differential pair and the second differential pair. Can achieve the same effect.

  According to the second embodiment of the present invention described above, the inductance value can be determined regardless of the resistance value constituting the 90-degree phase shifter, so that the degree of freedom in design is improved. Further, the DC potential at the capacitor end of the 90-degree phase shifter can be set to an intermediate voltage of the power supply voltage, that is, Vcc / 2, and the amplitude range can be taken from the center in the vertical direction, so that the maximum voltage width can be maximized. In addition, since the maximum signal amplitude range with respect to the power supply voltage can be expanded, distortion characteristics can be improved when the mobile device or the like is driven at a low power supply voltage. Furthermore, since the inductance value can be varied by changing the resistance value, the frequency characteristics of the constituent filters can be controlled.

[Third Embodiment]
A third embodiment of the present invention will be described with reference to FIGS. In the third embodiment, the inductance value to be synthesized is varied by varying the capacitance value of the capacitor 108 constituting the 90-degree phase shifter 130 in the first embodiment of FIG. 1 described above. It is a configuration.

  In the specific example shown in FIG. 7 of the third embodiment, the capacitance value of the capacitor 901 constituting the 90-degree phase shifter 131 is a variable capacitor such as a varicap capacitor or the gate capacitance of a MOS transistor. Thus, an active inductance circuit is configured. That is, the active inductance circuit shown in FIG. 7 has a 90 ° shift in which the capacitor 108 constituting the 90 ° phase shifter 130 is replaced with a variable-capacitance capacitor 901 with respect to the configuration of the first embodiment shown in FIG. The phaser 131 is used, and the other configurations and details of the operation are the same as those in the first embodiment, and thus the description thereof is omitted. As a result, according to the third embodiment, an active inductance circuit equivalent to the one in which the variable inductance 203 is connected between the terminal 101 and the terminal 102 as shown in FIG. 4 can be configured.

  FIG. 8 shows a specific example of changing the total capacitance value by switching a plurality of capacitance values with a switch as another method for changing the capacitance value of the third embodiment. In the specific example of FIG. 8, a capacitor 902 and a switch 903 are connected in series to the capacitor connection end of the 90-degree phase shifter 132, a capacitor 904 and a switch 905 are connected in series in parallel thereto, In addition, a capacitor 906 and a switch 907 connected in series are connected in parallel with this. By turning these switches ON / OFF, the connection of capacitors can be switched and the total capacitance value can be varied. In the specific example of FIG. 8, an example in which capacitors are connected in parallel is shown. However, the same operation can be realized regardless of whether the capacitors are connected in series or connected in parallel and in series.

  In the third embodiment, only the capacitance value is varied. However, the inductance value can also be controlled in combination with the configuration in which the resistance value between the emitters in the second embodiment is varied. Is possible. The detailed configuration and operation are the same as those in the above-described embodiments, and thus the description thereof is omitted.

  According to the third embodiment of the present invention described above, since the inductance value can be determined regardless of the resistance value constituting the 90-degree phase shifter, the degree of freedom in design is improved. Further, the DC potential at the capacitor end of the 90-degree phase shifter can be set to an intermediate voltage of the power supply voltage, that is, Vcc / 2, and the amplitude range can be taken from the center in the vertical direction, so that the maximum voltage width can be maximized. In addition, since the maximum signal amplitude range with respect to the power supply voltage can be expanded, distortion characteristics can be improved when the mobile device or the like is driven at a low power supply voltage. Furthermore, since the inductance value can be varied by changing the capacitance value, the frequency characteristics of the constituent filters can be controlled.

[Fourth Embodiment]
FIG. 9 is a circuit diagram showing a configuration example of the fourth embodiment of the present invention. This fourth embodiment has a differential 90 degree phase shifter formed by adding a capacitor to the high impedance part of a high impedance circuit in which a negative resistance is fed back with respect to a positive resistance. First and second differential pairs that convert a pair of differential signals into current and flow currents in opposite polarities into the 90-degree phase shifter, and convert the output voltage of the 90-degree phase shifter into current This is composed of third and fourth differential pairs returning to opposite polarities on the input side, and the impedance viewed from the two input sides of the 90-degree phase shifter is made to act as an inductance of four terminals. is there.

  In FIG. 9, differential input terminals 301 and 302 whose input voltages are set to + V1 and −V1 are connected to the bases of transistors 316 and 317, respectively. The collectors of the transistors 316 and 317 are connected to both ends 336 and 337 of the capacitor 310 having the capacitance value C / 2. The emitters of the transistors 316 and 317 are grounded through resistors 319 and 320 having a resistance value R4, and are connected to each other by an inter-emitter resistance 318 having a resistance value 2 × R5, thereby forming a first differential pair circuit 161.

  On the other hand, differential input terminals 303 and 304 whose input voltages are set to + V2 and −V2 are connected to the bases of the transistors 326 and 327, respectively. The collectors of the transistors 326 and 327 are connected to both ends (output terminals 336 and 337) of the capacitor 310 having a capacitance value C / 2. The emitters of the transistors 326 and 327 are grounded through resistors 329 and 330 having a resistance value R 4, and are connected to each other by an inter-emitter resistor 328 having a resistance value 2 × R 5, thereby forming a second differential pair circuit 162.

  Both ends (output terminals 336 and 337) of the capacitor 310 are connected to the emitters of the transistors 306 and 307 through resistors 308 and 309 having a resistance value R1, and at the same time, the terminal 336 is connected to the base of the transistor 311, the collector of the transistor 312 and the transistor 321. The base is connected to the base of the transistor 331, and 337 is connected to the base of the transistor 312, the collector of the transistor 311, the base of the transistor 322, and the base of the transistor 332. The collectors and bases of the transistors 306 and 307 are connected to the Vcc power supply 305.

  The emitters of the transistors 311 and 312 are grounded through resistors 314 and 315 having a resistance value R2, and are connected to each other via an emitter resistance (resistor 313) having a resistance value 2 × R3.

  The emitters of the transistors 321 and 322 are grounded through resistors 324 and 325 having a resistance value R6, and are connected to each other by an inter-emitter resistance (resistor 323) having a resistance value 2 × R7. Constitute. The collectors of the transistors 321 and 322 are connected to the input terminals 301 and 302.

  The emitters of the transistors 331 and 332 are grounded through resistors 334 and 335 having a resistance value R6, respectively, and are connected to each other by an inter-emitter resistance (resistor 333) having a resistance value 2 × R7. Constitute. The collectors of the transistors 331 and 332 are connected to the input terminals 304 and 303.

  In the circuit shown in FIG. 9, a portion 338 surrounded by a broken line is a 90 degree phase shifter. The first and second differential pair circuits 161 and 162 convert two sets of differential signals into currents, and cause the currents to flow into the 90-degree phase shifter 338 in opposite polarities. The outputs of the 90-degree phase shifter 338 The voltages are converted into currents by the third and fourth differential pair circuits 163 and 164, respectively, and returned to opposite polarities on the input sides. Hereinafter, the emitter current of the transistors 306 and 307 is ia, the collector current of the transistors 311 and 312 is ib, the current ic flowing through the capacitor 310, the collector current of the transistors 316 and 317 is i1, the collector current of the transistors 326 and 327 is i2, and the transistor The collector current of 321 and 322 is defined as the collector current of the i3 transistors 331 and 332 as i4, and the details of the operation will be described.

  The signal currents i1, i2, ia, ib, ic, i3, and i4 are expressed as follows, assuming that the input signal voltage is V1 and V2, and the signal voltages at the output terminals 336 and 337 at both ends of the capacitor 310 are + Va and −Va. (Equation 9)

  Between the currents ia, ib, ic, i1, and i2 of [Equation 9], the following [Equation 10] is established.

  In this [Equation 10], when the resistance value is selected so that the following [Equation 11] holds, the following [Equation 12] is obtained.

  As is clear from [Equation 12], the active inductance circuit having the configuration of FIG. 9 is equivalent to the configuration of a floating type inductance having two sets of differential input terminals, as shown in FIG. This corresponds to a form in which an inductance 339 is connected between the differential input terminals 301 and 302 and the differential input terminals 303 and 304.

  Here, the inductance value of the active inductance circuit having the configuration of FIG. 9 according to the fourth embodiment of the present invention is independent of the resistance values R1, R2, and R3 constituting the 90-degree phase shifter 338. , Ra and Rc, and it is necessary to increase the resistance values R1, R2, and R3 in order to optimize the 90-degree phase shifter 338. However, if the desired inductance value L is desired to be reduced, the resistance value Ra and Rc may be reduced, and the design can be freely performed even under restraint conditions where the conditions of both do not necessarily match.

  The direct current is determined by R2, R4, and R6, which are resistance values of resistors connected between the emitter of each transistor and GND (ground). When the following [Equation 13] is satisfied, the transistor 316 317, 311, 312, 326, and 327 coincide with each other, and the direct current that flows through the transistors 306 and 307 has a current that is three times as large as that.

  As a result, the DC potential at both ends of the capacitor 310 becomes an intermediate voltage of the power supply voltage, that is, Vcc / 2, and the amplitude range can be taken from the center in the vertical direction, so that the maximum voltage width can be maximized. Note that when the transistor size of the transistors 306 and 307 is three times the emitter size of the transistors 316, 317, 311, 312, 326, and 327, the potential can be more strictly determined.

  Here, assuming that the maximum signal amplitude is Vmax, the base-emitter voltage of the transistor is Vbe, and the power supply voltage is Vcc, the relationship of the above [Equation 8] is established as in the first embodiment, and the above-described conventional technique. In contrast to the relationship of [Equation 1] in the example, Vmax is expanded, and it can be seen that it is superior for use in a battery-powered mobile device these days.

  According to the fourth embodiment of the present invention as described above, since the inductance value can be determined regardless of the resistance value constituting the 90-degree phase shifter, the degree of freedom in design is improved. Further, the DC potential at the capacitor end of the 90-degree phase shifter can be set to an intermediate voltage of the power supply voltage, that is, Vcc / 2, and the amplitude range can be taken from the center in the vertical direction, so that the maximum voltage width can be maximized. In addition, since the maximum signal amplitude range with respect to the power supply voltage can be expanded, distortion characteristics can be improved when the mobile device or the like is driven at a low power supply voltage. Furthermore, a filter with high selectivity, such as an LC ladder filter, can be configured by causing the impedance viewed from the two sets of input sides of the 90-degree phase shifter to act as an inductance of four terminals.

[Fifth Embodiment]
FIG. 11 is a circuit diagram showing a fifth embodiment of the present invention. In the fifth embodiment, an LC ladder filter circuit is configured by using the active inductance circuit of the fourth embodiment.

In FIG. 11, differential input terminals 401 and 402 whose input voltages are set to + Vin and −Vin are connected to both ends of a capacitor 414 having a capacitance value C1 / 2 through resistors 412 and 413 having a resistance value Ro. Are connected to one input terminals 403 and 404 of the active inductance circuit 410. Here, the active inductance circuit 410 uses the configuration of the fourth embodiment of the present invention described with reference to FIG.
The other input terminals 405 and 406 of the active inductance circuit 410 are connected to both ends of a capacitor 415 having a capacitance value C3 / 2 and a resistor 416 having a resistance value 2 × Ro, and further connected to output terminals 407 and 408.

  As shown in FIG. 10, the active inductance circuit 410 is equivalent to the construction of a floating type inductance having two sets of differential input terminals. Therefore, the configuration of FIG. 11 is as shown in FIG. LC ladder type filter circuit is formed. The transfer function of this filter is the following [Equation 14].

  In the specific example of FIG. 11, an LPF (low-pass filter) configuration is shown. However, for all filters that can be configured using inductance, the same operation can be realized using this circuit. It is not limited to.

  According to the fifth embodiment of the present invention as described above, since the inductance value can be determined regardless of the resistance value constituting the 90-degree phase shifter, the degree of design freedom is improved. Further, the DC potential at the capacitor end of the 90-degree phase shifter can be set to an intermediate voltage of the power supply voltage, that is, Vcc / 2, and the amplitude range can be taken from the center in the vertical direction, so that the maximum voltage width can be maximized. In addition, since the maximum signal amplitude range with respect to the power supply voltage can be expanded, distortion characteristics can be improved when the mobile device or the like is driven at a low power supply voltage. Furthermore, a filter with high selectivity, such as an LC ladder filter, can be configured by causing the impedance viewed from the two sets of input sides of the 90-degree phase shifter to act as an inductance of four terminals.

[Sixth Embodiment]
Next, a sixth embodiment of the present invention will be described. In the sixth embodiment, an integrator using a high-impedance circuit is connected to the input end of the active inductance circuit, and the input potential is set in a state where the impedance is maintained at a high impedance. The potential between the terminals can be set, and a configuration example is shown in FIG. As the active inductance circuit 505 of FIG. 13, the configuration of the fourth embodiment of the present invention described with reference to FIG. 9 may be used.

  In FIG. 13, input terminals 501 and 502 of an active inductance circuit 505 are connected to emitters of transistors 508 and 509 through resistors 510 and 511 having a resistance value R8. At the same time, a terminal 501 is connected to the base of the transistor 512 and the collector of the transistor 513. The terminal 502 is connected to the base of the transistor 513 and the collector of the transistor 512. The collectors and bases of the transistors 508 and 509 are connected to the Vcc power source 507. The emitters of the transistors 512 and 513 are grounded through resistors 515 and 516 having a resistance value R9, and are connected to each other by an emitter resistance (resistor 517) having a resistance value 2 × R10. The integrator 506 is configured as described above.

  Similarly, the other input terminals 503 and 504 of the active inductance circuit 505 are connected to the emitters of the transistors 519 and 520 through the resistors 521 and 522 having the resistance value R8. At the same time, the terminal 503 is connected to the base of the transistor 523 and the transistor 524. The terminal 504 is connected to the base of the transistor 524 and the collector of the transistor 523. The collectors and bases of the transistors 519 and 520 are connected to the Vcc power supply 518. The emitters of the transistors 523 and 524 are grounded through resistors 526 and 527 each having a resistance value R9, and are connected to each other by an inter-emitter resistance (resistor 525) having a resistance value 2 × R10. The integrator 517 is configured as described above.

  In the configuration of FIG. 13, the emitter currents of the transistors 508 and 509 are ia1, the collector currents of the transistors 512 and 513 are ib1, the emitter currents of the transistors 519 and 520 are ia3, the collector currents of the transistors 523 and 524 are ib3, and active The current flowing through the inductance circuit 505 is defined as i3, and the operation will be described.

  The signal currents ia1, ib1, ia2, ib2, and i3 are represented by the following [Equation 15], assuming that the terminal voltages are + V1, -V1, + V2, and -V2.

  This is because the following [Equation 16] holds for each current ia1, ib1, ia2, ib2, and i3 of [Equation 15].

  In this [Equation 16], when the resistance value is selected so that the following [Equation 17] is established, the following [Equation 18] is obtained.

  As apparent from [Equation 18], iL1 and iL2 in the configuration of FIG. 13 are determined regardless of the internal currents of the integrators 506 and 517, and as shown in FIG. This corresponds to a shape in which an inductance 505 is connected between the dynamic input ends 503 and 504.

  Here, the DC currents of the integrators 506 and 517 in the configuration of FIG. 13 are determined by the resistance values R6 and R9 of the resistors connected between the emitters of the transistors and GND (ground). When [Equation 19] is satisfied, the DC currents flowing through the transistors 512, 513, 321, 322 and 523, 524, 331, and 332 coincide with each other, and the DC current flowing through the transistors 508, 509 and 519, 520 is twice the current. Flows.

  As a result, the DC potential at both ends of the active inductance circuit becomes an intermediate voltage of the power supply voltage, that is, Vcc / 2, and the amplitude range can be taken from the center in the vertical direction, so that the maximum voltage width can be maximized. Note that by setting the transistor size of the transistors 508, 509, 519, and 520 to twice the emitter size of the transistors 512, 513, 321, 322, and 523, 524, 331, and 332, the potential can be more strictly determined. it can.

  Therefore, by connecting an integrator to the input terminal of the active inductance circuit, the input potential is set while maintaining the input resistance component of the active inductance at a high impedance. As shown in FIG. When connecting in cascade, the potential can be set in a state where the resistance component of the connection terminal between the active inductances is kept at a high impedance, and a complicated filter can be configured.

  In the sixth embodiment, the integrator is connected to both ends of the active inductance. However, the integrator is connected only to one side where the input potential needs to be set with the input resistance component maintained at a high impedance. In this way, the same effect can be obtained.

  According to the sixth embodiment of the present invention as described above, the inductance value can be determined regardless of the resistance value constituting the 90-degree phase shifter, so that the degree of freedom in design is improved. In addition, the DC potential at the capacitor end of the 90-degree phase shifter can be set to an intermediate voltage of the power supply voltage, that is, Vcc / 2, and the amplitude range can be taken from the center in the vertical direction, so that the maximum voltage width can be maximized. Since the maximum signal amplitude range can be expanded, distortion characteristics can be improved when driving a low power supply voltage of a mobile device or the like. Furthermore, by connecting an integrator using a high impedance circuit to the input terminal of the active inductance circuit, the potential between the terminals when connected in a column is set by setting the input potential while maintaining a high impedance. Can be set, and a complicated filter circuit can be configured.

[Seventh Embodiment]
Next, a seventh embodiment of the present invention will be described with reference to FIG. The seventh embodiment is a positive frequency composed of two LC ladder type filters using the active inductance circuit of the sixth embodiment and a current adding circuit with three pairs of differential pairs. Alternatively, a complex filter that realizes a frequency characteristic that allows only a negative frequency to pass is configured.

  In FIG. 16, differential input terminals 606 and 607 whose input voltages are set to + Vin and −Vin are connected to both ends of a capacitor 660 having a capacitance value C1 / 2 through resistors 658 and 659 having a resistance value Ro. Further, it is connected to one input terminal 650, 651 of the active inductance circuit 601. Here, as the active inductance circuit 601, one having a configuration in which an integrator is connected to the input end as shown in the sixth embodiment in FIG. 13 is used.

  The other input terminals 652 and 653 of the active inductance circuit 601 are connected to both ends of a capacitor 661 having a capacitance value C3 / 2 and a resistor 662 having a resistance value 2 × Ro, and are further connected to output terminals 610 and 611. The active inductance circuit 601 is equivalent to configuring a floating inductance having two sets of differential input terminals, and configures an LC ladder type filter.

  On the other hand, the differential input terminals 608 and 609 set to + jVin and −jVin, which are input voltages obtained by rotating the input voltages + Vin and −Vin by 90 degrees, pass through the resistors 663 and 664 having the resistance value Ro. It is connected to both ends of a C1 / 2 capacitor 665 and further connected to one input terminal 654, 655 of the active inductance circuit 602. Here, the active inductance circuit 602 uses a configuration in which an integrator is connected to the input end as shown in the sixth embodiment.

  The other input terminals 656 and 657 of the active inductance circuit 602 are connected to both ends of a capacitor 666 having a capacitance value C3 / 2 and a resistor 667 having a resistance value 2 × Ro, and are further connected to output terminals 668 and 669. The active inductance circuit 602 is equivalent to configuring a floating inductance having two sets of differential input terminals, and configures an LC ladder type filter.

  Input terminals 650 and 651 of the active inductance circuit 601 are connected to the bases of the transistors 627 and 628 and the collectors of the transistors 612 and 613. The input terminals 655 and 654 of the active inductance circuit 602 are connected to the bases of the transistors 612 and 613 and the collectors of the transistors 628 and 627. The emitters of the transistors 612 and 613 are grounded through resistors 615 and 616 having a resistance value R11, respectively, and are connected to each other by an emitter resistance (resistor 614) having a resistance value 2 × R12 to form a differential pair. The emitters of the transistors 627 and 628 are grounded through resistors 630 and 631 having a resistance value R11, and are connected to each other by an emitter resistance (resistor 629) having a resistance value 2 × R12 to form a differential pair. These two differential pairs constitute a current adding circuit 603 between signals having a phase difference of 90 degrees.

  Similarly, the input terminals 652 and 653 of the active inductance circuit 601 are connected to the bases of the transistors 637 and 638 and the collectors of the transistors 622 and 623, respectively. The input terminals 657 and 656 of the active inductance circuit 602 are connected to the bases of the transistors 622 and 623 and the collectors of the transistors 638 and 637. The emitters of the transistors 622 and 623 are grounded through resistors 625 and 626 having a resistance value R15, respectively, and are connected to each other by an emitter resistance (resistor 624) having a resistance value 2 × R16 to form a differential pair. The emitters of the transistors 637 and 638 are grounded through resistors 640 and 641 having a resistance value R15, respectively, and are connected to each other by an inter-emitter resistance (resistor 639) having a resistance value 2 × R16 to form a differential pair. These two differential pairs form a current adding circuit 605 between signals having a phase difference of 90 degrees.

  Furthermore, terminals 670 and 671 at both ends of the capacitor of the active inductance circuit 601 are connected to the bases of the transistors 632 and 633 and the collectors of the transistors 617 and 618. Further, terminals 673 and 672 at both ends of the capacitor of the active inductance circuit 602 are connected to the bases of the transistors 617 and 618 and the collectors of the transistors 633 and 632. The emitters of the transistors 617 and 618 are grounded through resistors 620 and 621 having a resistance value R13, respectively, and are connected to each other by an emitter resistance (resistor 619) having a resistance value 2 × R14 to form a differential pair. The emitters of the transistors 632 and 633 are grounded through resistors 635 and 636 having a resistance value R13, respectively, and are connected to each other by an emitter resistance (resistor 634) having a resistance value 2 × R14 to form a differential pair. These two differential pairs constitute a current adding circuit 604 between signals having a phase difference of 90 degrees.

  As described above, the complex filter is configured by the current adding circuit including the two LC ladder type filters and the three differential pairs.

  This complex filter is `` Jan Crols and Michiel SJ Steyaert `` Low-IF Topologies for High-Performance Analog Front Ends of Fully Integrated Receivers '' IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS-II: ANALOG AND DIGITAL SIGNAL PROCESSAL, VOL. 45, NO. 3, MARCH 1998 ", etc., and is composed of two LPFs (low-pass filters) and a current adding circuit as shown in FIG. Here, the phase addition amount 2Q is determined by the resistance ratio, and considering the transfer function, the phase addition is performed by j2Q as shown in FIG. 18, and the LPF of the LPF is shown in FIGS. 19A and 19B. A frequency characteristic in which the center frequency is shifted by 2Q can be obtained. With the configuration of the seventh embodiment of the present invention shown in FIG. 16, a circuit having a function equivalent to that of FIG. 17 can be configured.

  In this embodiment, in order to obtain the same operation as described above, a current addition circuit using two LC ladder filters and three pair differential pairs is used, and a pair differential pair constituting the current addition circuit is used. The phase addition amount 2Q is determined by the voltage-current conversion coefficient.

  Here, when the resistance values constituting the differential pair are expressed by the following [Equation 20], addition is performed with the phase addition amount 2Q, and the same frequency characteristics as in FIG. 19B are obtained.

  In this [Equation 20], the resistance values R4 to R7 are the values of the resistors corresponding to the configuration of FIG. 13 (or the configuration of FIG. 9 as a part thereof) corresponding to each of the active inductance circuits 601 and 602 of FIG. Resistance value.

  In this embodiment, since the filter is configured without using an OPAMP (operational amplifier), it is possible to avoid deterioration of frequency characteristics, distortion characteristics, and noise characteristics limited by OPAMP, and consumption. It becomes possible to reduce the power and the circuit scale.

  Further, by using this embodiment in a circuit for selecting a desired channel from a plurality of channels such as a TV receiver, the effect of suppressing an image channel that interferes with the desired channel can be enhanced.

  According to the seventh embodiment of the present invention described above, since the inductance value can be determined regardless of the resistance value constituting the 90-degree phase shifter, the degree of freedom in design is improved. In addition, the DC potential at the capacitor end of the 90-degree phase shifter can be set to an intermediate voltage of the power supply voltage, that is, Vcc / 2, and the amplitude range can be taken from the center in the vertical direction, so that the maximum voltage width can be maximized. Since the maximum signal amplitude range can be expanded, distortion characteristics can be improved when driving a low power supply voltage of a mobile device or the like. Also, by connecting an integrator using a high impedance circuit to the input end of the active inductance circuit, setting the input potential while maintaining a high impedance, the potential between the terminals when connected in cascade Can be set, and a complicated filter circuit can be configured. Furthermore, by constituting with two LC ladder type filters using an active inductance circuit and a current adding circuit with three pair differential pairs, it is possible to realize a frequency characteristic that allows only a positive frequency or a negative frequency to pass. Furthermore, since the filter is configured without using an OPAMP (operational amplifier), deterioration of frequency characteristics, distortion characteristics, and noise characteristics limited by OPAMP can be avoided, and power consumption can be reduced. It is possible to reduce the circuit scale.

[Eighth Embodiment]
FIG. 20 is a block diagram showing an eighth embodiment of the present invention. The eighth embodiment shows an example of a receiving circuit using a complex filter like the seventh embodiment described above.

  In FIG. 20, a received signal input from an antenna 801 is amplified by an AMP (amplifier) 802 and frequency-converted by mixers 803 and 804. Here, in order to extract a complex signal, the output of the oscillator 806 is supplied to the mixer 803, and the output of the local oscillator 806 is added to the mixer 804 with a 90-degree phase difference by a 90-degree phase shifter 805, and is supplied to the mixer 804. To do. The frequency-converted mixer output (I output and Q output) is extracted only by the complex filter 807, and is again amplified by the adder 808 as an IF signal by an AMP (amplifier) 809 to obtain an IF output. As the complex filter 807 having the configuration shown in FIG. 20, a complex filter having the configuration shown in FIG. 16 (a complex filter having the same characteristics as those in FIG. 17) can be used.

  FIG. 21 is a diagram showing the state of image channel overlap and suppression for explaining the operation of the receiving circuit shown in FIG. 20 (mainly the operation of a complex filter). The horizontal axis represents frequency or complex frequency, and the vertical axis represents level.

  FIG. 21A shows the state of the signal received by the antenna 801. There are a plurality of signals other than the desired channel X, and the image channel Y is on the opposite side up and down with the LO that is the oscillation frequency of the local oscillator 806 being symmetrical. Assume that it exists. Here, for the sake of explanation, the level of the desired channel X is set higher than that of the other channels, but this is not restrictive.

  FIG. 21B shows the MIX output frequency-converted by the mixers 803 and 804. On the frequency axis, the image channel Y overlaps the desired channel X. Looking at this as a complex number (complex frequency), it is as shown in FIG. 21C, and the desired channel X exists on the positive frequency side and the image channel Y exists on the negative frequency side. By applying a complex filter 807 to this, the negative frequency side is removed, as shown in FIG. 21D, the image channel Y is suppressed, and finally the IF output as shown in FIG. can get. As described above, it can be seen that the image channel can be suppressed by the complex filter 807 in the receiving circuit as shown in FIG.

  According to the eighth embodiment of the present invention described above, since the inductance value can be determined regardless of the resistance value constituting the 90-degree phase shifter, the degree of design freedom is improved. In addition, the DC potential at the capacitor end of the 90-degree phase shifter can be set to an intermediate voltage of the power supply voltage, that is, Vcc / 2, and the amplitude range can be taken from the center in the vertical direction, so that the maximum voltage width can be maximized. Since the maximum signal amplitude range can be expanded, distortion characteristics can be improved when driving a low power supply voltage of a mobile device or the like. Also, by connecting an integrator using a high impedance circuit to the input end of the active inductance circuit, setting the input potential while maintaining a high impedance, the potential between the terminals when connected in cascade Can be set, and a complicated filter circuit can be configured. Also, by connecting an integrator using a high impedance circuit to the input end of the active inductance circuit, setting the input potential while maintaining a high impedance, the potential between the terminals when connected in cascade Can be set, and a complicated filter circuit can be configured. Furthermore, by configuring the receiver using a complex filter, it is possible to suppress interference due to the image channel and improve the characteristics of the TV receiver or the like.

  Note that the present invention is not limited to the above-described embodiment. For example, in the above-described embodiment, a bipolar transistor used for conventional analog signal processing is described. CMOS transistors and silicon germanium transistors, which have been widely used, can be configured in the same way, and in particular, realized with the above bipolar transistors by applying to silicon germanium transistors with excellent high-frequency characteristics. A filter circuit or the like in a frequency band higher than the generated frequency band can be realized. The active inductance circuit is not only used in a filter circuit and a reception circuit, but also can be applied to applications such as a phase lock loop, an AM demodulator, an FM demodulator, and a filter. . Of course, various modifications can be made without departing from the scope of the present invention.

1 is a circuit diagram illustrating a configuration example of an active inductance circuit according to a first embodiment of the present invention. It is a figure which shows the inductance equivalent to the active inductance circuit used as the 1st Embodiment of this invention. It is a circuit diagram which shows the specific example of the active inductance circuit used as the 2nd Embodiment of this invention. It is a figure which shows the variable inductance equivalent to the active inductance circuit used as the 2nd Embodiment of this invention. It is a circuit diagram which shows the other specific example of the 2nd Embodiment of this invention. It is a circuit diagram which shows the other specific example of the 2nd Embodiment of this invention. It is a circuit diagram which shows the specific example of the active inductance circuit used as the 3rd Embodiment of this invention. It is a circuit diagram which shows the other specific example of the 3rd Embodiment of this invention. It is a circuit diagram which shows the specific example of the active inductance circuit used as the 4th Embodiment of this invention. It is a figure which shows the inductance of 4 terminals equivalent to the active inductance circuit used as the 4th Embodiment of this invention. It is a circuit diagram which shows the specific example of the filter circuit used as the 5th Embodiment of this invention. It is a figure which shows LC ladder type filter circuit equivalent to the filter circuit used as the 5th Embodiment of this invention. It is a circuit diagram which shows the specific example of the active inductance circuit used as the 6th Embodiment of this invention. It is a figure which shows the inductance of 4 terminals equivalent to the active inductance circuit used as the 6th Embodiment of this invention. It is a figure which shows the structural example of LC ladder type filter circuit using the inductance of 4 terminals equivalent to the 6th Embodiment of this invention. It is a circuit diagram which shows the structural example of the complex number filter which becomes the 7th Embodiment of this invention. It is a circuit diagram which shows the structural example of a general complex number filter. It is a figure which shows a complex number filter typically by a transfer function. It is a figure for demonstrating the frequency specification of a complex number filter. It is a circuit diagram which shows the structural example of the receiver circuit used as the 8th Embodiment of this invention. It is a figure for demonstrating operation | movement of the complex number filter of the receiving circuit of FIG. It is a figure which shows the conventional biquad circuit. It is a circuit diagram which shows the conventional active inductance circuit. It is a figure which shows the inductance implement | achieved by the structure of FIG.

Explanation of symbols

  101,102 input terminal, 126,127 output terminal, 130,131,132 90 degree phase shifter, 140-143,150-153 differential pair circuit, 301,302,303,304 input terminal, 338 90 degree phase shift 161, 164 differential pair circuit, 410, 505 active inductance circuit, 506, 517 integrating circuit, 601, 602 (including integrator) active inductance circuit

Claims (10)

A differential 90 degree phase shifter formed by adding a capacitor to the high impedance part of the high impedance circuit that feeds back the negative resistance with respect to the positive resistance;
A first differential pair that converts an input signal into a current and flows the current into the 90-degree phase shifter;
A second differential pair that converts the output voltage of the 90-degree phase shifter into a current and returns it to the input side,
An active inductance circuit characterized in that an impedance viewed from the input side of the 90-degree phase shifter acts as an inductance of two terminals.   2. The active inductance circuit according to claim 1, wherein the bias of the high impedance circuit is set using a resistor in the high impedance circuit itself independently of an input signal.   2. The active inductance circuit according to claim 1, wherein the inductance value is varied by changing a conversion coefficient of the voltage-current converter of the differential pair.   2. The active inductance circuit according to claim 1, wherein the inductance value is varied by changing a capacitance value of a capacitor constituting the 90-degree phase shifter. A differential 90 degree phase shifter formed by adding a capacitor to the high impedance part of the high impedance circuit that feeds back the negative resistance with respect to the positive resistance;
A first and a second differential pair for converting two sets of differential signals into currents and causing the currents to flow in opposite polarities to the 90-degree phase shifter;
A third and a fourth differential pair configured to convert the output voltage of the 90-degree phase shifter into a current and return them to opposite polarities on the input side;
An active inductance circuit characterized in that impedances viewed from two sets of input sides of the 90-degree phase shifter act as inductances of four terminals. Connect an integrator using a high impedance circuit to the output side,
6. The active inductance circuit according to claim 5, wherein the potential between the terminals when connected in a column is set by setting the input potential while maintaining a high impedance. An LC ladder type filter circuit configured using an active inductance circuit,
The active inductance circuit is
A differential 90 degree phase shifter formed by adding a capacitor to the high impedance part of the high impedance circuit that feeds back the negative resistance with respect to the positive resistance;
A first and a second differential pair for converting two sets of differential signals into currents and causing the currents to flow in opposite polarities to the 90-degree phase shifter;
A third and a fourth differential pair for converting the output voltage of the 90-degree phase shifter into a current and returning them to opposite polarities on the input side;
A filter circuit characterized in that the 90 ° phase shifter is configured by causing impedances viewed from two sets of input sides to act as inductances of four terminals. An integrator using a high impedance circuit is connected to the input end of the active inductance circuit,
8. The filter circuit according to claim 7, wherein the potential between the terminals when connected in a column is set by setting the input potential while maintaining a high impedance. A complex filter having a frequency characteristic that allows only a positive frequency or a negative frequency to pass, comprising two LC ladder type filters using an active inductance circuit and a current adding circuit with three pairs of differential pairs,
The active inductance circuit is
A differential 90 degree phase shifter formed by adding a capacitor to the high impedance part of the high impedance circuit that feeds back the negative resistance with respect to the positive resistance;
A first and a second differential pair for converting two sets of differential signals into currents and causing the currents to flow in opposite polarities to the 90-degree phase shifter;
A third and a fourth differential pair for converting the output voltage of the 90-degree phase shifter into a current and returning them to opposite polarities on the input side;
A filter circuit characterized in that the 90 ° phase shifter is configured by causing impedances viewed from two sets of input sides to act as inductances of four terminals. As a filter to suppress the image channel signal in the received signal, only positive frequency or negative frequency composed of two LC ladder type filters using active inductance circuit and current adding circuit with 3 pairs of differential pairs A reception circuit using a complex filter having a frequency characteristic to pass
The active inductance circuit is
A differential 90 degree phase shifter formed by adding a capacitor to the high impedance part of the high impedance circuit that feeds back the negative resistance with respect to the positive resistance;
A first and a second differential pair for converting two sets of differential signals into currents and causing the currents to flow in opposite polarities to the 90-degree phase shifter;
A third and a fourth differential pair for converting the output voltage of the 90-degree phase shifter into a current and returning them to opposite polarities on the input side;
A receiving circuit, wherein the 90-degree phase shifter is configured by causing impedances viewed from two sets of input sides to act as inductances of four terminals.

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