JP2007180174A - Variable resistance memory element - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a variable resistance memory element which is contrived to suppress variation in a CER (colossal electroresistance) value and improve the CER value. <P>SOLUTION: The element is provided with variable resistance memory films 33 each formed on a semiconductor substrate 31, and formed of a crystal of an oxide having high and low resistance states switchable in response to an applied voltage; laminated films 34 laminated alternately with the variable resistance memory films, and each having an electric resistivity different from that of the each of the variable resistance memory films; and a pair of electrode films 32a, 32b arranged so as to sandwich the entire of the alternately laminated memory films 33 and the laminated films 34, and used for applying a voltage to the memory films 33 and the laminated films 34. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention switches between a high resistance state and a low resistance state in which current flows more easily than the high resistance state in accordance with an applied voltage, and selectively maintains the high resistance state and the low resistance state. About.

  Conventionally, research and development of nonvolatile memory elements that can retain stored contents even when the power is turned off have been actively conducted.

  Recently, a resistance change type memory element called R-RAM (Resistance RAM) has been proposed as a new next generation type non-volatile memory element (see, for example, Patent Document 1, Non-Patent Documents 1 and 2).

  This R-RAM includes a resistance change type memory film that switches between a high resistance state and a low resistance state in which a current flows more easily than the high resistance state in accordance with an applied voltage. The nonvolatile memory element is selectively held.

R-RAM has the potential to surpass existing nonvolatile memory elements, such as high speed, large capacity, and low power consumption, and is expected to have a future.
Japanese National Patent Publication No. 11-510317 A. Beck et al. , Appl. Phys. Lett. Vol. 77, p. 139 (2001) Nikkei Microdevices magazine, 238, 42 pages (2005)

  In the above-described research and development of the resistance change type memory element, it is said that an important factor that determines the device performance of the resistance change type memory element is electric field induced giant resistance change (CER: Cosal electro-resistance). It is said that the device performance of the resistance change type storage element increases as the ratio of the electrical resistivity in the high resistance state and the electrical resistivity in the low resistance state (hereinafter referred to as CER value) increases in the resistance change type storage element. Yes.

  The expression mechanism of this CER phenomenon has not yet been fully elucidated, and various theories have been put forward. At present, a region (Schottky barrier) in which the flow of electrons is discontinuous at the junction interface by joining different types of materials between the electrode film for applying a voltage to the resistance change memory film and the resistance change memory film. And the formation of the electron trapping region) are beginning to be understood as a powerful expression mechanism of the CER phenomenon.

  Reports on conventional resistance change type memory elements point out the problem that the CER values obtained even when using the material of the resistance change type memory film having the same composition are likely to vary and the reproducibility is poor.

  Therefore, in order to improve the quality of the resistance change type storage element, it is desired to provide a resistance change type storage element in which the CER value is increased and the variation of the CER value is suppressed.

  In view of the above circumstances, an object of the present invention is to provide a resistance-change memory element that has been devised to suppress variation in CER values and increase CER values.

The first variable resistance memory element of the variable resistance memory element of the present invention that achieves the above object includes a high resistance state and a low resistance state in which current flows more easily than the high resistance state in accordance with an applied voltage. In the resistance change memory element that selectively holds the high resistance state and the low resistance state,
A resistance change type memory film formed of an oxide crystal formed on a semiconductor substrate and switched between a high resistance state and a low resistance state according to an applied voltage;
A laminated film alternately laminated with the resistance change type memory film and having an electrical resistivity different from that of the resistance change type memory film;
The resistance variable memory film and the pair of electrode films for applying a voltage to the multilayer film are provided across the entire laminated structure including the resistance variable memory film and the multilayer film. To do.

  By alternately laminating the resistance change type memory film and the laminated film, not only the interface formed between the resistance change type memory film and the electrode film, but also the resistance change type memory film and the laminated film are formed. It is possible to provide a large number of bonding interfaces made of different kinds of materials. As a result, the CER value can be increased as the Schottky barrier and the region for trapping electrons increase.

  Here, the variable resistance memory film is preferably made of a single crystal of the oxide.

  By forming the resistance change type memory film as the above single crystal, it is only necessary to stack the single crystals for crystal growth, and the number of manufacturing steps is reduced as compared with the case of forming a polycrystal as described later.

  Further, the resistance change type memory film is made of a polycrystal in which a plurality of crystals of the oxide are grown on the semiconductor substrate with the same grain size and adjacent crystal interfaces are formed in close contact with each other. It is preferable.

  The resistance change type memory film is made of a polycrystal in which a plurality of crystals made of oxide grow on the semiconductor substrate with the same grain size and adjacent crystal interfaces are formed in close contact with each other. It is preferable.

  The inventor of the present application has found that CER develops not only at different materials but also at the same kind of crystal interface. As a result, by making the resistance change memory film polycrystalline, a region where the flow of electrons is discontinuous is formed at the crystal interface between the polycrystals, and the CER value can be increased accordingly. In addition, variation in CER values can be suppressed by making the crystal sizes uniform.

  Here, the laminated film is preferably a film having a lower electrical resistivity than the resistance change memory film.

  By using a film with low electrical resistivity for the laminated film, the height and width of the Schottky barrier generated at the interface between the resistance change memory film and the laminated film can be controlled, and the interface trap level for trapping electrons can be set. The CER value can be increased. The film having a low electrical resistivity is preferably a metal film.

  The laminated film is preferably a film having a higher electrical resistivity than the resistance change type memory film.

  Even when a film with high electrical resistivity is used for the laminated film, the height and width of the Schottky barrier generated at the interface between the resistance change memory film and the laminated film can be controlled, and the interface trap level that traps electrons Can be controlled, and the CER value can be increased.

In addition, the second resistance change type storage element of the present invention that achieves the above-described object has a high resistance state and a low current flow rate more easily than the high resistance state according to the applied voltage. In the resistance change type storage element that switches to the resistance state and selectively holds the high resistance state and the low resistance state,
A resistance change type memory film made of a polycrystal formed on a semiconductor substrate, in which a plurality of oxide crystals are grown on the semiconductor substrate with the same grain size, and adjacent crystal interfaces are formed in close contact with each other When,
And a pair of electrode films for applying a voltage to the resistance change memory film, which are arranged with the resistance change memory film interposed therebetween.

  By making the resistance change memory film polycrystalline, not only the interface formed between the resistance change memory film and the electrode film, but also the region where the flow of electrons is discontinuous at the crystal interface between the polycrystals. And the CER value can be increased accordingly. In addition, by making the crystal grain sizes uniform, variations in CER values can be suppressed as the crystals are made uniform.

  As described above, it is possible to provide a resistance change type storage element in which a variation in CER value is suppressed and a device for increasing the CER value is applied.

  Embodiments of the present invention will be described below.

  First, the operation principle of a resistance change type memory element that is currently known will be described.

  FIG. 1 is a graph showing a current-voltage characteristic of a resistance change type storage element using a bipolar resistance change type storage film, and FIG. 2 is a graph showing a resistance change type storage element using a unipolar resistance change type storage film. It is a graph which shows an electric current-voltage characteristic.

  In the resistance change memory element, a resistance change memory film in which a high resistance state and a low resistance state are switched according to an applied voltage is sandwiched between a pair of electrodes. Many of the resistance change type memory films are oxide material films containing transition metals, and are roughly classified into two types based on the difference in electrical characteristics.

One resistance change type memory film is a type that uses voltages of different polarities in order to change the resistance state between a high resistance state and a low resistance state. Examples of the oxide material include SrTiO ₃ doped with a small amount of impurities such as chromium (Cr), SrZrO ₃ , Pr _1-x Ca _x MnO _3, or La _1, which exhibits a colossal magneto-resistance (CMR). _1-x Ca _x MnO ₃ or the like is used. Hereinafter, the above-described resistance change type memory film that requires voltages having different polarities for rewriting the resistance state is referred to as a bipolar resistance change type memory film.

The other resistance change type memory film is a type that uses a voltage having the same polarity in order to change the resistance state between a high resistance state and a low resistance state. As the oxide material, for example, an oxide of a single transition metal such as NiO _x or TiO _x is used. Hereinafter, a resistance change memory film that requires a voltage having the same polarity for rewriting the resistance state is referred to as a unipolar resistance change memory film.

FIG. 1 is a graph showing current-voltage characteristics of a resistance change type storage element using a bipolar resistance change type storage film, which is described in Non-Patent Document 1. This graph shows a current-voltage characteristic using Cr-doped SrZrO ₃ which is a typical bipolar resistance variable memory film.

  Consider a case where the resistance change type storage element is in a high resistance state in the initial state.

  As the applied voltage is gradually increased from 0V to a negative voltage, the flowing current changes along the curve a in the direction of the arrow, and its absolute value gradually increases. When the applied negative voltage further increases and exceeds about 0.5 V, the resistance change type storage element switches from the high resistance state to the low resistance state. Along with this, the absolute value of the current increases rapidly, and the current-voltage characteristic transitions from point A to point B. In the following description, the operation of changing the resistance change type storage element from the high resistance state to the low resistance state is referred to as “set”.

  When the negative voltage is gradually decreased from the state of the point B, the current changes in the direction of the arrow along the curve b, and the absolute value thereof gradually decreases. When the applied voltage returns to 0V, the current also becomes 0A.

  When the applied voltage is gradually increased from 0V to a positive voltage, the current value changes in the direction of the arrow along the curve c, and the absolute value gradually increases. When the applied positive voltage further increases and exceeds about 0.5 V, the resistance change memory element switches from the low resistance state to the high resistance state. Along with this, the absolute value of the current sharply decreases, and the current-voltage characteristic transitions from point C to point D.

  In the following description, the operation of changing the resistance change storage element from the low resistance state to the high resistance state is referred to as “reset”.

  When the positive voltage is gradually decreased from the state of the point D, the current changes in the direction of the arrow along the curve d, and its absolute value gradually decreases. When the applied voltage returns to 0V, the current also becomes 0A.

  Each resistance state is stable in a range of about ± 0.5 V and is maintained even when the power is turned off. That is, in the high resistance state, if the applied voltage is lower than the absolute value of the voltage at the point A, the current-voltage characteristics change linearly along the curves a and d, and the high resistance state is maintained. Similarly, in the low resistance state, if the applied voltage is lower than the absolute value of the voltage at the point C, the current-voltage characteristics change linearly along the curves b and c, and the low resistance state is maintained.

  As described above, the resistance change type storage element using the bipolar resistance change type storage film applies voltages of different polarities in order to change the resistance state between the high resistance state and the low resistance state. is there.

FIG. 2 is a diagram showing current-voltage characteristics of a resistance change type storage element using a unipolar resistance change type storage film. This graph is a case where TiO _x which is a typical unipolar resistance change type memory film is used.

  Consider a case where the resistance change type storage element is in a high resistance state in the initial state.

  As the applied voltage is gradually increased from 0 V, the current changes along the curve a in the direction of the arrow, and its absolute value gradually increases. When the applied positive voltage further increases and exceeds about 1.3 V, the resistance change type storage element switches (sets) from the high resistance state to the low resistance state. Along with this, the absolute value of the current increases rapidly, and the current-voltage characteristic transitions from point A to point B. In FIG. 2, the current value at the point B is constant at about 20 mA because current limitation is applied to prevent element destruction due to a sudden increase in current.

  When the voltage is gradually decreased from the state of the point B, the current changes in the direction of the arrow along the curve b, and the absolute value thereof gradually decreases. When the applied voltage returns to 0V, the current also becomes 0A.

  When the applied voltage is gradually increased again from 0 V, the current changes in the direction of the arrow along the curve c, and its absolute value gradually increases. When the applied positive voltage further increases and exceeds about 1.2 V, the resistance change storage element is switched (reset) from the low resistance state to the high resistance state. Along with this, the absolute value of the current rapidly decreases, and the current-voltage characteristic transitions from point C to point D.

  When the voltage is gradually decreased from the state of the point D, the current changes in the direction of the arrow along the curve d, and the absolute value thereof gradually decreases. When the applied voltage returns to 0V, the current also becomes 0A.

  Each resistance state is stable below the voltage required for setting and resetting. That is, in FIG. 2, both states are stable at about 1.0 V or less, and are maintained even when the power is turned off. That is, in the low resistance state, if the applied voltage is lower than the voltage at the point C, the current-voltage characteristic is maintained along the curve c.

  As described above, the resistance change type storage element using the unipolar resistance change type storage film applies a voltage having the same polarity in order to change the resistance state between the high resistance state and the low resistance state. .

  Note that when a resistance change type memory element is formed using the above-described material, the characteristics shown in FIGS. 1 and 2 cannot be obtained in the initial state immediately after the resistance change type memory element is formed, and the resistance change type memory film is made to be high. In order to obtain a state that can reversibly change between the resistance state and the low resistance state, the above-described forming process is required.

  FIG. 3 is a current-voltage characteristic illustrating the forming process of the resistance change type storage element using the same unipolar resistance change type storage film as in FIG.

  In the initial state immediately after the formation of the resistance change memory element, as shown in FIG. 3, the resistance is high and the withstand voltage is as high as about 8V.

  When a voltage higher than this withstand voltage is applied in the initial state, as shown in FIG. 3, the value of the current flowing through the element increases rapidly, that is, the resistance change storage element is formed. By performing this forming, the resistance change type memory element exhibits current-voltage characteristics as shown in FIG. 2 and can reversibly change between a low resistance state and a high resistance state. .

  Next, a first embodiment of the first resistance change memory element of the present invention will be described.

  FIG. 4 is a cross-sectional view of the first embodiment of the resistance variable memory element of the present invention.

  In the resistance change memory element 1, an electrode film 12 a as a lower electrode is provided on a semiconductor substrate 11. On the electrode film 12a, a high resistance state is switched between a high resistance state and a low resistance state in which a current flows more easily than the high resistance state in accordance with an applied voltage, and a resistance that selectively holds the high resistance state and the low resistance state. A changeable memory film 13 is provided. The resistance change type memory film 13 is made of a polycrystal in which a plurality of oxide crystals grow on the semiconductor substrate 11 with the same grain size and adjacent crystal interfaces are formed in close contact with each other.

  On the resistance change memory film 13, an electrode film 12b as an upper electrode is provided. These electrode films 12a and 12b have a structure in which the resistance change memory film 13 is sandwiched, and a voltage is applied to the resistance change memory film 13 by the electrode films 12a and 12b. The thickness of the resistance change memory film 13 is 20 nm to 50 nm.

Here, the electrical resistivity of the resistance change memory film 13 is in the range of 1 to 10 ¹² Ωcm.

Examples of the material of the resistance change memory film 13 include nickel oxide, iron oxide, cobalt oxide, titanium oxide, chromium oxide, silicon oxide, aluminum oxide, hafnium oxide, magnesium oxide, yttrium oxide, PrCaMnO ₃ , and LaSrMnO _3. BaSrMnO ₃ , Cr-doped SrTiO ₃ , Cr-doped PbTiO ₃ , GeSbTe, or the like can be used.

On the other hand, the electrical resistivity of the electrode films 12a and 12b is 10 ⁻³ Ωcm or less. As a material of the electrode films 12a and 12b, metals such as Pt, Au, Al, and Cu, and oxides such as ITO, SnO _2−x , and ZnO _1−x can be used.

  Next, a manufacturing method of the first embodiment of the first resistance change memory element of the present invention will be described.

  FIG. 5 is a diagram showing a process of the manufacturing method of the first embodiment of the first resistance change memory element according to the present invention.

  As a first step, an electrode film 12a is grown on the semiconductor substrate 11 by a vacuum film formation method typified by sputtering (FIG. 5A).

  As a second step, a plurality of island-like growth nuclei 14 are formed on the electrode film 12a by a vacuum film forming method (FIG. 5B). The island-like growth nuclei 14 are crystal nuclei from which crystals of the resistance change type memory film grow. In FIG. 5, only the rightmost island-like growth nucleus is denoted by reference numeral 14 for easy understanding of the drawing.

  Here, in the following text, an electrode film serving as a base for forming island-like growth nuclei, a laminated film and an oxide film described later are collectively referred to as a base film.

  The island-like growth nuclei can be formed by using a material having low wettability (high surface energy) with the base film.

  Specifically, oxides (indium oxide-tin oxide, tin oxide, zinc oxide, nickel oxide, tungsten oxide, titanium oxide, silicon oxide, aluminum oxide, tantalum oxide, hafnium oxide, etc.) A material selected from the group of ceramics such as nitrides (silicon nitride, aluminum nitride, titanium nitride, boron nitride, etc.), fluorides (magnesium fluoride, etc.), and borides (titanium boride, etc.) Used for geological film. In particular, the nitride is preferably used as a surface tension adjusting film. The surface tension adjusting film (not shown in FIG. 5) is formed on the electrode film 12a (between the electrode film 12a and the island-like growth nucleus 15) as necessary, and is a thin film that allows current to flow through the tunnel effect. Any ceramic film having a thickness may be used.

  Select from a group of noble metals (Pt, Au, Pd, Ru, etc.), refractory metals (Cr, Ta, W, Ti, etc.), and metals that easily aggregate (heat) such as Ag and In. The island-like growth nuclei are formed by forming the metal to be formed to a thickness of 0.2 to 1.0 nm by a vacuum film formation method typified by sputtering. In addition, formation of island-like growth nuclei can be promoted by heating at 100 to 250 ° C. for 1 to 10 seconds in a vacuum immediately after film formation.

  Next, as a third step, seeds are formed in the island-like growth nuclei. Hereinafter, the formation of seeds will be described in detail.

After the formation of island-like growth nuclei, the materials constituting the resistance change memory film are nickel oxide, iron oxide, cobalt oxide, titanium oxide, chromium oxide, silicon oxide, aluminum oxide, hafnium oxide, magnesium oxide, yttrium oxide, PrCaMnO. ₃ , using a material selected from the group of LaSrMnO ₃ , BaSrMnO ₃ , Cr-doped SrTiO ₃ , Cr-doped PbTiO ₃ , GeSbTe, etc. A film is formed to 1.0 to 5.0 nm to form a seed 15. In FIG. 5, only the rightmost seed is denoted by reference numeral 15 for easy understanding of the drawing. In forming the seed 15, it is preferable to deposit the seed 15 slowly by slowing the film forming speed (0.1 to 0.5 nm / min) in order to separate the adjacent seeds 15 in shape. The distance between the seeds thus formed is kept constant, and the distance between the seeds can be set to 5 to 20 nm.

  Subsequently, as a fourth step, after the seed 15 is formed, the resistance variable memory film 13 having a film thickness of 20 to 50 nm is formed by a vacuum film forming method using a material constituting the variable resistance memory film (FIG. 5 (d)).

  Further, as a fifth step, the electrode film 12b is grown by a vacuum film forming method (FIG. 5E).

  Through these steps, the first embodiment of the first resistance change memory element of the present invention is manufactured. A surface tension adjusting film may be laminated between the joint surfaces of the resistance change memory film and the electrode film. The surface tension adjusting film will be described later in the description of the second embodiment of the first resistance change type storage element.

  In FIG. 5E, island-like growth nuclei and seeds are explicitly drawn for the sake of explanation. The island-like growth nuclei and seeds are originally the same crystal as a part of the resistance change type memory film 13 after being formed by the vacuum film forming method, and the resistance change type memory element 1 shown in FIG. It is like that.

  Next, the operation of the first resistance change type memory element according to the first embodiment will be described.

  FIG. 6 is a schematic diagram of a memory cell of the nonvolatile semiconductor memory device adopting the first embodiment of the first resistance change type memory element.

  A memory cell 100 of the nonvolatile semiconductor memory device illustrated in FIG. 6 includes a resistance change storage element 1 and a cell selection transistor 101. The resistance change type storage element 1 has one end connected to the bit line BL and the other end connected to the drain terminal 101 a of the cell selection transistor 101. The drain terminal 101b of the cell selection transistor 101 is connected to the source line SL, and the gate terminal 101c of the cell selection transistor 101 is connected to the word line WL.

  FIG. 7 is a circuit diagram showing an example of a memory cell array in which the memory cells shown in FIG. 6 are arranged in a matrix. A plurality of memory cells are formed adjacent to each other in the column direction (vertical direction in the drawing) and the row direction (horizontal direction in the drawing).

  A plurality of word lines WL1, bars WL1, WL2, bars WL2,... Are arranged in the column direction, and the memory cells arranged in the column direction share a common signal line. Further, source lines SL1, SL2,... Are arranged in the column direction and share a common signal line with the memory cells arranged in the column direction.

  One source line SL is provided for every two word lines WL.

  A plurality of bit lines BL1, BL2, BL3, BL4... Are arranged in the row direction (horizontal direction in the drawing), and the memory cells arranged in the row direction share a common signal line.

  Next, the operation of the nonvolatile semiconductor memory device adopting the first embodiment of the first resistance change memory element of the present invention will be described.

  First, the rewriting operation from the high resistance state to the low resistance state, that is, the set operation will be described. Here, for easy understanding, the memory cell to be rewritten is a memory cell 100 connected to the word line WL1 and the bit line BL1 surrounded by a dotted-line square shown in FIG.

  First, a predetermined voltage is applied to the word line WL1, and the cell selection transistor 101 is turned on. The source line SL1 is connected to a reference potential, for example, 0 V that is a ground potential.

  Next, a bias voltage that is the same as or slightly larger than the voltage required to set the resistance change storage element 1 is applied to the bit line BL1. For example, in the case of a resistance change memory element having the characteristics shown by the solid line in FIG. 2, a bias voltage of about 1.5 V is applied.

By applying a bias voltage, a current path toward the source line SL1 is formed via the bit line BL1, the resistance change type storage element 1 and the cell selection transistor 101, and the applied bias voltage is applied to the resistance change type storage element 1. Distribution is performed according to the resistance value R _H and the channel resistance R _CS of the cell selection transistor 101.

At this time, the resistance value R _H of the resistance change memory element 1, for sufficiently large in comparison with the channel resistance R _CS of the cell select transistors 101, most of the bias voltage applied to the resistance variable memory element 1. Thereby, the resistance change type memory element 1 changes from the high resistance state to the low resistance state.

  Next, after the bias voltage applied to the bit line BL1 is returned to zero, the voltage applied to the word line WL1 is turned off to complete the set operation.

  Next, the rewriting operation from the low resistance state to the high resistance state, that is, the resetting operation will be described. The memory cell 100 to be rewritten is a memory cell 100 connected to the word line WL1 and the bit line BL1.

  First, a predetermined voltage is applied to the word line WL1, and the cell selection transistor 101 is turned on. The source line SL1 is connected to a reference potential, for example, 0 V that is a ground potential.

  Next, a bias voltage that is the same as or slightly larger than the voltage required to reset the resistance change storage element 1 is applied to the bit line BL1. For example, in the case of a resistance change memory element having the characteristics shown by the solid line in FIG. 2, a bias voltage of about 0.8 V is applied.

By applying a bias voltage, a current path toward the source line SL1 is formed via the bit line BL1, the resistance change type storage element 1, and the cell selection transistor 101, and the applied bias voltage is applied to the resistance change type storage element 1. They are distributed according to the resistance value R _L and the channel resistance R _CS of the cell selection transistor 101, respectively.

At this time, since the channel resistance R _CS of the cell selection transistor 101 is sufficiently smaller than the resistance value _RL of the resistance change storage element 1, most of the applied bias voltage is applied to the resistance change storage element 1. Thereby, the resistance change type memory element 1 changes from the low resistance state to the high resistance state.

  In the reset process, almost the entire bias voltage is distributed to the resistance change type storage element 1 at the moment when the resistance change type storage element 1 switches to the high resistance state, so that the resistance change type storage element 1 is set again by this bias voltage. Need to be prevented. For this purpose, the bias voltage applied to the bit line BL1 must be smaller than the voltage required for setting.

In the reset process, as in channel resistance R _CS of the cell select transistor 101 becomes sufficiently smaller than the resistance value R _L of the resistance change memory element 1, with adjusting the gate voltages of these transistors, it is applied to the bit line BL1 Set the bias voltage to a voltage higher than the voltage required for resetting and lower than the voltage required for the set.

  Next, after the bias voltage applied to the bit line BL1 is returned to zero, the voltage applied to the word line WL1 is turned off to complete the reset operation.

  In the nonvolatile semiconductor memory device according to the present embodiment, as shown in FIG. 6, the memory cell 100 includes word lines WL and source lines SL arranged in the column direction and connected to one word line (for example, WL1). Are connected to the same source line SL (for example, SL1). Therefore, if a plurality of bit lines BL (for example, BL1 to BL4) are simultaneously driven in the reset operation, a plurality of memory cells 100 connected to the selected word line (for example, WL1) can be collectively reset.

  Next, the reading method of the nonvolatile semiconductor memory device according to the present embodiment shown in FIG. 6 will be explained. The memory cell 100 to be read is a memory cell 100 connected to the word line WL1 and the bit line BL1.

  First, a predetermined voltage is applied to the word line WL1, and the cell selection transistor 101 is turned on. The source line SL1 is connected to a reference potential, for example, 0 V that is a ground potential.

  Next, a predetermined bias voltage is applied to the bit line BL1. This bias voltage is set so that no set or reset is caused by the applied voltage when the resistance change storage element 1 is in any resistance state.

  When such a bias voltage is applied to the bit line BL1, a current corresponding to the resistance value of the resistance change storage element 1 flows through the bit line BL1. Therefore, by detecting this current value flowing through the bit line BL1, it is possible to read out what resistance state the resistance change type storage element 1 is in.

  As described above, according to the first embodiment of the first resistance change type memory element of the present invention, the resistance change type memory film 13 and the electrode films 12a and 12b are obtained by making the resistance change type memory film 13 polycrystalline. A region where the flow of electrons is discontinuous is formed not only at the interface formed between them but also at the crystal interface between the polycrystals, and the CER value can be increased accordingly. In addition, by making the crystal grain sizes uniform, variations in CER values can be suppressed as the crystals are made uniform.

  Here, the above-described resistance change type memory film 13 is made of a polycrystal in which a plurality of crystals made of oxide grow on the semiconductor substrate 11 with the same grain size and adjacent crystal interfaces are formed in close contact with each other. It may be a thing. The same applies to the following embodiments.

  Above, description of 1st Embodiment of the 1st resistance change memory element of this invention is complete | finished, Next, 2nd Embodiment of the 1st resistance change type memory element of this invention is described.

  The first embodiment of the first resistance change type storage element of the present invention and the second embodiment of the first resistance change type storage element of the present invention are partially different in structure, but otherwise the same Since they have a structure, the same elements are denoted by the same reference numerals, description thereof is omitted, and differences are mainly described.

  FIG. 8 is a cross-sectional view of a second embodiment of the first resistance change memory element of the present invention.

  The difference between the first embodiment of the first resistance change type storage element of the present invention and the second embodiment of the first resistance change type storage element is that, in this second embodiment, the polycrystals having different sizes are different. The electrode films 12c and 12d made of are used. In addition, a surface tension adjusting film described later is provided between the resistance change memory film and the electrode film.

  Next, a manufacturing method of the second embodiment of the first resistance change type memory element of the present invention will be described.

  FIG. 9 is a diagram showing a process of a manufacturing method according to the second embodiment of the first resistance change type memory element of the present invention.

  As a first step, an electrode film 12c is grown on the semiconductor substrate 11 by a vacuum film forming method (FIG. 9A). In FIG. 9, the electrode film 12 c is composed of irregular polycrystals having different sizes.

  As a second step, a surface tension adjusting film 16a (for example, an oxide film, a nitride film, a carbide film, a fluoride film, a boride, etc.) is used to adjust the surface energy of the upper surface (underlayer film) of the electrode film 12c. A film selected from the group of ceramic films is formed to a thickness of 0.5 to 2.0 nm by a vacuum film forming method.

  As a third step, island-like growth nuclei 14 are formed on the electrode film 12c by vacuum film formation (FIG. 9C).

  As a fourth step, seeds 15 are formed on the island-like growth nuclei by a vacuum film forming method (FIG. 9D).

  As a fifth step, after the seed 15 is formed, the resistance variable memory film 13 having a film thickness of 20 to 50 nm is formed by a vacuum film forming method using a material constituting the variable resistance memory film (FIG. 9E). )).

  Through these steps, the second embodiment of the first resistance change memory element of the present invention is manufactured.

  Next, the operation of the nonvolatile semiconductor memory device adopting the second embodiment of the first resistance change type memory element of the present invention will be described. The difference between the first resistance change type storage element of the present invention and the first embodiment will be described.

  In the second embodiment of the first resistance change type storage element of the present invention, the surface tension adjustment film is laminated. However, the resistance change type storage element may be produced without laminating the surface tension adjustment film.

  Next, a third embodiment of the first variable resistance memory element according to the present invention will be described.

  FIG. 10 is a cross-sectional view of a third embodiment of the first resistance change memory element of the present invention.

  A feature of the third embodiment of the first resistance change type memory element of the present invention is that an electrode film 12e made of polycrystal having the same shape is employed.

  Next, a manufacturing method of the third embodiment of the first resistance change type storage element will be described.

  FIG. 11 is a diagram showing a process of the manufacturing method of the third embodiment of the first resistance change memory element according to the present invention.

  As a first step, island-like growth nuclei 14 for forming an electrode film on the semiconductor substrate 11 are formed by a vacuum film-forming method (FIG. 11A).

  As a second step, seeds 15 are formed on the island-like growth nuclei 14 by a vacuum film-forming method (FIG. 11B).

  As a third step, a crystal forming an electrode film is grown on the semiconductor substrate 11 with the same grain size by the vacuum film forming method starting from the seed 15, and adjacent crystal interfaces are closely formed. An electrode film 12e made of crystals is formed.

  As a fourth step, the resistance variable memory film 13 having a thickness of 20 to 50 nm is formed by a vacuum film-forming method using the material constituting the variable resistance memory film (FIG. 11D).

  As a fifth step, an electrode film 12f is grown on the resistance change memory film 13 by a vacuum film forming method (FIG. 11E).

  Through these steps, the third embodiment of the first resistance change memory element of the present invention is manufactured.

  Next, characteristic points of the operation of the nonvolatile semiconductor memory device adopting the third embodiment of the first resistance change type memory element of the present invention will be described.

  In the third embodiment of the first resistance change type memory element of the present invention, the electrode film 12e has a polycrystalline structure of the same shape.

  Next, a fourth embodiment of the first resistance change memory element of the present invention will be described.

  FIG. 12 is a sectional view of the fourth embodiment of the first resistance change memory element according to the present invention.

  In the fourth embodiment of the first resistance change type storage element, a Si oxide layer 11b is newly provided as compared with the third embodiment.

  Next, a manufacturing method of the fourth embodiment of the first resistance change type memory element of the present invention will be described.

  FIG. 13 shows the steps of the manufacturing method of the fourth embodiment of the first resistance change memory element according to the present invention.

  As a first step, resist patterning is performed on the Si substrate 11a made of silicon single crystal by using a photolithography technique. Subsequently, by etching the Si substrate 11a using a buffered hydrofluoric acid aqueous solution, triangular pyramid-shaped etching pits reflecting the difference in the etching rate on the Si crystal plane are formed (FIG. 13A).

  As a second step, after removing the resist, a thermally oxidized Si layer 11b is formed on the surface of the Si substrate 11a to prevent silicidation of the island-like growth nucleus material (FIG. 13B).

  As a third step, island-like growth nuclei 14 for forming an electrode film are formed on the Si substrate 11a (FIG. 13C).

  As a fourth step, seeds 15 are formed on the island-like growth nuclei 14 (FIG. 13D).

  As a fifth step, the electrode film 12g is formed by a vacuum film forming method starting from the seed 15 (FIG. 13E).

  As a sixth step, a resistance-change memory film 13 having a thickness of 20 to 50 nm is formed by a vacuum film-forming method using a material constituting the resistance-change memory film (FIG. 13F).

  As a seventh step, an electrode film 12h is grown on the resistance change memory film 13 by a vacuum film forming method (FIG. 13G).

  The operation of the nonvolatile semiconductor memory device adopting the fourth embodiment of the first resistance change type storage element of the present invention is the same as the operation of the nonvolatile semiconductor memory device adopting the third embodiment of the first resistance change type storage element. Since the operation is the same as that in FIG.

  According to the fourth embodiment of the first resistance change type storage element of the present invention, the same effect as that of the third embodiment of the first resistance change type storage element can be obtained.

  Next, a fifth embodiment of the first resistance change memory element of the present invention will be described.

  FIG. 14 is a sectional view of a fifth embodiment of the first resistance change memory element according to the present invention.

  In the fifth embodiment of the first resistance change type memory element of the present invention, the step of forming island-shaped nuclei is omitted and the electrode film 12i is formed as compared with the fourth embodiment.

  Next, a manufacturing method of the fourth embodiment of the first resistance change type memory element of the present invention will be described.

  FIG. 15 shows the steps of the manufacturing method of the fourth embodiment of the first resistance change memory element according to the present invention.

  As a first step, resist patterning is performed on the Si substrate 11a made of silicon single crystal by using a photolithography technique. Subsequently, by etching the Si substrate 11a using a buffered hydrofluoric acid aqueous solution, triangular pyramid-shaped etching pits reflecting the difference in the etching rate on the Si crystal plane are formed (FIG. 15A).

  As a second step, after removing the resist, a thermally oxidized Si layer is formed on the surface of the Si substrate (FIG. 15B).

  As a third step, an electrode film 12i having the same size is formed by a vacuum film forming method (FIG. 15C).

  As a fourth step, a resistance change type memory film having a thickness of 20 to 50 nm is formed by a vacuum film forming method using a material constituting the resistance change type memory film (FIG. 15D).

  As the fifth step, the electrode film 12j is grown by repeating the first to third steps of the fourth embodiment described above (FIG. 15E).

  The operation of the nonvolatile semiconductor memory device adopting the fifth embodiment of the first resistance change memory element of the present invention is the same as the operation of the nonvolatile semiconductor memory device adopting the third embodiment of the first resistance change memory element of the present invention. Since the operation is the same as that of the conductive semiconductor memory device, description thereof is omitted.

  Also according to the fifth embodiment of the first resistance change type memory element of the present invention, the same effect as that of the third embodiment of the first resistance change type memory element of the present invention can be obtained.

  Above, description of 5th Embodiment of the 1st resistance change type | mold memory element of this invention is complete | finished, and 1st Embodiment of 2nd resistance change type | mold memory element of this invention is described.

  FIG. 16 is a cross-sectional view of the first and second embodiments of the second resistance change type storage element of the present invention.

  The resistance change type storage element 2 includes the above-described resistance change type storage film 23 formed of a single crystal of an oxide that switches between a high resistance state and a low resistance state according to an applied voltage, and the resistance change type storage film 23. It has a structure in which laminated films 24 having different electrical resistivity are laminated alternately. Furthermore, the resistance change type memory film 23 and the laminated film 24 formed on the semiconductor substrate 21 and disposed across the entire laminated structure composed of the resistance change type memory film 23 and the laminated film 24 which are alternately laminated. A pair of electrode films 22a and 22b for applying a voltage is provided (FIG. 16A).

  Next, a manufacturing method of the first embodiment of the second resistance change type memory element of the present invention will be described.

  As a first step, an electrode film 22a is grown on the semiconductor substrate 21 by a vacuum film forming method.

  As a second step, the resistance variable memory film 23 is formed on the electrode film 22a by a vacuum film forming method using an oxide single crystal material constituting the resistance variable memory film.

As a third step, a laminated film 24 having an electrical resistivity different from that of the resistance change type memory film 23 is formed on the resistance change type memory film 23 by a vacuum film forming method.
Thereafter, the resistance change memory film 23 and the laminated film 24 are alternately laminated by a vacuum film forming method.

  As a fourth step, the electrode film 22b is laminated by a vacuum film forming method.

  Through these steps, the first embodiment of the second resistance change memory element of the present invention is manufactured.

  Next, the operation of the first embodiment of the second resistance change type storage element of the present invention will be described.

  First, the case where a film having a higher electrical resistivity than the resistance change memory film 23 is used as the laminated film 24 will be described.

  Here, the laminated film 24 is a film having a thickness (several nm) that allows electrons to pass through the laminated film 24 by a tunnel phenomenon according to an applied voltage.

  As described above, by increasing the interface between the resistance change memory film 23 and the laminated film 24 having a high electrical resistivity, electrons in the interface region due to the tunneling effect generated at the interface between the resistance change memory film 23 and the laminated film 24 can be obtained. Flow is suppressed. That is, the height and width of the Schottky barrier generated at the interface between the resistance change memory film 23 and the laminated film 24 can be controlled, and the interface trap level for trapping electrons can be controlled, thereby increasing the CER value. be able to.

  Next, a case where a film having a lower electrical resistivity than the resistance change memory film 23 is used as the laminated film 24 will be described.

  When a film having a low electrical resistivity is used for the laminated film 24, conduction electrons flow in the film thickness direction in the resistance change type memory film and the laminated film 24 according to the applied voltage, but the resistance change type memory film and its resistance change Since a film having a lower electric resistance than the type memory film periodically exists, the film flows by hopping conduction. Therefore, the height and width of the Schottky barrier generated at the interface between the resistance change memory film and the laminated film 24 can be controlled, and the interface trap level for trapping electrons can be controlled, thereby increasing the CER value. Can do.

  As described above, according to the first embodiment of the second resistance change type memory element of the present invention, the resistance change type memory film and the electrode film are formed by alternately laminating the resistance change type memory film and the laminated film. In addition to the interface formed between them, a large number of bonding interfaces formed of different materials formed between the resistance change memory film and the laminated film can be provided. As a result, the CER value can be increased as the Schottky barrier and the region for trapping electrons increase.

  Above, description of 1st Embodiment of the 2nd resistance change memory element of this invention is complete | finished, and 2nd Embodiment of 2nd resistance change type memory element of this invention is described.

  FIG. 16B is a cross-sectional view of the second embodiment of the resistance change memory element of the present invention.

  The difference from the first embodiment of the second resistance change type memory element of the present invention is that the resistance change type memory film is not an oxide single crystal, but a plurality of oxide crystals are the same on the semiconductor substrate. It grows with a grain size of 2 mm and is a polycrystal formed by closely adjoining adjacent crystal interfaces.

  Next, a manufacturing method of the second embodiment of the second resistance change type storage element will be described.

  Since the first to fourth steps are the same as those already described above with reference to FIGS. 5A to 5D, description thereof will be omitted.

  As a fifth step, not the electrode film but the laminated film 34 is grown by a vacuum film forming method.

  As the sixth step, thereafter, the resistance change memory film 33 is laminated by a vacuum film forming method in the same manner as in the first to fourth steps. Then, the resistance change memory film 33 and the laminated film 34 are alternately laminated.

  As a seventh step, the electrode film 32b is laminated by a vacuum film forming method.

  Through these steps, the second embodiment of the second resistance change memory element of the present invention is manufactured.

  Here, as described in the first embodiment of the second resistance change type memory element of the present invention, a film having a low electrical resistivity, a film having a high electrical resistivity, or an oxide film is used as the laminated film. Since this is the same, the description of the effect of the laminated film 34 is omitted.

  As described above, according to the second embodiment of the second resistance change memory element, the resistance change memory film is made polycrystalline so that the electron flow is discontinuous at the crystal interface between the polycrystals. And the CER value can be increased accordingly. In addition, variation in CER values can be suppressed by making the crystal sizes uniform.

  As described above, according to the present invention, it is possible to provide a resistance change type storage element in which a contrivance for increasing the CER value while suppressing variations in the CER value is provided.

The present invention has the following supplementary notes.
(Appendix 1)
In the resistance change type storage element that switches between a high resistance state and a low resistance state in which current flows more easily than the high resistance state according to an applied voltage, and selectively holds the high resistance state and the low resistance state.
A resistance change type memory film formed on a semiconductor substrate and formed of an oxide crystal that switches between the high resistance state and the low resistance state according to an applied voltage;
A laminated film alternately laminated with the resistance change type memory film and having an electric resistivity different from that of the resistance change type memory film;
The resistance variable memory film and a pair of electrode films for applying a voltage to the multilayer film, provided across the entire laminated structure including the resistance variable memory film and the multilayer film, A resistance change memory element.
(Appendix 2)
The resistance-change memory element according to appendix 1, wherein the resistance-change memory film is made of a single crystal of the oxide.
(Appendix 3)
The resistance change type memory film is made of a polycrystal in which a plurality of crystals made of an oxide are grown on the semiconductor substrate with the same grain size and adjacent crystal interfaces are formed in close contact with each other. The variable resistance memory element according to Supplementary Note 1, wherein
(Appendix 4)
The resistance change type memory element according to appendix 1, wherein the laminated film is a film having an electric resistivity lower than that of the resistance change type memory film.
(Appendix 5)
The resistance change memory element according to appendix 1, wherein the stacked film is a film having a higher electrical resistivity than the resistance change memory film.
(Appendix 6)
In the resistance change type storage element that switches between a high resistance state and a low resistance state in which current flows more easily than the high resistance state according to an applied voltage, and selectively holds the high resistance state and the low resistance state.
A resistance change type memory film made of a polycrystal formed on a semiconductor substrate, wherein a plurality of crystals made of an oxide grow on the semiconductor substrate with the same grain size, and adjacent crystal interfaces are formed in close contact with each other When,
A resistance change type storage element, comprising: a pair of electrode films disposed across the resistance change type storage film to apply a voltage to the resistance change type storage film.
(Appendix 7)
6. The resistance change memory element according to appendix 1 or 5, wherein the electrode film is made of single crystal or polycrystal.

It is a graph which shows the current-voltage characteristic of the resistance change memory element using a bipolar resistance change memory film. It is a graph which shows the current-voltage characteristic of the resistance change type memory element using a unipolar resistance change type memory film. 3 is a graph showing current-voltage characteristics for explaining a forming process of a resistance change type storage element using the same unipolar resistance change type storage film as in FIG. 2. It is sectional drawing of 1st Embodiment of the 1st resistance change memory element of this invention. It is a figure which shows the process of the manufacturing method of 1st Embodiment of the 1st resistance change memory element of this invention. 1 is a schematic diagram of a memory cell of a nonvolatile semiconductor memory device adopting a first embodiment of a first variable resistance memory element according to the present invention. FIG. 7 is a circuit diagram showing an example of a memory cell array in which the memory cells shown in FIG. 6 are arranged in a matrix. It is sectional drawing of 2nd Embodiment of the 1st resistance change memory element of this invention. It is a figure which shows the process of the manufacturing method of 2nd Embodiment of the 1st resistance change memory element of this invention. It is sectional drawing of 3rd Embodiment of the 1st resistance change memory element of this invention. It is a figure which shows the process of the manufacturing method of 3rd Embodiment of the 1st resistance change memory element of this invention. It is sectional drawing of 4th Embodiment of the 1st resistance change memory element of this invention. It is a figure which shows the process of the manufacturing method of 4th Embodiment of the 1st resistance change memory element of this invention. It is sectional drawing of 5th Embodiment of the 1st resistance change memory element of this invention. It is a figure which shows the process of the manufacturing method of 5th Embodiment of the 1st resistance change memory element of this invention. It is sectional drawing of 1st Embodiment and 2nd Embodiment of the 2nd resistance change memory element of this invention.

Explanation of symbols

1, 2, 3 Resistance change memory element 11, 21, 31 Semiconductor substrate 11a Si substrate 11b Etching pits 12a, 12b, 12c, 12d, 12e, 12f Electrode films 12g, 12h, 12i, 12j Electrode films 13, 23, 33 Resistance change type memory film 14 Island-like growth nucleus 15 Seed 16a Surface tension adjusting film 24, 34 Laminated film
100 Memory cell 101 Cell selection transistor 101a, 101b Drain terminal 101c Gate terminal BL, BL1, BL2, BL3, BL4 Bit lines SL, SL1, SL2, Bar SL1, Bar SL2 Source lines WL, WL1, WL2, Bar WL1, Bar WL2 Word line

Claims (5)

In the resistance change type storage element that switches between a high resistance state and a low resistance state in which current flows more easily than the high resistance state according to an applied voltage, and selectively holds the high resistance state and the low resistance state.
A resistance change type memory film formed on a semiconductor substrate and formed of an oxide crystal that switches between the high resistance state and the low resistance state according to an applied voltage;
A laminated film alternately laminated with the resistance change type memory film and having an electric resistivity different from that of the resistance change type memory film;
The resistance variable memory film and a pair of electrode films for applying a voltage to the multilayer film, provided across the entire laminated structure including the resistance variable memory film and the multilayer film, A resistance change memory element.   2. The resistance change memory element according to claim 1, wherein the resistance change memory film is made of a single crystal of the oxide.   The variable resistance memory film is made of a polycrystal in which a plurality of crystals made of an oxide are grown on the semiconductor substrate with the same grain size and adjacent crystal interfaces are formed in close contact with each other. The resistance change memory element according to claim 1. In the resistance change type storage element that switches between a high resistance state and a low resistance state in which current flows more easily than the high resistance state according to an applied voltage, and selectively holds the high resistance state and the low resistance state.
A resistance change type memory film made of a polycrystal formed on a semiconductor substrate, wherein a plurality of crystals made of an oxide grow on the semiconductor substrate with the same grain size, and adjacent crystal interfaces are formed in close contact with each other When,
A resistance change type storage element, comprising: a pair of electrode films disposed across the resistance change type storage film to apply a voltage to the resistance change type storage film.   5. The resistance change type memory element according to claim 1, wherein the electrode film is made of single crystal or polycrystal.

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