JP2007174148A - Amplifier - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide an amplifier adopting the LINC (Linear Amplification With Nonlinear Component) system, the composite loss of which is reduced. <P>SOLUTION: The length of transmission lines 24, 34 configuring a composite unit 14 is not limited to λ/4 but set to a length whereby impedance values Z23, Z33 when viewing the transmission lines 24, 34 from a composite point 16 are much greater. Concretely, a load impedance Z22 of an amplifier element 21 is matched by a matching circuit 23 and the transmission line 24 acts like enhancing the efficiency by load modulation when a phase angle is increased. Further, the matching circuit 23 converts the output impedance Z23 of the amplifier element 21 into an impedance different from the impedance Z22 and much greater than the impedance of the transmission line 24. The composite loss can be reduced by avoiding conjugate matching. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

The present invention relates to an amplifying apparatus, and more particularly, to an amplifying apparatus using a signal synthesizer with low synthesis loss.

Conventionally, when amplifying a radio frequency signal such as a CDMA signal or a multicarrier signal, a distortion compensation means is added to the common amplifier, and the operation range of the common amplifier is extended to the vicinity of the saturation region, thereby reducing power consumption. It was. As distortion compensation means, there are feedforward distortion compensation and predistortion distortion compensation. However, the distortion compensation alone is approaching the limit of low power consumption. Therefore, in recent years, attention has been paid to a LINC (Linear Amplification With Nonlinear Component) which is a kind of high efficiency amplifier (see, for example, Patent Document 1 and Non-Patent Documents 1 to 3).

FIG. 1 is a block diagram of a basic LINC amplifier.
The input signal input from the input terminal 10 is processed by the processing unit 11 so that the two output signals of the processing unit 11 have the same amplitude and the two vector composite waves have the amplitude and phase of the input signal. Then, the two output signals are amplified by the saturation type amplifiers 12 and 13, vector-summed by the synthesizer 14 ′, and output from the output terminal 15. Since the amplifier is a saturated type, it is a technique that can achieve high efficiency.

In a basic LINC amplifier, a hybrid or a 3 dB coupler is used for the synthesizer 14 ′, and a loss of 3 dB occurs at the time of synthesis. In other words, even if an efficient saturated amplifier is used, half is lost, and the efficiency is almost half that of the saturated amplifier.

Therefore, a Chireix synthesizer that couples the outputs of the amplifiers 12 and 13 without isolation is known (see, for example, Non-Patent Documents 3 to 4). When coupled via a λ / 4 line, the load impedances of the amplifiers 12 and 13 have reactance components having the same magnitude and opposite polarities when the combined phase is other than in-phase. The Chireix combiner compensates for this. It has a shunt reactance.

Japanese translation of PCT publication No. 2002-510927 Kaunisto Risto, "A vector-locked loop for power amplifier linearization", Microwave Symposium Digest, IEEE MTT-SInternational, (USA), June 2004, Vol.2, p.673-676 FH Raab, P. Asbeck, S. Cripps, PB Kenington, ZB Popovic, N. Pothecary, JF Sevic, and NOSokal, "Power amplifiers and transmitters for RF and microwave", IEEE Transactions on Microwave Theoryand Techniques, (USA), March 2002, Vol. 50, No.3, p. 814-826 F. H. Raab, "Efficiency of outphasing RFpower-amplifier systems", IEEE Transactions on Communications, October 1985, Vol. COM-33, No. 10, p. 1094-1099 Ilkka Hakala1, Leila Gharavi, Risto Kaunisto, "Chireix Power Combining with Saturated Class-B Power Amplifiers", [online], 2004, 12th GAAS Symposium-Amsterdam, [November 18, 2005 search], Internet <URL: http : //amsacta.cib.unibo.it/archive/00001005/01/GA042058.PDF> Boumaiza, S., Jing Li, F.M. Ghannouchi, "Implementation of Adaptive Digital / RF Predistorter Using Diredt LUTSynthesis", IEEE MTT-S, (USA), 2004, Vol. 2, p.681-684 W. Gerhard, R. Knochel, "Digital ComponentSeparator for W-CDMA-LINCTransmitters implemented on an FPGA", Advances in Radio Science, (Germany), Copernicus GmbH, 2005, Vol. 3, p. 239-246 Jaehyok Yi, Youngoo Yang, Bumman Kim, "Effect of efficiency optimization on linearity of LINC amplifiers with CDMA signal", IEEE MTT-S International Microwave Symposium Digest, (USA), 2001, Vol. 2, p. 1359-1362

In the conventional LINC amplifier, when a 3 dB coupler or the like is used for the combiner 15, an average loss of 3 dB occurs.
In addition, even when complete isolation is not possible when using a Chireix synthesizer, the best performance (maximum output, efficiency) is achieved using a high-power, high-frequency amplifier whose output and efficiency depend on the load impedance. , Overall evaluation of gain, distortion, etc.) was not obtained.
The present invention has been made from the above-described background, and an object thereof is to provide an amplifying apparatus whose performance is improved by using an improved synthesizer.

In the LINC amplifier, a processing unit that decomposes an input signal whose amplitude and phase change into two signals having substantially the same amplitude, first and second amplifiers that respectively amplify the decomposed signals, and And a synthesizer that connects and combines the outputs of the second amplifier with transmission lines of any length excluding λ / 4.

A processing unit for decomposing an input signal whose amplitude and phase are changed into two signals having substantially the same amplitude, first and second amplifiers for amplifying the decomposed signals, and the first and second amplifiers, respectively. A LINC-type amplifying apparatus comprising: a synthesizer that connects outputs to each other at transmission points via transmission lines of any length except λ / 4;
Each of the transmission lines has a characteristic impedance equal to approximately twice the load resistance connected to the composite point;
Each of the first and second amplifiers includes an output matching circuit that converts a specific (under conditions) load impedance of the amplification element included in the amplifier into an impedance that is substantially equal to the characteristic impedance, and as the phase angle increases, The amplifying apparatus described above, which can be converted into an efficient load impedance by a transmission line.

The length of each transmission line is set so that the combined loss is smaller than that when the length is λ / 4, and the efficiency is improved.

The amplification apparatus according to claim 1, wherein when the phase difference of the decomposed signal is large, the amplitude of the decomposed signal is reduced before being input to the first and second amplifiers.

The amplifying apparatus described above, further comprising a predistorter that compensates for non-linear distortion generated in the first and second amplifiers before the processing unit.

According to the signal synthesizer and the amplification device according to the present invention, it is possible to reduce the loss of the synthesizer and improve the performance of the amplification device by load modulation.

Hereinafter, embodiments of the present invention will be described through a plurality of examples. The function realization means described below may be any circuit or device as long as the function can be realized, and the function realization means may be realized by a plurality of circuits. You may implement | achieve with one circuit. Moreover, each Example does not prevent combining with description of the well-known literature referred in the specification.

FIG. 2 is a configuration diagram of the amplifying apparatus according to the first embodiment. The same components as those in FIG.
The processing unit 11 decomposes the input signal from the input terminal 10 into two signals S1 and S2 having the same amplitude and a vector sum similar to the input, and outputs the signals to the amplifiers 20 and 30, respectively. The signals S1 and S2 have, for example, a constant amplitude such that the amplification elements 21 and 31 operate at or near the saturation.
The amplifier 20 includes an input matching circuit 22, an amplification element 21, and an output matching circuit 23.
The input matching circuit 22 matches the signal S1 with the input impedance of the amplifying element 21 and outputs it.
The amplifying element 21 is biased to AB, B, or C class, and amplifies the signal S1 input from the input matching circuit 22.
The output matching circuit 23 couples the amplifying element 21 and the combiner 14 together with impedance conversion. The output matching circuit 23 usually converts a relatively low impedance of the amplifying element 21 into a relatively high impedance.

Similarly, the amplifier 30 includes an input matching circuit 32, an amplification element 31, and an output matching circuit 33. The amplifiers 20 and 30 have the same configuration. Similarly to S1, the other decomposed signal S2 passes through the input matching circuit 32, is amplified by the amplifier element 31 biased to class AB, B, or C, is matched by the output matching circuit 33, and is input to the combiner 14. Is done.

The combiner 14 includes transmission lines 24 and 34 and a combining point 16.
The transmission line 24 is a transmission line that connects the amplifier 20 and the synthesis point 16.
The transmission line 34 is a transmission line that connects the amplifier 30 and the synthesis point 16. The transmission lines 24 and 34 each have an optimized line length as will be described later.
The combining point 16 is a point that couples the transmission line 24, the transmission line 34, and the wiring to the output 15.
The amplified signals S1 and S2 are combined through transmission lines 24 and 34, respectively, and output from the output terminal 15.

In this embodiment, in order to suppress the synthesis loss, the impedances Z ₂₃ and Z ₃₃ viewed from the synthesis point 16 are increased so that the amplifiers are not affected via the synthesis point 16.
Therefore, the output impedance Z ₂₁ of the amplifying element 21, the output matching circuit 23 and the transmission line 24 of any length L, a converted into large impedance Z _23. The load impedance Z ₂₂ of the amplifying element 21 is matched by the output matching circuit 23 so that an output is output, but is not conjugated with the output impedance Z ₂₁ , but is separated from the conjugated Z ₂₁ .

The output impedance Z ₂₁ of the amplifying element 21 is the impedance when the amplifying element 21 is viewed from the output side, and the load impedance Z ₂₂ is the impedance when the amplifying element 21 is viewed from the output side. In general, it is known from load pull measurement that Z ₂₂ when the maximum output or maximum efficiency of the amplifying element is obtained does not necessarily coincide with the conjugate of Z ₂₁ .

In this embodiment, the load impedance Z ₂₂ is matched by the output matching circuit 23 and transmitted to the synthesis point by the transmission line 24 having the same characteristic impedance as that of the matched load impedance Z _24. Therefore, the matching of Z ₂₂ is performed by the output matching circuit 243. Can only be determined. On the other hand, the impedance Z ₂₃ as viewed from the combining point 16, impedance conversion by the output impedance Z ₂₁ of the matching circuit 23, since the rotation about the Z ₂₄ further transmission line 24, the Z ₂₃ the line length of the transmission line 24 The length can be set to be the highest. For example, Z ₂₄ is set to be approximately twice the load resistance R _L connected to the output terminal 15 or slightly larger. Line length, for example, set to Z ₂₃ is more than about 3 times the load resistance R _L.
The amplifier 30 side is similarly designed.
Therefore, almost all of the amplified signal S1 is transmitted to the output terminal 15 having a low impedance and does not leak to the amplifier 30 side, and there is no loss.

Since Z ₂₂ is far from the conjugate of Z ₂₁ , there is a possibility that it is somewhat inferior to the ability of the amplifying element, but in AB, B or C class, the load impedance and the output impedance Z ₂₁ that can obtain the maximum output or maximum efficiency are conjugate relation Therefore, the distance between Z ₂₂ and the conjugate of Z ₂₁ is determined by the amplification element and performance.
Further, when the impedance distance (distance between Z ₂₂ and the conjugate of Z ₂₁ ) cannot be sufficiently separated by the amplifying element, the leakage operation may become abnormal in the amplifying element 21, but in this case, the operation of the amplifier is changed to AB. The fluctuation is suppressed by the bias current of the amplifying element. Even in this case, the AB class saturated form is still sufficiently high even if inferior to the C class.

The amplification element 31 system is similarly performed.
In the operation described above, when the signals S1 and S2 are at the same level but the phases are significantly different, the load of each of the amplifying elements 21 and 31 causes a load fluctuation and the maximum depending on the load impedance viewed from the amplifying element. Although the output also varies, the lengths of the transmission lines 24 and 25 are adjusted so as to increase the efficiency. However, since the combined vector at that time is small, there is no problem even if the maximum output is reduced.
Accordingly, the efficiency of Z ₂₂ and Z ₃₂ when the phase angle is moved is increased while Z ₂₃ and Z ₃₃ are such that the mutual signals do not leak.
The electrical length L of the transmission lines 24 and 34 varies depending on the amplifying element and the output matching circuit and cannot be uniformly defined. Here, it is arbitrary, but the combined loss is improved as compared with the case where it is limited to λ / 4. It is desirable for the length to increase efficiency. However, this is not the case when the best point is obtained at λ / 4.
The amplifiers 20 and 30 may include a preamplifier for amplifying a low level signal on the input side.
The processing unit 11 is not limited to the one that receives an analog RF signal and separates it into signals S1 and S2, but may generate S1 and S2 from a digital signal, or may further perform frequency conversion using IF, and an amplifier. There is no particular limitation on the front stage.

The second embodiment is different from the first embodiment in that the processing unit 11 reduces the amplitude of the signals S1 and S2 when the input level is low.
FIG. 3 is a diagram illustrating the decomposition of the input signal into signals S1 and S2 in the processing unit 11 of the present embodiment.
S ₀ is the input signal to the processing unit 11, S1, S2 is a signal that is degraded in the conventional LINC amplifiers, such as Non-Patent Document 1 to 4, theta is the phase difference between S1 and S2. S11 and S22 are signals generated by the processing unit 11 of the present embodiment, and β is a phase difference between S11 and S22.
Conventionally, the levels of S1 and S2 are constant in order to use the amplifier in a constant saturation state. However, when the output level is reduced, the sensitivity is increased, and even if θ is 180 degrees, the output is theoretically zero, but in reality it is not zero. Therefore, S1 and S2 are made small so that the combined vector can be made small.

The processing unit 11 of this embodiment basically decomposes an input signal into two signals S11 and S22 having an amplitude A and a phase shifted by β / 2 and −β / 2 with respect to the input signal. The amplitude A may be reduced accordingly when the input signal is small. The amplitude A does not become zero.

Thus, by changing the amplitude A of the signals S11 and S22 and changing the phase angle accordingly, the phase difference β between the signals S11 and S22 becomes smaller than θ and it is easy to combine them.

FIG. 4 is a configuration diagram of an amplifying apparatus according to the third embodiment. This embodiment is a combination of the first and second embodiments and a predistortion compensation system.
The pre-distorter 1 adds predistortion to the signal (analogue or digital) input from the input terminal 6, and the amplification unit 2 (the processing unit 11 is the predistortion unit) similar to the amplification device of the first or second embodiment. May be placed on the output side of the output terminal 15, and may be supplied to the load of the output terminal 15 through the coupler 4.

The coupler 4 extracts a part of the output for a feedback signal and outputs it to the adaptive control unit 5.
The adaptive control unit 5 compares the feedback signal with the input signal to detect an error, or detects a distortion signal included in the feedback signal, so that the error (distortion) is reduced. The mode of distortion compensation of the data 1 is updated. There are various predistortion distortion compensation methods (see, for example, Non-Patent Document 5), and no particular attention is paid to the method here.

In a present Example, the process part 11 may produce | generate a signal like the nonpatent literatures 6-7.
According to the present embodiment, the amplitude can be appropriately controlled with small-scale hardware in the LINK amplifier. Further, the load modulation can be used positively to improve the efficiency, and since there is no interference between the amplifiers, the efficiency and distortion in the normal back-off can be improved.

Configuration diagram of a conventional LINC amplifier Configuration diagram of the amplifying device of Embodiment 1 The figure which shows decomposition | disassembly into the signals S1 and S2 of the input signal in the process part 11 of Example 2. FIG. Configuration diagram of amplifying device of Example 3

Explanation of symbols

DESCRIPTION OF SYMBOLS 1,100 Predistortion part 2 Amplification part 4 Coupler 5 Adaptive control part (Adaptive Controller)
10 Input Terminal
DESCRIPTION OF SYMBOLS 11 Processing part 12, 13, 20, 30 Amplifier 14 Synthesizer 15 Output terminal 21, 31 Amplifying element 22, 32 Input matching circuit 23, 33 Output matching circuit 24, 34 Transmission line

Claims (3)

In the LINC amplifier, a processing unit that decomposes an input signal whose amplitude and phase change into two signals having substantially the same amplitude, first and second amplifiers that respectively amplify the decomposed signals, and And a synthesizer that connects and combines the outputs of the second amplifier with transmission lines of any length excluding λ / 4. 2. The amplifying apparatus according to claim 1, wherein when the phase difference of the decomposed signal is large, the amplitude of the decomposed signal is reduced before being input to the first and second amplifiers. 3. The amplifying apparatus according to claim 1, further comprising a predistorter that compensates for non-linear distortion generated in the first and second amplifiers before the processing unit.

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