JP2007173270A - Semiconductor device, and method of manufacturing same - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a semiconductor device wherein, even if an antenna circuit is formed, antenna characteristic or operating frequency can be adjusted at a design value, and to provide a method of manufacturing the same. <P>SOLUTION: The semiconductor device is provided with a semiconductor substrate having an electrode at least on one surface, an insulating resin layer formed in such a manner as to cover one surface of the semiconductor substrate, a conductor which is electrically connected to the electrode, and a dielectric layer which is formed in such a manner as to cover the insulating resin layer and the conductor. In this case, a part of the conductor constitutes a region to function as an antenna circuit, and a local concave is formed adjacent to at least the antenna circuit of the dielectric layer. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a semiconductor device including a small antenna circuit for a non-contact IC tag and a method for manufacturing the same, and particularly to facilitate adjustment of antenna characteristics after manufacturing.

  Wireless contactless tags equipped with semiconductor chips are spreading from the fields such as the security department and the logistics department from the viewpoint of the amount and type of data that can be handled and the processing speed. The tag for wireless authentication has an IC chip that stores ID data and is driven by power, and receives a radio wave transmitted from the interrogator, converts it into IC driving power, and returns data in the IC chip. It consists of an antenna. These were originally non-contact tags after a process of connecting the connection portion between the IC chip and the antenna, but the antenna was formed on the semiconductor chip using a wafer level-chip scale package (hereinafter referred to as WL-CSP) technology. (On-chip antenna) is being actively developed (for example, Patent Document 1).

  This on-chip antenna can be downsized because the IC chip size is the size of the tag, and the connection between the IC chip and the antenna is established when the antenna is formed. There are excellent points such as excellent reliability. Further, from the viewpoint of miniaturization, development has been performed for the purpose of reducing the antenna size by using a high dielectric material around the wiring material (for example, Patent Document 2).

Conventionally, this on-chip antenna has been designed to operate with a minimum loss in the operating frequency range by analyzing the characteristic values using a simulator at the time of design. As a result, the target characteristic value cannot be obtained, and the characteristic frequency is shifted. In the existing antenna manufacturing technology, it is possible to change the characteristic value by adjusting the antenna wiring length and bring it closer to the target value. However, the on-chip antenna adopts the fine structure of WL-CSP technology. Therefore, adjustment by cutting the antenna wiring length after wiring formation is difficult, and since the IC is sealed together with the on-chip antenna, it is also difficult to adjust the antenna characteristics by trimming on the IC side. For this reason, there are drawbacks such as a decrease in yield of on-chip antennas operating at the operating frequency.
JP 2002-83894 A JP 9-36639 A

  The present invention has been devised in view of such a conventional situation, and a semiconductor device and a manufacturing method thereof capable of adjusting an antenna characteristic and a use frequency to a design value even after forming an antenna circuit. The purpose is to provide.

A semiconductor device according to claim 1 of the present invention is provided on a semiconductor substrate provided with an electrode on at least one surface, an insulating resin layer provided so as to cover one surface of the substrate, the insulating resin layer, A conductive portion electrically connected to the electrode; and a dielectric layer provided so as to cover the conductive portion and the insulating resin layer, and a portion of the conductive portion constitutes a portion that functions as an antenna circuit. A local recess is formed at least in the vicinity of the antenna circuit of the dielectric layer.
According to a second aspect of the present invention, in the semiconductor device according to the first aspect, a sealing resin layer is provided on the dielectric layer so as to fill at least the concave portion.
According to a third aspect of the present invention, in the semiconductor device according to the first or second aspect, the recess is uniformly formed on the upper surface of the dielectric layer.
According to a fourth aspect of the present invention, there is provided a method for manufacturing a semiconductor device, comprising: forming an insulating resin layer so as to cover one surface of a semiconductor substrate having an electrode on at least one surface; and the electrode on the insulating resin layer. A step of forming a conductive portion that is electrically connected and a part of which functions as an antenna circuit, a step of forming a dielectric layer so as to cover the conductive portion and the insulating resin layer, and the antenna circuit And a step of forming a local recess at least in the vicinity of the antenna circuit of the dielectric layer according to the measurement result.
According to a fifth aspect of the present invention, there is provided a method for manufacturing a semiconductor device according to the fourth aspect, wherein the recess is formed by a non-contact means.

  In the present invention, after the antenna circuit is formed, the antenna characteristics are measured, and a recess is formed in the dielectric layer near the circuit according to the result. Thereby, the ratio of the wavelength shortening effect of the antenna circuit can be adjusted, and the antenna characteristics and the use frequency can be adjusted. As a result, a semiconductor device having predetermined antenna characteristics can be obtained.

  Hereinafter, an embodiment of a semiconductor device according to the present invention will be described with reference to the drawings.

FIG. 1 is a cross-sectional view showing an example of a semiconductor device of the present invention.
In this semiconductor device 10, an electrode 2 and a passivation film 3 of an integrated circuit (IC, not shown) are formed on the surface of a semiconductor substrate 1 on which an integrated circuit (not shown) is formed.
Further, the semiconductor device 10 is provided so as to cover the insulating resin layer 11 provided on the passivation film 3 of the semiconductor substrate 1, the conductive layer 12 provided on the insulating resin layer 11, and the conductive layer 12. And a sealing resin layer 14 provided so as to cover the dielectric layer 13. The conductive layer 12 has an antenna circuit 12a.

In the semiconductor device of the present invention, a local recess 13a is formed at least in the vicinity of the antenna circuit of the dielectric layer 13.
The recess 13a is formed by measuring the antenna characteristics and the use frequency after forming the antenna circuit, and processing the dielectric layer 13 in the vicinity of the circuit according to the result. Thereby, the ratio of the wavelength shortening effect of the antenna circuit can be adjusted, and the antenna characteristics and the use frequency can be adjusted. As a result, a semiconductor device having predetermined antenna characteristics can be obtained.

In a semiconductor device having an antenna circuit, the wiring length of the antenna circuit can be adjusted by using the relative permittivity of a material around the antenna circuit (wavelength reduction effect).
For example, in a coaxial cable, if an insulator between a core wire and a mesh wire has a relative dielectric constant ε _r at a use frequency f, a radio wave having a physical wavelength λ _{0 has} an electrical wavelength λ in the cable.

For example, when a material having a relative dielectric constant of 1.5 at the operating frequency is used, the wiring length necessary for resonance can be reduced by about 20%, and the antenna element can be downsized accordingly.
By utilizing the above characteristics and processing the dielectric layer provided around the antenna circuit, it is possible to adjust the antenna characteristics and the operating frequency that deviate from the design values to the original design values.

  The recess 13 a is preferably formed uniformly on the upper surface of the dielectric layer 13. By forming the recess 13a uniformly on the upper surface of the dielectric layer 13, the reflectance increases due to a sudden change in the impedance of the wiring, and the resulting voltage standing wave ratio (VSWR) decreases. Gain reduction can be suppressed.

  The on-chip antenna having such a structure acts as an electric field antenna, and the total wiring length is ½ times the wavelength considering the effect of shortening the wavelength by the effective dielectric constant of the insulating layer and the magnetic layer around the antenna. Alternatively, a frequency that is ¼ times the resonance frequency.

The semiconductor substrate 1 is provided with, for example, an Al pad as an electrode 2 on at least one surface of a base material 1a whose surface layer forms an insulating portion (not shown), and further a passivation film 3 (passivation) such as SiN or SiO ₂ on the surface. Insulating film) is formed. The passivation film 3 is provided with an opening 3a at a position aligned with the electrode 2, and the electrode 2 is exposed through the opening 3a. The passivation film 3 can be formed by, for example, the LP-CVD method, and the film thickness is, for example, 0.1 to 0.5 μm.

  The semiconductor substrate 1 may be a semiconductor wafer such as a silicon wafer, or may be a semiconductor chip obtained by cutting (dicing) the semiconductor wafer into chip dimensions. When the semiconductor substrate 1 is a semiconductor chip, first, a plurality of semiconductor elements, ICs, induction elements, etc. are formed on a semiconductor wafer and then cut into chip dimensions to obtain a plurality of semiconductor chips. Can do.

The insulating resin layer 11 has an opening 11 a formed at a position aligned with each electrode 2. The insulating resin layer 11 is made of, for example, a polyimide resin, an epoxy resin, a silicone resin, or the like, and has a thickness of, for example, 1 to 30 μm.
The insulating resin layer 11 can be formed by, for example, a spin coating method, a printing method, a laminating method, or the like. The opening 11a can be formed, for example, by patterning using a photolithography technique.

  The conductive layer 12 has an antenna circuit 12a. One end of the conductive layer 12 penetrates the insulating resin layer 11 through the opening 11 a and is electrically connected to the electrode 2.

  The pattern of the antenna circuit 12a has a spiral or meander shape, and the wiring length is equal to or shorter than 1/2 and 1/4 times the wavelength considering the effect of wavelength shortening by the insulating layer around the antenna. It has become.

  As the material of the conductive layer 12, for example, Cu or the like is used, and the thickness thereof is, for example, 1 to 20 μm. Thereby, sufficient electrical conductivity is obtained. The conductive layer 12 can be formed by, for example, a plating method such as an electrolytic copper plating method, a sputtering method, a vapor deposition method, or a combination of two or more methods.

As a material of the dielectric layer 13, a material having a relative dielectric constant of 1.5 or more is preferable, and as such a material, for example, polyimide, lead oxide (PbO), epoxy or the like is used, and the thickness thereof is About 1 to 2 times the Cu layer described above, specifically about 1 to 40 μm. The dielectric layer 13 can be formed by, for example, a spin coating method, a printing method, a laminating method, or the like.
In addition, as described above, the recess 13a for adjusting antenna characteristics is locally formed on the upper surface of the dielectric layer 13.

The sealing resin layer 14 is made of, for example, polyimide resin, epoxy resin, silicone resin, or the like, and the thickness thereof is, for example, 10 to 15 μm. The sealing resin layer 14 is provided with an opening (not shown) for outputting a terminal to the outside.
The sealing resin layer 14 is preferably provided on the upper surface of the dielectric layer 13 so as to fill at least the concave portion 13a. When the recess 13a is filled with the sealing resin layer, handling during pick-up of the semiconductor chip can be improved.

Next, a method for manufacturing the semiconductor device shown in FIG. 1 will be described.
First, as shown in FIG. 2A, a semiconductor substrate 1 having an integrated circuit (not shown), an electrode 2 and a passivation film 3 is prepared. As described above, the semiconductor substrate 1 has the electrode 2 and the passivation film 3 formed on one surface of the substrate 1 a, and the passivation film 3 is provided with the opening 3 a at a position aligned with the electrode 2. It is a semiconductor wafer. The passivation film 3 is formed by, for example, LP-CVD, and the film thickness is, for example, 0.1 to 0.5 μm.

Next, as shown in FIG. 2B, an insulating resin layer 11 having an opening 11 a is formed on the passivation film 3 of the semiconductor substrate 1. The thickness is, for example, 1 to 30 μm.
Such an insulating resin layer 11 is formed by, for example, forming a film made of the above resin on the entire surface of the semiconductor substrate 1 by, for example, a spin coating method, a printing method, a laminating method, etc., and then patterning using a photolithography technique, for example. It can be formed by forming the opening 11a at a position aligned with the electrode 2.

  Next, as shown in FIG. 2C, a conductive layer 12 is formed on the insulating resin layer 11. The thickness is, for example, 1 to 20 μm. The method for forming the conductive layer 12 in a predetermined region is not particularly limited, but for example, the following method can be used.

Here, an example of a suitable method for forming the conductive layer 12 will be described.
First, a thin seed layer (not shown) for electrolytic plating is formed on the entire surface of the insulating resin layer 11 or a necessary region by sputtering or the like. The seed layer is, for example, a laminated body made of a Cu layer and a Cr layer formed by a sputtering method, or a laminated body made of a Cu layer and a Ti layer. Further, it may be an electroless Cu plating layer, a metal thin film layer formed by a vapor deposition method, a coating method, a chemical vapor deposition method (CVD), or the like, or a combination of the above metal layer forming methods. Good.

  Next, a resist film (not shown) for electrolytic plating is formed on the seed layer. The resist film is provided with an opening in a region where the conductive layer 12 is to be formed, and the seed layer is exposed in the opening. The resist film can be formed by, for example, patterning using a photolithography technique, a method of laminating a film resist, a method of spin-coating a liquid resist, or the like.

  Then, a conductive layer 12 made of Cu or the like is formed on the exposed seed layer using the resist film as a mask by an electrolytic plating method or the like. As described above, after the conductive layer 12 is formed in a desired region, unnecessary resist films and seed layers are removed by etching, and the insulating resin layer 11 is exposed in portions other than the region where the conductive layer 12 is formed. (See FIG. 2 (e)).

Then, as shown in FIG. 2D, a dielectric layer 13 is formed on the conductive layer 12. The thickness is about 1 to 2 times that of the Cu layer described above, specifically about 1 to 40 μm.
Such a dielectric layer 13 can be formed, for example, by a film made of the above resin by, for example, a spin coating method, a printing method, a laminating method, or the like.

  Then, antenna characteristics and frequency used are measured and evaluated.

  Then, as shown in FIG. 2 (e), the dielectric near the antenna circuit of the tag with respect to the tag in which the deviation from the target characteristic value or the shift of the characteristic frequency is observed according to the measurement result of the antenna characteristic or the use frequency. The thickness of the layer 13 is locally changed. Specifically, a local recess 13 a is formed on the upper surface of the dielectric layer 13. As a result, the antenna characteristics and the operating frequency are adjusted to the original set values.

  Such a recess 13a is preferably formed by non-contact means from the viewpoint of the adjustment range of the characteristic value if the processing accuracy of the apparatus is up to the wiring width or less. Thereby, the recess 13a can be formed in the dielectric layer 13 without destroying the fine wiring structure by WL-CSP and the underlying IC.

The non-contact means is not particularly limited, and various methods such as ultrasonic waves, shock waves, high frequencies, electromagnetic fields, light, infrared rays, and lasers can be used. For example, a technique for processing a resin using a laser such as UV, CO ₂ , YAG, or KrF excimer is widely used in the manufacture of semiconductor packages and printed boards.

By forming the recess 13a in this way, it is possible to adjust the antenna characteristics and the operating frequency as originally designed. Further, when it is necessary to process the dielectric layer 13 until the conductive layer is exposed depending on the adjustment range, it is necessary to perform sealing using a resin having a low dielectric constant for the sealing resin layer. In that case, it is necessary to perform processing in consideration of the influence of the sealing resin layer having a low dielectric constant.
Also, assuming that the thickness of the dielectric layer 13 near the antenna circuit is changed from the beginning, the wiring length is designed to be longer than the wiring length at the intended frequency of use, and the characteristic values and the usage frequency are adjusted after the dielectric layer is formed. May be.

Then, as shown in FIG. 2F, an insulating sealing resin layer 14 is formed on the dielectric layer 13 so as to fill at least the recess 13a. The thickness is, for example, 1 to 30 μm.
Such a sealing resin layer 14 can be formed, for example, by patterning a photosensitive resin such as a photosensitive polyimide resin by a photolithography technique. In addition, the formation method of the sealing resin layer 14 is not limited to this method.

Since the semiconductor device obtained as described above has the local recess 13a formed in the dielectric layer 13 according to the measurement result of the antenna characteristics after the antenna circuit is formed, the ratio of the wavelength shortening effect of the antenna circuit The antenna characteristics can be adjusted by adjusting. As a result, this semiconductor device has antenna characteristics as originally designed.
By finely adjusting the antenna in this way, defective products can be operated and yield can be improved. Further, the antenna area and structure will be reduced with the miniaturization of the IC in the future, and the operation of the antenna can be established even if the difficulty of process accuracy increases.

Although the semiconductor device of the present invention has been described above, the present invention is not limited to this, and can be appropriately changed without departing from the spirit of the invention.
For example, the material constituting the dielectric layer is not limited to the dielectric material, and may be any material that has a relative dielectric constant of 1.5 or more and can be processed in a non-contact manner. But you can.

  Further, the present invention not only adjusts antenna characteristics and operating frequencies, but also provides characteristic values of passive elements (for example, inductors, capacitors, and resistance elements) that employ the same structure, and devices that combine a plurality of passive elements that employ the structure. It can also be used to adjust the operating frequency.

  1 illustrates only a portion corresponding to one antenna circuit on a semiconductor substrate, the present invention can also be applied to a semiconductor device including a plurality of antenna circuits. Although not shown, structures such as output terminals to the outside such as bumps can be added to the semiconductor device of the present invention on the sealing resin layer 14 as necessary.

  The present invention can be applied to various semiconductor devices having an antenna circuit, such as RFID (Radio Frequency Identification), wireless LAN, and data transmission between stacked chips.

It is sectional drawing which shows an example of the semiconductor device of this invention. FIG. 2 is a cross-sectional view showing an example of a method for manufacturing the semiconductor device shown in FIG.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Semiconductor substrate, 2 Electrode, 3 Passivation film | membrane, 10 Semiconductor device, 11 Insulating resin layer, 12 Conductive layer, 12a Antenna circuit, 13 Dielectric layer, 13a Recessed part, 14 Sealing resin layer

Claims (5)

A semiconductor substrate having electrodes on at least one surface;
An insulating resin layer provided to cover one surface of the substrate;
A conductive portion provided on the insulating resin layer and electrically connected to the electrode;
A dielectric layer provided so as to cover the conductive portion and the insulating resin layer,
A part of the conductive portion constitutes a portion that functions as an antenna circuit, and a local recess is formed at least in the vicinity of the antenna circuit of the dielectric layer.   The semiconductor device according to claim 1, wherein a sealing resin layer is provided on the dielectric layer so as to fill at least the recess.   The semiconductor device according to claim 1, wherein the recess is uniformly formed on an upper surface of the dielectric layer. Forming an insulating resin layer so as to cover one surface of a semiconductor substrate having electrodes on at least one surface;
On the insulating resin layer, a step of forming a conductive portion that is electrically connected to the electrode and part of the portion functions as an antenna circuit;
Forming a dielectric layer so as to cover the conductive portion and the insulating resin layer;
Measuring antenna characteristics of the antenna circuit;
Forming a local recess at least in the vicinity of the antenna circuit of the dielectric layer in accordance with the measurement result. 5. The method of manufacturing a semiconductor device according to claim 4, wherein the recess is formed by non-contact means.

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