JP2007166715A - Battery pack and charging method thereof - Google Patents

Battery pack and charging method thereof Download PDF

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JP2007166715A
JP2007166715A JP2005356699A JP2005356699A JP2007166715A JP 2007166715 A JP2007166715 A JP 2007166715A JP 2005356699 A JP2005356699 A JP 2005356699A JP 2005356699 A JP2005356699 A JP 2005356699A JP 2007166715 A JP2007166715 A JP 2007166715A
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field effect
charge
discharge
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JP4812419B2 (en
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Tsukasa Takahashi
司 高橋
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Sony Corp
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    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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    • Y02E60/10—Energy storage using batteries

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Abstract

<P>PROBLEM TO BE SOLVED: To improve power loss during charging, eliminate damage due to an inrush current by a potential difference between a plurality of serial-connection battery blocks, and to further extend discharging time. <P>SOLUTION: A positive terminal of a first battery block in which a plurality of secondary batteries are connected in series is connected to first and second field effect transistors in series. The second field effect transistor is connected to a charge/discharge positive terminal. A negative terminal of the first series-connected battery block is connected to a charge/discharge negative terminal. The positive terminal of the second battery block in which the plurality of secondary batteries are connected in series is connected to third and fourth field effect transistors in series. The fourth field effect transistor is connected to the charge/discharge positive terminal. The negative terminal of the second series-connected battery block is connected to the charge/discharge terminal. The voltage of the first and second series-connected battery blocks is read. A control microcomputer for controlling the first, second, third, and fourth field effect transistors is provided. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

本発明は、比較的大容量の電池パック及び電池パックの充電方法に関する。   The present invention relates to a battery pack having a relatively large capacity and a method for charging the battery pack.

一般に、比較的大容量の電池パックを得るのに、複数の２次電池が直列接続された直列接続電池ブロックを複数個並列接続する構成が取られている。この複数の２次電池が直列接続された直列接続電池ブロックを複数個並列接続する場合、この複数個の直列接続電池ブロック間に電位差があるときには、電位の高い直列接続電池ブロックから電位の低い直列接続電池ブロックに突入電流が流れ込む。   Generally, in order to obtain a battery pack having a relatively large capacity, a configuration is adopted in which a plurality of series-connected battery blocks in which a plurality of secondary batteries are connected in series are connected in parallel. When a plurality of series-connected battery blocks in which a plurality of secondary batteries are connected in series are connected in parallel, and there is a potential difference between the plurality of series-connected battery blocks, the series connection battery block having a high potential is connected in series with a low potential. Inrush current flows into the connected battery block.

この突入電流が流れ込んだときは、この電流は直列接続電池ブロックの内部インピーダンスに制限されるのみで、電位の低い直列接続電池ブロックは、この突入電流によりダメージを与えられる。   When this inrush current flows, this current is limited only to the internal impedance of the series connection battery block, and the series connection battery block having a low potential is damaged by this inrush current.

そこで、従来の電池パックは図４に示す如き構成を取っていた。図４において、１、２及び３は夫々複数個例えば４個の２次電池が直列接続された直列接続電池ブロックを示し、この直列接続電池ブロック１、２及び３の夫々の正極端子を逆流防止用のダイオード４ａ、５ａ及び６ａの夫々のカソードに接続し、この逆流防止用のダイオード４ａ、５ａ及び６ａの夫々のアノードを充電時に正の直流電圧が供給される充電正極端子７に接続する。   Therefore, the conventional battery pack has a configuration as shown in FIG. In FIG. 4, 1, 2, and 3 indicate a series connection battery block in which a plurality of, for example, 4 secondary batteries are connected in series, and the positive terminal of each of the series connection battery blocks 1, 2, and 3 is prevented from backflow. The diodes 4a, 5a and 6a are connected to the cathodes, and the anodes of the backflow preventing diodes 4a, 5a and 6a are connected to the charging positive terminal 7 to which a positive DC voltage is supplied during charging.

また、この直列接続電池ブロック１、２及び３の夫々の正極端子を逆流防止用のダイオード４ｂ、５ｂ及び６ｂの夫々のアノードに接続し、この逆流防止用のダイオード４ｂ、５ｂ及び６ｂの夫々のカソードを放電時に正の直流電圧を放電する放電正極端子８に接続する。   Further, the positive terminals of the series-connected battery blocks 1, 2, and 3 are connected to the anodes of the backflow prevention diodes 4b, 5b, and 6b, respectively, and the backflow prevention diodes 4b, 5b, and 6b are respectively connected. The cathode is connected to a discharge positive terminal 8 that discharges a positive DC voltage when discharging.

この直列接続電池ブロック１、２及び３の夫々の負極端子を充電時及び放電時に負極端子となる充放電負極端子９に夫々接続する。   The negative terminal of each of the series-connected battery blocks 1, 2, and 3 is connected to a charge / discharge negative terminal 9 that becomes a negative terminal during charging and discharging, respectively.

この図４の従来例においては、充電時は、充電正極端子７よりの充電電流によりダイオード４ａ、５ａ及び６ａを介して直列接続電池ブロック１、２及び３が充電され、放電時は、直列接続電池ブロック１、２及び３からの夫々の放電電流は、ダイオード４ｂ、５ｂ及び６ｂを介し、放電正極端子８を介して負荷に放電される。   In the conventional example of FIG. 4, when connected, the series connection battery blocks 1, 2 and 3 are charged via the diodes 4a, 5a and 6a by the charging current from the charging positive terminal 7, and when discharging, the series connection battery blocks 1, 2 and 3 are connected in series. The respective discharge currents from the battery blocks 1, 2 and 3 are discharged to the load via the discharge positive terminal 8 via the diodes 4b, 5b and 6b.

この図４例では、直列接続電池ブロック１、２及び３間に電位差があっても、逆流防止用のダイオード４ａ、５ａ、６ａ及び４ｂ、５ｂ、６ｂがあるので、直列接続電池ブロック１、２及び３間に電流が流れることがなく、突入電流が流れることがなく、各直列接続電池ブロック１、２、３にダメージを与えることがない。   In the example of FIG. 4, even if there is a potential difference between the series-connected battery blocks 1, 2, and 3, there are diodes 4 a, 5 a, 6 a and 4 b, 5 b, 6 b for preventing backflow. And no current flows between 3 and 3, no inrush current flows, and no damage is caused to each of the series-connected battery blocks 1, 2, and 3.

また、特許文献１には、直並列に接続された複数個の２次電池に対して、個々に電池電圧を検出する手段と、２次電池の直列回路によって構成される並列回路毎の充電電流を検知する手段を設け、これら検出された電池電圧あるいは充電電圧に基づいて、個々の電池毎に充電電流を制御する手段と並列回路毎に充電出力を制御する手段を設けており、定電流定電圧充電したときは、２次電池毎の電池電圧の変化を検出し、２次電池毎の充電電流を制御し、並列回路毎の充電電流の変化を検出し、並列回路毎の充電出力を制御するようにしたものが開示されている。   Further, Patent Document 1 discloses a charging current for each parallel circuit configured by means for individually detecting a battery voltage and a series circuit of secondary batteries for a plurality of secondary batteries connected in series and parallel. And a means for controlling the charging current for each battery and a means for controlling the charging output for each parallel circuit based on the detected battery voltage or charging voltage. When voltage charging is performed, changes in battery voltage for each secondary battery are detected, charging current for each secondary battery is controlled, changes in charging current for each parallel circuit are detected, and charging output for each parallel circuit is controlled What has been made to be disclosed is disclosed.

この特許文献１に開示されたものは、過充電、過放電を防止するようにしたもので、複数個の直列接続電池ブロック間に電位差があり、この電位の低い直列接続電池ブロックへの突入電流を阻止するようにしたものではない。
特開平１０−３０４５８６号公報 The one disclosed in Patent Document 1 is designed to prevent overcharge and overdischarge, and there is a potential difference between a plurality of series-connected battery blocks, and an inrush current to the series-connected battery block having a low potential. It is not intended to prevent.
JP-A-10-304586

然しながら、図４従来例においては、放電時の放電電流により逆流防止用のダイオード４ｂ、５ｂ及び６ｂにおいて、電力損失を生じる。即ち、逆流防止用のダイオード４ｂ、５ｂ及び６ｂの放電電流をＩとし、このダイオード４ｂ、５ｂ及び６ｂのスレッシュホールド電圧をＶfとしたとき、Ｉ×Ｖfの電力損失が発生する。   However, in the conventional example shown in FIG. 4, power loss occurs in the backflow prevention diodes 4b, 5b and 6b due to the discharge current during discharge. That is, assuming that the discharge current of the diodes 4b, 5b and 6b for backflow prevention is I and the threshold voltage of the diodes 4b, 5b and 6b is Vf, a power loss of I × Vf occurs.

この電力損失は、このダイオード４ｂ、５ｂ及び６ｂのスレッシュホールド電圧Ｖfが例えば０．６Ｖと比較的大きく、放電電流Ｉが大きくなれば成る程大きくなり、大容量の電池パックでは無視できない程大きくなる不都合があった。   This power loss increases as the threshold voltage Vf of the diodes 4b, 5b, and 6b is relatively large, for example, 0.6V, and the discharge current I increases, and becomes so large that it cannot be ignored in a large-capacity battery pack. There was an inconvenience.

また、直列接続電池ブロック１、２及び３はダイオード４ａ、５ａ、６ａ及び４ｂ、５ｂ、６ｂで分離されているため接続時の容量バランスのバラツキは改善されることがなく、この直列接続電池ブロック１、２及び３の容量バランスが崩れた状態で充放電が行われることは、放電時に過放電防止回路があるときには、容量の低い直列接続電池ブロックに放電時間が左右されることにのり、放電時間が短くなる等の不都合があった。   Further, since the series connection battery blocks 1, 2 and 3 are separated by the diodes 4a, 5a, 6a and 4b, 5b, 6b, the variation in capacity balance at the time of connection is not improved. Charging / discharging in the state where the capacity balance of 1, 2 and 3 is lost means that when there is an overdischarge prevention circuit at the time of discharge, the discharge time depends on the low-capacity series-connected battery block. There were inconveniences such as shortening the time.

本発明は、斯かる点に鑑み、放電時の電力損失を改善すると共に複数個の直列接続電池ブロック間の電位差による突入電流によりダメージを受けないようにし、更に放電時間を延長できるようにすることを目的とする。   In view of the above, the present invention improves power loss during discharging, prevents damage from inrush current due to a potential difference between a plurality of series-connected battery blocks, and further extends the discharge time. With the goal.

本発明電池パックは、複数の２次電池が直列接続された第１の直列接続電池ブロックの正極端子を第１の電界効果トランジスタのドレイン端子に接続し、この第１の電界効果トランジスタのソース端子を第２の電界効果トランジスタのソース端子に接続し、この第２の電界効果トランジスタのドレイン端子を充放電正極端子に接続し、この第１の直列接続電池ブロックの負極端子を充放電負極端子に接続し、複数の２次電池が直列接続された第２の直列接続電池ブロックの正極端子を第３の電界効果トランジスタのドレイン端子に接続し、この第３の電界効果トランジスタのソース端子を第４の電界効果トランジスタのソース端子に接続し、この第４の電界効果トランジスタのドレイン端子をこの充放電正極端子に接続し、この第２の直列接続電池ブロックの負極端子をこの充放電負極端子に接続し、この第１及び第２の直列接続電池ブロックの電圧を読み取ると共にこの第１、第２、第３及び第4の電界効果トランジスタを制御する制御マイクロコンピュータを設けたものである。   The battery pack of the present invention connects the positive terminal of a first series-connected battery block in which a plurality of secondary batteries are connected in series to the drain terminal of the first field effect transistor, and the source terminal of the first field effect transistor Is connected to the source terminal of the second field effect transistor, the drain terminal of the second field effect transistor is connected to the charge / discharge positive terminal, and the negative terminal of the first series-connected battery block is connected to the charge / discharge negative terminal. The positive terminal of the second series-connected battery block in which a plurality of secondary batteries are connected in series is connected to the drain terminal of the third field effect transistor, and the source terminal of the third field effect transistor is connected to the fourth terminal. And the drain terminal of the fourth field effect transistor is connected to the charge / discharge positive terminal, and the second series connection is connected to the source terminal of the field effect transistor. The negative terminal of the battery block is connected to the charge / discharge negative terminal, the voltages of the first and second series-connected battery blocks are read, and the first, second, third and fourth field effect transistors are controlled. A control microcomputer is provided.

また、本発明電池パックの充電方法は、複数の２次電池が直列接続された第１の直列接続電池ブロックの正極端子を第１の電界効果トランジスタのドレイン端子に接続し、この第１の電界効果トランジスタのソース端子を第２の電界効果トランジスタのソース端子に接続し、この第２の電界効果トランジスタのドレイン端子を充放電正極端子に接続し、この第１の直列接続電池ブロックの負極端子を充放電負極端子に接続し、複数の２次電池が直列接続された第２の直列接続電池ブロックの正極端子を第３の電界効果トランジスタのドレイン端子に接続し、この第３の電界効果トランジスタのソース端子を第４の電界効果トランジスタのソース端子に接続し、この第４の電界効果トランジスタのドレイン端子をこの充放電正極端子に接続し、この第２の直列接続電池ブロックの負極端子をこの充放電負極端子に接続し、この第１及び第２の直列接続電池ブロックの電圧を読み取ると共にこの第１、第２、第３及び第4の電界効果トランジスタを制御する制御マイクロコンピュータを設けた電池パックの充電方法であって、この第１及び第２の直列接続電池ブロックの電圧を比較し、電圧の低い方を先に充電し、電圧が等しくなったときに同時に充電するようにしたものである。   In the battery pack charging method of the present invention, the positive terminal of the first series-connected battery block in which a plurality of secondary batteries are connected in series is connected to the drain terminal of the first field effect transistor, and the first electric field is supplied. The source terminal of the effect transistor is connected to the source terminal of the second field effect transistor, the drain terminal of the second field effect transistor is connected to the charge / discharge positive terminal, and the negative terminal of the first series-connected battery block is connected Connected to the charge / discharge negative electrode terminal, the positive terminal of the second series-connected battery block in which a plurality of secondary batteries are connected in series is connected to the drain terminal of the third field effect transistor. Connecting the source terminal to the source terminal of the fourth field effect transistor, connecting the drain terminal of the fourth field effect transistor to the charge / discharge positive electrode terminal; The negative terminal of the second series-connected battery block is connected to the charge / discharge negative terminal, the voltages of the first and second series-connected battery blocks are read, and the first, second, third and fourth A battery pack charging method provided with a control microcomputer for controlling a field effect transistor, comparing the voltages of the first and second series-connected battery blocks, charging the lower one first, When they are equal, they are charged at the same time.

本発明によれば、放電時は、第１、第２、第３及び第4の電界効果トランジスタをオンとして行うので、この第１、第２、第３及び第4の電界効果トランジスタはオン時の電圧降下が極めて小さく、この第１、第２、第３及び第4の電界効果トランジスタによる電力損失は極めて小さいと共に充電時は、第１及び第２の直列接続電池ブロックの電圧を比較し、電圧の低い方を先に充電し、電圧が等しくなったときに同時に充電するようにしたので、この第１及び第２の直列接続電池ブロックが互いに並列に接続されるときはこの第１及び第２の直列接続電池ブロック間の電位差は０Ｖであり、この第１及び第２の直列接続電池ブロック間には電流は流れず突入電流によりダメージを受けない安全性の高い大容量の電池パックを得ることができる。   According to the present invention, when discharging, the first, second, third and fourth field effect transistors are turned on, so that the first, second, third and fourth field effect transistors are turned on. The voltage drop of the first, second, third, and fourth field effect transistors is extremely small, and the power loss due to the first, second, third, and fourth field effect transistors is extremely small. Since the one with the lower voltage is charged first and charged at the same time when the voltages become equal, when the first and second series-connected battery blocks are connected in parallel to each other, the first and second The potential difference between the two series-connected battery blocks is 0 V, and no current flows between the first and second series-connected battery blocks, and a high-safety large-capacity battery pack that is not damaged by the inrush current is obtained. be able to.

また、本発明によれば、充電時に各直列接続電池ブロック間の電位差をなくすことができるので、各直列接続電池ブロック間の容量バランスを改善でき放電時間の延長を図ることができる。   In addition, according to the present invention, since the potential difference between the series-connected battery blocks can be eliminated during charging, the capacity balance between the series-connected battery blocks can be improved, and the discharge time can be extended.

以下、図１、図２及び図３を参照して本発明電池パック及び電池パックの充電方法を実施するための最良の形態の例につき説明する。図１、図２、図３につき説明するに、図１において、図４に対応する部分には同一符号を付して示す。   Hereinafter, an example of the best mode for carrying out the battery pack and the battery pack charging method of the present invention will be described with reference to FIGS. 1, 2, and 3. 1, 2, and 3, portions corresponding to those in FIG. 4 are denoted by the same reference numerals in FIG. 1.

図１例において、１、２及び３は夫々複数個例えば４個の２次電池が直列接続された直列接続電池ブロックを示し、この直列接続電池ブロック１、２及び３の夫々の正極端子を放電制御用のｐチャンネルの電界効果トランジスタ１０ａ、１１ａ及び１２ａの夫々のドレイン端子に接続する。   In the example of FIG. 1, 1, 2, and 3 indicate a series connection battery block in which a plurality of, for example, four secondary batteries are connected in series, and the positive terminal of each of the series connection battery blocks 1, 2, and 3 is discharged. The p-channel field effect transistors 10a, 11a and 12a for control are connected to the respective drain terminals.

この電界効果トランジスタ１０ａ、１１ａ及び１２ａの夫々のソース端子を夫々充電制御用のｐチャンネルの電界効果トランジスタ１０ｂ、１１ｂ及び１２ｂの夫々のソース端子に接続し、この電界効果トランジスタ１０ｂ、１１ｂ及び１２ｂの夫々のドレイン端子を充電時及び放電時に正極端子となる充放電正極端子１３に夫々接続する。   The source terminals of the field effect transistors 10a, 11a and 12a are connected to the source terminals of the p-channel field effect transistors 10b, 11b and 12b for charge control, respectively, and the field effect transistors 10b, 11b and 12b are connected. Each drain terminal is connected to a charge / discharge positive electrode terminal 13 which becomes a positive electrode terminal during charging and discharging.

また、この電界効果トランジスタ１０ａ、１０ｂ、１１ａ、１１ｂ、１２ａ及び１２ｂの夫々のゲート端子を後述の如く制御する制御マイクロコンピュータ１４の夫々の制御端子に夫々接続する。   Further, the gate terminals of the field effect transistors 10a, 10b, 11a, 11b, 12a and 12b are connected to the respective control terminals of the control microcomputer 14 which is controlled as described later.

この直列接続電池ブロック１、２及び３の夫々の負極端子を充電時及び放電時に負極端子となる充放電負極端子９に夫々接続する。また、この直列接続電池ブロック１、２及び３の夫々の正極端子及び負極端子を制御マイクロコンピュータ１４の夫々の電圧を読み取る読み取り端子に接続し、この制御マイクロコンピュータ１４で、この夫々の直列接続電池ブロック１、２及び３の電圧を読み取る如くする。   The negative terminal of each of the series-connected battery blocks 1, 2, and 3 is connected to a charge / discharge negative terminal 9 that becomes a negative terminal during charging and discharging, respectively. Further, the positive terminal and the negative terminal of each of the series-connected battery blocks 1, 2, and 3 are connected to reading terminals for reading the respective voltages of the control microcomputer 14, and the control microcomputer 14 uses the respective series-connected batteries. Read the voltages of blocks 1, 2 and 3.

本例においては、図１に示す如く、各直列接続電池ブロック１、２及び３を接続した時点では、制御マイクロコンピュータ１４は電界効果トランジスタ１０ａ、１０ｂ、１１ａ、１１ｂ、１２ａ及び１２ｂを全てオフ状態とし、充電も放電も不可能な状態とする。   In this example, as shown in FIG. 1, the control microcomputer 14 turns off all the field effect transistors 10a, 10b, 11a, 11b, 12a and 12b when the series-connected battery blocks 1, 2 and 3 are connected. And charging and discharging are impossible.

充電時においては、充放電正極端子１３及び充放電負極端子９間に充電電圧が供給され、このとき制御マイクロコンピュータ１４は夫々の直列接続電池ブロック１、２及び３の夫々の電圧を読み取る。この場合直列接続電池ブロック１、２及び３の夫々の電圧をＶ１、Ｖ２及びＶ３としたとき、充電開始時に、この電圧が、図３に示す如く例えばＶ１＜Ｖ２＜Ｖ３であつたとする。   At the time of charging, a charging voltage is supplied between the charging / discharging positive electrode terminal 13 and the charging / discharging negative electrode terminal 9, and at this time, the control microcomputer 14 reads the respective voltages of the respective series-connected battery blocks 1, 2, and 3. In this case, assuming that the voltages of the series-connected battery blocks 1, 2, and 3 are V1, V2, and V3, at the start of charging, this voltage is, for example, V1 <V2 <V3 as shown in FIG.

このときは、制御マイクロコンピュータ１４は、図２Ａ及び図２Ｂに示す如く、電界効果トランジスタ１０ａ及び１０ｂを周期的にオン、オフし、この周期的なオン時に、この直列接続電池ブロック１を充電し、この周期的なオフ時に、この直列接続電池ブロック１の開放電圧Ｖ１を読み取り、この開放電圧Ｖ１と直列接続電池ブロック２の電圧Ｖ２とを比較する。   At this time, as shown in FIGS. 2A and 2B, the control microcomputer 14 periodically turns on and off the field effect transistors 10a and 10b, and charges the series-connected battery block 1 at the time of the periodic on. At this periodic OFF, the open circuit voltage V1 of the series connection battery block 1 is read, and the open circuit voltage V1 and the voltage V2 of the series connection battery block 2 are compared.

この開放電圧Ｖ１と直列接続電池ブロック２の電圧Ｖ２とがＶ１＜Ｖ２のときは上述を繰り返し、この開放電圧Ｖ１と直列接続電池ブロック２の電圧Ｖ２とが等しく，Ｖ１＝Ｖ２となったときに、図２Ｃ及び図２Ｄに示す如く、電界効果トランジスタ１１ａ及び１１ｂも電界効果トランジスタ１０ａ及び１０ｂと同様に周期的にオン、オフし、この周期的なオン時に、この直列接続電池ブロック１及び２を図３の充電カーブに示す如く同時に充電し、この周期的なオフ時に、この直列接続電池ブロック１及び２の開放電圧Ｖ１＝Ｖ２を読み取り、この開放電圧Ｖ１＝Ｖ２と直列接続電池ブロック３の電圧Ｖ３とを比較する。   When the open circuit voltage V1 and the voltage V2 of the series connection battery block 2 are V1 <V2, the above is repeated. When the open circuit voltage V1 and the voltage V2 of the series connection battery block 2 are equal, and V1 = V2 As shown in FIGS. 2C and 2D, the field effect transistors 11a and 11b are periodically turned on and off in the same manner as the field effect transistors 10a and 10b. As shown in the charging curve of FIG. 3, when the battery is simultaneously turned off, the open-circuit voltage V1 = V2 of the series-connected battery blocks 1 and 2 is read, and the open-circuit voltage V1 = V2 and the voltage of the series-connected battery block 3 are read. Compare with V3.

この開放電圧Ｖ１＝Ｖ２と直列接続電池ブロック３の電圧Ｖ３とがＶ１＝Ｖ２＜Ｖ３のときは上述を繰り返し、この開放電圧Ｖ１＝Ｖ２と直列接続電池ブロック３の電圧Ｖ３とが等しく，Ｖ１＝Ｖ２＝Ｖ３となったときは、図２Ａ、Ｂ、Ｃ、Ｄ、Ｅ及びＦに示す如く、電界効果トランジスタ１０ａ、１０ｂ、１１ａ、１１ｂ、１２ａ及び１２ｂを全てオンとし、直列接続電池ブロック１、２及び３を図３の充電カーブに示す如く同時に充電終了まで充電する。図２Ｅ及びＦは電界効果トランジスタ１２ａ及び１２ｂのオン、オフを示す。   When the open voltage V1 = V2 and the voltage V3 of the series-connected battery block 3 are V1 = V2 <V3, the above is repeated, and the open voltage V1 = V2 is equal to the voltage V3 of the series-connected battery block 3, and V1 = When V2 = V3, as shown in FIGS. 2A, B, C, D, E and F, the field effect transistors 10a, 10b, 11a, 11b, 12a and 12b are all turned on, and the series-connected battery block 1, 2 and 3 are charged simultaneously until the end of charging as shown in the charging curve of FIG. 2E and F show the field effect transistors 12a and 12b on and off.

また、放電時は、制御マイクロコンピュータ１４は、電界効果トランジスタ１０ａ、１０ｂ、１１ａ、１１ｂ、１２ａ及び１２ｂを全てオン状態とし、直列接続電池ブロック１、２及び３よりの直流電圧を充放電正極端子１３及び充放電負極端子９を介して負荷に供給する。この場合、直列接続電池ブロック１、２及び３の電圧は等しいので、直列接続電池ブロック１、２及び３間に突入電流はながれない。   At the time of discharging, the control microcomputer 14 turns on all the field effect transistors 10a, 10b, 11a, 11b, 12a and 12b, and supplies the DC voltage from the series-connected battery blocks 1, 2, and 3 to the charge / discharge positive terminal. 13 and the charge / discharge negative terminal 9 are supplied to the load. In this case, since the voltages of the series-connected battery blocks 1, 2, and 3 are equal, no inrush current flows between the series-connected battery blocks 1, 2, and 3.

本例によれば、放電時は、電界効果トランジスタ１０ａ、１０ｂ、１１ａ、１１ｂ、１２ａ及び１２ｂを全てオン状態として行うので、この電界効果トランジスタ１０ａ、１０ｂ、１１ａ、１１ｂ、１２ａ及び１２ｂはオン時の電圧降下が極めて小さく、この電界効果トランジスタ１０ａ、１０ｂ、１１ａ、１１ｂ、１２ａ及び１２ｂによる電力損失は極めて小さいと共に充電時は、直列接続電池ブロック１,２及び３の電圧を比較し、電圧の低い直列接続電池ブロックから順番に充電し、直列接続電池ブロック１,２及び３の電圧が等しくＶ１＝Ｖ２、またＶ１＝Ｖ２＝Ｖ３となったときに同時に充電するようにしたので、この直列接続電池ブロック１、２及び３が互いに並列に接続されるときはこの直列接続電池ブロック１、２、３間の電位差は０Ｖであり、この直列接続電池ブロック１、２、３間には電流は流れず突入電流によりダメージを受けない安全性の高い大容量の電池パックを得ることができる。   According to this example, since the field effect transistors 10a, 10b, 11a, 11b, 12a and 12b are all turned on during discharging, the field effect transistors 10a, 10b, 11a, 11b, 12a and 12b are turned on. The voltage drop of the field effect transistors 10a, 10b, 11a, 11b, 12a and 12b is extremely small, and at the time of charging, the voltages of the series-connected battery blocks 1, 2 and 3 are compared, The battery is charged in order from the lower series-connected battery block, and when the voltages of the series-connected battery blocks 1, 2 and 3 are equal to V1 = V2 and V1 = V2 = V3, they are charged simultaneously. When battery blocks 1, 2 and 3 are connected in parallel to each other, the power supply between the series connected battery blocks The difference is 0V, this is between the series connected battery blocks 1, 2 and 3 can be obtained a battery pack of high mass safety not damaged by inrush current does not flow current.

また、本例によれば、充電時に各直列接続電池ブロック１、２、３間の電位差をなくすことができるので、各直列接続電池ブロック１、２、３間の容量バランスを改善でき放電時間の延長を図ることができる。   In addition, according to this example, since the potential difference between the series-connected battery blocks 1, 2, and 3 can be eliminated during charging, the capacity balance between the series-connected battery blocks 1, 2, and 3 can be improved, and the discharge time can be reduced. Can be extended.

尚、上述例では、直列接続電池ブロックを３個並列に接続した例につき述べたが、この並列接続する直列接続電池ブロックの個数を必要に応じ２個又は４個以上としても良いことは勿論である。このときは、上述同様にして構成できることは、容易に理解できよう。   In the above example, an example in which three series-connected battery blocks are connected in parallel has been described. However, the number of series-connected battery blocks to be connected in parallel may be two or four or more as needed. is there. At this time, it can be easily understood that it can be configured in the same manner as described above.

また、本発明は上述例に限ることなく、本発明の要旨を逸脱することなく、その他種々の構成が採り得ることは勿論である。   Further, the present invention is not limited to the above-described example, and various other configurations can be adopted without departing from the gist of the present invention.

本発明電池パックを実施するための最良の形態の例を示す構成図である。It is a block diagram which shows the example of the best form for implementing this invention battery pack. 本発明の説明に供する線図である。It is a diagram with which it uses for description of this invention. 本発明の説明に供する線図である。It is a diagram with which it uses for description of this invention. 従来の電池パックの例を示す構成図である。It is a block diagram which shows the example of the conventional battery pack.

符号の説明Explanation of symbols

１、２、３…直列接続電池ブロック、９…充放電負極端子、１０ａ、１０ｂ、１１ａ、１１ｂ、１２ａ、１２ｂ…電界効果トランジスタ、１３…充放電正極端子、１４…制御マイクロコンピュータ   1, 2, 3... Series connection battery block, 9... Charge / discharge negative electrode terminal, 10 a, 10 b, 11 a, 11 b, 12 a, 12 b ... field effect transistor, 13 ... charge / discharge positive electrode terminal, 14.

Claims (3)

複数の２次電池が直列接続された第１の直列接続電池ブロックの正極端子を第１の充放電制御スイチング素子を介して充放電正極端子に接続し、前記第１の直列接続電池ブロックの負極端子を充放電負極端子に接続し、複数の２次電池が直列接続された第２の直列接続電池ブロックの正極端子を第２の充放電制御スイチング素子を介して前記充放電正極端子に接続し、前記第２の直列接続電池ブロックの負極端子を前記充放電負極端子に接続し、前記第１及び第２の直列接続電池ブロックの電圧を読み取ると共に前記第１及び第２の直列接続電池ブロックの電圧を比較し、電圧の低い方を先に充電し、電圧が等しくなったときに同時に充電するように前記第１及び第２の充放電制御スイチング素子を制御する制御マイクロコンピュータを設けたことを特徴とする電池パック。   A positive terminal of a first series-connected battery block in which a plurality of secondary batteries are connected in series is connected to a charge / discharge positive terminal via a first charge / discharge control switching element, and a negative electrode of the first series-connected battery block. A terminal is connected to the charge / discharge negative electrode terminal, and a positive electrode terminal of a second series-connected battery block in which a plurality of secondary batteries are connected in series is connected to the charge / discharge positive electrode terminal via a second charge / discharge control switching element. The negative terminal of the second series-connected battery block is connected to the charge / discharge negative terminal, the voltage of the first and second series-connected battery blocks is read, and the first and second series-connected battery blocks A control microcomputer is provided for comparing the voltages, charging the lower one first, and controlling the first and second charge / discharge control switching elements so as to charge simultaneously when the voltages become equal. Battery pack, characterized in that. 複数の２次電池が直列接続された第１の直列接続電池ブロックの正極端子を第１の電界効果トランジスタのドレイン端子に接続し、該第１の電界効果トランジスタのソース端子を第２の電界効果トランジスタのソース端子に接続し、該第２の電界効果トランジスタのドレイン端子を充放電正極端子に接続し、前記第１の直列接続電池ブロックの負極端子を充放電負極端子に接続し、複数の２次電池が直列接続された第２の直列接続電池ブロックの正極端子を第３の電界効果トランジスタのドレイン端子に接続し、該第３の電界効果トランジスタのソース端子を第４の電界効果トランジスタのソース端子に接続し、該第４の電界効果トランジスタのドレイン端子を前記充放電正極端子に接続し、前記第２の直列接続電池ブロックの負極端子を前記充放電負極端子に接続し、前記第１及び第２の直列接続電池ブロックの電圧を読み取ると共に前記第１、第２、第３及び第4の電界効果トランジスタを制御する制御マイクロコンピュータを設けたことを特徴とする電池パック。   A positive terminal of a first series-connected battery block in which a plurality of secondary batteries are connected in series is connected to a drain terminal of the first field effect transistor, and a source terminal of the first field effect transistor is connected to a second field effect. Connecting to the source terminal of the transistor, connecting the drain terminal of the second field effect transistor to the charge / discharge positive terminal, connecting the negative terminal of the first series-connected battery block to the charge / discharge negative terminal; The positive terminal of the second series-connected battery block in which the secondary batteries are connected in series is connected to the drain terminal of the third field effect transistor, and the source terminal of the third field effect transistor is the source of the fourth field effect transistor. A drain terminal of the fourth field-effect transistor is connected to the charge / discharge positive terminal, and a negative terminal of the second series-connected battery block is connected to the front terminal. Provided with a control microcomputer connected to the charge / discharge negative electrode terminal for reading the voltage of the first and second series-connected battery blocks and controlling the first, second, third and fourth field effect transistors A battery pack characterized by 複数の２次電池が直列接続された第１の直列接続電池ブロックの正極端子を第１の電界効果トランジスタのドレイン端子に接続し、該第１の電界効果トランジスタのソース端子を第２の電界効果トランジスタのソース端子に接続し、該第２の電界効果トランジスタのドレイン端子を充放電正極端子に接続し、前記第１の直列接続電池ブロックの負極端子を充放電負極端子に接続し、複数の２次電池が直列接続された第２の直列接続電池ブロックの正極端子を第３の電界効果トランジスタのドレイン端子に接続し、該第３の電界効果トランジスタのソース端子を第４の電界効果トランジスタのソース端子に接続し、該第４の電界効果トランジスタのドレイン端子を前記充放電正極端子に接続し、前記第２の直列接続電池ブロックの負極端子を前記充放電負極端子に接続し、前記第１及び第２の直列接続電池ブロックの電圧を読み取ると共に前記第１、第２、第３及び第4の電界効果トランジスタを制御する制御マイクロコンピュータを設けた電池パックの充電方法であって、
前記第１及び第２の直列接続電池ブロックの電圧を比較し、電圧の低い方を先に充電し、電圧が等しくなったときに同時に充電するようにしたことを特徴とする電池パックの充電方法。 A positive terminal of a first series-connected battery block in which a plurality of secondary batteries are connected in series is connected to a drain terminal of the first field effect transistor, and a source terminal of the first field effect transistor is connected to a second field effect. Connecting to the source terminal of the transistor, connecting the drain terminal of the second field effect transistor to the charge / discharge positive electrode terminal, connecting the negative electrode terminal of the first series-connected battery block to the charge / discharge negative electrode terminal; The positive terminal of the second series-connected battery block in which the secondary batteries are connected in series is connected to the drain terminal of the third field effect transistor, and the source terminal of the third field effect transistor is the source of the fourth field effect transistor. A drain terminal of the fourth field-effect transistor is connected to the charge / discharge positive terminal, and a negative terminal of the second series-connected battery block is connected to the front terminal. A battery provided with a control microcomputer that is connected to a charge / discharge negative electrode terminal, reads the voltages of the first and second series-connected battery blocks, and controls the first, second, third, and fourth field effect transistors A charging method for the pack,
The battery pack charging method, wherein the voltages of the first and second series-connected battery blocks are compared, the one with the lower voltage is charged first, and charged simultaneously when the voltages are equal. .
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