JP2007158543A - Clock reproducing device and data receiver - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a clock regenerating device in which a state does not continue that a frequency of a reproduced clock is constantly larger or smaller compared with a frequency of an original clock. <P>SOLUTION: The clock regenerating device is provided with a signal detector 101 which acquires original clock information from receiving data from a transmitting device, a VCXO 111 which outputs a regenerating clock, and a signal selector 102 which selects the original clock information as synchronization clock information used for synchronization out of the original clock information obtained by the signal detector 101. The VCXO 111 is controlled based on a divided value of a difference of an interval of the synchronization clock information obtained from the original clock information, and an interval of the acquiring time of the synchronization clock information measured by the regenerating clock by an interval of the synchronization clock information. The signal selector 102 makes a frequency select the synchronization clock information lower, if the regenerating clock approaches nearer to the original clock. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a clock reproduction device provided in an audio reception device or the like in a network system. More specifically, the present invention relates to a clock recovery apparatus that regenerates a clock having the same frequency as that of a clock used on the transmission side based on clock information indicating the frequency of the clock used on the transmission side.

  For example, in a real-time transmission system including a transmission device that digitizes and transmits audio and a reception device that receives audio data, it is necessary to synchronize the clocks of the transmission device and the reception device. That is, in order to process (for example, playback processing) audio data transferred from the transmission device in real time, the frequency of the clock (hereinafter referred to as “original clock”) used by the transmission device for the received audio data. It is necessary to perform processing in synchronization with a clock having a frequency as close as possible (preferably the same frequency). In order to realize the synchronous control, in the system as described above, the transmitting device transmits the original clock information indicating the frequency of the original clock, and the clock having the same frequency as the original clock frequency based on the original clock information received by the receiving device. Is generated. As described above, a transmission system for performing clock synchronization processing includes a transmission device that transmits clock information at equal intervals and a reception device that includes a clock recovery device.

  FIG. 10 is a diagram illustrating a configuration of a receiving device including a clock recovery device. The clock recovery device controls the frequency of the recovered clock so that the difference between the time based on the original clock transmitted from the transmitting device and the recovered clock of the own device obtained by the counter 405 becomes small. Thereby, the clock recovery device generates a recovery clock having the same frequency as the original clock.

  In such a clock synchronization processing system, a clock recovery device is proposed in which the frequency of the recovered clock can be controlled so that the situation where the frequency of the recovered clock is constantly larger or smaller than the frequency of the original clock does not continue. Has been.

In order to improve reproduction accuracy, a method of changing the transmission interval of the original clock has also been proposed (see, for example, Patent Document 1).
JP 2004-153546 A

  However, in the conventional clock recovery apparatus described above, in a network where transmission delay is not guaranteed, such as Ethernet (registered trademark), when delay fluctuation occurs, it takes a considerable time to eliminate the influence. In particular, when the synchronization interval is lengthened in order to increase the synchronization accuracy, when the clock information used for synchronization is affected by delay fluctuation, the influence is further increased.

  Further, when the transmission interval of the original clock information is dynamically changed, the transmission / reception relationship may be one-to-one, but in one-to-many transmission in which all the receiving devices are controlled at the same timing, transmission is performed. The change in interval cannot be applied to a plurality of receiving apparatuses. Furthermore, there is a problem that when the transmission device or the reception device is added / deleted, the timing shift becomes large.

  The present invention has been made to solve the above-described problems, and prevents the situation where the frequency of the recovered clock is constantly larger or smaller than the frequency of the original clock from continuing, and the influence of delay fluctuations is avoided. It is an object of the present invention to provide a clock recovery device that can control the frequency of a recovered clock that can be reduced, and a data receiving device to which the clock recovery device is applied.

  The clock recovery device of the present invention comprises: original clock information acquisition means for acquiring original clock information relating to the clock of the transmission device from data being received from the transmission device; recovered clock output means for outputting a recovery clock; and the original clock Synchronization clock selection means for selecting original clock information at a predetermined frequency as synchronization clock information used for synchronization from the original clock information acquired by the information acquisition means, and a transmission device obtained from the original clock information The difference between the interval of the synchronization clock information based on the clock and the acquisition time interval of the synchronization clock information measured by the recovered clock is divided by the interval of the synchronization clock information. And a control means for controlling the reproduction clock output means, and for the synchronization adjustment Lock selection means in accordance with the reproduction clock under the control of the control means approaches the original clock has a configuration to reduce the frequency of selecting the clock information for laminated the synchronization.

  With this configuration, at the initial stage of the synchronization operation, synchronization control is performed in accordance with acquisition of the original clock information, and the recovered clock is quickly brought close to the original clock. As the recovered clock approaches the original clock, the frequency of selecting the synchronization clock information is reduced and the selection interval of the synchronization clock information is increased, so that the synchronization accuracy can be gradually increased. In other words, by reducing the frequency of selection, the interval of synchronization clock information is increased. By performing the synchronization control with the value divided by the increased interval, the allowable error is reduced, so that the synchronization accuracy can be improved.

  Since the clock recovery device has such a configuration, the transmission side can perform synchronization control suitable for each clock recovery device only by transmitting the original clock information. Accordingly, it is possible to add and delete the clock recovery device during the operation of the original clock on the transmission side. Further, the transmission side can transmit the original clock information by broadcast and multicast methods, and even if the number of devices to be clock-recovered increases, the load on the transmission side does not increase.

  In the clock recovery device according to the present invention, the synchronization clock selection means includes the synchronization clock based on the recovery clock output from the recovery clock output means and a predetermined frequency for selecting the synchronization clock information. The timing for receiving the original clock information to be selected as information is predicted, and it is determined whether or not the original clock information has been received at the predicted timing.

  With this configuration, since it is determined whether or not the original clock information has been received at the predicted timing, it is possible to determine a communication delay or the like due to a network condition in the process of transmitting the original clock information.

  In the clock recovery device of the present invention, when the synchronization clock selection unit has acquired the original clock information within a predetermined range including the predicted timing, it can receive the original clock information at the predicted timing. It has a configuration for determining.

  With this configuration, even when a slight fluctuation occurs in the reception interval of the original clock information due to network congestion with the transmission device, it can be treated as being normally received. About this predetermined range, it can set suitably according to the characteristic of a network.

  In the clock recovery device according to the present invention, the synchronization clock selection unit initially sets a frequency of selecting the synchronization clock information when an event in which the original clock information cannot be received continues for a predetermined number of times at a predicted timing. It has the structure set to a value.

  With this configuration, if there are consecutive events that cannot receive the original clock information at the predicted timing, there is a possibility that the transmitting device that previously transmitted the data has switched to another transmitting device. Is set to an initial value, synchronous control with high frequency is performed, and the recovered clock is quickly brought close to the original clock.

  In the clock recovery device of the present invention, the synchronization clock selection unit notifies the control unit of the timing at which the synchronization clock information is selected, and the control unit receives the synchronization clock selection unit from the synchronization clock selection unit. It is configured to measure the acquisition time of the synchronization clock information by counting the recovered clock output from the recovered clock output means at the notified timing.

  With this configuration, it is possible to measure the acquisition time of the clock information for synchronization alignment using the recovered clock output from the recovered clock output means.

  In the clock recovery device of the present invention, the control means includes an interval of the synchronization clock information based on the clock of the transmission device obtained from the original clock information and an acquisition time of the synchronization clock information measured by the recovery clock. Subtracting means for obtaining a difference from the interval, a dividing means for dividing the difference obtained by the subtracting means by an interval of the clock information for synchronization, and an integrating means for integrating the values obtained by the dividing means. The reproduction clock output means is controlled based on the value obtained by the dividing means or the value obtained by the integrating means.

  With this configuration, since the reproduction clock output unit is controlled based on the value obtained by the division unit or the value obtained by integrating the values obtained by the division unit, the reproduction clock output unit can be appropriately controlled according to the situation. .

  In the clock recovery device of the present invention, the control means determines whether or not the value obtained by the integrating means is within a predetermined range, and continuously determines that the value is within the predetermined range a predetermined number of times. In this case, the frequency of selecting the synchronization clock information is reduced.

  With this configuration, since it is determined whether or not synchronization with a predetermined accuracy has been performed based on the integrated value obtained by the integrating means, reproduction is performed based on the cumulative magnitude relationship between the frequencies of the original clock and the recovered clock. The clock output means can be controlled.

  In the clock recovery device of the present invention, the control means determines whether or not the value obtained by the integrating means is within a predetermined range, and when it is determined that the value is not within the predetermined range, The reproduction clock output means is controlled based on the value obtained by the division means.

  If the value obtained by the integrating means is not within the predetermined range, the transmitting device may have been switched. Therefore, by not integrating the previously acquired synchronization original clock information, the transmitting device before switching Can be controlled without being affected by the original clock information.

  In the clock recovery device of the present invention, when the control means controls the recovered clock output means based on the value obtained by the dividing means, the value obtained by the integrating means is obtained by the dividing means. It has a configuration that initializes with a value.

  With this configuration, by initializing the value obtained by the integrating means with the value obtained by the dividing means, the next time the integrated value is determined, the control is not affected by the original clock information of the transmitting device before switching. Can be done.

  A clock recovery device according to another aspect of the present invention comprises: original clock information acquisition means for acquiring original clock information related to the clock of the transmission device from data being received from the transmission device; and recovered clock output means for outputting a recovery clock. Synchronization clock selection means for selecting the original clock information at a predetermined frequency as the synchronization clock information used for synchronization from the original clock information acquired by the original clock information acquisition means, and the original clock information A difference between the interval of the synchronization clock information based on the clock of the transmission device obtained from the above and the interval of the acquisition time of the synchronization clock information measured by the recovered clock is the interval of the synchronization clock information. Control means for controlling the reproduction clock output means so that the value divided by 0 approaches zero. For example, clock selection means for mating said synchronization in accordance with the reproduction clock under the control of the control means approaches the original clock has a configuration to reduce the frequency of selecting the clock information for laminated the synchronization.

  With this configuration, at the initial stage of the synchronization operation, synchronization control is performed in accordance with acquisition of the original clock information, and the recovered clock is quickly brought close to the original clock. As the recovered clock approaches the original clock, the frequency of selecting the synchronization clock information can be reduced, the selection interval of the synchronization clock information can be increased, and the synchronization accuracy can be gradually increased. Also, with this configuration, the frequency of the recovered clock is controlled so as to eliminate the difference between the original clock and the recovered clock.

  The data receiving device of the present invention includes a receiving unit that receives data transferred from a transmitting device via a predetermined network, a clock recovery unit that generates a recovered clock, and temporarily receives data received by the receiving unit. And a data processing unit for processing the data stored in the buffer in synchronization with a reproduction clock generated by the clock recovery unit, the clock recovery unit comprising the clock recovery device described above It has the composition provided with.

  With this configuration, similar to the clock recovery device of the present invention, the recovered clock can be quickly brought close to the original clock at the initial stage of the synchronous operation, and the synchronization accuracy can be gradually increased as the recovered clock approaches the original clock. This synchronization control makes it possible to balance the amount of data processed in real time in synchronization with the recovered clock and the amount of data transferred from the transmission device.

  According to the present invention, at the initial stage of the synchronization operation, synchronization control is frequently performed using the synchronization clock information to quickly bring the recovered clock close to the original clock, and as the recovered clock approaches the original clock, the synchronization clock There is an excellent effect that the frequency of selecting information is reduced, the interval of the synchronization clock information is increased, and the synchronization accuracy can be gradually increased.

  Hereinafter, a clock recovery device and a receiving device according to an embodiment of the present invention will be described with reference to the drawings.

  FIG. 1 is a diagram illustrating the configuration of the clock recovery device according to the present embodiment. Before describing the clock recovery device in detail with reference to FIG. 1, a data reception device to which the clock recovery device of the present invention is applied will be described.

  FIG. 2 is a diagram illustrating a configuration of the data receiving device 10 in which the clock recovery device according to the first embodiment of the present invention is mounted. For example, the data receiving device 10 reproduces audio data transmitted from the transmitting device in real time.

  As shown in FIG. 2, the data receiving apparatus 10 includes a receiving unit 11, an input processing unit 12, a clock reproduction unit 13, a buffer 14, and a reproduction processing unit 15 as an embodiment of the clock reproduction device according to the present invention. .

  The receiving unit 11 receives data sequentially transferred from a transmitting device via a predetermined network, and separates the received data into original clock information and audio data. The input processing unit 12 converts the audio data received by the receiving unit 11 into a predetermined format and supplies the converted data to the buffer 14. The buffer 14 stores audio data in a predetermined format. The clock recovery unit 13 receives the original clock information from the data received by the reception unit 11, and outputs a recovered clock whose frequency is adjusted based on the original clock information. The reproduction processing unit 15 performs reproduction processing (decoding processing or the like) on the audio data stored in the buffer 14 in synchronization with the reproduction clock output from the clock reproduction unit 13, and outputs audio data.

  With reference to FIG. 1, the clock recovery apparatus of the present embodiment constituting the clock recovery unit 13 will be described. The clock recovery device includes a signal detector 101, a signal selector 102, a control information generation unit 120, a digital-analog converter (hereinafter referred to as “D / A converter”) 109, and a low-pass filter (hereinafter referred to as “LPF”). ”110 and a variable frequency oscillator (hereinafter referred to as“ VCXO ”) 111.

  The signal detector 101 has a function of detecting original clock information from data being received from the transmission device. The data received from the transmission device includes original clock information indicating the clock information of the transmission device together with data such as content to be reproduced. In the present embodiment, the original clock information is composed of a reference time and a serial number. The reference time indicates an elapsed time when the time at which data transmission from the transmission device is started is “0”. The serial number indicates the number of original clock information from the beginning.

  The signal selector 102 has a function of selecting original clock information with a predetermined selection frequency from the original clock information detected by the signal detector 101. The original clock information selected by the signal selector 102 is used for synchronization of the recovered clock. The original clock information selected by the signal selector 102 at a predetermined frequency is referred to as “synchronization clock information”.

  The control information generation unit 120 has a function of generating control information for controlling the recovered clock based on the synchronization clock information. When the control information generation unit 120 inputs control information to the D / A converter 109, the D / A converter 109 converts the control information into a control voltage. The D / A converter 109 supplies the converted control voltage to the VCXO 111 via the LPF 110. The VCXO 111 outputs a reproduction clock whose frequency is controlled in accordance with a control voltage supplied via the LPF 110.

  Next, a detailed configuration of the control information generation unit 120 will be described. The control information generation unit 120 includes a subtractor 103, a divider 104, an integrator 105, an integrated value evaluation unit 106, a latch circuit 107, and a counter 108.

  The control information generation unit 120 starts a series of processes at the timing when the synchronization selector clock information is selected by the signal selector 102. That is, the signal selector 102 generates a signal synchronized with the selection timing of the clock information for synchronization alignment and supplies the synchronization signal to the control information generation unit 120. This synchronization signal is a trigger for the processing of the control information generation unit 120.

  The subtractor 103 obtains a difference between the interval of the transmission device clock based on the synchronization clock information selected by the signal selector 102 and the interval of acquisition time of the synchronization clock information measured by the recovered clock. . The acquisition time of the clock information for synchronization is obtained from the count value of the counter 108 that counts the reproduction clock. That is, the count value of the reproduction clock is obtained at the timing when the signal selector 120 is notified of a signal indicating the timing at which the synchronization clock information is selected. As a result, the time when the signal selector 102 acquires the clock information for synchronization can be measured with the recovered clock. By obtaining the difference between the interval by the clock of the transmitter based on the clock information for synchronization and the time interval at which the clock information for synchronization is actually acquired, the difference between them can be detected.

  The divider 104 has a function of dividing the difference calculated by the subtractor 103 by the interval of the clock information for synchronization alignment. The interval (selection interval) of the clock information for synchronization is obtained from the selection frequency information and the reference time of the original clock information by the signal selector 102 and transmitted from the signal selector 102.

  The integrator 105 integrates the values obtained by the divider 104 in synchronization with the synchronization signal, and outputs the integrated value. This integrated value represents the cumulative magnitude relationship between the frequency of the original clock and the frequency of the recovered clock used in the transmission apparatus. That is, when the state where the original clock is faster than the recovered clock continues for a long time, the integrated value becomes a positive value. Conversely, when the state where the recovered clock becomes larger than the original clock continues for a long time, the integrated value becomes a negative value. .

  Integration evaluation unit 106 determines whether or not the integrated value obtained by integrator 105 is within a predetermined range (a range between threshold value Th + and threshold value Th−), and based on the determination result. Thus, either the integrated value obtained by the integrator 105 or the value obtained by the divider 104 is output as control information. The integrated value evaluation unit 106 further sends a reset signal to the integrator 105 when outputting the control information, and initializes the integrated value obtained so far to the value obtained by the divider 104 (reset). )

  The control information output from the integrated value evaluation unit 106 is latched by the latch 107 and supplied to the D / A converter 109. The D / A converter 109 converts the input control information into a control voltage with a predetermined resolution, and supplies the control voltage to the VCXO 111 via the LPF 110. The VCXO 111 outputs a reproduction clock whose frequency is controlled according to the control voltage supplied from the D / A converter 109.

  The data flow of the signal selector 102 will be described with reference to FIG. When the signal selector 102 first receives the original clock information, the reference clock and serial number included in the received original clock information and the time when the original clock information is received (time based on the recovered clock) The information is stored in the information storage unit 301.

  The signal selector 102 selects synchronization clock information to be used for synchronization from the received original clock information at a predetermined frequency. FIG. 4 is a diagram illustrating an example of acquisition of clock information for synchronization. In the clock recovery device of the present embodiment, the signal selector 102 frequently selects the synchronization clock information in the initial state of the synchronization operation, and the synchronization clock as the recovered clock matches the original clock. Reduce the frequency of information selection.

  Further, the signal selector 102 predicts the timing for receiving the clock information to be selected next as the synchronization clock information. The signal selector 102 selects the reception time of the original clock information to be selected next as the synchronization clock information from the selection frequency of the synchronization clock information and the reference time of the original clock information stored in the clock information storage unit 301. Predict.

  FIG. 5 is a diagram illustrating the reception time predicted by the signal selector 102. As shown in FIG. 5, the range of time width 2W centered on the expected reception time is set as an effective range for receiving the original clock information. In FIG. 5, the effective range is configured with the same length of the time width W before and after the expected reception time, but the time width W before and after may be a different value. The time width W may be a value that varies depending on the selection frequency of the clock information for synchronization.

  When the signal selector 102 receives the original clock information within the predicted effective range, the signal selector 102 selects the original clock information as the synchronization clock information. In other cases, the signal selector 102 is invalid even if the original clock information is received. Ignored as original clock information. When the clock information for synchronization is selected, the signal selector 102 transmits the selected timing to the control information generation unit 120, and transmits the original clock information to the subtracter 103 and the selection interval to the divider 104.

  When the original clock information is not received within the time of the effective range, it is considered that the clock information that should have been received is not received, and the signal selector 102 counts the unreceived number counter 302. The unreceived number counter 302 is initialized when the original clock information can be processed normally. When the unreceived number counter 302 exceeds a specified value, the entire signal selector 102 is initialized as if the follow-up transmission device has been lost.

  The signal selector 102 may reduce the frequency of selection of the clock information for synchronization when normal reception continues as shown in FIG. As a result, the interval of the clock information for synchronization adjustment becomes large, and the divider 104 performs division by a large value, so that the clock tracking accuracy can be improved. When there are a plurality of receiving apparatuses, the selection frequency in each receiving apparatus may be different.

  FIG. 6 is a diagram showing an operation when the signal selector 102 detects the original clock information. When the signal selector 102 detects the clock information, the signal selector 102 checks whether or not the expected reception time is defined (S1). If it is undefined (YES in S1), the signal selector 102 uses the current time when the clock information is received as a source. Next, the next expected reception time is set (S2). If the expected reception time is defined (NO in S1), it is checked whether the timing is within the valid range of the expected reception time (S3). If it is outside the valid range of the expected reception time (NO in S3), it is regarded as an extreme deviation or not selected, and the clock information is ignored (S4). If the clock information is within the valid range (YES in S3), the next expected reception time is updated (S5), the selection interval is sent to the divider 104, and the original clock information is sent to the subtractor 103. A signal indicating the selection timing is sent to the control information generation unit 120 (S6). Thereafter, the selection frequency is updated as necessary (S7), and the selection frequency and the unreceived number counter are initialized (S8).

  FIG. 7 is a diagram illustrating an operation when the signal selector 102 cannot obtain clock information within the valid range of the expected reception time. When the time width W has elapsed from the expected reception time without receiving the original clock information, the non-reception number counter 302 is added (S11), and it is determined whether or not the non-reception number counter 302 exceeds the specified number ( S12). If the specified number of times has not been exceeded (NO in S12), the next expected reception time is updated using the own clock (S15). If the specified number of times is exceeded, it is assumed that the clock tracking source transmitter has been lost, the expected reception time is initialized to be undefined (S13), and the selection frequency is also initialized (S14).

  Hereinafter, the signal selector 102 receives the clock information from the signal detector 101 or selects the clock information by the above-described series of operations when the time in the effective range has elapsed.

  The control information generation unit 120 generates control information every time a signal indicating selection timing is received from the signal selector 102. Based on the control information, control is performed so that the frequency of the recovered clock output from the VCXO 111 approaches the frequency of the original clock.

  In the initial state of synchronization control, the clock recovery device of the present embodiment performs synchronization control in response to acquisition of original clock information, thereby quickly bringing the recovered clock closer to the original clock, and the recovered clock approaches the original clock. Accordingly, it is possible to gradually increase the accuracy of the synchronization control by decreasing the frequency of selecting the synchronization clock information.

  FIG. 8 is an explanatory diagram for explaining that the accuracy of synchronization is increased when the frequency of selecting clock information for synchronization is reduced. The upper part of FIG. 8 is a diagram illustrating the transmission time of the original clock information in the transmission device. Since the transmission device transmits the original clock information according to the oscillation of the original clock, the transmission timing of the transmission device follows the oscillation of the original clock. In FIG. 8, the original clock is transmitted at the transmission timing of period T.

  The lower part of FIG. 8 is a diagram showing the reception timing of the original clock information in the clock recovery device. The original clock information received by the clock recovery device may be slightly delayed from the clock of the transmission device depending on the network conditions, and FIG. 8 shows this situation.

  The time point when the clock recovery device receives the first original clock information C1 is the reference for the synchronization control of the clock recovery device. The clock recovery device receives the second original clock information C2 with a delay of time D2 from the clock cycle T of the transmission device. Similarly, the third original clock information is received with a delay of D3, the fourth original clock information with D4,..., And the nth original clock information with a delay of Dn.

  For convenience of the following description, FIG. 8 shows (1) an interval based on synchronization clock information and (2) an interval based on the reception time of synchronization clock information. The clock recovery device according to the present embodiment controls the difference between both intervals ((2)-(1)) based on the value obtained by dividing the difference based on (1) the clock information for synchronization.

  Assume that all the original clocks are selected as the clock information for synchronization. For example, when considering the original clock information C1 and C2, the difference calculated by the subtractor 103 is (2T + D2) −T = T + D2, and the influence of the delay time of the value calculated by the divider 104 is D2 / T.

  On the other hand, the clock information for synchronization is selected at a frequency of every five. For example, when considering the original clock information C1 and C6, the difference calculated by the subtractor 103 is (6T + D6) −T = 5T + D6, and the influence of the delay time of the value calculated by the divider 104 is D6 / 5T.

  As described above, by reducing the frequency of selecting the synchronization clock information, the interval based on the synchronization clock information in (1) is increased, and the value calculated by the divider 104 due to the influence of the delay time is increased. Get smaller. When performing synchronization control between the original clock and the recovered clock, the influence of the delay time is reduced, so that the accuracy of the recovered clock with respect to the original clock can be increased.

  FIG. 9 is a diagram showing a network audio transmission system to which a receiving device equipped with a clock recovery device according to the second embodiment of the present invention is applied.

  In this audio transmission system, the audio transmission devices 210 and 211 transmit audio obtained from the sound sources 201 and 202 via the network 220. The audio receiving devices 230, 231, and 232 receive the audio transmitted from the audio transmitting devices 210 and 211, and reproduce them through the speakers 240, 241, and 242.

  In this audio transmission system, the audio transmission devices 210 and 211 include not only the audio reception devices 230 to 232 connected to the same network 220 but also the audio reception device 233 and the speaker 243 that pass through different networks 222 via the relay device 221. May be transmitted.

  As the sound sources 201 and 202, for example, devices such as a CD player, an IC player, and a microphone are used. As the speakers 240, 241, 242, and 243, ceiling-embedded speakers, hanging speakers, and the like are used. As the networks 220 and 221, a LAN, a WAN, or the like is assumed.

  For example, as in sound field control, it may be necessary to control the transmission delay time in an audio transmission system. In such a case, not only the data receiving device shown in FIG. 2 but also a single clock master device is selected from the voice transmitting devices 210 and 211, and the slave device includes a data transmitting device that is not the clock master device. To control. The clock master device sends clock information to other clock slave devices by, for example, IP multicast. Thus, a plurality of clock slave devices can receive with a constant load regardless of the number of clock slave devices.

  In the audio transmission system of FIG. 9, in order to reduce fluctuations in transmission delay, the transmission path may be determined in advance before the clock information and audio data are flown. growing. This is noticeable when passing between different networks 220 and 221.

  Although FIG. 9 describes the case where the audio receiving device and the speaker are separate devices, the receiving device may be built in the speaker. The speaker in this case operates as a network speaker.

  According to the present invention, at the initial stage of the synchronization operation, the frequency of synchronization control is increased to quickly bring the recovered clock close to the original clock, and the synchronization accuracy is gradually increased after the recovered clock and the original clock are roughly synchronized. Therefore, the present invention is useful as a clock recovery device or the like provided in an audio reception device or the like in a network system in which a transmission delay is not guaranteed.

The figure which shows the structure of the clock reproducing | regenerating apparatus of this Embodiment The figure which shows the structural example of the receiver which uses the clock reproduction apparatus of this Embodiment Diagram showing data flow of signal selector The figure explaining selection of the clock information for synchronization The figure which shows the reception estimated time of the original clock information which should be selected as clock information for synchronization Flow diagram for explaining the operation of the signal selector when receiving clock information Flow diagram for explaining signal selector operation when no clock information is received The figure for demonstrating the effect of this Embodiment Configuration diagram of the entire system in the second embodiment Block diagram of a conventional clock recovery device

Explanation of symbols

DESCRIPTION OF SYMBOLS 10 Audio | voice receiver 11 Reception part 12 Input processing part 13 Clock reproduction | regeneration part 14 Buffer 15 Reproduction | regeneration processing part 101 Signal detector 102 Signal selector 103 Subtractor 104 Divider 105 Accumulator 106 Integrated value evaluation part 107 Latch circuit 108 Counter 109 Digital Analog converter (D / A converter)
110 Low-pass filter (LPF)
111 Variable Frequency Oscillator (VCXO)
120 Control information generation unit 201, 202 Sound source 210, 211 Audio transmission device 220, 222 Network 221 Relay device 230, 231, 232, 233 Audio reception device 240, 241, 242, 243 Speaker 301 Clock information storage unit 302 Unreceived number counter 401 Signal Detector 402 Synchronization Signal Generator 403 Subtractor 404 Accumulator 405 Counter 406 Integrated Value Evaluation Unit 407 Latch Circuit 408 Digital Analog Converter (D / A Converter)
409 Low-pass filter (LPF)
410 Variable Frequency Oscillator (VCXO)
411 Control information generation unit

Claims (11)

Original clock information acquisition means for acquiring original clock information related to the clock of the transmission device from data being received from the transmission device;
A reproduction clock output means for outputting a reproduction clock;
From the original clock information acquired by the original clock information acquisition means, the synchronization clock selection means for selecting the original clock information at a predetermined frequency as the synchronization clock information used for synchronization,
The difference between the interval of the synchronization clock information based on the clock of the transmission device obtained from the original clock information and the interval of the acquisition time of the synchronization clock information measured by the recovered clock is the synchronization clock. Control means for controlling the recovered clock output means based on the value divided by the information interval;
With
The clock recovery device according to claim 1, wherein the synchronization clock selection means reduces the frequency of selecting the synchronization clock information as the recovered clock approaches the original clock under the control of the control means.   The synchronization clock selection means is an original clock to be selected as the synchronization clock information from the reproduction clock output from the reproduction clock output means and a predetermined frequency for selecting the synchronization clock information. 2. The clock recovery apparatus according to claim 1, wherein a timing for receiving information is predicted, and it is determined whether or not the original clock information has been received at the predicted timing.   The synchronization clock selection unit, when receiving the original clock information within a predetermined range including the predicted timing, determines that the original clock information has been received at the predicted timing. Item 3. The clock recovery device according to Item 2.   The synchronization clock selection means sets the frequency of selecting the synchronization clock information to an initial value when an event in which the original clock information cannot be received at a predicted timing continues for a predetermined number of times. The clock recovery device according to claim 2 or 3. The synchronization clock selection means notifies the control means of the timing at which the synchronization clock information is selected,
The control means measures the acquisition time of the synchronization clock information by counting the reproduction clock output from the reproduction clock output means at the timing notified from the synchronization clock selection means. 5. The clock recovery device according to claim 1, wherein The control means includes
Subtracting means for obtaining a difference between an interval of the synchronization clock information based on the clock of the transmission device obtained from the original clock information and an interval of acquisition time of the clock information for synchronization measured by the recovered clock;
Dividing means for dividing the difference obtained by the subtracting means by the interval of the clock information for synchronization adjustment;
Integrating means for integrating the values obtained by the dividing means;
With
2. The clock recovery apparatus according to claim 1, wherein the recovered clock output means is controlled based on a value obtained by the dividing means or a value obtained by the integrating means. The control means includes
It is determined whether or not the value obtained by the integrating means is within a predetermined range, and when it is determined that the value is within the predetermined range for a predetermined number of times, the synchronization clock information is selected. 7. The clock recovery apparatus according to claim 6, wherein the frequency is lowered. The control means includes
It is determined whether or not the value obtained by the integrating means is within a predetermined range, and when it is determined that the value is not within the predetermined range, the reproduction clock is based on the value obtained by the dividing means. 7. The clock recovery apparatus according to claim 6, wherein the output means is controlled. The control means includes
9. The control circuit according to claim 8, wherein when the reproduction clock output means is controlled based on a value obtained by the dividing means, the value obtained by the integrating means is initialized with the value obtained by the dividing means. A clock recovery device according to 1. Original clock information acquisition means for acquiring original clock information related to the clock of the transmission device from data being received from the transmission device;
A reproduction clock output means for outputting a reproduction clock;
From the original clock information acquired by the original clock information acquisition means, the synchronization clock selection means for selecting the original clock information at a predetermined frequency as the synchronization clock information used for synchronization,
The difference between the interval of the synchronization clock information based on the clock of the transmission device obtained from the original clock information and the interval of the acquisition time of the synchronization clock information measured by the recovered clock is the synchronization clock. Control means for controlling the reproduction clock output means so that the value divided by the information interval approaches zero;
With
The clock recovery device according to claim 1, wherein the synchronization clock selection means reduces the frequency of selecting the synchronization clock information as the recovered clock approaches the original clock under the control of the control means. A receiving unit for receiving data transferred from a transmitting device via a predetermined network;
A clock recovery unit for generating a recovery clock;
A buffer for temporarily storing data received by the receiving unit;
A data processing unit for processing data stored in the buffer in synchronization with a reproduction clock generated by the clock reproduction unit;
Have
11. A data receiving device, wherein the clock recovery unit includes the clock recovery device according to claim 1.

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