JP2007150363A - Light emitting element - Google Patents

Light emitting element Download PDF

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JP2007150363A
JP2007150363A JP2007058058A JP2007058058A JP2007150363A JP 2007150363 A JP2007150363 A JP 2007150363A JP 2007058058 A JP2007058058 A JP 2007058058A JP 2007058058 A JP2007058058 A JP 2007058058A JP 2007150363 A JP2007150363 A JP 2007150363A
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layer
light
light emitting
side electrode
substrate
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Shuichi Shinagawa
修一 品川
Hidenori Kamei
英徳 亀井
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Panasonic Holdings Corp
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Matsushita Electric Industrial Co Ltd
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<P>PROBLEM TO BE SOLVED: To provide a light emitting element capable of enhancing luminance. <P>SOLUTION: In order to achieve the above object, the light emitting element includes a light transmitting substrate 1, an n-layer 3 and a p-layer 5 provided on the substrate 1, an emission layer 4 provided between the n-layer 3 and the p-layer 5, and an n-side electrode 7 and a p-side electrode 6 provided on the n-layer 3 and the p-layer 5, respectively. The p-side electrode 6 is formed by laminating at least a Pt layer 61, an Ag layer 62, and an Mo layer 63, from the p-layer 5 side in this order. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

本発明は、電子機器、ディスプレイ、照明、バックライトなどに用いられる発光素子(LED、LD)に関するものである。   The present invention relates to a light emitting element (LED, LD) used for an electronic device, a display, illumination, a backlight, and the like.

図2は従来の発光素子を示す側面図である。   FIG. 2 is a side view showing a conventional light emitting device.

図2において、11は基板で、基板11は透明或いは半透明となるように構成されている。12は基板上に設けられたn層、13はn層12の上に設けられた発光層、14は発光層13の上に設けられたp層、15はp層14の上に設けられたp側電極で、p側電極15は、Pt層16、Ag層17、Ni層18、Au層19をp層14側から順に積層して構成されている。20はn層12に電気的に接続されたn側電極で、n側電極20はn層側からTi層21とAu層22を順に積層して構成される。   In FIG. 2, reference numeral 11 denotes a substrate, and the substrate 11 is configured to be transparent or translucent. 12 is an n layer provided on the substrate, 13 is a light emitting layer provided on the n layer 12, 14 is a p layer provided on the light emitting layer 13, and 15 is provided on the p layer 14. The p-side electrode 15 is configured by laminating a Pt layer 16, an Ag layer 17, a Ni layer 18, and an Au layer 19 in this order from the p-layer 14 side. Reference numeral 20 denotes an n-side electrode electrically connected to the n-layer 12, and the n-side electrode 20 is configured by sequentially laminating a Ti layer 21 and an Au layer 22 from the n-layer side.

この様に構成された発光素子は、回路基板や載置部材などの実装基板23上に設けられた電極パターン24、25にそれぞれp側電極15及びn側電極20を半田等の接合材で面実装している。そして、発光層13で放出された光の内、基板11側に放出された光はそのまま外方へ放出され、p側電極15側に放出された光は、p側電極15のAg層17等によって基板11側に反射されることで、輝度を向上させていた。   The light-emitting element configured in this manner has the p-side electrode 15 and the n-side electrode 20 on the electrode patterns 24 and 25 provided on the mounting substrate 23 such as a circuit board and a mounting member, respectively, with a bonding material such as solder. Implemented. Of the light emitted from the light emitting layer 13, the light emitted to the substrate 11 side is emitted outward as it is, and the light emitted to the p side electrode 15 side is the Ag layer 17 of the p side electrode 15 or the like. As a result, the luminance is improved.

先行例としては、特許文献1等が挙げられる。
特開平11−220168号公報
As a prior example, Patent Literature 1 and the like can be cited.
Japanese Patent Laid-Open No. 11-220168

しかしながら前記従来の構成では、更に同じ駆動電圧で輝度を高めようとしても、なかなか輝度を高くすることができなかった。   However, in the conventional configuration, even if it is attempted to further increase the luminance with the same driving voltage, it has been difficult to increase the luminance.

本発明は、上記の課題を解決するもので、輝度を高めることができる発光素子に関するものである。   The present invention solves the above-described problems, and relates to a light-emitting element capable of increasing luminance.

上記の目的を達成するために、本発明は、光を透過可能な基板と、基板上に設けられたn層及びp層と、前記n層と前記p層の間に設けられた発光層と、前記n層と前記p層にそれぞれ設けられたn側電極とp側電極を有した発光素子であって、p側電極を少なくともp層側からPt層、Ag層、Mo層の順に積層した。   In order to achieve the above object, the present invention includes a substrate capable of transmitting light, an n layer and a p layer provided on the substrate, a light emitting layer provided between the n layer and the p layer, A light-emitting element having an n-side electrode and a p-side electrode provided in the n layer and the p layer, respectively, wherein the p side electrode is laminated at least from the p layer side in the order of the Pt layer, the Ag layer, and the Mo layer. .

光を透過可能な基板と、基板上に設けられたn層及びp層と、前記n層と前記p層の間に設けられた発光層と、前記n層と前記p層にそれぞれ設けられたn側電極とp側電極を有した発光素子であって、p側電極を少なくともp層側からPt層、Ag層、Mo層の順に積層したことで、Pt層に入射してきた光をPt層自体で吸収されるのを抑えることができ、しかもAg層で十分に反射させることができるので、電極構造の改良のみで輝度を向上させることができ、しかもp側電極とp層との電気的接続は十分良好に行えるので、駆動電圧などを高くしなくても良い。   A substrate capable of transmitting light, an n layer and a p layer provided on the substrate, a light emitting layer provided between the n layer and the p layer, and provided on the n layer and the p layer, respectively. A light-emitting element having an n-side electrode and a p-side electrode, wherein the p-side electrode is laminated at least from the p-layer side in the order of the Pt layer, the Ag layer, and the Mo layer, so that the light incident on the Pt layer Since it can be absorbed by itself and can be sufficiently reflected by the Ag layer, the luminance can be improved only by improving the electrode structure, and the electrical property between the p-side electrode and the p layer can be improved. Since the connection can be made sufficiently satisfactorily, it is not necessary to increase the drive voltage.

請求項1記載の発明は、光を透過可能な基板と、前記基板上に設けられたn層及びp層と、前記n層と前記p層の間に設けられた発光層と、前記n層と前記p層にそれぞれ設けられたn側電極とp側電極を有した発光素子であって、p側電極を少なくともp層側からPt層、Ag層、Mo層の順に積層したことを特徴とする発光素子とすることで、Pt層に入射してきた光をPt層自体で吸収されるのを抑えることができ、しかもAg層で十分に反射させることができるので、電極構造の改良のみで輝度を向上させることができ、しかもp側電極とp層との電気的接続は十分良好に行えるので、駆動電圧などを高くしなくても良い。   The invention according to claim 1 is a substrate capable of transmitting light, an n layer and a p layer provided on the substrate, a light emitting layer provided between the n layer and the p layer, and the n layer A light emitting device having an n-side electrode and a p-side electrode respectively provided on the p layer, wherein the p-side electrode is laminated at least from the p layer side in the order of the Pt layer, the Ag layer, and the Mo layer. By making the light emitting element to be used, the light incident on the Pt layer can be suppressed from being absorbed by the Pt layer itself, and can be sufficiently reflected by the Ag layer. In addition, since the electrical connection between the p-side electrode and the p layer can be made sufficiently satisfactorily, the drive voltage and the like need not be increased.

n層、p層、発光層を少なくともGaとNを含む半導体層で構成したことを特徴とする発光素子とすることで、緑色、青色、紫色等の短波長の光を放出させることができる。   By using a light-emitting element in which the n-layer, the p-layer, and the light-emitting layer are formed of a semiconductor layer containing at least Ga and N, light having a short wavelength such as green, blue, or purple can be emitted.

n層にp層が設けられる第1の面と、前記第1の面と同一方向を向いた前記第1の面よりも段落ちした第2の面とを備え、前記第2の面にn側電極を設けたことを特徴とする発光素子とすることで、同一面方向において、p側電極とn側電極の電気的接合を行うことができ、面実装可能な発光素子を得ることができる。   a first surface on which the p layer is provided in the n layer; and a second surface stepped down from the first surface facing the same direction as the first surface, and the second surface has n By using a light-emitting element having a side electrode, the p-side electrode and the n-side electrode can be electrically joined in the same plane direction, and a surface-mountable light-emitting element can be obtained. .

光を透過可能なn型導電性基板と、前記n型導電性基板上に設けられたp層と、前記n型導電性基板と前記p層の間に設けられた発光層と、前記n型導電性基板と前記p層にそれぞれ設けられたn側電極とp側電極を有した発光素子であって、p側電極を少なくともp層側からPt層、Ag層順に積層した構成とするとともに、前記Pt層の膜厚を0.5nm〜5nmとしたことを特徴とする発光素子とすることで、Pt層に入射してきた光をPt層自体で吸収されるのを抑えることができ、しかもAg層で十分に反射させることができるので、電極構造の改良のみで輝度を向上させることができ、しかもp側電極とp層との電気的接続は十分良好に行えるので、駆動電圧などを高くしなくても良い。更に駆動電圧が低い素子を作製でき、低消費電力の素子を得ることができる。   An n-type conductive substrate capable of transmitting light, a p-layer provided on the n-type conductive substrate, a light-emitting layer provided between the n-type conductive substrate and the p-layer, and the n-type A light-emitting element having an n-side electrode and a p-side electrode provided on a conductive substrate and the p layer, respectively, wherein the p-side electrode is laminated at least from the p layer side in the order of the Pt layer and the Ag layer, By making a light emitting element characterized in that the film thickness of the Pt layer is 0.5 nm to 5 nm, it is possible to suppress the light incident on the Pt layer from being absorbed by the Pt layer itself, and Ag. Since the light can be sufficiently reflected by the layer, the luminance can be improved only by improving the electrode structure, and the electrical connection between the p-side electrode and the p-layer can be made sufficiently good, so that the drive voltage is increased. It is not necessary. Furthermore, an element with a low driving voltage can be manufactured, and an element with low power consumption can be obtained.

Ag層の厚さを5nm〜2000nmとした発光素子とすることで、所望の反射特性を得ることができ、しかも生産性を向上させることができる。   By using a light-emitting element in which the thickness of the Ag layer is 5 nm to 2000 nm, desired reflection characteristics can be obtained and productivity can be improved.

実装部材に電極パターンが設けられ、前記実装部材の電極パターンに発光素子を面実装にて実装したことを特徴とする発光素子の実装構造とすることで、輝度の高いLED等を容易に作製できる。   A light-emitting element mounting structure in which an electrode pattern is provided on the mounting member and the light-emitting element is mounted on the electrode pattern of the mounting member by surface mounting makes it possible to easily produce a high-luminance LED or the like. .

以下に、本発明の実施の形態を図面に基づいて説明する。   Embodiments of the present invention will be described below with reference to the drawings.

図1は本発明の一実施の形態における発光素子を示す側面図である。   FIG. 1 is a side view showing a light-emitting element according to an embodiment of the present invention.

図1において、基板1としては少なくとも光が通過可能な程度の透明度を有するものが用いられる。基板1の構成材料としては、サファイア基板、SiC基板、GaN基板などが用いられる。   In FIG. 1, a substrate 1 having a transparency that allows light to pass through is used. As a constituent material of the substrate 1, a sapphire substrate, a SiC substrate, a GaN substrate, or the like is used.

3は基板1の上に直接あるいは図示していないがバッファ層を介して設けられたn層で、n層3は少なくともGaとNを含んだ半導体層で構成され、しかもn型ドーパントとしては、Si又はGe等が好適に用いられる。このn層3は膜厚4μmで構成されている。   Reference numeral 3 denotes an n layer provided directly on the substrate 1 or via a buffer layer (not shown). The n layer 3 is composed of a semiconductor layer containing at least Ga and N. Further, as an n-type dopant, Si or Ge is preferably used. The n layer 3 has a thickness of 4 μm.

4はn層3の上に設けられた発光層で、発光層4はn層3の上に直接或いは少なくともGaとNを含む半導体層を介して積層されている。発光層4は少なくともGa、Nを含み、所望の発光波長を得る為に必要な場合は適量のInを含む半導体からなる。また、発光層4としては、図1においては1層構造としているが、例えば、InGaN層とGaN層を交互に少なくとも一対積層した多量子井戸構造とすることで、更に輝度を向上させることができる。   Reference numeral 4 denotes a light emitting layer provided on the n layer 3. The light emitting layer 4 is laminated on the n layer 3 directly or via a semiconductor layer containing at least Ga and N. The light emitting layer 4 is made of a semiconductor containing at least Ga and N, and containing an appropriate amount of In when necessary to obtain a desired emission wavelength. Further, although the light emitting layer 4 has a single layer structure in FIG. 1, the luminance can be further improved by, for example, a multi quantum well structure in which at least a pair of InGaN layers and GaN layers are alternately stacked. .

5は発光層4の上に直接或いは少なくともGaとNを含んだ半導体層を介して積層されたp層で、p層5は少なくともGaとNを含んだ半導体層で構成され、しかもp型ドーパントとしては、Mg等が好適に用いられる。このp層5は膜厚0.3μmで構成されている。   Reference numeral 5 denotes a p layer laminated on the light emitting layer 4 directly or via a semiconductor layer containing at least Ga and N. The p layer 5 is composed of a semiconductor layer containing at least Ga and N, and is a p-type dopant. As Mg, Mg or the like is preferably used. The p layer 5 has a thickness of 0.3 μm.

6はp層5の上に設けられたp側電極で、p側電極6はp層5側からPt層61、Ag層62、Mo層63、Au層64を順に積層して構成されている。   Reference numeral 6 denotes a p-side electrode provided on the p-layer 5, and the p-side electrode 6 is formed by sequentially stacking a Pt layer 61, an Ag layer 62, a Mo layer 63, and an Au layer 64 from the p-layer 5 side. .

本発明の特徴の一つは、Pt層61の膜厚を0.5nm〜5nmとしたことを特徴とする。すなわち、Pt層61はp層5と良好な電気的接続を得るために0.5nm以上の膜厚で構成されており、Pt層61が5nmより厚いと、Pt層61自体での光の吸収が大きくなってしまい、輝度が低下する。   One of the features of the present invention is that the thickness of the Pt layer 61 is set to 0.5 nm to 5 nm. That is, the Pt layer 61 is formed with a film thickness of 0.5 nm or more in order to obtain a good electrical connection with the p layer 5, and if the Pt layer 61 is thicker than 5 nm, the light absorption by the Pt layer 61 itself is performed. Becomes larger and the luminance is lowered.

また、本発明の特徴の一つは、Ag層62の厚さを5nm〜2000nmとすることを特徴とする。すなわち、Ag層62の膜厚が5nmより薄いと十分な反射特性を得ることはできず、逆に2000nmより厚いと、反射特性に変化は無く、膜の形成に必要となる蒸発原料が多く必要となり、又この工程にかかる時間が長くなる為、製造コストが高くなってしまう。   One of the characteristics of the present invention is that the thickness of the Ag layer 62 is 5 nm to 2000 nm. That is, if the thickness of the Ag layer 62 is less than 5 nm, sufficient reflection characteristics cannot be obtained. Conversely, if the thickness of the Ag layer 62 is more than 2000 nm, there is no change in the reflection characteristics, and a large amount of evaporation raw material is required to form the film. In addition, since the time required for this process becomes long, the manufacturing cost becomes high.

この様に、Pt層61の膜厚を0.5〜5nmとすることで発光層から放射された光がPt層61に入射してもPt層61自体における光吸収を抑えることができ輝度を向上させることができ、しかもAg層62での反射特性を十分に得ることができる。従来の技術で示した先行例では、Pt層は5nm以上であるので光吸収が多く発生し、輝度が低下する。   In this way, by setting the film thickness of the Pt layer 61 to 0.5 to 5 nm, even if light emitted from the light emitting layer enters the Pt layer 61, light absorption in the Pt layer 61 itself can be suppressed and luminance can be reduced. In addition, the reflection characteristics at the Ag layer 62 can be sufficiently obtained. In the prior art shown in the prior art, since the Pt layer is 5 nm or more, a large amount of light absorption occurs and the luminance decreases.

本発明はこのPt層61自体の光吸収が輝度向上に影響を与えることに着目し、オーミック接合の度合いなどを考慮することで、Pt層61の膜厚を規定し、その結果p側電極6の改良のみで輝度を向上させることができる。   The present invention pays attention to the fact that the light absorption of the Pt layer 61 itself affects the luminance improvement, and the thickness of the Pt layer 61 is defined by considering the degree of ohmic junction and the like. As a result, the p-side electrode 6 Luminance can be improved only by improvement.

なお、p側電極6はp層5の全面或いはp層5の表出面積の80%以上設けることが好ましい。   The p-side electrode 6 is preferably provided on the entire surface of the p layer 5 or 80% or more of the exposed area of the p layer 5.

7はp層5を設けた側に表出したn層3の一部に設けられたn側電極で、n側電極7はn層3側からTi層71、Au層72を順に積層して構成されている。   7 is an n-side electrode provided on a part of the n-layer 3 exposed on the side where the p-layer 5 is provided. The n-side electrode 7 is formed by sequentially laminating a Ti layer 71 and an Au layer 72 from the n-layer 3 side. It is configured.

8は上述の様に構成された発光素子が実装される実装部材で、実装部材8としては、回路基板や載置部材などが好適に用いられる。実装部材8上には少なくとも電極パターン9、10が設けられており、この電極パターン9、10には例えばそれぞれAu層64及びAu層72が半田や鉛フリー半田等の導電性接合材にて電気的に接合されている。   Reference numeral 8 denotes a mounting member on which the light-emitting element configured as described above is mounted. As the mounting member 8, a circuit board, a mounting member, or the like is preferably used. At least electrode patterns 9 and 10 are provided on the mounting member 8. For example, an Au layer 64 and an Au layer 72 are electrically connected to the electrode patterns 9 and 10 by a conductive bonding material such as solder or lead-free solder, respectively. Are joined together.

以上の様に構成された発光素子は、発光層4で放出された光がPt層61に入射してもPt層61の厚みを5nm以下としていることでPt層61自体での光吸収を抑えることができ、しかも膜厚を0.5nm以上とすることで、十分なp層5との電気的接合を得ることができる。   The light emitting device configured as described above suppresses light absorption in the Pt layer 61 itself even if light emitted from the light emitting layer 4 is incident on the Pt layer 61 because the thickness of the Pt layer 61 is 5 nm or less. In addition, a sufficient electrical junction with the p layer 5 can be obtained by setting the film thickness to 0.5 nm or more.

従って、発光層4からp側電極6側に放出された光は効率よく反射されて基板1から放出されるので、p側電極6の改良のみで、十分な輝度向上を実現できる。   Therefore, the light emitted from the light emitting layer 4 to the p-side electrode 6 side is efficiently reflected and emitted from the substrate 1, so that a sufficient luminance improvement can be realized only by improving the p-side electrode 6.

なお、本実施の形態では、Pt層、Ag層、Mo層、Au層、Ti層等は各材料単体で構成される場合ももちろんその元素を主成分とする層でも良い。すなわち、例えばPt層であれば、Ptの特性に影響を与えない範囲で所定の元素が混入した材料でも良い。   In the present embodiment, the Pt layer, the Ag layer, the Mo layer, the Au layer, the Ti layer, or the like may be formed of each material alone or may be a layer containing the element as a main component. That is, for example, in the case of a Pt layer, a material in which a predetermined element is mixed in a range that does not affect the characteristics of Pt may be used.

本発明の実施例として、図3に示す窒化ガリウム系化合物半導体発光素子の作製方法を記す。以下の実施例においては、窒化ガリウム系化合物半導体の成長方法として有機金属気相成長法を用いたものを示すが、成長方法はこれに限定されるものではなく、分子線エピタキシー法や有機金属分子線エピタキシー法等を用いることも可能である。   As an example of the present invention, a method for manufacturing a gallium nitride-based compound semiconductor light-emitting device shown in FIG. 3 will be described. In the following examples, a method using a metal organic vapor phase growth method is shown as a method for growing a gallium nitride compound semiconductor, but the growth method is not limited to this, and a molecular beam epitaxy method or a metal organic molecule is used. It is also possible to use a line epitaxy method or the like.

(実施例1)
先ず、表面を鏡面に仕上げられたサファイアの基板1を反応管内の基板ホルダーに載置した後、基板1の温度を1000℃に保ち、窒素と水素を流しながら基板1を10分間加熱することにより、基板1の表面に付着している有機物等の汚れや水分を取り除いた。
Example 1
First, after placing a sapphire substrate 1 having a mirror-finished surface on a substrate holder in a reaction tube, the substrate 1 is heated to 1000 ° C. and heated for 10 minutes while flowing nitrogen and hydrogen. Then, dirt and moisture such as organic substances adhering to the surface of the substrate 1 were removed.

次に、基板1の温度を550℃にまで降下させ、キャリアガスとして窒素を流しながら、アンモニアとトリメチルガリウム(以下、「TMG」と略称する。)を供給して、GaNからなるバッファ層2を25nmの厚さで成長させた。   Next, the temperature of the substrate 1 is lowered to 550 ° C., ammonia and trimethylgallium (hereinafter abbreviated as “TMG”) are supplied while flowing nitrogen as a carrier gas, and the buffer layer 2 made of GaN is formed. Growing with a thickness of 25 nm.

次に、TMGの供給を止めて1050℃まで昇温させた後、キャリアガスとして窒素と水素を流しながら、アンモニア、TMGそしてSiH4を供給して、SiをドープしたGaNからなるn層3を4μmの厚さで成長させた。 Next, after the supply of TMG is stopped and the temperature is raised to 1050 ° C., ammonia, TMG and SiH 4 are supplied while flowing nitrogen and hydrogen as carrier gases, and the n layer 3 made of Si-doped GaN is formed. The film was grown at a thickness of 4 μm.

n層3を成長後、TMGとSiH4の供給を止め、基板温度を750℃にまで降下させ、750℃において、キャリアガスとして窒素を流しながら、アンモニア、TMG、トリメチルインジウム(以下、「TMI」と略称する。)を供給して、アンドープのInGaNからなる単一量子井戸構造の発光層4を2nmの厚さで成長させた。 After the n-layer 3 is grown, the supply of TMG and SiH 4 is stopped, the substrate temperature is lowered to 750 ° C., and at 750 ° C., nitrogen, flowing as a carrier gas, ammonia, TMG, trimethylindium (hereinafter “TMI”) The light emitting layer 4 having a single quantum well structure made of undoped InGaN was grown to a thickness of 2 nm.

発光層4を成長後、TMIの供給を止め、TMGを流しながら基板温度を1050℃に向けて昇温させながら、引き続きアンドープのGaN(図示せず)を4nmの厚さで成長させ、基板温度が1050℃に達したら、キャリアガスとして窒素と水素を流しながら、アンモニア、TMG、トリメチルアルミニウム(以下、「TMA」、と略称する。)、シクロペンタジエニルマグネシウム(以下、「Cp2Mg」と略称する。)を供給して、MgをドープさせたAlGaNからなるp型クラッド層51を0.2μmの厚さで成長させた。 After the light emitting layer 4 is grown, the supply of TMI is stopped, and the substrate temperature is raised toward 1050 ° C. while flowing TMG, and subsequently, undoped GaN (not shown) is grown to a thickness of 4 nm. Reaches 1050 ° C., while flowing nitrogen and hydrogen as carrier gases, ammonia, TMG, trimethylaluminum (hereinafter abbreviated as “TMA”), cyclopentadienylmagnesium (hereinafter referred to as “Cp 2 Mg”) (Abbreviated)), a p-type cladding layer 51 made of AlGaN doped with Mg was grown to a thickness of 0.2 μm.

p型クラッド層51を成長後、基板1の温度を1050℃に保持したままで、キャリアガスとして窒素ガス及び水素ガスを流しながら、アンモニア、TMG、TMA、及びCp2Mgを供給して、MgをドープしたAlGaNからなるp型コンタクト層52を0.1μmの厚さで成長させた。 After growing the p-type cladding layer 51, ammonia, TMG, TMA, and Cp 2 Mg are supplied while flowing nitrogen gas and hydrogen gas as carrier gases while maintaining the temperature of the substrate 1 at 1050 ° C., and Mg A p-type contact layer 52 made of AlGaN doped with is grown to a thickness of 0.1 μm.

p型コンタクト層52を成長後、TMGとTMAとCp2Mgの供給を止め、窒素ガスとアンモニアを流しながら、基板1の温度を室温程度にまで冷却させて、基板1の上に窒化ガリウム系化合物半導体が積層されたウェハーを反応管から取り出した。 After the growth of the p-type contact layer 52, the supply of TMG, TMA, and Cp 2 Mg is stopped, and the temperature of the substrate 1 is cooled to about room temperature while flowing nitrogen gas and ammonia. The wafer on which the compound semiconductor was laminated was taken out from the reaction tube.

このようにして形成した窒化ガリウム系化合物半導体からなる積層構造に対して、別途アニールを施すことなく、その表面上にCVD法によりSiO2膜を堆積させた後、フォトリソグラフィとウェットエッチングにより略方形状にパターンニングしてエッチング用のSiO2マスクを形成させた。そして、反応性イオンエッチング法により、p型コンタクト層52とp型クラッド層51と中間層と発光層4とn層3の一部を約0.4μmの深さで積層方向と逆の方向に向かって除去させて、n層3の表面を露出させた。 After the SiO 2 film is deposited on the surface of the laminated structure made of the gallium nitride compound semiconductor formed in this way by the CVD method without being separately annealed, it is roughly processed by photolithography and wet etching. An SiO 2 mask for etching was formed by patterning into a shape. Then, by reactive ion etching, the p-type contact layer 52, the p-type cladding layer 51, the intermediate layer, the light-emitting layer 4 and a part of the n-layer 3 are formed at a depth of about 0.4 μm in the direction opposite to the stacking direction. Then, the surface of the n layer 3 was exposed.

そして、エッチング用のSiO2マスクをウェットエッチングにより除去させた後、積層構造の表面上にフォトレジストを塗布し、フォトリソグラフィーによりp型コンタクト層52の表面上のフォトレジストのみを取り除き、p型コンタクト層52の表面の80%以上を露出させた。そして、積層構造を真空蒸着装置のチャンバー内に装着し、チャンバー内を2×10-6Torr以下にまで真空排気した後、電子ビーム蒸着法により露出されたp型コンタクト層52の表面上およびフォトレジスト上に、1nmの厚さのPt層61を蒸着した。続いて、100nmの厚さのAg層62を蒸着し、更に100nmの厚さのMo層63と1μmの厚さのAu層64を順次蒸着した。次に、積層構造をチャンバーから取り出し、フォトレジスト上のPt層61とAg層62とMo層63とAu層64をフォトレジストと共に除去することによって、p型コンタクト層52の表面上にPt層61とAg層62とMo層63とAu層64が順次積層されたp側電極6を形成した。 Then, after removing the etching SiO 2 mask by wet etching, a photoresist is applied on the surface of the laminated structure, and only the photoresist on the surface of the p-type contact layer 52 is removed by photolithography to remove the p-type contact. More than 80% of the surface of the layer 52 was exposed. Then, the stacked structure is mounted in a chamber of a vacuum deposition apparatus, the inside of the chamber is evacuated to 2 × 10 −6 Torr or less, and then the surface of the p-type contact layer 52 exposed by the electron beam deposition method and a photo A 1 nm thick Pt layer 61 was deposited on the resist. Subsequently, an Ag layer 62 having a thickness of 100 nm was deposited, and a Mo layer 63 having a thickness of 100 nm and an Au layer 64 having a thickness of 1 μm were sequentially deposited. Next, the stacked structure is taken out of the chamber, and the Pt layer 61, the Ag layer 62, the Mo layer 63, and the Au layer 64 on the photoresist are removed together with the photoresist to thereby form the Pt layer 61 on the surface of the p-type contact layer 52. Then, the p-side electrode 6 in which the Ag layer 62, the Mo layer 63, and the Au layer 64 are sequentially laminated is formed.

再び積層構造の表面上にフォトレジストを塗布し、フォトリソグラフィーにより、露出させたn層3の表面一部の上のフォトレジストのみを取り除き、n層3の表面一部を露出させた。そして、積層構造を真空蒸着装置のチャンバー内に装着し、チャンバー内を2×10-6Torr以下にまで真空排気した後、電子ビーム蒸着法により、露出されたn層3の表面上およびフォトレジスト上に、100nmの厚さのTi層71を蒸着し、更に1.5μmの厚さのAu層72を蒸着した。次に、積層構造をチャンバーから取り出し、フォトレジスト上のTi層71とAu層72をフォトレジストと共に除去することによって、n層3の表面一部の上にTi層71とAu層72が順次積層されたn側電極7を形成した。 A photoresist was applied again on the surface of the laminated structure, and only the photoresist on the exposed surface portion of the n layer 3 was removed by photolithography to expose a portion of the surface of the n layer 3. Then, the laminated structure is mounted in a chamber of a vacuum deposition apparatus, the inside of the chamber is evacuated to 2 × 10 −6 Torr or less, and then the exposed surface of the n layer 3 and the photoresist by electron beam deposition. On top of this, a Ti layer 71 having a thickness of 100 nm was deposited, and an Au layer 72 having a thickness of 1.5 μm was further deposited. Next, the Ti layer 71 and the Au layer 72 are sequentially laminated on a part of the surface of the n layer 3 by removing the laminated structure from the chamber and removing the Ti layer 71 and the Au layer 72 on the photoresist together with the photoresist. The n-side electrode 7 thus formed was formed.

この後、基板1の裏面を研磨して100μm程度の厚さに調整し、スクライブによりチップ状に分離した。このようにして、図3に示す窒化ガリウム系化合物半導体発光素子が得られた。   Thereafter, the back surface of the substrate 1 was polished and adjusted to a thickness of about 100 μm, and separated into chips by scribing. In this way, the gallium nitride compound semiconductor light emitting device shown in FIG. 3 was obtained.

この発光素子を、電極形成面側を下向きにして、正負一対の電極を有するSiダイオードの上にAuバンプにより接着させた。このとき、発光素子のp側電極6およびn側電極7が、それぞれSiダイオードの負電極および正電極と接続されるようにして発光素子を搭載する。この後、発光素子を搭載させたSiダイオードを、Agペーストによりステム上に載置し、Siダイオードの正電極をステム上の電極にワイヤで結線し、その後樹脂モールドして発光ダイオードを作製した。この発光ダイオードを20mAの順方向電流で駆動したところ、ピーク発光波長470nmの青色で発光し、基板1の積層構造を形成した側の反対側の面から均一な面発光が得られた。このときの順方向動作電圧は3.4Vであり、発光出力は6.4mWであった。   This light emitting element was bonded by Au bumps on a Si diode having a pair of positive and negative electrodes with the electrode formation surface side facing down. At this time, the light-emitting element is mounted so that the p-side electrode 6 and the n-side electrode 7 of the light-emitting element are connected to the negative electrode and the positive electrode of the Si diode, respectively. Thereafter, the Si diode on which the light emitting element was mounted was placed on the stem with Ag paste, the positive electrode of the Si diode was connected to the electrode on the stem with a wire, and then resin molded to produce a light emitting diode. When this light emitting diode was driven with a forward current of 20 mA, it emitted blue light with a peak emission wavelength of 470 nm, and uniform surface light emission was obtained from the surface opposite to the side where the laminated structure of the substrate 1 was formed. At this time, the forward operating voltage was 3.4 V, and the light emission output was 6.4 mW.

(実施例2)
実施例2においては、上記実施例1において、Pt層61の厚みを6nmとした以外は、上記実施例1と同様の手順で発光素子を作製した。この発光素子を20mAの順方向電流で駆動したところ、ピーク発光波長470nmの青色で発光し、基板1の積層構造を形成した側の反対側の面から均一な面発光が得られたが、このときの順方向動作電圧は3.4Vであり、発光出力は4.1mWであった。
(Example 2)
In Example 2, a light emitting device was manufactured in the same procedure as in Example 1 except that the thickness of the Pt layer 61 was changed to 6 nm in Example 1. When this light emitting device was driven with a forward current of 20 mA, it emitted blue light with a peak emission wavelength of 470 nm, and uniform surface emission was obtained from the surface opposite to the side where the laminated structure of the substrate 1 was formed. The forward operating voltage was 3.4 V, and the light emission output was 4.1 mW.

以上の様に説明した、Pt層の膜厚と発光素子の輝度の関係と、Pt層の膜厚と駆動電圧の関係について、図4と図5を用いて説明する。   The relationship between the film thickness of the Pt layer and the luminance of the light emitting element and the relationship between the film thickness of the Pt layer and the driving voltage described above will be described with reference to FIGS.

図4に示すように、Pt層の膜厚が5nmよりも厚くなると、Pt層自体での光吸収量が著しく多くなると思われる原因で、輝度が低下する。更に図5から解るように、Pt層の膜厚が0.5nmよりも薄いとp層とのオーミック接合が確実に行われていないことが原因と思われる駆動電圧の上昇が見られる。   As shown in FIG. 4, when the film thickness of the Pt layer is thicker than 5 nm, the luminance decreases due to the reason that the amount of light absorption in the Pt layer itself is remarkably increased. Further, as can be seen from FIG. 5, when the film thickness of the Pt layer is less than 0.5 nm, an increase in driving voltage that is considered to be caused by the fact that the ohmic junction with the p layer is not reliably performed is observed.

従って、電気的な特性或いは輝度の面からPt層は0.5nm〜5nmとすることが好ましいことがわかる。   Therefore, it can be seen that the Pt layer is preferably 0.5 nm to 5 nm in terms of electrical characteristics or luminance.

Pt層に入射してきた光をPt層自体で吸収されるのを抑えることができ、しかもAg層で十分に反射させることができるので、電極構造の改良のみで輝度を向上させることができ、電子機器、ディスプレイ、照明、バックライトなどに用いられる発光素子として有用である。   The light incident on the Pt layer can be prevented from being absorbed by the Pt layer itself, and can be sufficiently reflected by the Ag layer, so that the luminance can be improved only by improving the electrode structure, It is useful as a light-emitting element used in equipment, displays, lighting, backlights, and the like.

本発明の一実施の形態における発光素子を示す側面図The side view which shows the light emitting element in one embodiment of this invention 従来の発光素子を示す側面図Side view showing a conventional light emitting device 本発明の一実施の形態における発光素子を示す側面図The side view which shows the light emitting element in one embodiment of this invention 本発明の一実施の形態における発光素子のPt層の膜厚と輝度との関係を示すグラフThe graph which shows the relationship between the film thickness of the Pt layer of a light emitting element in one embodiment of this invention, and a brightness | luminance 本発明の一実施の形態における発光素子のPt層の膜厚と駆動電圧との関係を示すグラフThe graph which shows the relationship between the film thickness of the Pt layer of the light emitting element in one embodiment of this invention, and a drive voltage

符号の説明Explanation of symbols

1 基板
2 バッファ層
3 n層
4 発光層
5 p層
6 p側電極
7 n側電極
8 実装部材
9、10 電極パターン
51 p型クラッド層
52 p型コンタクト層
61 Pt層
62 Ag層
63 Mo層
64 Au層
71 Ti層
72 Au層
DESCRIPTION OF SYMBOLS 1 Board | substrate 2 Buffer layer 3 n layer 4 Light emitting layer 5 p layer 6 p side electrode 7 n side electrode 8 Mounting member 9, 10 Electrode pattern 51 p type clad layer 52 p type contact layer 61 Pt layer 62 Ag layer 63 Mo layer 64 Au layer 71 Ti layer 72 Au layer

Claims (1)

光を透過可能な基板と、前記基板上に設けられたn層及びp層と、前記n層と前記p層の間に設けられた発光層と、前記n層と前記p層にそれぞれ設けられたn側電極とp側電極を有した発光素子であって、p側電極を少なくともp層側からPt層、Ag層、Mo層の順に積層したことを特徴とする発光素子。 A substrate capable of transmitting light; an n layer and a p layer provided on the substrate; a light emitting layer provided between the n layer and the p layer; and the n layer and the p layer. A light-emitting element having an n-side electrode and a p-side electrode, wherein the p-side electrode is laminated at least from the p layer side in the order of a Pt layer, an Ag layer, and a Mo layer.
JP2007058058A 2007-03-08 2007-03-08 Light emitting element Pending JP2007150363A (en)

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