JP2007150106A - Group iii nitride semiconductor substrate - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a group III nitride semiconductor substrate capable of sustaining a clean condition of the surface of an electron supplying layer with a gate electrode formed during a manufacturing of a group III nitride semiconductor system HJFET, and at the same time, having an effective structure for controlling a state of the interface with the surface protective film for covering the electron supplying layer existing between the gate electrode and the drain electrode. <P>SOLUTION: After the formation of the group III nitride semiconductor layer structure including a hetero junction used for the group III nitride semiconductor system HJFET, without exposed to an atmospheric air, without interruption, the nitride insulating film available for the surface protective film is formed. An impurity concentration of the interface between the nitride insulating film and the group III nitride semiconductor layer structure of the nitride semiconductor substrate is limited to not more than 1×10<SP>17</SP>atoms/cm<SP>3</SP>. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a group III nitride semiconductor substrate that can be used to manufacture a field effect transistor using a two-dimensional carrier gas. In particular, two-dimensional electrons are manufactured by applying a manufacturing process in which the surface of a group III nitride semiconductor layer structure is coated with an insulating film used as a surface protective film without being exposed to the atmosphere after its growth. The present invention relates to a group III nitride semiconductor substrate that can be used for manufacturing a field effect transistor using a gas.

Group III nitride semiconductors such as GaN have a larger band gap (Eg), a higher breakdown field strength (E _B ), and a higher electron saturation drift velocity than GaAs-based semiconductors. Utilizing these features, III-nitride semiconductors are used as semiconductor materials to realize electronic devices such as field effect transistors (FETs) that exhibit excellent performance in terms of high-temperature operation, high-speed switching operation, and high-power operation. I have high expectations.

  In addition, since group III nitride semiconductors have piezoelectricity, when a strain stress due to a difference in lattice constant is applied due to the heterojunction structure, it originates from spontaneous polarization and piezopolarization, resulting in the heterojunction interface. A highly concentrated two-dimensional carrier gas is generated. On the other hand, in a GaAs-based semiconductor field effect transistor, for example, a GaAs-based HEMT uses a mechanism that generates a two-dimensional carrier gas at a heterojunction interface by impurity doping in a carrier supply layer. Therefore, a hetero-junction field effect transistor (hereinafter referred to as HJFET) using a heterojunction of a group III nitride semiconductor can operate by a mechanism different from that of a GaAs HEMT. It has the characteristics.

  In a group III nitride semiconductor device such as AlGaN / GaN HEMT, negative charges are induced on the surface of the semiconductor layer structure as a result of generation of two-dimensional carrier gas at the heterojunction resulting from spontaneous polarization and piezoelectric polarization. . When the induced surface negative charge is trapped in the surface level, this greatly affects various characteristics of the transistor. Therefore, in the group III nitride semiconductor HJFET, it is important to develop a negative surface charge control technique and a substrate whose surface state is controlled. Hereinafter, this point will be described.

  In a III-nitride semiconductor layered structure including a heterojunction that functions as a carrier supply layer / channel layer, high-concentration carriers (two-dimensional electron gas) are accumulated on the channel layer side of the heterojunction interface due to piezoelectric polarization or the like. The On the other hand, it is known that a negative charge is generated on the surface of a semiconductor layer in a carrier supply layer such as AlGaN (Non-Patent Document 1). In addition to high-concentration carriers accumulated in the channel layer, negative charges localized on the surface also directly affect the drain current and have a great influence on device performance. Specifically, when a large amount of negative charge is generated on the surface, the maximum drain current during AC operation shows a significant decrease compared to the maximum drain current during DC operation. This phenomenon is hereinafter referred to as “current collapse”. In a heterojunction of a GaAs-based semiconductor, the generation of polarization charge due to spontaneous polarization and piezoelectric polarization due to piezoelectricity is extremely small, and no current collapse phenomenon is observed in a GaAs-based HEMT. Current collapse is remarkably found in a device utilizing a heterojunction of a group III nitride semiconductor having piezoelectricity, that is, a group III nitride semiconductor device such as an AlGaN / GaN HEMT.

  As a countermeasure against the problem of “current collapse” caused by negative charge on the surface trapped in the surface level, the surface level has been conventionally reduced by forming a protective layer on the surface of the semiconductor layer. Yes. In a structure in which the protective layer is not provided and the surface of the semiconductor layer is exposed to the atmosphere, the “current collapse” becomes remarkable as a result of the surface state being present at a high surface density. In particular, a sufficient drain current cannot be obtained when a high voltage is applied, and the advantages of employing a group III nitride semiconductor material for high power operation are not exhibited. Further, the effect of suppressing current collapse by the surface protective film depends on the material of the protective film to be used. For example, when an oxide film that is widely used as a surface protective film is used in a GaAs-based FET, a sufficient effect cannot be obtained in suppressing “current collapse” unique to a nitride semiconductor. On the other hand, SiN has an effect of suppressing “current collapse” in a group III nitride semiconductor device such as AlGaN / GaN HEMT, and is still widely used as a surface protective film material.

  Hereinafter, an example of a conventional group III nitride semiconductor HJFET having a surface protective film will be described.

  FIG. 4 is a cross-sectional view showing a configuration of a nitride semiconductor substrate used for manufacturing a conventional AlGaN / GaN HJFET. In the nitride semiconductor substrate shown in FIG. 4, a buffer layer 211 made of AlN, a GaN channel layer 212, and an AlGaN electron supply layer 213 are laminated on a sapphire substrate 209 in this order.

  Next, an example of a conventional method for manufacturing a nitride semiconductor substrate shown in FIG. 4 will be described. First, a nitride semiconductor layer is formed on a sapphire substrate 209 by using, for example, a molecular beam epitaxy (MBE) growth method or a metal organic vapor phase epitaxy (MOVPE) growth method. Grow sequentially. In order from the substrate side, a buffer layer 211 (thickness 20 nm) made of undoped AlN, an undoped GaN channel layer 212 (thickness 2 μm), and an AlGaN electron supply layer 213 (thickness 25 nm) made of undoped AlGaN are stacked, A nitride semiconductor substrate is obtained. After the AlGaN electron supply layer 213 is formed, the nitride semiconductor substrate is taken out of the film forming apparatus and proceeds to the next device manufacturing process.

  An example of the structure of an AlGaN / GaN HJFET manufactured using the conventional nitride semiconductor substrate shown in FIG. 4 is shown in FIG. A source electrode 201 and a drain electrode 203 are formed on an AlGaN electron supply layer 213 of a conventional nitride semiconductor substrate. The source electrode 201 and the drain electrode 203 are in ohmic contact with the AlGaN electron supply layer 213. A gate electrode 202 is formed between the source electrode 201 and the drain electrode 203. The gate electrode 202 is in Schottky contact with the AlGaN electron supply layer 213. After the gate electrode 202 is formed, a SiN film 221 is formed as a surface protective film that covers the surface of the AlGaN electron supply layer 213. In the AlGaN / GaN HJFET having the structure shown in FIG. 5, it is reported that “current collapse” is significantly suppressed by providing a SiN film as a surface protective film (Non-patent Document 2).

  Next, an example of a method for producing an AlGaN / GaN HJFET having the structure shown in FIG. 5 using the conventional nitride semiconductor substrate shown in FIG. 4 will be described. An element isolation mesa (not shown) is formed by etching away a part of the epitaxial layer structure until the GaN channel layer 212 of the nitride semiconductor substrate is exposed. Then, a photoresist mask having an opening in a predetermined region on the AlGaN electron supply layer 213 is formed. Thereafter, for example, a metal such as Ti / Al is deposited on the entire surface, and Ti / Al or the like for the source electrode 201 and the drain electrode 203 is formed in a predetermined region on the AlGaN electron supply layer 213 using a lift-off method or the like. Leave metal deposited film. Then, an ohmic junction is formed between the source electrode 201, the drain electrode 203, and the AlGaN electron supply layer 213 by annealing a metal vapor deposition film such as Ti / Al at 650 ° C.

  Again, a photoresist mask having an opening is formed in accordance with the shape of the gate electrode 202 disposed between the source electrode 201 and the drain electrode 203. Thereafter, Ni (upper layer) / Au (lower layer) is deposited on the entire surface, for example, as a metal film for the gate electrode, and lifted off to form a Ni (upper layer) / Au (lower layer) deposited film layer of a desired shape. It remains on the AlGaN electron supply layer 213. This Ni (upper layer) / Au (lower layer) vapor deposition film layer forms a Schottky junction with the AlGaN electron supply layer 213 and serves as the gate electrode 202.

Thereafter, a SiN film 221 (film thickness 50 nm) is formed on the entire surface by plasma CVD or the like. A predetermined region of the SiN film 221 is removed by etching to provide an opening. The source electrode 201 and the drain electrode 203 are exposed at the bottom of the opening. By the above procedure, the AlGaN / GaN HJFET 200 having the structure shown in FIG. 5 is obtained.
U. K. Misra, P.M. Parikh, and Yi-Feng Wu, “AlGaN / GaN HEMTs—Overview of device operation and applications.” Proc. IEEE, vol. 90, no. 6, pp. 1022-1031, 2002 2001 International Electron Device Meeting Digest (IEDM01-381-384), Ando (Y. Ando)

  However, when the present inventor examined the variation in device performance of the AlGaN / GaN HJFET having the structure shown in FIG. 5 manufactured by the manufacturing method described above, a surface protective film is provided for all the devices. Nevertheless, when the characteristics of the obtained elements were compared, it was found that variations occurred. Specifically, it has been clarified that, for example, an element for which a sufficient drain current is not obtained when a high voltage is applied is found with a considerable frequency despite the provision of a surface protective film.

  The present inventor examined the factors that cause the variation in the element characteristics and inferred the following mechanism.

  First, the following mechanism is presumed as a cause of insufficient drain current flowing when a high voltage is applied. In the manufacturing process, impurities are introduced into the interface between the AlGaN electron supply layer 213 and the SiN film 221 on the nitride semiconductor substrate, and an interface state is formed by the impurities. When an interface state is formed by impurities, it is presumed that carriers are trapped in the interface state. That is, when the interface state due to impurities is generated at a high surface density on the surface of the AlGaN electron supply layer 213, “current collapse” occurs, and thus, for example, a drain current is reduced when a high voltage is applied. .

  Further, in an AlGaN / GaN HJFET provided with a surface protective film, the occurrence of “current collapse” and the gate breakdown voltage have a trade-off relationship. The negative polarization charge generated on the surface of the AlGaN electron supply layer greatly affects the transistor characteristics depending on the electrical properties of the surface protective film (passivation film) deposited on the surface. In general, when negative fixed charges are present at a high surface density on the surface of the AlGaN electron supply layer, a high gate breakdown voltage can be obtained, but the “current collapse” during AC operation tends to increase. On the other hand, when the amount of negative fixed charge existing on the surface of the AlGaN electron supply layer is small, the gate breakdown voltage is relatively lowered, but the “current collapse” during AC operation is reduced.

For example, in an AlGaN (upper layer) / GaN (lower layer) heterostructure, a negative charge of the order of 1 × 10 ¹³ atoms / cm ² is induced on the surface of the AlGaN electron supply layer, depending on the Al composition and film thickness of AlGaN. The Therefore, if the negative charge induced on the surface of the AlGaN electron supply layer is fixed at the interface between the surface protective film (passivation film) and the AlGaN electron supply layer, it greatly contributes to the increase in gate breakdown voltage. That is, when a negative charge is fixed at the interface between the surface protective film (passivation film) and the AlGaN electron supply layer and a trap level is generated with a high surface density, a substantial portion of the induced negative charge is trapped, Functions as a negative fixed charge. It is not uncommon for the value of the gate breakdown voltage to change by one digit or more due to the difference in the state of the interface between the surface protective film (passivation film) and the AlGaN electron supply layer. Such a large change in the gate breakdown voltage due to the state of the interface with the surface protective film (passivation film) is a phenomenon that is not normally observed in a GaAs HEMT.

  Thus, the occurrence of “current collapse” and the gate breakdown voltage depend on the surface density of negative fixed charges generated on the surface of the AlGaN electron supply layer, and are in a trade-off relationship with each other. Therefore, it is desired that the design value set within the allowable range of the “current collapse” amount within the allowable range of the gate breakdown voltage does not vary depending on the intended use. .

  In other words, a group III nitride semiconductor-based HJFET, such as an AlGaN / GaN HJFET, is an element that is extremely sensitive to changes in the surface state of the AlGaN electron supply layer. In order to achieve high yield and high reproducibility, the amount of “collapse” is less varied than the designed target value. In order to achieve high reproducibility, careful control of the interface state between the surface protection film (passivation film) and the AlGaN electron supply layer is required. Need to pay attention.

  Second, when the SiN film 221 is provided as a surface protective film (passivation film), in addition to the gate breakdown voltage and the “current collapse” amount, the variation found in the element characteristics of the AlGaN / GaN HJFET is as follows: For example, there is a variation in efficiency during FET operation. As a result of examination by the present inventors, one of the causes of the variation in efficiency during the operation of the FET is a variation in the Schottky characteristic of the gate electrode 202, specifically, a variation in the gate leakage current of the AlGaN / GaN HJFET 200. It was inferred. Therefore, the factors causing the variation of the Schottky characteristics of the AlGaN / GaN HJFET 200 were further examined. As a result, when impurities are introduced into the interface between the AlGaN electron supply layer 213 and the SiN film 221, the Schottky characteristics of the gate electrode 202 formed on the AlGaN electron supply layer 213 are also affected. Was found. Hereinafter, this point will be described.

  In the case of manufacturing the AlGaN / GaN HJFET shown in FIG. 5 using the conventional nitride semiconductor substrate, the AlGaN on the nitride semiconductor substrate is formed in each of the previous steps until the step of forming the gate electrode 202. The surface of the electron supply layer 213 is exposed to the atmosphere. Therefore, there is a possibility that oxidation proceeds on the surface of the AlGaN electron supply layer 213, and further, impurities such as carbon are attached to the surface. For example, a photoresist mask is formed on the surface in a mesa etching process for element isolation or a source / drain electrode forming process using a lift-off method. When the conventional nitride semiconductor substrate shown in FIG. 4 is used, a photoresist mask is formed directly on the surface of the AlGaN electron supply layer 213. In the process of removing the photoresist mask, plasma ashing is used for the purpose of removing a very thin resist residue film remaining on the semiconductor surface. During the plasma ashing, the surface of the AlGaN electron supply layer 213 may be subjected to plasma damage by being exposed to a plasma atmosphere containing oxygen. Further, during the process of forming the source / drain electrode, when performing rapid thermal annealing (high temperature annealing) at the time of forming the ohmic junction, the surface of the AlGaN electron supply layer 213 is also irradiated with infrared rays, and similarly the temperature rises. To do.

As described above, in an AlGaN / GaN HJFET manufactured through a series of steps with the surface of the AlGaN electron supply layer 213 exposed, oxygen and the like at the interface between the AlGaN electron supply layer 213 and the gate electrode 202 When the impurity concentration of was measured by SIMS (secondary ion mass spectrometry), it was about 1 × 10 ¹⁸ atoms / cm ³ to 1 × 10 ¹⁹ atoms / cm ³ . Thus, the cause of the high impurity concentration at the interface between the AlGaN electron supply layer 213 and the gate electrode 202 is considered to be the result of the surface of the AlGaN electron supply layer 213 being oxidized. That is, the surface of the AlGaN electron supply layer 213 that has been subjected to the plasma damage introduced during the above-described plasma ashing process and further thermally damaged by the high-temperature annealing process is oxidized when exposed to the atmosphere. It is easy. Etching with an acid or the like is effective for the surface of the AlGaN electron supply layer 213 in the region where the Schottky electrode is to be formed in a clean state where the semiconductor surface and the metal surface can be in direct contact. In order to produce a gate electrode having a desired shape by applying the lift-off method, the entire surface is covered with a resist mask provided with an opening having a desired shape. Usually, in this photolithography process, after an opening is formed in the resist film, only the surface oxide film present on the exposed semiconductor surface is selectively removed by etching using an acid or the like. The ohmic electrode for the source / drain electrode has already been formed. Even if the ohmic electrode is covered with a resist, if the etching solution wraps around, the metal on the surface of the semiconductor is eroded and the ohmic junction is deteriorated. Therefore, in general, the selective etching process using the acid or the like is selected with a minimum etching time. For example, when the generation of the surface oxide film is proceeding more than expected, the oxide film is removed from the surface of the AlGaN electron supply layer 213 immediately before the metal for forming the Schottky junction is deposited on the opening. It is difficult to perform a selective etching for a short period of time to obtain a sufficiently clean surface state.

As described above, in the AlGaN / GaN HJFET having the structure shown in FIG. 5 manufactured using the conventional nitride semiconductor substrate shown in FIG. 4, the AlGaN electron supply layer is exposed during a series of steps. The surface condition is easily affected by the process. That is, the surface of the AlGaN electron supply layer 213 is in a state different from the initial clean state due to a change in crystallinity of the semiconductor due to the introduction of extrinsic damage. Examples of changes in the surface state caused by the introduction of extrinsic damage include:
(I) a state in which the semiconductor crystal has changed due to plasma damage or thermal damage;
Moreover,
(Ii) A state where oxygen is mixed into the surface of the AlGaN electron supply layer by exposing the damaged surface to the atmosphere.

  Next, the measurement result of the Schottky characteristic of the gate electrode 202 in the AlGaN / GaN HJFET having the structure shown in FIG. 5 manufactured using the conventional nitride semiconductor substrate shown in FIG. 4 will be described. As a measurement result of the Schottky characteristic of the gate electrode 202 in the AlGaN / GaN HJFET having the structure shown in FIG. 5 manufactured using the conventional nitride semiconductor substrate shown in FIG. 4, FIG. FIG. 6A shows the evaluation result of the Schottky barrier height φB (eV) of the electrode 202 (in the figure), and FIG. 6A shows the evaluation result of the idealization factor n (in the figure, ▲). With respect to the AlGaN / GaN HJFET having the structure shown in FIG. 5 manufactured using 10 3 inch wafers, the Schottky junction is analyzed with respect to the gate electrode 202 assuming a Schottky junction. The height φB (eV) and the idealization factor n value are calculated, and the average value and standard deviation are shown.

The idealization factor n is an index indicating the degree of deviation of the actually measured IV characteristic with reference to the IV characteristic exhibited by an ideal Schottky junction having a Schottky barrier height φB. Therefore, in the ideal Schottky junction, the idealization factor n value corresponds to n = 1, the Schottky property is impaired, and the n value increases from 1. On the other hand, in an ideal Schottky junction, the Schottky barrier height φB corresponds to the difference between the semiconductor work function (eψ _S ) and the metal work function (eψ _M ), but the Schottky property is impaired, The Schottky barrier height φB decreases.

  From the results shown in FIGS. 6 (a) and 6 (b), the AlGaN / GaN HJFET having the structure shown in FIG. 5 manufactured using the conventional nitride semiconductor substrate shown in FIG. 4 has a high Schottky barrier height. The average value of the height φB is lower than the barrier height φB predicted by an ideal Schottky junction, and the variation is also large. The idealization factor n value is also greatly increased from n = 1, and the variation is also large. In other words, the 10 wafers produced contain some of the wafers that are considerably inferior in Schottky properties, resulting in large variations.

  From the above examination, in the AlGaN / GaN HJFET having the structure shown in FIG. 5 manufactured using a conventional nitride semiconductor substrate, the surface of the AlGaN electron supply layer 213 has a defect level when the gate electrode is formed. Is present at a high surface density, the shift of n value (idealization factor) from n = 1 is large, and this is observed as a decrease in the apparent barrier height φB. I understand. If a defect level exists at a high surface density at the interface between the AlGaN electron supply layer and the gate electrode, it causes an increase in gate leakage current during AC operation and hinders stable operation of the device. Further, when there is some distribution in the depth (trap level energy) and density of the defect level, the Schottky characteristics vary accordingly. That is, it becomes a factor of reducing the reproducibility of element characteristics.

  Therefore, for example, in AlGaN / GaN HJFET, in order to improve the stable operation of the device and the reproducibility of the device characteristics, suppressing the crystallinity change of the surface of the AlGaN electron supply layer forming the gate electrode, and It is important to control the state of the interface with the surface protective film (passivation film) that covers the surface of the AlGaN electron supply layer existing between the gate electrode and the drain electrode.

  The present invention solves the above-described problems. The object of the present invention is to clean the surface of the electron supply layer that forms the gate electrode when manufacturing a group III nitride semiconductor HJFET, for example, an AlGaN / GaN HJFET. It is effective to maintain the state, and at the same time, to control the state of the interface with the surface protection film (passivation film) covering the surface of the electron supply layer existing between the gate electrode and the drain electrode, and suppresses current collapse. To provide a group III nitride semiconductor substrate that can be suitably used for manufacturing a high-output and high-reliability group III nitride semiconductor-based HJFET, for example, an AlGaN / GaN HJFET with high reproducibility. is there.

As a result of studying from the above-mentioned viewpoint, the present inventor has obtained the following knowledge. First, when fabricating a group III nitride semiconductor substrate, a group III nitride semiconductor layer including a heterojunction, comprising two layers, used as a channel layer and an electron supply layer in a group III nitride semiconductor HJFET It was found that an insulating film covering the surface of the III-nitride semiconductor layer structure can be formed without exposing the surface of the III-nitride semiconductor layer structure to the atmosphere. It was confirmed that this insulating film can be used as a surface protective film. Specifically, the impurity concentration at the interface between the insulating film and the group III nitride semiconductor layer structure is set to 1 × 10 ¹⁷ atoms as the insulating film covering the surface is formed without exposing the surface to the atmosphere. / Cm ³ or less. Therefore, it has been verified that when this insulating film is used as a surface protective film, a group III nitride semiconductor HJFET in which the amount of “current collapse” is suppressed and controlled can be easily manufactured. In addition, by covering with this insulating film, the introduction of damage to the surface due to external factors is avoided, forming an opening in the insulating film, and forming a gate electrode on the semiconductor surface of the opening, It has also been found that the gate electrode exhibits excellent Schottky characteristics and can be produced particularly with high reproducibility. The present inventor has completed the present invention based on the novel findings described above.

That is, the group III nitride semiconductor substrate according to the present invention is
Including a heterojunction, having a carrier supply layer / channel layer structure;
A group III nitride semiconductor layer structure used in the manufacture of a heterojunction field effect transistor; and
An inorganic insulating film on the group III nitride semiconductor layer structure;
The inorganic insulating film can be used as a surface protective film for the surface of the group III nitride semiconductor layer structure,
A group III nitride semiconductor, wherein an impurity concentration in the group III nitride semiconductor at the interface between the inorganic insulating film and the group III nitride semiconductor layer structure is 1 × 10 ¹⁷ atoms / cm ³ or less. It is a substrate.

  In this case, the inorganic insulating film is preferably an insulating film that substantially does not contain oxygen as a constituent element.

  For example, the insulating film is preferably a film containing at least one of the elements constituting the group III nitride semiconductor layer structure as a constituent element. In particular, the insulating film is more preferably a film containing only nitrogen and silicon as constituent elements. Furthermore, another insulating film may be further provided on the insulating film, and the other insulating film may have a structure in which an insulating film containing oxygen is used as a constituent element.

On the other hand, when the group III nitride semiconductor substrate according to the present invention is used for manufacturing a group III nitride semiconductor-based HJFET,
Group III nitride semiconductor layer structure including the heterojunction,
A channel layer made of In _x Ga _1-x N (0 ≦ x <1) and an electron supply layer made of Al _y Ga _1-y N (0 <y <1),
The heterojunction is preferably formed between Al _y Ga _1-y N and In _x Ga _1-x N.

When the group III nitride semiconductor substrate of the present invention is used for manufacturing a group III nitride semiconductor-based HJFET, an inorganic insulating film that can be used as a surface protective film, that is, an insulating film made of an inorganic dielectric material has a heterojunction. The concentration of the impurity at the interface is 1 × 10 ¹⁷ atoms / cm, which is formed in advance on the surface of the group III nitride semiconductor layer structure including and has the possibility of forming an interface state at the interface with the insulating film. ^Since it is limited to ³ or less, the surface density of negative fixed charges generated at such an interface is suppressed, and as a result, the manufactured group III nitride semiconductor HJFET has a small amount of “current collapse” and at the same time The variation is also suppressed. In addition, by covering with this insulating film, the introduction of damage to the surface due to external factors is avoided, forming an opening in the insulating film, and forming a gate electrode on the semiconductor surface of the opening, The gate electrode exhibits excellent Schottky characteristics and can be manufactured particularly with high reproducibility. These advantages are obtained by using a group III nitride semiconductor substrate of the present invention for the manufacture of a group III nitride semiconductor-based HJFET, thereby manufacturing a group III nitride semiconductor-based HJFET having good operating characteristics with a high yield. Making it possible.

  The group III nitride semiconductor substrate according to the present invention and the manufacturing process thereof will be described in more detail.

  In particular, as a group III nitride semiconductor structure, a surface protective film (hereinafter also simply referred to as “protective film”) that includes an AlGaN electron supply layer / GaN channel layer heterojunction and further covers the AlGaN electron supply layer. An embodiment of the present invention will be described with reference to the drawings, taking a group III nitride semiconductor substrate as an example. In all the drawings, common constituent elements are denoted by the same reference numerals, and description thereof is omitted as appropriate. In addition, unless otherwise specified, in this specification, “upper layer / lower layer (substrate side)” is used to indicate “the order of stacking” in a stacked structure.

  FIG. 1 is a diagram showing a basic configuration of a group III nitride semiconductor substrate of the present embodiment. In this substrate, a group III nitride semiconductor layer structure including a heterojunction (GaN channel layer 12, AlGaN electron supply layer 13) and a protective film are formed on these group III nitride semiconductor layer structures.

The group III nitride semiconductor layer structure includes a channel layer made of In _x Ga _1-x N (0 ≦ x <1) and an electron supply layer made of Al _y Ga _1-y N (0 <y <1). The hetero interface is an interface between In _x Ga _1-x N and Al _y Ga _1-y N.

This hetero interface, In _x Ga _1-x N of the conduction band energy _{E C [In x Ga 1-} x N] and Al _y Ga _1-y N in conduction band energy E _C [Al _y Ga _1-y N] There is a band discontinuity ΔE _C = E _C [Al _y Ga _1-y N] −E _C [In _x Ga _1-x N] in the conduction band due to the difference between the two. In _x Ga _1-x N (0 ≦ x <1) so that the band discontinuity ΔE _C of this conduction band is in the range of 10 meV ≦ ΔE _C ≦ 1200 meV, more preferably in the range of 300 meV ≦ ΔE _C ≦ 500 meV. ) And Al _y Ga _1-y N (0 <y <1). In addition, the difference in this hetero interface, In _x Ga _1-x lattice constant a of _{N [In x Ga 1-x} N] and Al _y Ga _1-y lattice constant a of _{N [Al y Ga 1-y} N] There exists a lattice mismatch Δa = a [In _x Ga _1−x N] −a [A _y Ga _1−y N] due to the above. Based on the lattice constant a _GaN of _GaN , (Δa / a _GaN ) is in the range of 0% <{(Δa / a _GaN ) × 100%} ≦ 28%, more preferably 12% ≦ {(Δa / a _GaN ) × 100%} ≦ 19% so that the composition of In _x Ga _1-x N (0 ≦ x <1) and Al _y Ga _1-y N (0 <y <1) is selected. Is preferred.

An insulating film used as a surface protective film covering the surface of the heterojunction Al _y Ga _1-y N / In _x Ga _1-x N, that is, the surface of the AlGaN electron supply layer 13 constitutes this AlGaN. An insulating film containing nitrogen which is one of the elements is desirable. Examples of the insulating film containing nitrogen as a constituent element include a SiN film and an insulating AlN film. Of the insulating films containing nitrogen as a constituent element, it is more preferable to select an SiN film, which is an insulating film made of silicon and nitrogen, as the surface protective film.

When forming an insulating film on the surface of the AlGaN electron supply layer 13, if an element constituting the insulating film forms a deep impurity level at the interface between the AlGaN electron supply layer 13 and the insulating film, the deep impurity level is reached. There is a concern that negative charges are trapped and negative fixed charges are formed. Nitrogen contained in the SiN film 21 is in common with nitrogen constituting the AlGaN electron supply layer 13, so that it does not become an impurity with respect to the AlGaN electron supply layer 13, and a deep impurity level is not formed at the interface. be able to. Therefore, it is possible to more effectively suppress the occurrence of “current collapse” due to a high fixed density negative fixed charge generated at the interface between the AlGaN electron supply layer 13 and the surface protective film. Moreover, when the SiN film 21 is formed by applying the same growth method as that of the AlGaN electron supply layer 13 by using the SiN film 21 as the insulating film functioning as a surface protective film, a common material is used as a nitrogen element material. Can be used. Therefore, when the growth of the SiN film is disclosed, it is avoided that N atoms are dissociated from the surface of the AlGaN electron supply layer 13 and vacancies (V _N ) are introduced. Therefore, the phenomenon that impurity atoms, for example, oxygen atoms, that replace N lattice points with respect to vacancies (V _N ) of N atoms are introduced into the interface is also suppressed.

  The SiN film 21 is an insulating film that substantially does not contain oxygen as a constituent element. Since oxygen tends to form deep levels in the group III nitride semiconductor, an insulating film that can be used as a surface protective film covering the surface of the AlGaN electron supply layer 13 is selected as a film that does not substantially contain oxygen. To do. That is, in the process of forming an insulating film that can be used as a surface protective film, an oxide film is formed on the surface of the AlGaN electron supply layer 13, and oxygen derived from this oxide film forms a deep level at the interface. To avoid. With this configuration, in the process of forming the insulating film covering the surface of the AlGaN electron supply layer 13, it is possible to more effectively prevent the introduction of impurities that function as trap levels at the interface and to generate “current collapse”. Can be more reliably suppressed. Note that “substantially free of oxygen” means that oxygen is not intentionally contained in the insulating film that can be used as the surface protective film. For example, when oxygen is unintentionally mixed into the insulating film, the surface density of impurity levels derived from oxygen formed at the interface due to the mixed oxygen is “current collapse”. It is not a problem as long as it does not reach the range that induces the outbreak.

FIG. 8 shows the relationship between the impurity concentration (oxygen concentration) present at the interface between the AlGaN electron supply layer 13 and the insulating film and the current collapse. In general, in the GaN-HJFET, carriers having a sheet carrier concentration of about 1 × 10 ¹² cm ⁻² to 1 × 10 ¹³ cm ⁻² exist at the interface between the AlGaN electron supply layer 13 and the GaN channel layer 12. Further, on the surface of the AlGaN electron supply layer 13, impurities (oxygen) present at the semiconductor / insulating film interface form an interface state. This interface level caused by oxygen functions as a deep level where carriers are trapped. Therefore, when the interface oxygen diffuses to the semiconductor layer side by about 1 nm and the impurity concentration is 1 × 10 ¹⁹ atoms / cm ³ , the carrier density trapped at the interface state is 1 × 10 ¹² cm ⁻² . Will reach. That is, a part of carriers to be supplied from the AlGaN electron supply layer 13 to the GaN channel layer is trapped at the semiconductor / insulating film interface. Therefore, the carrier density accumulated at the interface of the AlGaN electron supply layer 13 / GaN channel layer 12 decreases. Depending on the sheet carrier concentration of the GaN-HJFET when there is no interface state, trapped at the semiconductor / insulating film interface results in a lack of carriers accumulated at the AlGaN electron supply layer 13 / GaN channel layer 12 interface. Thus, “current collapse” in which the drain current decreases is shown. In FIG. 8, the relationship between the impurity concentration (oxygen concentration) present at the interface and current collapse when the original sheet carrier concentration is 1 × 10 ¹² cm ⁻² is indicated by Δ. In addition, the relationship between the impurity concentration (oxygen concentration) present at the interface and the current collapse when the original sheet carrier concentration is 1 × 10 ¹³ cm ⁻² is indicated by ◯. That is, in the GaN-HJFET, when the original sheet carrier concentration is selected to be about 1 × 10 ¹² cm ⁻² to 1 × 10 ¹³ cm ^{−2, in} order to suppress the influence of “current collapse”, the interface state It is preferable to suppress the carrier density trapped in the vicinity, that is, the impurity concentration at the semiconductor / insulating film interface to 10% or less of the original sheet carrier concentration. For example, in order to suppress the reduction ratio of the sheet carrier concentration of GaN-HJFET to 10% or less, the impurity concentration at the interface is 1 × 10 ¹⁷ atoms / cm ³ or less, and the range in which the occurrence of “current collapse” is induced. As long as it does not reach this level, the insulating film can be used in the same manner as a film that substantially does not contain oxygen even if oxygen is intentionally mixed. Moreover, it is preferable that the oxygen concentration observed at the interface is not more than the detection limit (1 × 10 ¹⁵ atoms / cm ³ ) in SIMS.

Furthermore, the insulating film covering the surface of the AlGaN electron supply layer 13 may have a structure in which a plurality of types of insulating films are stacked. Specifically, a SiN film is used as a lower layer film in direct contact with the surface of the AlGaN electron supply layer 13, and a SiON film, an SiO ₂ film, or an Al ₂ O ₃ film containing oxygen as a constituent element is laminated on the upper surface. It may be.

  In addition, the SiN film formed on the group III nitride semiconductor layer structure may be an apparatus for forming the group III nitride semiconductor layer structure, for example, a metal organic vapor phase epitaxy (MOVPE) apparatus. Used after the semiconductor layer is formed without being exposed to the atmosphere. At that time, in the growth apparatus, disilane or monosilane is used as a silicon source gas, ammonia is used as a nitrogen source gas, and a source gas in which ammonia is mixed in a carrier gas at a concentration of several percent (volume) or more, The source gas is thermally decomposed to grow a SiN film.

  As for the growth conditions of this SiN film, the temperature is preferably selected in the range of 900 ° C. to 1100 ° C., and the internal pressure in the growth chamber is preferably selected in the range of 10 kPa to 40 kPa during the growth. The supply ratio of the silicon source gas and the nitrogen source gas contained in the supplied source gas is, for example, Si: N = 4: 1 when disilane and ammonia are used as the Si: N atomic ratio included. It is preferable to set in the range of ˜6: 1.

As shown in FIG. 1, the group III nitride semiconductor substrate according to the present invention has a group III nitride semiconductor layer structure including a heterojunction on the substrate via a buffer layer, that is, an electron supply layer / As the channel layer, Al _y Ga _1-y N / In _x Ga _1-x N is formed, and on the surface thereof, an insulating film that can be used as a surface protective film, in particular, a SiN film is laminated. Is preferred. As the substrate 10, various substrates can be used as long as they can be used for growing a group III nitride semiconductor. In particular, impurity diffusion (auto-doping) from the substrate side into the channel layer is possible. It is preferable to use a substrate material with less concern. Therefore, it is more preferable to use a SiC substrate. Note that the growth plane orientation of the group III nitride semiconductor layer structure including a heterojunction grown on this substrate is preferably selected to be (0001). On the other hand, the buffer layer 11 also has the same plane orientation as the growth plane orientation of the group III nitride semiconductor layer structure grown thereon, and in addition, the buffer layer may be a layer exhibiting high resistance. preferable. For example, low-temperature grown AlN can be suitably used as the buffer layer 11. The thickness of the buffer layer 11 is preferably set in the range of 100 to 300 nm.

In the present invention, in order to produce a group III nitride semiconductor HJFET, a group III nitride semiconductor layer structure including a heterojunction, that is, as an electron supply layer / channel layer, Al _y Ga _1-y N / In _x Ga _1-x N is a non-doping layer. The film thickness of the Al _y Ga _1-y N / In _x Ga _1-x N layer is 5 nm to 50 nm, respectively, and the film thickness of the Al _y Ga _1-y N electron supply layer is In _x Ga _1. The film thickness of the _-x N channel layer is preferably set in the range of 1 to 40 nm. More preferably, the thickness of the Al _y Ga _{1 -y} N electron supply layer is set in the range of 10 to 25 nm, and the thickness of the In _x Ga _{1 -x} N channel layer is set in the range of 2 to 5 nm. At that time, the thickness of the SiN film used as the surface protective film in the Group III nitride semiconductor HJFET to be manufactured is preferably selected in the range of 20 to 300 nm.

As described above, by adopting the process of continuously growing the SiN film without being exposed to the atmosphere, in the group III nitride semiconductor substrate according to the present invention, the Al _y Ga _1-y N electron supply layer and the SiN The impurity concentration at the interface with the film can be easily suppressed to 1 × 10 ¹⁷ atoms / cm ³ or less. In the group III nitride semiconductor substrate according to the present invention, the impurity concentration at this interface is more preferably 1 × 10 ¹⁵ atoms / cm ³ or less. However, if the impurity concentration at this interface reaches the detection limit (1 × 10 ¹⁵ atoms / cm ³ ) or less in SIMS, the need to reduce the lower limit value or less is negligible. Become.

  Embodiments of the present invention will be described below with reference to the drawings. The embodiment described below is an example of the best mode according to the present invention, but the technical scope of the present invention is not limited to such a specific mode.

(Embodiment)
The group III nitride semiconductor substrate of this embodiment has the configuration shown in FIG. In the group III nitride semiconductor substrate of this embodiment, a buffer layer 11 made of a group III nitride semiconductor layer is formed on a substrate 10 made of SiC or the like. A GaN channel layer 12 is formed on the buffer layer 11. An AlGaN electron supply layer 13 is formed on the GaN channel layer 12. The surface of the AlGaN electron supply layer 13 is covered with the SiN film 21. Hereinafter, the process of manufacturing the group III nitride semiconductor substrate of this embodiment will be described more specifically.

  First, as shown in FIG. 2A, a semiconductor is grown on a substrate 10 made of SiC using an epitaxial growth method, and a buffer layer 11 (thickness 20 nm) made of undoped AlN is sequentially formed from the substrate 10 side. ), A semiconductor layer structure in which an undoped GaN channel layer 12 (film thickness 2 μm) and an AlGaN electron supply layer 13 (film thickness 25 nm) made of undoped AlGaN are stacked (FIG. 2A). As the epitaxial growth method, for example, a molecular beam epitaxy (MBE) growth method or a metal organic vapor phase epitaxy (MOVPE) growth method can be used.

  Then, a SiN film 21 (film thickness 60 nm) is formed on the AlGaN electron supply layer 13 (FIG. 2B). At this time, after the AlGaN electron supply layer 13 is formed, the SiN film 21 is formed in the same film forming apparatus without being exposed to the atmosphere. The SiN film 21 is formed in the same growth apparatus by a vapor phase growth method similar to the growth method of the AlGaN electron supply layer 13 and the GaN channel layer 12.

  In this embodiment, after forming the group III nitride semiconductor layer structure by the epitaxial growth method, the SiN film 21 is continuously formed in a clean atmosphere without taking out from the film forming chamber. Specifically, the clean atmosphere is an atmosphere that does not substantially contain oxygen. Under this SiN film production condition, the surface of the AlGaN electron supply layer 13 is not exposed to the air in the middle, so that the impurity concentration at the interface between the AlGaN electron supply layer 13 and the SiN film 21 is further effectively reduced. Can be made. Therefore, when an AlGaN / GaN HJFET having the structure shown in FIG. 3 is manufactured using the obtained group III nitride semiconductor substrate, the “current collapse” can be further effectively suppressed.

  In the process of manufacturing the group III nitride semiconductor substrate of this embodiment, the film forming chamber used may be composed of a single chamber or may include a plurality of small chambers. In the case of using a deposition chamber including a plurality of chambers, after forming the AlGaN electron supply layer 13 in one chamber, the substrate 10 is transferred to another chamber without exposure to the atmosphere by releasing the vacuum, and the SiN film 21 is formed. Formation may be performed. Even during this transport process, exposure to the atmosphere by releasing the vacuum is not performed, so that surface contamination of the AlGaN electron supply layer 13 can be effectively suppressed.

  6 (a) and 6 (b) show the device characteristics of an AlGaN / GaN HJFET (FIG. 3) manufactured using a group III nitride semiconductor substrate manufactured according to this embodiment, and a conventional nitride semiconductor substrate. It is a figure which compares the element characteristic of AlGaN / GaN HJFET (FIG. 5) produced using this.

  First, FIG. 6 (a) and FIG. 6 (b) show an AlGaN / GaN HJFET (FIG. 3) manufactured using the nitride semiconductor substrate manufactured according to the above-described embodiment and a conventional nitride semiconductor, respectively. FIG. 6 is a diagram showing Schottky barrier height φB and idealization factor n in HJFETs obtained from 10 3-inch wafers in an AlGaN / GaN HJFET fabricated using a substrate (FIG. 5).

  When fabricating the AlGaN / GaN HJFET shown in FIG. 3, in the step of forming the gate electrode 2, first, in order to form an opening in the SiN film, the resist film provided with the corresponding opening is used as a mask to form the SiN film. Perform selective etching. In the etching, a hydrofluoric acid etching solution is used as an etching solution. Thereafter, after removing the resist film used as the etching mask, a resist film provided with a predetermined opening is used for the lift-off process. Thereafter, in order to clean the surface of the AlGaN electron supply layer 13 exposed in the opening provided in the SiN film, the surface is treated with, for example, an aqueous hydrochloric acid solution. A gate electrode is formed on the surface of the AlGaN electron supply layer 13 subjected to this treatment.

  On the other hand, when the AlGaN / GaN HJFET shown in FIG. 5 is manufactured, in the step of forming the gate electrode 202, a resist film having a predetermined opening used for the lift-off process is directly formed on the surface of the AlGaN electron supply layer 213. Thereafter, in order to clean the surface of the AlGaN electron supply layer 213 exposed in the opening provided in the resist film, the surface is treated with, for example, an aqueous hydrochloric acid solution. A gate electrode is formed on the surface of the AlGaN electron supply layer 213 subjected to this treatment.

  In addition, the AlGaN / GaN HJFET shown in FIG. 5 and the AlGaN / GaN HJFET shown in FIG. 3 are compared with each other in the substrate, the buffer layer, the GaN channel layer, and the AlGaN electron supply layer in both thickness and composition. Identical. The thickness of the SiN film used as the surface coating layer is also the same.

  In the AlGaN / GaN HJFET shown in FIG. 5, the SiN film 221 is formed using a plasma CVD method as a film forming method after the gate electrode 202 is manufactured. That is, after removing the resist film used in the lift-off process, the surface is washed with water after the plasma ashing treatment in order to remove the resist film residue remaining on the surface of the AlGaN electron supply layer 213. Thereafter, the SiN film 221 is formed on the surface of the dried AlGaN electron supply layer 213 by using the plasma CVD method without performing any treatment. For example, the film forming process requires 10 minutes under conditions of a temperature of 300 ° C. and an internal pressure of 80 Pa. That is, the fabricated gate electrode 202 is subjected to heat treatment at a temperature of 300 ° C. for 10 minutes during the SiN film 221 deposition process.

  On the other hand, the surface of the AlGaN electron supply layer 213 on which the SiN film 221 is formed is in a state in which damage introduced when performing the plasma ashing process remains on the surface. In addition, the SiN film 221 is formed without performing any cleaning process for the purpose of removing the oxide film formed on the surface during the plasma ashing process and removing the adhering impurities.

  From the comparison results shown in FIGS. 6A and 6B, in the AlGaN / GaN HJFET manufactured using the nitride semiconductor substrate manufactured according to this embodiment (FIG. 3), the Schottky barrier of the gate electrode 2 is obtained. The height φB (indicated by a circle in the figure) is 0.8 eV, the variation between wafers is slight, and the idealization factor n value (indicated by a triangle in the figure) is 1 in average. .4, and the variation between wafers is small. That is, it can be seen that there is little deviation from an ideal Schottky junction, excellent Schottky properties are obtained, and reproducibility between wafers is also high. This is because the surface of the AlGaN electron supply layer 13, which is the formation region of the gate electrode 2, is covered with the SiN film until the formation process of the gate electrode 2. In each of the previous processes, the atmosphere and plasma ashing are performed. This is presumably because the influence of contamination and damage to the surface of the AlGaN electron supply layer 13 is suppressed without being exposed to the plasma atmosphere. In addition, after the formation of the gate electrode 2, there is no heat treatment associated with the film forming process for forming the surface protective film, and it is preferable that this influence is avoided to maintain excellent Schottky properties. Is.

  On the other hand, in an AlGaN / GaN HJFET fabricated using a conventional nitride semiconductor substrate (FIG. 5), the Schottky barrier height φB (indicated by a mark ● in the figure) of the gate electrode 2 is 0.7 eV, The variation between wafers is also remarkable, and the idealization factor n value (indicated by ▲ in the figure) has an average value of 2.0, and the variation between wafers is also large. That is, the deviation from the ideal Schottky junction is large, and the Schottky property is inferior. This is because the surface of the AlGaN electron supply layer 213, which is the formation region of the gate electrode 202, is exposed to the atmosphere or the plasma atmosphere of plasma ashing in each step before the formation step of the gate electrode 202. It is assumed that the surface of the supply layer 13 is still contaminated and damaged. Further, the remaining contamination and damage are different between wafers, and as a result, the variation between wafers is increased. In addition, after the formation of the gate electrode 202, a heat treatment associated with the SiN film formation process using the plasma CVD method is performed in order to form a surface protective film, and this heat treatment also reduces the Schottky property. Inferred to have an impact.

  FIG. 7 shows an AlGaN / GaN HJFET manufactured using a nitride semiconductor substrate manufactured according to the present embodiment (FIG. 3) and an AlGaN / GaN HJFET manufactured using a conventional nitride semiconductor substrate (FIG. 5). ) Shows the amount of current collapse measured in each wafer when trial manufacture is performed using ten 3-inch wafers.

  In the results shown in FIG. 7, in the AlGaN / GaN HJFET fabricated using the conventional nitride semiconductor substrate (FIG. 5), a large amount of current collapse variation exists in the wafer in a considerable ratio. . In addition, there is a large variation in the amount of current collapse between wafers. That is, there is a considerable proportion of negative fixed charge amounts present at the interface between the SiN film 221 serving as the surface protective film and the AlGaN electron supply layer 213 and exhibiting large variations in the wafer. Also, it is shown that the negative fixed charge amount existing at the interface has a large variation between wafers.

  In other words, in an AlGaN / GaN HJFET fabricated using a conventional nitride semiconductor substrate (FIG. 5), a surface protection film SiN film 221 formed using a plasma CVD method, and an AlGaN electron supply layer It is shown that the surface density of trap levels, such as deep impurity levels, present at the interface with 213 has a large ratio within the wafer that exhibits large variations. At this time, the surface density of trap levels such as deep impurity levels existing at the interface also varies greatly between wafers.

  In an AlGaN / GaN HJFET fabricated using a conventional nitride semiconductor substrate (FIG. 5), a resist remaining on the surface after lift-off prior to the step of forming the surface protective film SiN film 221 on the surface of the AlGaN electron supply layer 213. In order to remove the residue, plasma ashing is performed. Although the surface is cleaned after the plasma ashing treatment, the surface of the AlGaN electron supply layer 13 introduced by exposure to the atmosphere or the plasma atmosphere of plasma ashing is removed to remove oxidation or damage. The surface etching process is not performed. Therefore, the SiN film 221 is formed on the surface of the AlGaN electron supply layer 13 with the surface oxidized or damaged. Further, the process itself of forming the SiN film 221 uses the plasma CVD method, and the introduction of plasma damage due to this process itself is expected. Therefore, there is a variation in the degree of oxidation and damage on the remaining surface in the wafer, and at the same time, it is assumed that there is a variation in the degree of oxidation and damage on the remaining surface between wafers. Is done. When the remaining surface is oxidized or damaged, the surface density of trap levels such as deep impurity levels existing at the interface increases, resulting in a high current collapse amount.

  That is, in the AlGaN / GaN HJFET fabricated using the conventional nitride semiconductor substrate (FIG. 5), after the formation of the gate electrode 202, the surface oxide fire film remaining on the surface of the AlGaN electron supply layer and damage are removed. For example, it is difficult to perform surface etching using an acid or the like. Therefore, contamination by impurities, surface oxide film, etc. that cause trap levels such as deep impurity levels remain on the surface of the AlGaN electron supply layer to various extents. It is inferred that

  On the other hand, in the AlGaN / GaN HJFET manufactured using the nitride semiconductor substrate manufactured according to the present embodiment (FIG. 3), after the growth of the AlGaN electron supply layer 13 is finished, its clean surface is not exposed to the atmosphere. A SiN film 21 serving as a surface protective film is formed thereon. Therefore, the surface of the surface protective film SiN film 21 on which the surface protective film is formed and the AlGaN electron supply layer 13 are essentially damaged by surface oxidation or plasma ashing. Absent. Therefore, the surface density of the deep impurity level that functions as a trap level generated at the interface has little variation within the wafer, and does not show variation between wafers. After that, the surface of the AlGaN electron supply layer 13 is covered with the SiN film 21 serving as the surface protection film, and impurities are newly added to the interface between the SiN film 21 serving as the surface protection film and the AlGaN electron supply layer 13 in any process. It will not be introduced.

  Therefore, in the AlGaN / GaN HJFET manufactured using the nitride semiconductor substrate manufactured according to this embodiment (FIG. 3), the impurity concentration present at the interface between the SiN film 21 serving as the surface protective film and the AlGaN electron supply layer 13 is reduced. In addition, there is no increase in impurity concentration in subsequent steps. Essentially, the impurity concentration present at the interface between the SiN film 21 serving as the surface protective film and the AlGaN electron supply layer 13 has little variation within the wafer, and does not exhibit variation between wafers. Yes. As a result, the negative fixed charge amount at the interface that is generated by being trapped at a deep impurity level derived from impurities existing at the interface between the SiN film 21 of the surface protective film and the AlGaN electron supply layer 13 is reduced. ing. In addition, the negative fixed charge amount at this interface has little variation within the wafer and does not show variation between wafers. Therefore, the current collapse amount resulting from the negative fixed charge amount at the interface is also reduced, and the uniformity within the wafer is also increased. Furthermore, a reduced current collapse amount is achieved with high reproducibility between wafers.

  In fact, in the nitride semiconductor substrate manufactured according to this embodiment, after forming the AlGaN electron supply layer 13 in the same growth apparatus as the semiconductor layer, the source gas is continuously heated without being exposed to the atmosphere or plasma. The SiN film 21 is grown by using the vapor phase growth method that decomposes into the following. At that time, after the growth of the AlGaN electron supply layer 13 is completed, while the growth of the SiN film 21 is subsequently started, the surface of the AlGaN electron supply layer 13 is not exposed to the atmosphere. No oxide film derived from surface oxidation in the atmosphere is formed.

On the other hand, when the surface of the AlGaN electron supply layer 13 is kept under reduced pressure and the partial pressure of nitrogen atoms is sufficiently lower than the dissociation pressure in a heated state for a long time, the nitrogen atoms present on the surface are thermally detached. Then, vacancies (V _N ) are generated on the surface. During the prolonged heating, if there is a slight amount of oxygen in the growth system, oxygen is taken up as an impurity on the surface to selectively occupy these vacancies (V _N ). After the growth of the AlGaN electron supply layer 13 is completed, while the growth of the SiN film 21 is subsequently started, for example, a gas containing ammonia as a nitrogen raw material is supplied to maintain the partial pressure of nitrogen atoms higher than the dissociation pressure. Thus, thermal separation of nitrogen atoms from the surface of the AlGaN electron supply layer 13 is suppressed. Furthermore, in a state where a gas containing ammonia as a nitrogen source is supplied, a silicon source gas is supplied to the surface of the AlGaN electron supply layer 13 to start the growth of the SiN film 21. The probability that existing impurities such as oxygen enter the growth interface is also reduced.

Further, in the AlGaN / GaN HJFET (FIG. 3) manufactured using the nitride semiconductor substrate having the structure shown in FIG. 1 manufactured by such a method, AlGaN electrons at the interface between the SiN film 21 and the AlGaN electron supply layer 13 are used. The oxygen concentration in the supply layer was measured by the SIMS method. In the case of an AlGaN / GaN HJFET (FIG. 3) manufactured using the nitride semiconductor substrate of this embodiment in which the thickness of the SiN film 21 is selected to be 60 nm, the oxygen concentration at the interface is 1 × 10 ¹⁵ atoms. / Cm ³ or less. In addition, the measurement result by SIMS method measured the oxygen concentration in an AlGaN electron supply layer by SIMS method separately using the sample which performed the same element preparation process operation with respect to the same kind of nitride semiconductor substrate. With the result.

From the nitride semiconductor substrate having the configuration shown in FIG. 1 to the production of the AlGaN / GaN HJFET (FIG. 3), for example, a heat treatment such as an annealing treatment for forming an ohmic junction is performed. For this reason, impurities such as oxygen that were initially localized only at the interface may cause thermal diffusion. On the other hand, there is a possibility that oxygen atoms taken into the SiN film 21 are aggregated to the interface with the heat treatment. Even after being affected by these effects, the oxygen concentration at the interface is maintained at 1 × 10 ¹⁵ atoms / cm ³ or less.

In addition, the thickness of the SiN film 21 formed on the AlGaN electron supply layer 13 is variously changed within the range of 5 to 200 nm to manufacture the nitride semiconductor substrate having the configuration shown in FIG. The impurity concentration at the interface between the AlGaN electron supply layer 13 and the SiN film 21 was measured. In the range of the thickness of the SiN film 21, the oxygen concentration detected at the interface between the AlGaN electron supply layer 13 and the SiN film 21 by SIMS method is 1 × 10 ¹⁵ atoms / cm ³ or less in any case. there were.

On the other hand, in an AlGaN / GaN HJFET fabricated using a conventional nitride semiconductor substrate (FIG. 5), the AlGaN electron supply layer 213 at the interface between the AlGaN electron supply layer 213 and the SiN film 221 is detected by the SIMS method. The oxygen concentration therein was about 1 × 10 ¹⁹ atoms / cm ³ . In the manufacturing process, after the formation of the gate electrode 202, after the lift-off process, in order to remove the resist film residue remaining on the surface, a plasma ashing process is performed to clean the surface. However, the selective etching process using an acid or the like for removing the surface oxide film generated on the surface of the AlGaN electron supply layer 213 is not performed. Therefore, the SiN film 221 is formed on the surface of the AlGaN electron supply layer 213 covered with the generated surface oxide film by the plasma CVD method.

Further, when the nitride semiconductor substrate having the configuration shown in FIG. 1 is manufactured, after the AlGaN electron supply layer 13 is formed by the epitaxial growth method, the AlGaN electron supply layer 13 is exposed to the atmosphere, and then the plasma CVD method is used as it is. Thus, a SiN film 21 having a thickness of 60 nm was formed. After the formation of the SiN film 21, the impurity concentration at the interface between the AlGaN electron supply layer 13 and the SiN film 21 was measured. At that time, in the SIMS method, the oxygen concentration detected at this interface was about 1 × 10 ¹⁹ atoms / cm ³ .

In this manufacturing process, an AlGaN electron supply layer 13 is formed by epitaxial growth on a nitride semiconductor substrate having the conventional structure shown in FIG. 4, and then taken out from the growth chamber to the atmosphere. This corresponds to an operation of forming the SiN film 21 having a thickness of 60 nm by using the plasma CVD method. That is, after the gate electrode is formed, a plasma ashing process is performed, and after the surface cleaning, the AlGaN electron supply layer 213 exposed to the atmosphere for a certain period of time and an extremely short period of time after the epitaxial growth. In any of the AlGaN electron supply layers 13 exposed to the atmosphere, when an SiN film is formed using the plasma CVD method, the oxygen concentration detected at the interface is 1 × 10 ¹⁹ atoms / cm ^3. It can be seen that there is no significant difference in degree.

As described above, after the AlGaN electron supply layer 13 is formed, the SiN film 21 is formed by the same thermal vapor deposition method as the AlGaN electron supply layer 13 in the same film formation chamber without being exposed to the atmosphere. In the nitride semiconductor substrate manufactured according to this embodiment, the impurity concentration at the interface between the AlGaN electron supply layer 13 and the SiN film 21, here the oxygen concentration, is 1 × 10 ¹⁵ atoms / cm ³ or less. Thus, in the AlGaN / GaN HJFET having the structure shown in FIG. 3 manufactured using a nitride semiconductor substrate having an impurity concentration of 1 × 10 ¹⁵ atoms / cm ³ or less at the interface, the amount of current collapse is suppressed, Also, the uniformity within the wafer is high. Furthermore, a reduced current collapse amount is achieved with high reproducibility between wafers. In addition, by forming an opening in the SiN film 21 and forming the gate electrode 2, the manufactured gate electrode 2 is excellent in Schottky characteristics, and also with high reproducibility between wafers. Excellent Schottky property has been obtained. From these advantages, by using the nitride semiconductor substrate manufactured according to the present embodiment by the above manufacturing method, the AlGaN / GaN HJFET having the structure shown in FIG. It becomes possible to manufacture stably with high yield and high reproducibility.

  In addition, in the nitride semiconductor substrate manufactured according to this embodiment, the SiN film 21 is selected as the insulating film functioning as a surface protective film, and the configuration of the AlGaN electron supply layer 13 that is a group III nitride semiconductor layer is selected. Since the element nitrogen is included, the SiN film 21 can be formed by the thermal vapor deposition method similar to the AlGaN electron supply layer 13 in a continuous process without exposure to the atmosphere after the formation of the AlGaN electron supply layer 13. . In addition, the stability of the quality of the obtained SiN film 21 can be improved.

  The group III nitride semiconductor substrate according to the present invention can be suitably used for manufacturing a group III nitride semiconductor-based HJFET having good operating characteristics with a high yield.

It is sectional drawing which shows typically the structure of the group III nitride semiconductor substrate concerning the embodiment of this invention. FIG. 3 is a cross-sectional view schematically showing a manufacturing process for the group III nitride semiconductor substrate shown in FIG. 1. It is sectional drawing which shows typically an example of a structure of the group III nitride semiconductor-type HJFET produced using the group III nitride semiconductor substrate concerning the embodiment of this invention. It is sectional drawing which shows typically the structure of the conventional group III nitride semiconductor substrate. It is sectional drawing which shows typically an example of a structure of the group III nitride semiconductor-type HJFET produced using the conventional group III nitride semiconductor substrate. In a group III nitride semiconductor HJFET manufactured using a group III nitride semiconductor substrate according to an embodiment of the present invention and a group III nitride semiconductor HJFET manufactured using a conventional group III nitride semiconductor substrate FIG. 6 is a diagram comparing Schottky characteristics of gate electrodes. In a group III nitride semiconductor HJFET manufactured using a group III nitride semiconductor substrate according to an embodiment of the present invention and a group III nitride semiconductor HJFET manufactured using a conventional group III nitride semiconductor substrate FIG. 6 is a diagram comparing variations in the amount of current collapse between lots. It is a figure which shows the dependence with respect to the oxygen concentration which exists in the interface of the surface protective film and electron supply layer of the amount of current collapse in III group nitride semiconductor HJFET.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Source electrode 2 Gate electrode 3 Drain electrode 10 Substrate 11 Buffer layer 12 GaN channel layer 13 AlGaN electron supply layer 21 SiN film (surface protective film)
201 Source electrode 202 Gate electrode 203 Drain electrode 209 Sapphire substrate 211 Buffer layer 212 GaN channel layer 213 AlGaN electron supply layer 221 SiN film (surface protective film)

Claims (6)

Including a heterojunction, having a carrier supply layer / channel layer structure;
A group III nitride semiconductor layer structure used in the manufacture of a heterojunction field effect transistor; and
An inorganic insulating film on the group III nitride semiconductor layer structure;
The inorganic insulating film can be used as a surface protective film for the surface of the group III nitride semiconductor layer structure,
A group III nitride semiconductor, wherein an impurity concentration in the group III nitride semiconductor at the interface between the inorganic insulating film and the group III nitride semiconductor layer structure is 1 × 10 ¹⁷ atoms / cm ³ or less. substrate. In the group III nitride semiconductor substrate according to claim 1,
A group III nitride semiconductor substrate, wherein the inorganic insulating film is an insulating film that substantially does not contain oxygen as a constituent element. The group III nitride semiconductor substrate according to claim 1 or 2,
The group III nitride semiconductor substrate, wherein the insulating film is a film containing at least one of elements constituting the group III nitride semiconductor layer structure as a constituent element. In the group III nitride semiconductor substrate according to claims 1 to 3,
The group III nitride semiconductor substrate, wherein the insulating film is a film containing only nitrogen and silicon as constituent elements. In the group III nitride semiconductor substrate according to any one of claims 1 to 4,
On the insulating film, further has another inorganic insulating film,
The group III nitride semiconductor substrate, wherein the another inorganic insulating film is an insulating film containing oxygen as a constituent element. In the group III nitride semiconductor substrate according to any one of claims 1 to 5,
Group III nitride semiconductor layer structure including the heterojunction,
A channel layer made of In _x Ga _1-x N (0 ≦ x <1) and an electron supply layer made of Al _y Ga _1-y N (0 <y <1),
The heterojunction, III-nitride semiconductor substrate, characterized in that formed between the Al _y Ga _1-y N and In _x Ga _1-x N.

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