JP2007147930A - Display device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To accelerate the response of an applied voltage applied to an electron emitting element to extend an application time in order to improve brightness of a display device and gradation performance of images. <P>SOLUTION: A selection voltage resulting from correcting waveform dulness due to electric characteristics of a row-direction wiring (scan lines) by a selection signal correction circuit is applied to scan lines. With respect to a column direction, a driving voltage resulting from correcting waveform dullness due to electric characteristics of column-direction wiring (data lines) at an arbitrary electron emitting element point in a matrix by a driving signal correction circuit is applied to data lines. The selection signal and the driving signal applied to the electron emitting element are optimized, and a flat electric characteristic part is extended to prolong a selection time and a driving time which are a light emission period, whereby the display of high brightness and accurate gradation becomes possible. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to, for example, a matrix type display device that includes a cold cathode type electron-emitting device and the electron-emitting devices are arranged in a matrix.

  An electron source formed by arranging cold-cathode electron-emitting devices in a matrix form is excited, and a phosphor disposed opposite to the electron source is excited by an electron beam emitted from the electron source. A flat panel display using visible light is generally called an FED (abbreviation of field emission display).

  Examples of the electron emission device of the cold cathode electron source include a field emission device, a surface conduction electron emission device, a thin film type electron emission device including an upper electrode, an electron acceleration layer, and a lower electrode.

  In the FED, since a large number of electron-emitting devices are arranged in a matrix, it is known that the drive signal waveform of the electron-emitting device becomes dull due to the electrical characteristics of the wiring connecting the devices, and the display luminance and display quality are reduced. ing. Therefore, for example, Patent Document 1 proposes a method for improving the display luminance and display quality by improving the drive signal waveform.

Japanese Patent Laid-Open No. 2004-20706

  However, Patent Document 1 does not mention a technique for improving display quality when the amplitude modulation driving method is used.

  The present invention has been made in view of the above circumstances, and its purpose is to improve luminance and image by optimizing by suppressing waveform dullness of the selection signal and drive signal applied to the electron-emitting device. An object of the present invention is to provide a display device capable of improving the gradation performance.

  In order to achieve the above object, a display device according to the present invention applies a selection voltage obtained by correcting a waveform dullness due to electric characteristics of a row direction wiring (scan line) by a selection signal correction circuit to the scan line. Also, with respect to the column direction, a drive voltage in which waveform dullness due to electrical characteristics of the column direction wiring (data line) at an arbitrary electron emitting element point in the matrix is corrected by the drive signal correction circuit is applied to the data line. Optimizing the selection signal and drive signal applied to the electron-emitting device, widening the flat electrical characteristic part and extending the selection time and drive time for the light emission period, high brightness and accurate gradation display are possible It becomes.

  ADVANTAGE OF THE INVENTION According to this invention, the display apparatus which can aim at the improvement of a brightness | luminance and the improvement of the gradation performance of an image | video can be provided.

  DESCRIPTION OF EXEMPLARY EMBODIMENTS Hereinafter, exemplary embodiments of the invention will be described with reference to the drawings.

  In the FED, a plurality of electron-emitting devices are wired in a matrix, and the row direction wiring (hereinafter referred to as “scan line”) and the column direction wiring (hereinafter referred to as “data line”) are equivalent. In particular, there are wiring resistance, wiring inductance, and wiring capacitance. Therefore, the scan line and the data line equivalently form a low-pass filter having a cutoff frequency determined by these wiring inductance, wiring capacitance, and wiring resistance. That is, the scan line and the data line electrically exhibit a low-pass filter characteristic.

  Generally, in order to drive an arbitrary electron-emitting device arranged in a matrix, a selection voltage VS for designating a row and a driving voltage corresponding to a video signal are respectively applied to a scan line and a data line including the target electron-emitting device. A drive voltage VD to be applied is applied.

  However, the waveform is dull due to the electrical characteristics (low-pass filter characteristics) of the scan line and the data line, and the gradation performance and brightness are deteriorated, resulting in deterioration of display quality. Therefore, in order to obtain uniform luminance characteristics over the entire display screen, light is emitted using only the flat electrical characteristic part with a stable waveform, excluding the rising and falling parts where the waveform of the selection signal and drive signal is dull. In this case, the light emission time is shortened and the luminance is further reduced.

  An embodiment for improving display quality when the amplitude modulation driving method is used will be described.

  FIG. 1 is a block diagram of a display device according to the first embodiment.

  As shown in FIG. 1, the display device of this embodiment includes an electron emission display panel 1 (hereinafter abbreviated as “display panel”) in which a plurality of electron emission elements are arranged in a matrix, and a display panel 1. Driver 2 and data driver 4 for driving the drive signal, a drive signal correction circuit 5 for applying a predetermined correction to the drive signal output from the data driver 4 based on a selection signal from the scan driver 2 and applying it to the display panel 1, and a display A high voltage generating circuit 6 for generating a high acceleration voltage applied to the panel 1, a video signal processing circuit 7 for performing a predetermined format conversion on a video signal input from a video signal input terminal 8, and an input video signal And a timing controller 9 for controlling the scan driver 2 and the data driver 4 based on the above.

  In FIG. 1, the video signal input to the video signal input terminal 8 is input to the video signal processing circuit 7. The video signal processing circuit 7 performs format conversion such as the number of pixels of the signal and the frequency of the synchronization signal so that it can be displayed on the display panel 1. Then, the signal whose format has been converted by the video signal processing circuit 7 is input to the timing controller 9. The timing controller 9 rearranges the data so that it can be displayed on the display panel 1 and inputs the data to the data driver 4. In addition, a control signal that is a timing signal for selecting a row of the display panel 1 is input to the scan driver 2.

  Next, an example of the configuration of the display unit will be described. The display unit includes a display panel 1, a scan driver 2, a data driver 4, a drive signal correction circuit 5, and a high voltage generation circuit 6.

  The display panel 1 is a passive matrix display panel, and includes a back substrate (not shown) and a front substrate (not shown) that face each other. A plurality of (m) data lines 102 extending in the column direction (screen vertical direction) are arranged in the row direction (screen horizontal direction), and a plurality (n) scan lines 103 extending in the row direction are arranged on the rear substrate. Arranged in the direction. An electron-emitting device 101 is disposed at each intersection of the plurality of data lines and the plurality of scan lines. Thereby, the plurality of electron-emitting devices 101 are arranged in a matrix. On the front substrate, a phosphor (not shown) is arranged at a position facing each electronic display element.

  A scan driver 2 is connected to the scan line 103 of the display panel 1. Based on the control signal from the timing controller 9, the scan driver 2 outputs a selection signal for selecting the plurality of electron-emitting devices 101 in units of rows (1 or 2 rows). The selection signals are sequentially applied to the scan lines in the column direction, and row selection operations are sequentially performed. As a result, the scan lines are sequentially scanned in the column direction.

  A data driver 4 is connected to the data line 102 of the display panel 1 via a drive signal correction circuit 5. The data driver 4 is supplied with the video data output from the timing controller 9. In response to the row selection by the scan driver 2, the data driver 4 supplies a drive signal based on the video data to the data line 102 via the drive signal correction circuit 5. The data driver 4 holds data for one row of the display panel 1, that is, video data for one line from the timing controller 9 based on the timing signal from the timing controller 9 for one horizontal period, and one horizontal cycle. Data is rewritten every time.

  Further, the anode line 104 of the display panel 1 is connected to a high voltage generation circuit 6 that generates an acceleration voltage (for example, 7 kV) for accelerating electrons emitted from the electron-emitting devices 101. Electrons from the electron-emitting device 101 are accelerated from the back substrate side (not shown) to the front substrate side by this acceleration voltage.

  An operation related to display in the display panel configured as described above will be described below. One row of electron-emitting devices 101 to which a selection pulse is applied as a selection signal by the scan driver 2 via the scan line 103 (that is, selected) is transferred from the data driver 4 to the drive signal correction circuit 5 and the data line 102. When the drive signal is given, the electron-emitting devices in the row emit electrons in an amount corresponding to the potential difference between the selection signal and the drive signal. Since the level of the voltage (hereinafter referred to as “selection voltage”) VS of the selection signal applied to the scan line at the time of row selection is constant regardless of the position of the electron-emitting device, the amount of electron emission from the electron-emitting device Varies depending on the level of the voltage (hereinafter referred to as “drive voltage”) VD of the drive signal applied to the data line. That is, the electron emission amount is determined by the level of the video signal that is the basis of the drive signal.

  Here, the electron emission characteristics with respect to the applied voltage applied to the electron-emitting device will be described with reference to FIG. As shown in FIG. 3B, the applied voltage applied to the electron-emitting device is defined by a difference voltage between the selection voltage VS and the drive voltage VD. The selection voltage VS is, for example, the voltage Vth when selecting a row, and 0 V when not selecting. The drive voltage VD is, for example, 0V when not displayed (in the case of black display), and increases in the negative voltage direction when displaying brightly (however, it does not exceed -Vth). Accordingly, in the electron-emitting devices in the selected row, when the drive voltage VD corresponding to the video data is applied, the applied voltage (VS−VD) exceeds the emission start voltage Vth shown in FIG. Electron emission corresponding to VD occurs.

  Returning to FIG. 1, an acceleration voltage (for example, 7 kV) from the high voltage generation circuit 6 is applied to the display panel 1. For this reason, the electrons emitted from the electron-emitting device are accelerated by the acceleration voltage and collide with a phosphor disposed on the front substrate of the display panel 1. The phosphor is excited by the collision of the accelerated electrons and emits light. Thereby, the video of the selected one horizontal line is displayed. Further, the scan driver 2 selects the electron-emitting devices row by row by sequentially applying selection signals in the column direction to the plurality of scan lines. Thereby, one frame of video can be formed on the display surface of the display panel. The brightness (brightness) of the display panel is higher (brighter) as the time applied to the electron-emitting device is longer. If the applied voltage is stable, the desired gradation and brightness can be obtained, and a high-quality image can be obtained. Is obtained.

  FIG. 2 is an equivalent circuit of a display panel in which electron-emitting devices are two-dimensionally arranged in a matrix form of m horizontal x n vertical. As is apparent from FIG. 2, the wiring (scan line, data line) connecting each electron-emitting device constituting the display panel 1 has wiring resistances R1, R2, wiring inductances L1, L2, and wiring capacitance C. Yes. The electrical characteristics of the wiring indicate low-pass filter characteristics having a cutoff frequency determined by these equivalent elements (R, L, C). When the display panel 1 is a full high-definition panel, the number of electron-emitting devices (number of pixels as a unit) serving as the pixel is 1920 × 3 in the horizontal direction and 1080 in the vertical direction. R2 is larger than the resistance R1 of the scan line. 2, D1, D2,..., Dm are terminals of the data line 102 of the display panel 1 (power supply points to the display panel), and VD1, VD2,..., VDm are terminals Dj (j: 1 to m). .., Sn are applied to the terminals (feeding points) of the scan line 103 of the display panel 1, and VS1, VS2,..., VSn are selected to be applied to the terminals Si (i: 1 to n). Voltage. VDm ′ and VSn ′ are a drive voltage and a selection voltage applied to the electron-emitting device located farthest from the power supply terminals Dm and Sn. Hereinafter, an electron-emitting device located at the intersection of i rows and j columns is denoted by (i, j).

  In FIG. 2, in order to operate the electron-emitting device as described above, a selection signal is sequentially sent from the scan driver 2 in units of rows (1 or 2 rows) from the selection voltage VS1 of the first row to the selection voltage VSn of the nth row. Simultaneously with the output, the data driver 4 applies the drive voltage VDm of the mth column from the drive voltage VD1 of the first column of the drive signal held for one horizontal period via the drive signal correction circuit 5.

  Due to the electrical characteristics (low-pass filter characteristics) of the wirings of the scan lines 103 and the data lines 102, the selection signal and the drive signal are affected and the waveform becomes dull. For this reason, the electron emitting element portion farther from the power supply terminals Si and Dj of the display panel 1 becomes duller, and the time during which the applied voltage is stabilized, that is, the light emission time is shortened, resulting in a dark image. In addition, the influence is further increased by increasing the screen size and resolution of the display device.

  Next, the dullness and luminance of the selection signal and the drive signal will be described with reference to FIGS. 4A and 4B are diagrams showing a conventional selection voltage waveform and a driving voltage waveform, and FIG. 5 is a driving voltage waveform according to this embodiment. That is, in this embodiment, the waveform of the drive signal in an arbitrary electron-emitting device is corrected. The correction is performed by a drive signal correction circuit 5 described later.

  The left side of FIG. 4 shows the selection voltage VSn at the n-th power supply terminal Sn and the drive voltage VDm at the m-th power supply terminal Dm of the display panel 1 shown in FIG. Further, on the right side, a selection voltage VSn ′ and a driving voltage VDm ′ of the electron-emitting device (n, m) portion located farthest from the feeding terminals Sn and Dm are shown. Here, attention is paid to the selection voltage VSn ′ and the driving voltage VDm ′ applied to the electron-emitting devices (n, m) located at the intersection of n rows and m columns far from the power supply terminal.

  When the selection voltage VSn and the driving voltage VDm applied to the electron-emitting devices are defined as the selection period TL, since the scanning line wiring resistance R1 <the data line wiring resistance R2, the selection voltages VSn and VSn ′ and the driving voltages VDm and VDm ′ are The waveform shown in FIG. That is, their response characteristics are (rise and fall times of the selection voltage VSn ′) <(rise and fall times of the drive voltage VDm ′). Accordingly, the gradation of the image is deteriorated due to the influence of the waveform of the drive voltage VDm ′ having a long rise and fall time.

  In order to prevent the gradation of luminance from deteriorating, the period during which the voltage of the drive voltage VDm ′ is flat is set as the luminance stabilization period TL1, and the selection is performed in the selection period TL3 in which the rise time TL2 of VSn ′ is added to the luminance stabilization period TL1. When a voltage is applied, the waveform shown in FIG. As a result, light emission at the falling edge of the drive voltage VDm ′ is eliminated, so that the gradation of the video is improved. However, the light emission time is shortened and the luminance is lowered.

  Therefore, in this embodiment, the rise and fall times of the drive voltage VDm ′ are shortened. That is, as shown in FIG. 5, with respect to the driving voltage VDm of the data line having a bad falling / rising characteristic, the rising and falling parts of the voltage waveform are peaked, and the low-pass filter characteristic of the data wiring is Reverse frequency correction is performed. The peak value of this correction is set based on the position of the electron-emitting device and the drive voltage value to be applied. Accordingly, the luminance stabilization period of the drive voltage VDm ′ applied to the electron-emitting device can be extended. Therefore, as shown on the right side of FIG. 5, the luminance stabilization period TL4 approaches the selection period TL, and the gradation and luminance of the video can be improved.

  Next, a method for correcting the drive voltage waveform of FIG. 5 will be described with reference to FIG. FIG. 6 (1) is a conventional drive voltage block diagram, and FIGS. 6 (2) and 6 (3) are drive voltage block diagrams according to this embodiment. Among them, FIG. 6B is a drive voltage block diagram corrected by paying attention to the electron-emitting device located in the nth selected row.

  As described above, the frequency characteristics of the wiring from the power supply end point D of the data line to the electron emitter in the n-th row are generally low pass filters (hereinafter referred to as “LPF”) due to the influence of the wiring resistance R2 and the wiring capacitance C. It will be described). The frequency characteristic of this LPF is represented by Fn. In order to optimize the waveform of the drive voltage VD ′ applied to the electron-emitting devices located in the nth selected row, as shown in (2) of FIG. 6, the drive signal correction circuit 5 supplies the drive voltage VD ′. The drive voltage VD is added to the drive voltage VD by the adder 602 through a high-pass filter (hereinafter referred to as “HPF”) 601n having the characteristic (1-Fn). As a result, the output waveform of the drive signal correction circuit 5 becomes, for example, the left waveform of FIG. When the drive signal corrected in this way is applied to the data line, for example, as shown in the right waveform of FIG. 5, a drive voltage waveform without waveform dullness can be obtained in the n-th row electron-emitting device.

  In FIG. 6B, the description has been made focusing only on the correction of the drive voltage applied to the n-th row electron-emitting device. However, the wiring resistance and wiring capacitance of the data line change according to the distance (selected row) from the power supply end point. That is, the LPF characteristic Fi (i: 1 to n) also changes. Therefore, it is preferable to vary the HPF characteristic (1-Fi) in accordance with the row where the electron-emitting devices are arranged. In other words, it is desirable to apply correction with a larger peak area value to the drive voltage as it is farther from the data driver. Furthermore, the peak value of this correction is set based on the drive voltage value applied from the data driver.

  FIG. 6 (3) is a drive voltage block diagram according to this embodiment in which the HPF characteristics are varied for each selected row. That is, as shown in FIG. 6 (3), if the HPF 601i for correcting the drive voltage of each data line is switched by the switch 603 at the timing of the scan line selection signal (i: 1 to n), the waveform is changed for each electron-emitting device. A dull waveform can be obtained.

  Of course, in order to reduce the cost of the HPF and the switch, for example, the HPF may be fixed using only the HPF 601 (n / 2) corresponding to the n / 2th row. Even in this case, since the falling and rising characteristics of the drive voltage VD are improved as compared with the prior art, it is possible to improve the gradation and luminance of the video. Alternatively, the number of HPFs may be n / 2 or less, for example, the HPFs may be shared by two adjacent rows, and the number of HPFs may be n / 2.

  In this embodiment, the example in which the data driver is installed at one end of the display panel has been described. However, the present embodiment is not limited to this, and the present invention can be applied to a form in which the data driver is arranged above and below the display panel. In this case, since the center of the screen is more susceptible to the electrical characteristics of the wiring, frequency correction with a larger peaking value is performed at the rising and falling portions of the voltage waveform toward the center of the screen.

  Next, Example 2 will be described. In the following, attention is paid to the selection voltage VSn ′ and the drive voltage VDm ′ applied to the electron-emitting devices (n, m) located at the intersections of n rows and m columns far from the power supply terminals so that the comparison with the first embodiment is possible. To explain.

  In the first embodiment, the improvement of the rise and fall characteristics of the drive voltage VD due to the LPF characteristic of the data line has been described. However, the rise and fall characteristics of the selection voltage are also degraded by the LPF of the scan line. In the second embodiment, the present invention is applied to the scan line side.

  FIG. 7 is a block diagram of a display device showing the second embodiment. In FIG. 7, reference numeral 3 denotes a selection signal correction circuit for correcting the selection voltage from the scan driver 2 so that peaking occurs at the rising and falling portions of the voltage waveform. In FIG. 7, elements having the same functions as those in FIG. 1 are denoted by the same reference numerals and description thereof is omitted.

  First, the dullness and luminance of the selection signal and the drive signal according to the second embodiment will be described with reference to FIG. FIG. 8A is a diagram showing a conventional selection voltage waveform and drive voltage waveform, and FIG. 4A is rewritten for comparison with the embodiment. FIG. 8 (2) shows the selection voltage and drive voltage waveforms according to this embodiment. That is, in this embodiment, in addition to the first embodiment, the waveform of the selection signal in any electron-emitting device is also corrected. The correction is performed by the selection signal correction circuit 3 described later.

  In the present embodiment, as in the first embodiment, the rise and fall times of the drive voltage VDm ′ are shortened, and the rise and fall times of the selection voltage VSn ′ are shortened. That is, as shown in FIG. 8, peaking is provided at the rising and falling portions of the voltage waveform with respect to the drive voltage VDm of the data line having the poor falling and rising characteristics. In addition, peaking is provided at the rising and falling portions of the voltage waveform with respect to the selection voltage VSn of the scan line. The peak value of this correction is set based on the applied scan voltage value. Accordingly, the luminance stabilization period of the drive voltage VDm ′ and the selection voltage VSn ′ applied to the electron-emitting device can be extended. Therefore, as shown on the right side of FIG. 8, the luminance stabilization period TL5 approaches the selection period TL, and the gradation and luminance of the video can be improved.

  Next, a method for correcting the selection voltage waveform in FIG. 8B will be described with reference to FIG. FIG. 9 (1) is a conventional selection voltage block diagram, and FIG. 9 (2) is a selection voltage block diagram according to this embodiment.

  The frequency characteristics of the wiring from the feeding end point of the scan line to the electron emission elements in the m-th column are generally LPF due to the influence of wiring resistance and wiring capacitance. This characteristic is indicated by Fm. In order to optimize the waveform of the selection voltage VS ′ applied to the electron-emitting devices located in the m-th data column, the selection signal correction circuit 3 supplies the selection voltage VS ′ waveform as shown in FIG. The adder 302 may add the selection voltage VS through the HPF 301 having the characteristic (1-Fm). As a result, the output waveform of the selection signal correction circuit 3 becomes, for example, the left waveform of FIG. When the drive signal corrected in this way is applied to the scan line, a waveform with no waveform dullness is obtained in the electron emission element portion in the m-th column.

  However, since the selection voltage selects the electron-emitting devices in units of rows, it cannot be optimally corrected for each electron-emitting device in an arbitrary column of the selected row. Therefore, since the correction cannot be applied so that an arbitrary electron-emitting device in the selected row is optimized, a characteristic that corrects the filter characteristic somewhere from the first column to the m-th column of the scanning line feeding end point. The correction value is fixed. For example, if the correction value is the m / 2th column in the center of the display panel, the HPF characteristic is set to (1-F (m / 2)).

  According to the present embodiment described above, the rising and falling characteristics of the selection voltage are corrected not only on the data line but also on the scan line, so that the gradation and luminance of the video can be improved.

  In this embodiment, the selection signal correction circuit 3 and the drive signal correction circuit 5 are provided independently. However, the present embodiment is not limited to this, for example, the selection signal correction circuit and the drive signal correction circuit. May be provided in the scan driver 2 and the data driver 4, respectively. In this case, a selection signal is also output from the tie scan driver 2 to the data driver 4 for filter switching.

  In this embodiment, the example in which the scan driver is installed at one end of the display panel has been described. However, the present embodiment is not limited to this, and the present invention can be applied to a configuration in which the scan driver is arranged at both ends of the display panel.

FIG. 3 is a block diagram of a display device showing the first embodiment. Diagram showing equivalent circuit of display panel The figure which shows the electron emission characteristic with respect to the applied voltage applied to an electron emission element. Schematic diagram showing conventional selection voltage waveform and drive voltage waveform The schematic diagram which shows the drive voltage waveform by Example 1 The figure explaining the operation which corrects drive voltage waveform bluntness Block diagram of a display device showing a second embodiment The schematic diagram which shows the drive voltage waveform by Example 2 The figure explaining the operation which corrects the dullness of the selection voltage waveform

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 ... Display panel, 2 ... Scan driver, 3 ... Selection signal correction circuit, 4 ... Data driver, 5 ... Drive signal correction circuit, 6 ... High voltage generation circuit, 7 ... Video signal processing circuit, 8 ... Video signal input terminal, 9 DESCRIPTION OF SYMBOLS ... Timing controller 101 ... Electron emission element 102 ... Data line 103 ... Scan line 104 ... Anode line 301 ... HPF 302 ... Adder 601 ... HPF 602 ... Adder 603 ... Switch

Claims (12)

In the display device,
Multiple scan lines,
A scan driver connected to at least one of the left and right ends of the plurality of scan lines and applying a scan voltage to the plurality of scan lines;
Multiple data lines,
A data driver connected to the plurality of data lines and applying a drive voltage corresponding to the input video signal to the plurality of data lines;
An electron-emitting device that is connected to intersections of the plurality of scan lines and the plurality of data lines, and emits electrons in accordance with a potential difference between the scan voltage and the drive voltage;
A drive voltage correction circuit for correcting the drive voltage applied by the data driver to have a peak value corresponding to the electron-emitting device and the applied drive voltage;
A display device comprising: The display device according to claim 1,
The scan driver is connected to one of left and right ends of the plurality of scan lines;
The electron-emitting device includes a first electron-emitting device, and a second electron-emitting device disposed between the first electron-emitting device and the data driver,
The drive voltage correction circuit corrects the voltage applied by the data driver so as to apply a voltage having a larger peak area value to the first electron-emitting device than to the second electron-emitting device. Display device. The display device according to claim 1,
A display device comprising: a scan voltage correction circuit configured to correct a voltage applied by the scan driver so as to have a peak value corresponding to the applied scan voltage. The display device according to any one of claims 1 to 3,
The display device, wherein the drive voltage correction circuit and / or the scan voltage correction circuit corrects the applied voltage to have a peak value when the applied voltage rises and / or falls. In the display device,
Multiple scan lines,
A scan driver connected to at least one of the left and right ends of the plurality of scan lines and applying a scan voltage to the plurality of scan lines;
Multiple data lines,
A data driver connected to the plurality of data lines and applying a drive voltage corresponding to the input video signal to the plurality of data lines;
An electron-emitting device that is connected to intersections of the plurality of scan lines and the plurality of data lines, and emits electrons in accordance with a potential difference between the scan voltage and the drive voltage;
A scan voltage correction circuit for correcting the voltage applied from the scan driver to have a peak value at the time of voltage rise and / or voltage fall; and
A display device comprising: The display device according to any one of claims 3 and 5,
The display device, wherein the scan voltage correction circuit performs correction according to electrical characteristics of the scan line. The display device according to any one of claims 3 and 5,
The display apparatus according to claim 1, wherein the scan voltage correction circuit corrects the dullness of the waveform of the scan voltage in the electron-emitting device portion to lengthen the selection period. The display device according to any one of claims 1 and 3,
The display device according to claim 1, wherein the drive voltage correction circuit performs correction according to electrical characteristics of the data line. The display device according to any one of claims 1 and 3,
The display apparatus according to claim 1, wherein the drive voltage correction circuit corrects the dullness of the waveform of the drive voltage at the electron-emitting device portion to lengthen the drive time. The display device according to any one of claims 1 and 3,
The display device according to claim 1, wherein the drive voltage correction circuit performs correction in accordance with electrical characteristics of the wiring to the selected electron-emitting device of the data line. The display device according to any one of claims 3 and 5,
The display apparatus according to claim 1, wherein the scan voltage correction circuit adds a scan voltage supplied to the plurality of scan lines and a correction signal corresponding to an electrical characteristic of the scan line wiring. The display device according to any one of claims 1 and 3,
The display device characterized in that the drive voltage correction circuit adds a drive voltage supplied to the plurality of data lines and a correction signal corresponding to the electrical characteristics of the wiring of the data lines.

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