JP2007135007A - Oscillation circuit and communication equipment with same - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide an oscillation circuit capable of obtaining a high-level, high-Q output, and communication equipment with the same. <P>SOLUTION: The oscillation circuit 1 comprises a first slot line 2, a second slot line 3, a third slot line 4, and an FET 5. The first slot line 2 is used as an output port, the second slot line 3 is composed of a short stub 30 and a DC cut line 31, and the length of the short stub 30 is set to λg/2 to 3λg/4. Further, the third slot line 4 is composed of a short stub 40 and a DC cut line 41 as well and the length of the short stub 40 is set to λg/4 to λg/2. Then the FET 5 is mounted having the gate electrode G and drain electrode D across the second slot line 3, the drain electrode D and source electrode S across the third slot line 4, and the source electrode S and gate electrode G across the first slot line 2. A band reflection type resonator 6 is a short stub having a length λg/4. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to an oscillation circuit using a slot line, and more particularly to an oscillation circuit having a band reflection type resonator and a communication apparatus including the oscillation circuit.

Conventionally, as this type of oscillation circuit, for example, there is a technique disclosed in Patent Document 1.
FIG. 16 is a plan view showing an oscillation circuit according to a conventional example.
In this oscillation circuit, a band reflection type resonator 200 is connected in the middle of a gate-source slot line 301 of an FET 210 functioning as a negative resistance, and a chip-like termination resistor 211 is connected to the end of the slot line 301. The gate connection electrode 311 and the source connection electrode 312 are electrically connected to each other.

JP 2004-007349 A

However, the conventional oscillation circuit described above has the following problems.
In the oscillation circuit, in order to increase the output power of the drain-source slot line 302, it is necessary to increase the loop gain between the slot lines 301 by the FET 210. However, when a band reflection type resonator such as the resonator 200 is used, if the electromagnetic coupling between the resonator 200 and the slot line 301 is increased in order to increase the loop gain between the slot lines 301 by the FET 210, the resonance will occur. The load Q of the device 200 is reduced, and the characteristics with respect to the phase noise are deteriorated. However, if the electromagnetic coupling between the resonator 200 and the slot line 301 is weakened in order to increase the load Q of the resonator 200, the loop gain cannot be obtained and a desired output voltage can be secured. Can not. That is, the loop gain and the load Q of the resonator 200 are in a trade-off relationship.
In addition, in this oscillation circuit, the chip-like termination resistor 211 is arranged at the end of the slot line 301 and the gate connection electrode 311 and the source connection electrode 312 are electrically connected. At the time of 200 resonance, a current flows through the termination resistor 211, and the termination resistor 211 causes a large loss of power.
As described above, in the conventional oscillation circuit described above, it is difficult to adjust both the loop gain and the load Q at a high level. Therefore, it is impossible to obtain a high level and high Q value output. In addition, there is a large power loss due to the termination resistor 211.

  The present invention has been made to solve the above-described problems, and an object thereof is to provide an oscillation circuit capable of obtaining a high-level and high-Q output and a communication device including the same.

In order to solve the above-described problem, an oscillation circuit according to the invention of claim 1 includes a first slot line as an output port having one end opened at an edge of the substrate, and the other end of the first slot line. The semiconductor device is mounted and functions as a negative resistance, and a band reflection type resonator disposed at the position of the first slot line where the phase of the reflection gain characteristic of the semiconductor device is 0 °.
With this configuration, when the semiconductor element operates, a signal incident on the semiconductor element from the band reflection type resonator side in the first slot line is reflected with a predetermined gain by the semiconductor element functioning as a negative resistance, Output from the slot line opening to the outside. At this time, since the position of the band reflection type resonator is set to the position of the first slot line where the phase of the reflection gain characteristic by the semiconductor element is 0 °, the phase of the incident wave to the semiconductor element and the semiconductor element There is almost no difference in the phase of the amplified reflected wave. For this reason, a standing wave having a large amplitude is generated in the first slot line and is output from the opening.

  According to a second aspect of the present invention, in the oscillation circuit according to the first aspect, the first branch line extends from the other end of the first slot line, reaches the substrate edge, and the electrodes on the substrate are connected to the first electrode and the second electrode. A second slot line that is separated into electrodes, and a third slot line that extends in a branched state from the other end of the first slot line, and the semiconductor element is a field effect transistor, and the gate electrode and drain thereof The electrode and the source electrode are mounted on the first and second electrodes so as to straddle the first slot line, the second slot line, and the third slot line, and the band reflection type resonator is connected to the first electrode. It was set as the structure formed.

According to a third aspect of the present invention, in the oscillation circuit according to the second aspect, the substrate is a dielectric substrate.
With this configuration, a dielectric resonant oscillation circuit (DRO) can be configured.

According to a fourth aspect of the present invention, in the oscillation circuit according to the second or third aspect, the second slot line is output from the first slot line to a half to a third of the wavelength of the in-band output signal. And a DC cut line that branches from the short stub at a position one quarter of the wavelength from the end of the short stub and reaches the edge of the substrate, and the third slot line is formed into the first slot. A short stub having a length of ¼ to ½ of the wavelength of the output signal output from the line, and branched from the short stub at a position of a quarter of the wavelength from the end of the short stub to the edge of the substrate The second electrode is separated into a new second electrode and a third electrode, and the gate electrode, the drain electrode, and the source electrode of the semiconductor element are divided into the second slot line and the third slot line. And in order A structure connected respectively to the said first electrode and the new second electrode and the third electrode's state.
With this configuration, the short stub of the second slot line functions as an inductor, and the short stub of the third slot line functions as a capacitor. The first slot line between the band reflection type resonator and the semiconductor element can function as a capacitor. Thus, a DC bias voltage can be applied to the drain electrode of the semiconductor element through the new second electrode, and an output signal having a desired frequency can be generated on the first slot line sandwiched between the gate electrode and the source electrode.

According to a fifth aspect of the present invention, in the oscillation circuit according to the second or third aspect, the second slot line is output from the first slot line to a half to a third of the wavelength of the in-band output signal. And a DC cut line that branches from the short stub at a position one quarter of the wavelength from the end of the short stub and reaches the edge of the substrate, and the third slot line is formed into the first slot. A short stub having a length of ¼ to ½ of the wavelength of the output signal output from the line is formed, and the drain electrode, the gate electrode, and the source electrode of the semiconductor element are connected to the second slot line and the third slot. It is set as the structure connected to the 1st electrode and the 2nd electrode, respectively in the state which pinched | interposed the track | line in order.
With this configuration, the short stub of the second slot line functions as an inductor, and the third slot line, which is a short stub, functions as a capacitor. The first slot line between the band reflection type resonator and the semiconductor element can function as a capacitor. Accordingly, a DC bias voltage can be applied to the drain electrode of the semiconductor element through the first electrode, and an output signal having a desired frequency can be generated on the first slot line sandwiched between the drain electrode and the source electrode.

According to a sixth aspect of the present invention, in the oscillation circuit according to the second or third aspect, the second slot line is output from the first slot line to a half to a third of the wavelength of the in-band output signal. And a DC cut line that branches from the short stub at a position one quarter of the wavelength from the end of the short stub and reaches the edge of the substrate, and the third slot line is formed into the first slot. A short stub having a length of ¼ to ½ of the wavelength of the output signal output from the line is formed, and the drain electrode, the source electrode, and the gate electrode of the semiconductor element are connected to the second slot line and the third slot. It is set as the structure connected to the 1st electrode and the 2nd electrode, respectively in the state which pinched | interposed the track | line in order.
With this configuration, the short stub of the second slot line functions as an inductor, and the third slot line, which is a short stub, functions as a capacitor. The first slot line between the band reflection type resonator and the semiconductor element can function as a capacitor. Accordingly, a DC bias voltage can be applied to the drain electrode of the semiconductor element through the first electrode, and an output signal having a desired frequency can be generated in the first slot line sandwiched between the drain electrode and the gate electrode.

According to a seventh aspect of the present invention, in the oscillation circuit according to any one of the first to sixth aspects, the band reflection type resonator is branched from the first slot line and its length is approximately one-fourth of the wavelength. It was set as the structure which is a short stub set to.
With this configuration, the electromagnetic coupling between the band reflection type resonator and the first slot line can be enhanced, and a predetermined Q value can be secured.

According to an eighth aspect of the present invention, in the oscillation circuit according to any one of the first to sixth aspects, the band reflection type resonator is a rectangular mouth-shaped resonator formed in the vicinity of the first slot line. The configuration.
With this configuration, the electromagnetic coupling between the band reflection type resonator and the first slot line can be in a loosely coupled state, and a high Q value can be obtained.

According to a ninth aspect of the present invention, in the oscillation circuit according to any one of the first to sixth aspects, the band reflection type resonator is formed in a circular mouth shape that is formed in the vicinity of the first slot line and has a wavelength diameter. It was set as the structure which is this.
With this configuration, the electromagnetic coupling between the band reflection type resonator and the first slot line can be in a loosely coupled state, and a higher Q value can be obtained.

  According to a tenth aspect of the present invention, a communication apparatus includes the oscillation circuit according to any one of the first to ninth aspects.

  As described in detail above, the oscillation circuit according to any one of claims 1 to 9 includes a semiconductor device functioning as a negative resistance mounted on a first slot line as an output port, and a band reflection type resonator is provided. Since the semiconductor element is arranged at the position of the first slot line where the phase of the reflection gain characteristic by the semiconductor element is 0 °, a chip-like termination resistor is not required unlike the conventional oscillation circuit described above. Therefore, the loss of power consumed by the termination resistor can be earned as a loop gain by the semiconductor element. For this reason, a desired loop gain can be ensured while maintaining a high load Q without intentionally increasing the electromagnetic coupling between the band reflection type resonator and the first slot line. Further, in the conventional oscillation circuit, the signal in the first slot line that is incident / reflected by the semiconductor element is not output but is consumed by the resonance circuit or the like, so that a large amount of power is wasted. However, since the oscillation circuit of the present invention is configured to output the signal in the first slot line incident / reflected by the semiconductor element as it is, the power consumed by the band reflection type resonator is converted to the power of the output signal. can do. That is, according to the present invention, a high output power signal can be output from the first slot line while maintaining a high Q value. As a result, both high output and low phase noise are achieved. There is an excellent effect that an oscillation circuit can be provided. In addition, it is possible to prevent variations in the characteristics of the oscillation circuit at the time of manufacture caused by mounting the termination resistor.

  According to the fifth and sixth aspects of the present invention, the output signal is generated in the first slot line sandwiched between the drain electrode and the source electrode or the gate electrode. A wave can be formed in the first slot line, and as a result, the output signal can be further increased in power.

  Further, according to the invention of claim 8, there is an effect that a higher Q value can be obtained in a high output state. According to the invention of claim 9, a higher Q value is obtained in a high output state. There is an effect that can be.

  Further, according to the invention of claim 10, since the oscillation circuit with high output and low phase noise is provided, it is possible to provide a communication device having high quality and excellent BER (bit error rate) characteristics. is there.

  The best mode of the present invention will be described below with reference to the drawings.

  FIG. 1 is an exploded perspective view showing an oscillation circuit according to a first embodiment of the present invention, FIG. 2 is a plan view of the oscillation circuit excluding the FET, and FIG. 3 is a state in which the FET is mounted. It is arrow AA sectional drawing of FIG. 2 shown.

The oscillation circuit of this embodiment is a dielectric resonance oscillation circuit (DRO) as shown in FIGS. 1 and 2, and this oscillation circuit 1 is connected to a first slot line 2 and a first slot line as shown in FIG. A two-slot line 3, a third slot line 4, a field effect transistor (hereinafter referred to as “FET”) 5 as a semiconductor element, and a band reflection type resonator 6 are included.
The first slot line 2 to the third slot line 4 and the band reflection type resonator 6 are formed on the substrate 100, and the FET 5 is mounted on the surface 100 a side of the substrate 100.

The substrate 100 is a rectangular flat dielectric substrate and is made of a resin material, a ceramic material, or a composite material obtained by mixing these materials.
The first slot line 2 to the third slot line 4 and the band reflection type resonator 6 are made of film-like electrodes such as gold, copper, and silver formed on the front surface 100a and the back surface 100b of the substrate 100, for example, photolithography technology. It formed by patterning using etc. In this embodiment, PDTL (Planer Dielectric Transmission Line) is adopted as the slot or stub type. That is, the first slot line 2 to the third slot line 4 and the band reflection type resonator 6 are formed symmetrically on both surfaces 100a and 100b of the substrate 100, respectively. Of course, the present invention is not limited to this type of PDTL. The first slot line 2 to the third slot line 4 and the band reflection type resonator 6 are formed only on the front surface 100a of the substrate 100, and only the ground electrode is formed on the back surface 100b. Can be formed, or nothing can be formed on the back surface 100b.

  The first slot line 2 is an output port for outputting the signal S within the band, and one end 2 a is opened at the edge of the substrate 100.

The second slot line 3 is a line that separates the electrodes on the substrate 100, and extends upward from the other end 2 b of the first slot line 2 at a right angle (upward in FIG. 1). Open at the edge. As a result, the second slot line 3 separates the electrode on the substrate 100 into the first electrode 101 and the second electrode 102.
Specifically, the second slot line 3 is composed of an L-shaped short stub 30 and a linear DC (direct current) cut line 31. Then, the length of the short stub 30, that is, the length from the other end 2 b of the first slot line 2 to the tip 30 a, is the wavelength of the signal S in the band for outputting from the first slot line 2 (hereinafter referred to as “λg”). The length is set to 1/2 to 3/4. Further, the DC cut line 31 branches from the short stub 30 at a position of λg / 4 from the tip 30 a of the short stub 30 and opens at the edge of the substrate 100.

The third slot line 4 is a line that separates the second electrode 102, branches from the other end 2b of the first slot line 2 and extends rightward (rightward in FIG. 1), and the end 4a is a substrate. Open at 100 edges. Accordingly, the third slot line 4 separates the second electrode 102 into a new second electrode 102 ′ above the third slot line 4 and a third electrode 103 below.
Specifically, the third slot line 4 is composed of an L-shaped short stub 40 and a linear DC cut line 41. The length of the short stub 40, that is, the length from the other end 2b of the first slot line 2 to the tip 40a was set to a length of λg / 4 to λg / 2. The DC cut line 41 branches from the short stub 40 at a position λg / 4 from the tip 40 a of the short stub 40 and opens at the right edge of the substrate 100.

An FET 5 shown in FIG. 1 is a surface-mount type chip component having a gate electrode G, a drain electrode D, and a source electrode S on the back surface, and a bump made of gold or the like on the other end 2b of the first slot line 2. 50 is surface mounted.
Specifically, as shown in FIG. 2, the gate electrode G of the FET 5 is connected to the first electrode 101, the drain electrode D is connected to the new second electrode 102 ', and the source electrode S is connected to the third electrode 103. did. Thereby, the gate electrode G and the drain electrode D of the FET 5 sandwich the second slot line 3, the drain electrode D and the source electrode S sandwich the third slot line 4, and the source electrode S and the gate electrode G are the first. The slot line 2 is sandwiched.

Further, the circuit constituted by the FET 5, the second slot line 3, and the third slot line 4 of this embodiment functions as a negative resistance.
FIG. 4 is a partially enlarged view for explaining the function of the FET 5.
That is, as shown in FIG. 4, the FET 5 receives the signal S1 from the band reflection type resonator 6 side, amplifies it with a predetermined gain, and returns the amplified signal S2 to the first slot line 2 side. . That is, it has a function of reflecting the incident signal S1 incident on the FET 5 with a predetermined gain and outputting the amplified reflected signal S2 toward the one end 2a side of the first slot line 2.

The band reflection type resonator 6 is a resonator provided to increase the Q value of the in-band signal S output from the first slot line 2. In this embodiment, the band reflection type resonator 6 is a short stub. Formed.
Specifically, a short stub branched from the first slot line 2 to the first electrode 101 side is formed, and the length is set to approximately λg / 4, whereby the short stub is used as the band reflection type resonator 6. Using.
The branch position 2c of the band reflection type resonator 6 is set to a position where the phase of the reflection gain characteristic by the FET 5 is 0 °. That is, a standing wave between the incident signal S1 and the reflected signal S2 is generated in the first slot line 2, but the phase difference between the incident signal S1 and the reflected signal S2 becomes 0, and the standing wave ratio (SWR). The band reflection type resonator 6 is set at a position where becomes the maximum. In this embodiment, the distance between the branch position 2c and the other end 2b is set to λg / 2 to 3λg / 4.

FIG. 5 is an equivalent circuit diagram of the oscillation circuit 1.
In this embodiment, as shown in FIGS. 1 and 2, the gate electrode G of the FET 5 is on the first electrode 101, the drain electrode D is on the new second electrode 102 ′, and the source electrode S is on the third electrode 103. Since they are connected to each other, a DC bias voltage can be applied to the gate electrode G, drain electrode D, and source electrode S of the FET 5 through the first electrode 101, the new second electrode 102 ', and the third electrode 103, respectively. In this embodiment, a DC bias voltage is applied only to the drain electrode D, and the other electrodes are grounded. Further, the length of the short stub 30 between the gate electrode G and the drain electrode D is set to λg / 2 to 3λg / 4, and the length of the short stub 40 is set to λg / 4 to λg / 2. The length between the point 2c and the other end 2b of the first slot line 2 was set to λg / 2 to 3λg / 4. And the band reflection type resonator 6 was formed in the branch position 2c.
Therefore, the oscillation circuit 1 corresponds to the equivalent circuit shown in FIG. That is, the short stub 30 corresponds to the inductor L. Further, the short stub 40 corresponds to the capacitor C1, and the first slot line 2 between the point 2c and the other end 2b corresponds to the capacitor C2. The short stub-shaped band reflection type resonator 6 corresponds to the resonance circuit Re. Therefore, the oscillation circuit 1 functions as a Colpitts type oscillator.

Next, the operation and effect of the oscillation circuit of this embodiment will be described.
1 and 2, when a DC bias voltage is applied to the drain electrode D through the second electrode 102 and the FET 5 is activated, the FET 5 functions as a negative resistance as shown in FIG. An incident signal S 1 incident from the side of the device 6 and a reflected signal S 2 amplified with a predetermined gain are generated in the first slot line 2. At this time, since the band reflection type resonator 6 is formed at the branch position 2c, a standing wave having a large amplitude is generated by the incident signal S1 and the reflected signal S2. As a result, a large power output signal S is output from the first slot line 2. In addition, unlike the above-described conventional oscillation circuit, since no chip-like termination resistor is used, the oscillation circuit 1 does not consume useless power. As a result, even if the electromagnetic coupling between the band reflection type resonator 6 and the first slot line 2 is not intentionally strengthened, a large loop gain by the FET 5 can be obtained. Further, not only can the band reflection type resonator 6 output the output signal S having a high Q value, but the output signal S can be directly output from the first slot line 2. It is possible to convert the power consumed by the power into the power of the output signal.

FIG. 6 is a correlation diagram between the Q value and the loop gain, and the difference between the above-described conventional oscillation circuit and the oscillation circuit 1 of this embodiment will be described with reference to this diagram.
In FIG. 6, a curve V1 is a characteristic between the Q value and the loop gain exhibited by the conventional oscillation circuit, and a curve V2 is a characteristic between the Q value and the loop gain exhibited by the oscillation circuit 1 of this embodiment.
As indicated by the point P1 of the curve V1, in the conventional oscillation circuit, when the Q value is increased to “q1”, the loop gain becomes a low value “g1”. However, as indicated by the point P2 of the curve V1, when the loop gain is increased to “g2”, the Q value becomes a low value of “q2”.
On the other hand, in the oscillation circuit 1 of this embodiment, a large amount of power can be added to the output signal S without consuming unnecessary power, and the characteristic between the Q value and the loop gain is as shown by a curve V2. To the upper right of the curve V1. As a result, as indicated by a point P3 on the curve V2, a high loop gain “g2” can be obtained while maintaining a high Q value “q1”.
Thus, according to the oscillation circuit 1 of this embodiment, the output signal S with high output power can be output from the first slot line 2 while maintaining a high Q value. It is possible to achieve compatibility with low phase noise.

Next explained is the second embodiment of the invention.
FIG. 7 is a plan view showing an oscillation circuit according to the second embodiment of the present invention.
As shown in FIG. 7, this embodiment differs from the first embodiment in that a rectangular-mouth-shaped band reflection type resonator 6-1 is formed in the vicinity of the first slot line 2.
Specifically, the band facility reflection type resonator 6-1 is formed by extracting the first electrode 101 into a rectangular mouth shape.
The longitudinal b of the rectangular mouth-shaped band reflection type resonator 6-1 is set to λg / 2.
The band reflection type resonator 6-1 is formed with a slight gap T in the vicinity of the first slot line 2. The band reflection type resonator 6-1 is also formed at the point 2c of the first slot line 2 in the same manner as the band reflection type resonator 6 of the first embodiment.
Also in this embodiment, PDTL is adopted, and the band reflection type resonator 6-1 is formed so as to oppose both surfaces 100a and 100b (see FIG. 1) of the substrate 100.

With this configuration, when the oscillation circuit operates, the band reflection type resonator 6-1 resonates, and an electric field E is generated in the width direction of the band reflection type resonator 6-1, and a magnetic field is generated around the electric field E. As a result, the band reflection type resonator 6-1 and the first slot line 2 are electromagnetically coupled with a gap T therebetween. Therefore, the band reflection type resonator 6-1 and the first slot line 2 are in a loosely coupled state, and the output signal S in the first slot line 2 has a higher Q value than in the case of the first embodiment. It will be. As a result, it is possible to further reduce the phase noise.
Since other configurations, operations, and effects are the same as those in the first embodiment, description thereof is omitted.

Next explained is the third embodiment of the invention.
FIG. 8 is a plan view showing an oscillation circuit according to the third embodiment of the present invention.
As shown in FIG. 8, this embodiment differs from the second embodiment in that a circular mouth-shaped band reflection type resonator 6-2 is formed in the vicinity of the first slot line 2.
Specifically, the first electrode 101 is extracted in a circular mouth shape to form a band reflection type resonator 6-2. At this time, the diameter of the band reflection type resonator 6-2 is set to the wavelength λg of the output signal S within the above band, and this band reflection type resonator 6-2 is placed in the vicinity of the first slot line 2 with a slight gap. Formed with T. This band reflection type resonator 6-2 is also formed at the position of the point 2c of the first slot line 2 like the band reflection type resonator 6-1 of the second embodiment. Also in this embodiment, PDTL is adopted, and the band reflection type resonator 6-2 is formed so as to oppose both surfaces 100a and 100b (see FIG. 1) of the substrate 100.

With this configuration, the electromagnetic wave in the band reflection type resonator 6-2 coupled with the TE010 mode output signal S during the operation of the oscillation circuit is caused by the annular electric field E and the donut-shaped magnetic field surrounding the electric field E. The band reflection type resonator 6-2 resonates in the TE010 mode resonance mode. Due to such resonance, the output signal S in the first slot line 2 has a higher Q value than in the second embodiment. As a result, the phase noise can be further reduced.
Other configurations, operations, and effects are the same as those of the second embodiment, and thus description thereof is omitted.

Next explained is the fourth embodiment of the invention.
FIG. 9 is a plan view showing the front surface side of the oscillation circuit according to the fourth embodiment of the present invention, and FIG. 10 is a plan view showing the back surface side of the oscillation circuit.
As shown in FIG. 9, in this embodiment, the shapes of the short stub 30 of the second slot line 3 and the short stub 40 of the third slot line 4 are different from the short stubs 30 and 40 of the third embodiment.
Specifically, one end 2a of the bent first slot line 2 is formed wide so as to obtain impedance matching. Further, the DC cut line 31 of the second slot line 3 and the CD cut line 41 of the third slot line 4 are formed to be wide to prevent signal leakage to the DC cut lines 31 and 41. .
In the third embodiment, the bent portions of the short stubs 30 and 40 having a length of λg are formed in a straight shape. However, it may be difficult to accurately set the length of the short stubs 30 and 40 to λg due to manufacturing errors. In consideration of such a case, in this embodiment, the bent portions 30b and 40b of the short stubs 30 and 40 are formed in a sector shape having a radius of λg. Thereby, even when a manufacturing error occurs, the signal having the wavelength λg can be reliably resonated by the bent portions 30b and 40b.
In addition, although the oscillation circuit of this embodiment also adopts PDTL, the DC cut line 31 of the second slot line 3 and the DC cut line 41 of the third slot line 4 are not necessary on the back surface 100b of the substrate 100. Therefore, as shown in FIG. 10, the DC cut lines 31 and 41 are not provided in the back surface pattern.
Since other configurations, operations, and effects are the same as those of the third embodiment, description thereof is omitted.

Next explained is the fifth embodiment of the invention.
FIG. 11 is a plan view showing the front surface side of the oscillation circuit according to the fifth embodiment of the present invention, and FIG. 12 is a plan view showing the back surface side of the oscillation circuit.
This embodiment is different from the fourth embodiment in that the FET 5 is mounted so that the first slot line 2 is sandwiched between the drain electrode D and the source electrode S as shown in FIG.

Specifically, as in the fourth embodiment, the second slot line 3 that separates the electrode on the substrate 100 into the first electrode 101 and the second electrode 102 is formed into a fan-shaped bent portion 30b having a radius λg / 4. A short stub 30 having a length of λg / 2 to 3λg / 4 and a wide DC (direct current) cut line 31.
On the other hand, the third slot line 4 'does not have a DC cut line 41, unlike the third slot line 4 of the fourth embodiment. That is, the third slot line 4 ′ is composed of a straight short stub having a length λg / 4 to λg / 2 that branches horizontally from the other end 2 b of the first slot line 2.
Further, the fourth slot line 7 was formed in the vicinity of the one end 2a of the first slot line 2 to separate the first electrode 101. Then, a short stub 70 of λg / 4 was formed at a position of λg / 4 from the branch point of the fourth slot line 7.

  Further, the drain electrode D of the FET 5 is connected to the first electrode 101, and the gate electrode G and the source electrode S are connected to the second electrode 102 so as to straddle the third slot line 4 ′. Thereby, the drain electrode D and the gate electrode G of the FET 5 sandwich the second slot line 3, the gate electrode G and the source electrode S sandwich the third slot line 4, and the source electrode S and the drain electrode D are the first. The slot line 2 is sandwiched.

  With this configuration, the output signal S within the band is output from the first slot line 2 located on the drain electrode D side of the FET 5, so that a standing wave with a larger amplitude can be formed in the first slot line 2. As a result, the power of the output signal S can be further increased.

Further, although the PDTL is employed in the oscillation circuit of this embodiment, as shown in FIG. 12, the DC cut lines 31 and 41 are not provided in the back surface pattern as in the fourth embodiment.
Other configurations, operations, and effects are the same as those in the fourth embodiment, and thus description thereof is omitted.

Next explained is the sixth embodiment of the invention.
FIG. 13 is a plan view showing the front surface side of the oscillation circuit according to the sixth embodiment of the present invention, and FIG. 14 is a plan view showing the back surface side of the oscillation circuit.
This embodiment differs from the fifth embodiment in that the FET 5 is mounted so that the first slot line 2 is sandwiched between the drain electrode D and the gate electrode G.

  Specifically, the third slot line 4 ″ is not horizontally branched, unlike the third slot line 4 ′ of the fifth embodiment. That is, the third slot line 4 ″ is configured by a straight short stub having a length of λg / 4 to λg / 2 that branches right below (the lower side of FIG. 13) from the other end 2b of the first slot line 2. did.

The drain electrode D of the FET 5 is connected to the first electrode 101, and the source electrode S and the gate electrode G are connected to the second electrode 102 so as to straddle the third slot line 4 ″. Thereby, the drain electrode D and the source electrode S of the FET 5 sandwich the second slot line 3, the source electrode S and the gate electrode G sandwich the third slot line 4 ″, and the gate electrode G and the drain electrode D are The first slot line 2 is sandwiched.
Other configurations, operations, and effects are the same as those in the fifth embodiment, and thus description thereof is omitted.

Next, a seventh embodiment of the present invention will be described.
FIG. 15 is a block diagram showing a communication apparatus according to the seventh embodiment of the present invention.
As shown by a broken line in FIG. 15, the communication device of this embodiment includes a transmission unit 8, a reception unit 9, an antenna duplexer 10 (duplexer), an antenna 11, and the oscillation circuit of any of the first to sixth embodiments. 1 is provided.

The transmitter 8 includes a mixer 80, a band pass filter 81, and a power amplifier 82.
On the other hand, the receiving unit 9 includes a low noise amplifier 90, a band pass filter 91, and a mixer 92.
The antenna duplexer 10 is provided between the output side of the transmission unit 8 and the input side of the reception unit 9, and an antenna 11 is connected to the antenna duplexer 10.
The oscillation circuit 1 is the dielectric resonance oscillation circuit (DRO) of the first to sixth embodiments. The oscillation circuit 1 is connected to the mixers 80 and 92, and outputs a signal in a band serving as a carrier wave to the mixers 80 and 92.

  Thereby, the intermediate frequency signal (IF signal) is input to the mixer 80 at the time of transmission. At this time, the mixer 80 multiplies the intermediate frequency signal and the carrier wave from the oscillation circuit 1 to up-convert the intermediate frequency signal into, for example, a millimeter-wave band signal. Then, after the unnecessary signal is removed from the signal output from the mixer 80 by the band-pass filter 81, the signal is amplified to the transmission power by the power amplifier 82 and output from the transmission unit 8 to the antenna duplexer 10. Then, this signal is transmitted from the antenna 11 via the antenna duplexer 10.

  At the time of reception, a millimeter-wave band signal received by the antenna 11 is input to the low noise amplifier 90 via the antenna duplexer 10. Then, the received signal is amplified by the low noise amplifier 90, and unnecessary signals are removed by the band pass filter 91, and then input to the mixer 92. At this time, the mixer 92 multiplies the millimeter waveband signal and the carrier wave from the oscillation circuit 1 to downconvert the millimeter waveband signal into an intermediate frequency signal. Then, the down-converted intermediate frequency signal is output from the receiving unit 9.

Thus, by providing the oscillation circuit 1 with high output and low phase noise, it is possible to provide a communication device having high quality and excellent BER (bit error rate) characteristics.
Other configurations, operations, and effects are the same as those in the first to sixth embodiments, and thus description thereof is omitted.

In addition, this invention is not limited to the said Example, A various deformation | transformation and change are possible within the range of the summary of invention.
For example, in the fifth embodiment, an example corresponding to the fourth embodiment is shown, but modifications corresponding to the first to third embodiments are also included in the scope of the present invention. That is, instead of the circular mouth-shaped band reflection type resonator 6-2, a short stub having a length of λg / 4 shown in the first embodiment is branched from the first slot line 2, so that the band reflection type resonator is used. The oscillation circuit in which the FET 5 is mounted so that the first slot line 2 is sandwiched between the drain electrode D and the source electrode S is also included in the scope of the present invention. Further, instead of the band reflection type resonator 6-2, the rectangular mouth-shaped band reflection type resonator 6-1 shown in the second embodiment is used, and the first slot line 2 is formed by the drain electrode D and the source electrode S. An oscillation circuit in which the FET 5 is mounted so as to sandwich the pin is also included within the scope of the present invention.

  Similarly, in the sixth embodiment, instead of the circular mouth-shaped band reflection type resonator 6-2, the short stub having the length of λg / 4 shown in the first and second embodiments is used. An oscillation circuit in which the rectangular slot-shaped band reflection type resonator 6-1 is used as the band reflection type resonator and the FET 5 is mounted so that the first slot line 2 is sandwiched between the drain electrode D and the gate electrode G is also the present invention. Included in the scope of the gist.

1 is an exploded perspective view showing an oscillation circuit according to a first embodiment of the present invention. It is a top view of an oscillation circuit except for FET. It is arrow AA sectional drawing of FIG. 2 shown in the state which mounted FET. It is the elements on larger scale for demonstrating the function of FET. It is an equivalent circuit diagram of an oscillation circuit. It is a correlation diagram of Q value and loop gain. It is a top view which shows the oscillation circuit which concerns on 2nd Example of this invention. It is a top view which shows the oscillation circuit which concerns on 3rd Example of this invention. It is a top view which shows the surface side of the oscillation circuit which concerns on 4th Example of this invention. It is a top view which shows the back surface side of an oscillation circuit. It is a top view which shows the surface side of the oscillation circuit which concerns on 5th Example of this invention. It is a top view which shows the back surface side of an oscillation circuit. It is a top view which shows the surface side of the oscillation circuit which concerns on 6th Example of this invention. It is a top view which shows the back surface side of an oscillation circuit. It is a block diagram which shows the communication apparatus which concerns on 7th Example of this invention. It is a top view which shows the oscillation circuit which concerns on a prior art example.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 1 ... Oscillator circuit 2 ... 1st slot line, 2a ... One end part, 2b ... Other end part, 2c ... Branch position, 3 ... 2nd slot line, 3a, 4a ... End part, 4 ... 3rd slot line, 5 ... FET, 6,6-1,6-2 ... band reflection type resonator, 7 ... fourth slot line, 30,40,70 ... short stub, 30a, 40a ... tip, 30b, 40b ... bending portion, 31 41 ... DC cut line, 50 ... bump, 100 ... substrate, 100a ... front surface, 100b ... back surface, 101 ... first electrode, 102 ... second electrode, 102 '... new second electrode, 103 ... third electrode, D ... drain electrode, G ... gate electrode, S ... source electrode, S ... output signal, S1 ... incident signal, S2 ... reflection signal.

Claims (10)

A first slot line as an output port whose one end is open at the edge of the substrate;
A semiconductor element mounted on the other end of the first slot line and functioning as a negative resistance;
An oscillation circuit comprising: a band reflection type resonator disposed at a position of the first slot line in which a phase of a reflection gain characteristic by the semiconductor element is 0 °. The oscillation circuit according to claim 1,
A second slot line extending in a branched state from the other end of the first slot line, reaching the edge of the substrate, and separating the electrode on the substrate into a first electrode and a second electrode; and the first slot line A third slot line extending in a branched state from the other end of the
The semiconductor element is a field effect transistor, and the first and second electrodes are arranged such that the gate electrode, the drain electrode, and the source electrode straddle the first slot line, the second slot line, and the third slot line. Implemented above,
The band reflection type resonator is formed on the first electrode.
An oscillation circuit characterized by that. The oscillation circuit according to claim 2,
The substrate is a dielectric substrate.
An oscillation circuit characterized by that. In the oscillation circuit according to claim 2 or claim 3,
The second slot line is output from the first slot line, and a short stub having a length of 1/2 to 3/4 of the wavelength of the in-band output signal, and a quarter of the wavelength from the end of the short stub. And a DC cut line that branches off from the short stub and reaches the edge of the substrate,
The third slot line is output from the first slot line, and a short stub having a length that is ¼ to ½ of the wavelength of the output signal and a quarter of the wavelength from the end of the short stub. Formed with a DC cut line that branches from the short stub at the position and reaches the edge of the substrate, and separates the second electrode into a new second electrode and a third electrode;
The gate electrode, the drain electrode, and the source electrode of the semiconductor element are connected to the first electrode, the new second electrode, and the third electrode, respectively, with the second slot line and the third slot line sandwiched in order. ,
An oscillation circuit characterized by that. In the oscillation circuit according to claim 2 or claim 3,
The second slot line is output from the first slot line, and a short stub having a length of 1/2 to 3/4 of the wavelength of the in-band output signal, and a quarter of the wavelength from the end of the short stub. And a DC cut line that branches off from the short stub and reaches the edge of the substrate,
The third slot line is formed of a short stub having a length of ¼ to ½ of the wavelength of the output signal output from the first slot line,
The drain electrode, the gate electrode, and the source electrode of the semiconductor element are connected to the first electrode and the second electrode, respectively, with the second slot line and the third slot line sandwiched in order.
An oscillation circuit characterized by that. In the oscillation circuit according to claim 2 or claim 3,
The second slot line is output from the first slot line, and a short stub having a length of 1/2 to 3/4 of the wavelength of the in-band output signal, and a quarter of the wavelength from the end of the short stub. And a DC cut line that branches off from the short stub and reaches the edge of the substrate,
The third slot line is formed of a short stub having a length of ¼ to ½ of the wavelength of the output signal output from the first slot line,
The drain electrode, the source electrode, and the gate electrode of the semiconductor element are connected to the first electrode and the second electrode, respectively, with the second slot line and the third slot line sandwiched in order.
An oscillation circuit characterized by that. The oscillation circuit according to any one of claims 1 to 6,
The band reflection type resonator is a short stub that is branched from the first slot line and whose length is set to approximately one quarter of the wavelength.
An oscillation circuit characterized by that. The oscillation circuit according to any one of claims 1 to 6,
The band reflection type resonator is a rectangular mouth-shaped resonator formed in the vicinity of the first slot line.
An oscillation circuit characterized by that. The oscillation circuit according to any one of claims 1 to 6,
The band reflection type resonator is a circular mouth-shaped resonator that is formed in the vicinity of the first slot line and has a diameter of the wavelength.
An oscillation circuit characterized by that. The oscillation circuit according to claim 1 is provided.
A communication device.

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