JP2007129466A - Device and method for dc offset elimination - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a device and a method for DC offset elimination that suppresses the circuit scale up and power consumption, and an increase in processing quantity of an analog base band section having an A/D converter or D/A converter and further can perform temporal DC offset elimination. <P>SOLUTION: The DC offset eliminating device 100 performs amplitude square calculation for each section of a received signal within a fixed period and estimates variation time of a DC offset based upon an amplitude variation difference found from a difference between the amplitude of the received signal and a reference amplitude. Based upon the DC offset variation time, DC offset components before and after the DC offset time within the fixed period are estimated and compensation processing is performed for respective sections. For example, a DC offset variation time estimation section 104 estimates a section having the largest DC offset variation generated in a certain period (one burst) by using variation in sum of amplitude squares to calculate a DC offset value according to variation. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a DC offset removal apparatus and a DC offset removal method possessed by a receiver in wireless communication, and mainly relates to a DC offset removal apparatus and a DC offset removal used in a digital mobile communication receiver equipped with a direct conversion type wireless unit. Regarding the method.

  A feature of recent mobile communication terminals is the rapid miniaturization of terminals. The downsizing of terminals is mainly due to a reduction in battery capacity and volume due to a reduction in the number of internal parts due to technological innovation, miniaturization of parts, or reduction in power consumption. By the way, the reduction in the number of parts is not realized by reducing the processing itself, but in the received signal processing in mobile communication, the processing conventionally performed as analog signal processing is replaced by digital signal processing by a DSP (Digital Signal Processor). Is possible. For example, in RF-IC, a transition from a conventionally used superheterodyne system to a direct conversion system capable of miniaturizing components is progressing.

  The direct conversion method is a reception method that directly converts an RF signal having a carrier frequency of transmitted / received radio waves into a baseband signal. In the existing superheterodyne system, the IF (intermediate frequency) of the receiver and the narrowband filters necessary for the generation and oscillators required for the number of intermediate frequencies are not required, so the size can be reduced by greatly reducing the number of circuit components. It is a feature that makes it possible.

  On the other hand, the direct conversion method has a performance restriction due to DC offset. This DC offset occurs because a part of the local signal leaking from the mixer to the antenna side is self-mixed again with the local signal and down-converted to a frequency of 0 Hz. In addition, when a part of the local signal is emitted to the outside by the antenna and the reflected wave from the moving body is received again and self-mixed with the local signal, a time-varying DC offset occurs.

  Patent Document 1 discloses a DC offset removal method that is a problem in the direct conversion method in a mobile portable terminal or a receiver thereof.

  FIG. 12 is a diagram illustrating a configuration of a DC offset removal apparatus incorporated in the wireless receiver described in Patent Document 1. Mainly, degradation of reception performance due to a DC offset transient response component of the AGC output is The main purpose is to provide a radio that can be controlled within an allowable range.

  In FIG. 12, a radio receiver includes an antenna 10 for reception, an LNA (low noise amplifier) 11 that amplifies an RF signal, and an orthogonal demodulator that directly demodulates the amplified RF signal into a baseband signal using a local signal. 12, a low-pass filter 13, an AGC 14 that amplifies the baseband signal, a DC offset canceller 15 that feedback-controls the amplified baseband signal, a demodulator 16, and a gain controller 17 that controls at least the gain of the LNA 11. The gain control unit includes a signal strength detection unit 18 that detects the amplified baseband signal strength, and a gain that selects a desired gain from a plurality of preset LNA gains based on the signal strength. A selector 19; a timing controller 20 for controlling the timing of switching to the selected desired gain; Depending on the timing configured by a gain control signal generator 21 which varies the generation interval of the LNA for the gain control signal.

By using the receiver having the DC offset removing function, the DC offset generated in the analog processing circuit at the input of the A / D converter of the receiver can be reduced, so that the signal due to exceeding the input range of the A / D converter Distortion can be prevented. Furthermore, since AC coupling is not used, it has been shown that it is possible to perform good communication that is not affected by the transient response of the time variation of the DC offset.
JP 2003-198405 A

  As described above, it is difficult to correct the stepped DC offset generated in the direct conversion receiver unless the generation timing and step amount thereof can be accurately extracted. Further, there is a problem that a filter is necessary, and even if a large-scale FIR filter is used, it is difficult to accurately estimate the step generation timing.

  However, such a conventional DC offset removing apparatus has a problem that a circuit that feeds back a DC offset component detected and held in the digital unit is required in addition to the D / A converter. It was. For the same reason, there is a problem that it is necessary to construct (customize) a circuit in accordance with the configuration of the D / A converter.

  The present invention has been made in view of the above, and suppresses an increase in circuit scale, power consumption, and processing amount in an analog baseband unit having an A / D converter or a D / A converter, and is a time-varying DC. An object of the present invention is to provide a DC offset removing apparatus and a DC offset removing method capable of removing an offset.

  The DC offset removing apparatus according to the present invention includes a signal amplitude square calculation unit that calculates an amplitude square in a specified section with respect to a received signal, an amplitude variation difference from a result of the signal amplitude square calculation and a reference amplitude value of the received signal. Signal amplitude fluctuation difference calculating means for calculating, signal amplitude difference average calculating means for calculating a signal amplitude difference average by a section average or a moving average over a certain period with respect to the result of the amplitude fluctuation difference calculation, and the signal amplitude difference average calculation DC offset change time is estimated on the basis of the result of the above, and DC offset change time estimation means for storing the DC offset change time in the memory as a DC offset change time estimate, and on the basis of the DC offset change time estimate stored in the memory, A configuration including DC offset compensation means for performing DC offset compensation is adopted.

  The DC offset removal method of the present invention includes a step of calculating an amplitude square in a specified section for a received signal, a step of calculating an amplitude variation difference from a result of the signal amplitude square calculation and a reference amplitude value of the received signal, A step of calculating a signal amplitude difference average by a section average or a moving average in a certain period with respect to the result of the amplitude fluctuation difference calculation, and a step of estimating a DC offset change time based on the result of the signal amplitude difference average calculation; Performing DC offset compensation of the received signal based on the estimated DC offset change time.

  According to the present invention, it is possible to realize a compensation process for a time-varying DC offset of a received signal using only a digital circuit without customization of an A / D converter or a D / A converter. Further, since the processing to be used can use processing necessary for original received signal processing, an increase in circuit scale can be suppressed. Therefore, by using the existing processing, it is possible to suppress the increase in power consumption and processing amount, and to estimate and compensate for the DC offset fluctuation time for the DC offset component having temporal fluctuation.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

  FIG. 1 is a block diagram showing a configuration of a DC offset removing apparatus according to an embodiment of the present invention. The DC offset removal apparatus according to the present embodiment is an example applied to a DC offset removal apparatus mainly incorporated in a mobile mobile terminal.

  In FIG. 1, a DC offset removal apparatus 100 includes an amplitude square calculation unit 101, a signal amplitude variation difference calculation unit 102, a signal amplitude difference average calculation unit 103, a DC offset change time estimation unit 104, a DC offset value estimation unit 105, a subtraction circuit. 106 and a memory 107. Further, 201 is a received signal, 202 is a received signal reference amplitude value, 203 is an amplitude fluctuation calculated value, and 204 is a signal amplitude difference average calculated value. 205 is a differential calculation result, 206 is a DC offset fluctuation estimation time T, 207 is an average circuit control signal, 208 is a DC offset value, and 209 is a received signal after offset compensation.

  The signal amplitude square calculation unit 101 performs amplitude square calculation on the received signal 201 in a specified section.

  The signal amplitude fluctuation difference calculation unit 102 calculates the amplitude fluctuation difference from the result of the signal amplitude square calculation and the received signal reference amplitude value 202 which is the reference amplitude of the received signal 201, and outputs the amplitude fluctuation calculated value 203.

  The signal amplitude difference average calculation unit 103 performs signal amplitude difference average calculation by section average or moving average for a certain period on the result of amplitude fluctuation difference calculation, and outputs a signal amplitude difference average calculation value 204.

  The DC offset change time estimation unit 104 estimates the DC offset change time based on the result of the signal amplitude difference average calculation, and stores the estimated DC offset change estimated time T in the memory 107 as the DC offset change time estimated value 206.

  The DC offset value estimation unit 105 estimates the DC offset value 208 of the received signal based on the DC offset change time estimation value 206 obtained by the DC offset change time estimation unit 104.

  The subtraction circuit 106 subtracts the DC offset value 208 estimated by the DC offset value estimation unit 105 from the reception signal 201 to perform DC offset compensation of the reception signal, and stores the offset-compensated reception signal 209 in the memory 107. .

  Here, the DC offset value estimation unit 105 and the subtraction circuit 106 perform DC offset compensation for the received signal 201 based on the DC offset change time estimated value 206 (DC offset fluctuation estimated time T) stored in the memory 107. The compensation unit 108 is configured.

  The memory 107 stores a received signal 201, a received signal reference amplitude value 202, a DC offset change time estimated value 206, and a DC offset compensated received signal 209 that is a result of compensating the DC offset for the received signal 201, respectively.

  The DC offset change time estimation unit 104 includes an amplitude fluctuation difference calculation unit 111, a maximum value circuit 112, and a counter 113.

  The amplitude fluctuation difference calculation unit 111 obtains the difference between the signal amplitude difference average between the register 111a that stores the calculation result of the adjacent section with respect to the result of the signal amplitude difference average calculation unit 103 and the adjacent period stored in the register 111a. And a differential arithmetic circuit 111b.

  The maximum value circuit 112 obtains the maximum value within a certain period among the differences calculated by the differential operation circuit 111b. The counter 113 is a counter for measuring a section in the maximum value circuit 112 where the calculation result of the differential operation circuit 111b is maximum.

  The DC offset value estimation unit 105 includes a comparison circuit 121, a counter 122, and an averaging circuit 123. Based on the DC offset change time estimation result, the DC offset value estimation unit 105 performs DC of a section before the DC offset change time with respect to a received signal within a certain period. The offset and the DC offset of the section after the DC offset change time are respectively calculated.

  Hereinafter, the operation of the DC offset removing apparatus 100 configured as described above will be described.

  FIG. 2 is a diagram for explaining a sum of squared amplitudes of a received signal in a good reception state, and FIG. 3 is a diagram for explaining a constellation chart when the received signal is modulated by the GMSK modulation method.

  The received signal 201 is time-series numerical information of a received signal that is received by an antenna of a mobile portable terminal (not shown), amplified by an RF amplifier, and digitally converted by an A / D converter. That is, the received signal 201 is a signal before being demodulated by the equalizer, and is defined from an I signal (InPhase: In-phase signal) and a Q signal (Quadrature: Quadrature signal).

  First, the received signal 201 stored in the memory 107 in units of a fixed period such as one burst is read from the memory 107, and the square sum of the levels of the I signal and the Q signal is obtained in the amplitude square calculation unit 101. When the reception environment is good and the automatic gain control of the reception signal is sufficiently effective, the square sum of the I signal and the Q signal becomes a constant level with respect to time as shown in FIG. As an example, when the modulation method of the received signal is GMSK modulation and the reception state is good, the symbol distribution in the constellation chart of the I signal and the Q signal is as shown in FIG.

  When time-varying DC offsets are added to the I and Q signals, the levels of the I and Q signals are as shown in FIG.

  FIG. 4 is a diagram illustrating a time-varying DC offset, and FIG. 5 is a diagram illustrating a constellation chart including a time-varying DC offset.

  In FIG. 4, T is the DC offset change time when the horizontal axis is time t, ΔI is the DC offset change level of the I signal, and ΔQ is the DC offset change level of the Q signal. When looking at the Q signal, the symbol distribution in the constellation chart when a time-varying DC offset is given at time T is as shown in FIG.

  In the case where a time-varying DC offset as shown in FIG. 4 and FIG. 5 is given within a certain period such as one burst, the square sum by the I signal and the Q signal changes at time T. The case will be described with reference to FIG.

  FIG. 6 is a diagram for explaining the distance from the origin of a symbol composed of an I signal and a Q signal when there is a time-varying DC offset. FIG. 7 is a diagram for explaining the variation of the sum of squared amplitudes, and FIG. 8 is a diagram for explaining the reference value of the sum of squared amplitudes.

  As shown in FIG. 6A, in a symbol to which no DC offset is given, the symbol points made up of the I signal and the Q signal exist on the circumference having the same distance from the origin. Therefore, the sum of squares based on the I and Q signals is constant. On the other hand, FIG. 6B shows a case where there is a time change of the DC offset at a certain time T. In this case, the symbol point consisting of the I signal and the Q signal is on the circumference of the same distance from the origin. Therefore, the sum of squares based on the I and Q signals has a temporal variation as shown in FIG. In the chart of FIG. 7, the square of the distance from the origin on the vertical axis is the sum of squares based on the I signal and the Q signal.

  That is, in the present embodiment, as described above, a time with a large amount of time-varying change in the DC offset is specified using the fluctuation of the sum of squared amplitudes composed of the I signal and the Q signal, and used for DC offset compensation. Here, a symbol indicated by a thick broken line arrow in FIG. 8 is defined as a received signal reference amplitude value that is a square sum of amplitude levels under favorable reception conditions. In the following, (1) to (3), a method of estimating the DC offset fluctuation time using the sum of squared amplitudes of the I and Q signals of the received signal and the received signal reference amplitude value will be described.

  (1) First, the fluctuation of the sum of squared amplitudes for each symbol is calculated. Here, the difference between the amplitude sum of squares of the I signal and the Q signal described above and the received signal reference amplitude value for each symbol is defined as a fluctuation amount of the sum of amplitude squares.

  FIG. 9 is a diagram for explaining the difference between the sum of squared amplitudes and the received signal reference amplitude value.

  As shown in FIG. 9, in a period composed of symbols having the same distance from the origin, the difference between the sum of squared amplitudes and the received signal amplitude value is a minimum value close to 0 when the reception condition is good. When a DC offset is given after a certain time T, the difference between the sum of squared amplitudes and the received signal amplitude value varies for each symbol. The vertical axis of the chart in FIG. 9 indicates the absolute value of the difference between the sum of squared amplitudes and the received signal reference amplitude value. At this time, the received signal reference amplitude value is obtained by reading a value stored in advance in the memory 107 in FIG. 1, and the amplitude square sum is a result of the amplitude square calculation unit 101. The signal amplitude fluctuation difference calculation unit 102 calculates the amplitude fluctuation difference from the result of the signal amplitude square calculation and the received signal reference amplitude value 201 and outputs the amplitude fluctuation calculation value 203.

  (2) In order to reduce the influence of noise and intersymbol interference included in the received signal 201 on the difference between the sum of squared amplitudes obtained by the signal amplitude fluctuation difference calculation unit 102 and the received signal reference amplitude value 202, the amplitude fluctuation In the case of a system using a certain modulation method, a section average or moving average is taken in a certain section in order to reduce the influence of amplitude fluctuation. This section average or moving average is performed by the signal amplitude difference average calculation unit 103 using the amplitude fluctuation calculation value 203 obtained by taking the difference between the sum of squared amplitudes and the received signal reference amplitude value 202. FIG. 10 is a diagram for explaining an average calculation of the difference between the amplitude square sum and the received signal reference amplitude value. FIG. 10 is a chart showing an example of the section average of the amplitude fluctuation calculation value 203. Similarly to FIG. 9, the section average is 0 in a period in which no DC offset exists, and a DC offset is given after a certain time T. If it is, the average result for each section will vary.

  (3) The average result of the square of amplitude for each section obtained as described above is input to the DC offset change time estimation unit 104 as the signal amplitude difference average calculation value 204. The DC offset change time estimator 104 calculates the difference between the differential operation circuit 111b that performs a differential operation in the preceding and succeeding sections and the differential operation circuit 111b with respect to the signal amplitude difference average calculated value 204 obtained for each section. A maximum value circuit 112 for obtaining a maximum value within a certain period for the dynamic calculation result 205 and a counter 113 for counting the certain period are provided. Here, for the purpose of estimating a section having a large variation in the square of amplitude as a section having a DC offset fluctuation, first, a differential calculation is performed in the preceding and following sections with respect to the signal amplitude difference average calculation value 204 obtained for each section. To obtain the difference in the square of the amplitude between the sections. For example, as shown in FIG. 1, a register 111a for holding the signal amplitude difference average calculation value of the previous section is provided, and the difference between the signal amplitude difference average calculation values of the next section and the previous section held by the register 111a is calculated. Obtained by the differential arithmetic circuit 111b. An example of the differential operation is shown in FIG.

  FIG. 11 is a diagram for explaining the differential calculation for estimating the DC offset fluctuation time.

  As shown in FIG. 10, when the average value of the sum of squared amplitudes is observed after a certain time T, when the differential calculation is performed in the preceding and following sections, the largest value is obtained in the section near the time T as the differential calculation result. Shown (see FIG. 11). This value is extracted by the maximum value circuit 112. The extracted value specifies the maximum interval by the counter 113, and the time T with the largest DC offset fluctuation is obtained from this interval. The obtained DC offset fluctuation estimated time T206 is temporarily stored in the memory 107 for DC offset compensation.

  Next, a method for compensating for the DC offset component from the received signal 201 based on the obtained DC offset fluctuation estimated time T206 will be described in the following (4) to (5).

  (4) The DC offset fluctuation estimation time T206 temporarily stored in the memory 107 is input to the DC offset value estimation unit 105. As described above, the DC offset value estimation unit 105 calculates the DC offset of the section before the DC offset change time and the DC offset of the section after the DC offset change time, respectively, with respect to the received signal within a certain period. A counter 122, an averaging circuit 123, and a subtraction circuit 106 that compensates the calculated DC offset value 208 for the received signal 201 are provided. In the configuration shown in FIG. 1, a certain period (one burst) is divided into two periods (a) t> T: a period where a DC offset is not given (the DC offset level is low), and (b) t ≧ T : Here, the DC offset component can be estimated for each period divided into periods in which the DC offset is relatively large. That is, in the case of the period (a) t> T, the averaging circuit 123 is controlled using the average circuit control signal 207 so as to take the average value of the I signal / Q signal of the symbol component of t> T, and (b ) When t ≧ T, the averaging circuit 123 is controlled using the average circuit control signal 207 so as to take the average value of the I signal and Q signal of the symbol component of t ≧ T. Here, the counter 122 and the comparison circuit 121 are used to hold the average circuit control signal 207 based on the DC offset fluctuation estimated time T206. Therefore, the obtained DC offset value 208 is an average value of each of the periods of (a) t> T and (b) t ≧ T, but each of (a) t> T and (b) t ≧ T. In order to compensate for the symbol of the period, it is held for each period. For example, the DC offset component DCoff (k) for each symbol in a certain period (1 burst) is (a) when t> T, DCoff (k) ≈ (average value of I signal / Q signal of t> T), (B) When t ≧ T, DCoff (k) ≈ (average value of I signal and Q signal when t ≧ T).

  (5) With respect to the DC offset value 208 obtained by the DC offset value estimation unit 105, the subtraction circuit 106 takes the difference from the received signal 201 for each symbol, and uses the obtained component as the received signal 209 after DC offset compensation to store the memory again. It stores in 107.

  As described above in detail, according to the present embodiment, first, amplitude square calculation is performed for each section of a received signal for a certain period, and the DC offset is calculated based on the difference in amplitude fluctuation obtained from the difference from the reference amplitude. Estimate the fluctuation time. Based on the DC offset fluctuation time, a DC offset component before and after the DC offset time within a certain period is estimated, and compensation processing is performed for each section. For example, the DC offset fluctuation time is estimated by the DC offset fluctuation time estimating unit 104 using the fluctuation of the sum of squared amplitudes to estimate the DC offset value that fluctuates in a certain period (one burst). Therefore, it is possible to realize an incidental DC offset compensation process for a received signal using only a digital circuit without customization of a conventional A / D converter or D / A converter. it can.

  The above description is an illustration of a preferred embodiment of the present invention, and the scope of the present invention is not limited to this.

  In the present embodiment, the names of the DC offset removing apparatus and the DC offset removing method are used. However, this is for convenience of explanation, and it is a DC offset correcting circuit, a DC offset correcting method, a radio receiver, and the like. Of course, it is also good.

  Furthermore, each circuit unit constituting the DC offset removing apparatus, for example, the maximum value circuit, the number of averaging circuits and the connection method, and the configuration of the amplitude variation difference calculating unit are not limited to the above-described embodiment.

  The DC offset removing apparatus and the DC offset removing method according to the present invention is a mobile portable terminal that does not involve customization of a conventional A / D converter or D / A converter, and uses only a digital circuit for a received signal. A compensation process can be provided for incidental DC offset. Furthermore, since the processing to be used can use processing necessary for original received signal processing, an increase in circuit scale can be relatively suppressed. Therefore, it is useful for the correction process for the entire DC offset. For example, the present invention is useful for a digital mobile communication receiver equipped with a direct conversion wireless unit.

The block diagram which shows the structure of the DC offset removal apparatus which concerns on embodiment of this invention. The figure explaining the amplitude square sum of the received signal in the favorable receiving state of the DC offset removing apparatus according to the present embodiment The figure explaining the constellation chart in case the received signal of the DC offset removal apparatus which concerns on this Embodiment is modulated by the GMSK modulation system The figure explaining time-varying DC offset of the DC offset removal apparatus which concerns on this Embodiment The figure explaining the constellation chart containing time-varying DC offset of the DC offset removal apparatus which concerns on this Embodiment. The figure explaining the distance from the origin of the symbol which consists of I signal and Q signal in case there exists time-varying DC offset of the DC offset removal apparatus which concerns on this Embodiment. The figure explaining the fluctuation | variation of the amplitude square sum of the DC offset removal apparatus which concerns on this Embodiment. The figure explaining the reference value of an amplitude square sum of the DC offset removal apparatus which concerns on this Embodiment The figure explaining the difference of the square sum of amplitudes of the DC offset removal apparatus which concerns on this Embodiment, and a received signal reference | standard amplitude value The figure explaining the average calculation of the difference of the amplitude square sum of the DC offset removal apparatus which concerns on this Embodiment, and a received signal reference | standard amplitude value The figure explaining the differential calculation for DC offset fluctuation | variation time estimation of the DC offset removal apparatus which concerns on this Embodiment The figure which shows the structure of the DC offset removal apparatus incorporated in the conventional radio | wireless receiver.

Explanation of symbols

DESCRIPTION OF SYMBOLS 100 DC offset removal apparatus 101 Amplitude square calculation part 102 Signal amplitude fluctuation difference calculation part 103 Signal amplitude difference average calculation part 104 DC offset change time estimation part 105 DC offset value estimation part 106 Subtraction circuit 107 Memory 108 DC offset compensation part 111 Amplitude fluctuation Difference calculation unit 111a Register 111b Differential operation circuit 112 Maximum value circuit 113 Counter 121 Comparison circuit 122 Counter 123 Averaging circuit

Claims (5)

A signal amplitude square calculation means for calculating an amplitude square in a specified section for a received signal;
A signal amplitude fluctuation difference calculating means for calculating an amplitude fluctuation difference from a result of the signal amplitude square calculation and a reference amplitude value of the received signal;
A signal amplitude difference average calculating means for calculating a signal amplitude difference average by a section average or a moving average in a certain period with respect to the result of the amplitude fluctuation difference calculation;
DC offset change time estimation means for estimating a DC offset change time based on the result of the signal amplitude difference average calculation and storing it in a memory as a DC offset change time estimated value;
DC offset compensation means, comprising: DC offset compensation means for performing DC offset compensation of the received signal based on a DC offset change time estimated value stored in the memory.   2. The memory stores the received signal, the estimated DC offset change time value, the received signal reference amplitude value, or a received signal after DC offset compensation obtained by the DC offset compensating means. DC offset remover. The DC offset change time estimation means includes a register for storing calculation results of sections adjacent to the result of the signal amplitude difference average calculation means,
A differential arithmetic circuit for obtaining a difference in signal amplitude difference average between adjacent periods stored in the register;
A maximum value circuit for obtaining a maximum value within a certain period of the difference calculated by the differential arithmetic circuit;
The DC offset removing apparatus according to claim 1, further comprising: a counter for measuring a section in which the calculation result of the differential operation circuit is maximum in the maximum value circuit. The DC offset compensation means calculates a DC offset in a section before the DC offset change time and a DC offset in a section after the DC offset change time for a received signal within a certain period based on the DC offset change time estimation result. DC offset value estimation means;
Compensation means for subtracting the calculated DC offset of the section before the DC offset and the DC offset of the section after the DC offset from the received signal to perform DC offset compensation of the received signal. The DC offset removing apparatus according to 1. Calculating a square of amplitude in a specified interval for the received signal;
Calculating an amplitude variation difference from a result of the signal amplitude square calculation and a reference amplitude value of the received signal;
For the result of the amplitude fluctuation difference calculation, calculating a signal amplitude difference average by a section average or moving average in a certain period;
Estimating a DC offset change time based on a result of the signal amplitude difference average calculation;
And performing DC offset compensation on the received signal based on the estimated DC offset change time value.

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