JP2007127452A - Semiconductor integrated circuit, its testing device and its test method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a semiconductor integrated circuit testable more efficiently at low cost without using a measuring device or a tester loaded with an expensive signal analysis function which is necessary hitherto, and also to provide its testing device and its test method. <P>SOLUTION: This circuit includes a terminal capable of inputting a base band digital signal to which a noise is added from the outside into DA converters 14, 15, for testing the DA converters 14, 15 and AD converters 16, 17 by using the base band digital signal and a signal processing part 12. Hereby, since the semiconductor integrated circuit 10 is operated normally even when the base band digital signal includes a noise in the case of a nondefective article, and the semiconductor integrated circuit 10 is not operated normally when the base band digital signal includes a noise in the case of a defective article, the semiconductor integrated circuit 10 can be tested more efficiently at low cost without using the measuring device or the tester loaded with the expensive signal analysis function which is necessary hitherto. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a semiconductor integrated circuit, a test apparatus therefor, and a test method therefor.

In a test of a semiconductor system (integrated circuit), a signal called a tester is used to input a signal having a specific pattern, and an expected value is collated with respect to the input signal to determine pass / fail.
Conventional methods for generating such patterns include scanning, ATPG (Automatic Test Pattern Generator: an EDA “Electric Design Automation” tool that automatically generates test patterns for use in logic LSI testers), and BIST (built in self-test). There is a tool that supports the incorporation of a BIST circuit into an LSI (Large Scale Integration) as one of design techniques. A technique for more efficiently introducing these methods (tools) has been developed (see, for example, Patent Document 1).

These techniques relate to testing the digital part of a semiconductor system. At present, semiconductor systems represented by wireless LAN (Local Area Network) chips are equipped with not only the digital part but also the analog part, especially AD (Analog Digital) and DA (Digital Analog) converters that require high precision. There are many more.
In such a semiconductor system in which a digital circuit unit and an analog circuit unit are mixed, the digital circuit unit and the analog circuit unit are often separately tested separately.

  On the other hand, in a method using a high-precision measuring instrument, a method for efficiently testing has been developed (for example, see Patent Document 2).

FIG. 5 is a conceptual diagram showing an example of a test environment of an analog part of a conventional semiconductor integrated circuit.
In the figure, reference numeral 50 denotes a semiconductor system (semiconductor integrated circuit) on which high-precision AD converters (ADC) 52 and 53 and DA converters (DAC) 55 and 56 to be tested are mounted, and includes an interface HOST I / F 51 and signal processing. A circuit 52 and a CPU (Central Processing Unit) 57 are included.
Reference numeral 58 denotes an analog dedicated measuring device that can perform analog characteristic evaluation, and 59 denotes an analog tester having a function (FFT function) 60 that can perform signal analysis such as an FFT analyzer.
Conventionally, in this way, the analog dedicated measuring device 58 or the analog tester 59 is used, and the DA converters 53 and 54 and the AD converters 55 and 56 are separately evaluated, and pass / fail judgment is performed.
JP 2004-117258 A JP 2001-174526 A

By the way, generally, there are two types of tests for a mixed digital and analog semiconductor system: a simple test method called a loopback test and a method using a high-precision measuring instrument.
In a simple loopback test, it is difficult to determine the quality of a highly accurate AD converter or DA converter. In addition, high-precision AD converters and DA converters require high-accuracy and expensive testers or measuring instruments equipped with a signal analysis function.

  Accordingly, an object of the present invention is to provide a semiconductor integrated circuit capable of testing a semiconductor integrated circuit more efficiently at a low cost without using a measuring instrument or a tester equipped with an expensive signal analysis function that has been necessary in the past. It is to provide a test apparatus and a test method thereof.

  In order to solve the above-mentioned problems, a first aspect of the present invention provides a DA converter that converts a digital transmission signal into an analog signal, an AD converter that converts an analog reception signal into a digital signal, modulation of the digital transmission signal, and the analog A semiconductor integrated circuit having a signal processing unit for demodulating a received signal, wherein a digital signal added with noise is input to the DA converter from the outside, and an output signal of the DA converter is input to the signal via the AD converter A terminal group for performing a test of at least the DA converter and the AD converter by inputting to the processing unit is provided.

  According to the first aspect of the present invention, a digital signal with noise added to the DA converter can be input from the outside, and a terminal group for testing at least the DA converter and the AD converter using the digital signal and the signal processing unit is provided. As a result, when the semiconductor integrated circuit is a non-defective product, the digital signal operates normally even if it contains noise, and when the semiconductor integrated circuit is defective, the digital signal contains noise. Because it does not operate normally, semiconductor integrated circuits, especially DA converters, AD converters, and signals can be used more efficiently at low cost without using measuring instruments or testers equipped with expensive signal analysis functions that were required in the past. The processing unit can be tested.

  The invention according to claim 2 is a DA converter that converts a digital transmission signal into an analog signal, an AD converter that converts an analog reception signal into a digital signal, and a signal that modulates the digital transmission signal and demodulates the analog reception signal A semiconductor integrated circuit having a processing unit, wherein a digital signal input terminal for inputting a digital signal to which noise has been added to the DA converter, and an output signal of the DA converter are input to the AD converter A connection terminal for testing at least the DA converter and the AD converter, a setting terminal for inputting a signal for setting a test mode from the outside, and an output terminal for outputting a test result It is characterized by that.

  According to the second aspect of the present invention, at least a DA converter and a digital signal input terminal for inputting a digital signal added with noise to the DA converter from the outside, and an output signal of the DA converter are input to the AD converter. A semiconductor integrated circuit having a connection terminal for testing an AD converter, a setting terminal for inputting a signal for setting a test mode from the outside, and an output terminal for outputting a test result If the signal is good, the digital signal will operate normally even if it contains noise. If the semiconductor integrated circuit is defective, if the digital signal contains noise, it will not operate normally. More efficient at low cost without the need for expensive instrumentation or testers with expensive signal analysis capabilities Conductor integrated circuits, especially DA converter, AD converter, allows a test of the signal processing unit.

  According to a third aspect of the present invention, in the second aspect of the present invention, a serial / parallel conversion circuit is provided between the digital signal input terminal and the DA converter, and the digital signal to the DA converter is externally transmitted as serial data. The feature is that it can be input.

  According to the third aspect of the present invention, a serial-parallel conversion circuit is provided between the digital signal input terminal and the DA converter so that the digital signal to the DA converter can be input as serial data from the outside. An expensive signal analysis device required outside is not required, and at the same time, the number of pins (number of terminals) used in the test can be reduced.

  The invention according to claim 4 is a DA converter that converts a digital transmission signal into an analog signal, an AD converter that converts an analog reception signal into a digital signal, and a signal that modulates the digital transmission signal and demodulates the analog reception signal A CPU capable of inputting a digital signal added with noise to the DA converter, and inputting at least the DA converter and the AD by inputting an output signal of the DA converter to the AD converter. And a terminal group for testing the converter.

  According to the fourth aspect of the present invention, a CPU capable of inputting a digital signal added with noise to the DA converter, and a test for at least the DA converter and the AD converter by inputting the output signal of the DA converter to the AD converter. When the semiconductor integrated circuit is a non-defective product, the digital signal operates normally even if it contains noise. When the semiconductor integrated circuit is defective, the digital signal is Will not work properly, so there is no need for a measuring instrument or tester equipped with an expensive signal analysis function that was necessary in the past, and at the same time, you can change the type of noise and test it at a lower cost. A semiconductor integrated circuit, particularly a DA converter, an AD converter, and a signal processing unit can be efficiently tested.

  The invention according to claim 5 is a DA converter that converts a digital transmission signal into an analog signal, an AD converter that converts an analog reception signal into a digital signal, and a signal that modulates the digital transmission signal and demodulates the analog reception signal A CPU capable of inputting a digital signal added with noise to the DA converter, and inputting at least the DA converter and the AD by inputting an output signal of the DA converter to the AD converter. It is characterized by comprising a connection terminal for testing the converter, a setting terminal for inputting a signal for setting a test mode from the outside, and an output terminal for outputting a test result.

  According to the fifth aspect of the present invention, at least a DA converter and an AD converter are tested by inputting a digital signal added with noise to the DA converter and an output signal of the DA converter to the AD converter. When the semiconductor integrated circuit is a non-defective product by providing a connection terminal, a setting terminal for inputting a signal for setting a test mode from the outside, and an output terminal for outputting a test result The digital signal operates normally even if it contains noise, and if the semiconductor integrated circuit is defective, the digital signal does not operate properly if it contains noise. It is possible to test by changing the type of noise at the same time as a measuring instrument or tester equipped with an analysis function is not required. Under stringent, more efficiently semiconductor integrated circuit, particularly DA converter, AD converter, and perform the test of the signal processing unit.

  The invention according to claim 6 is the invention according to any one of claims 1 to 5, characterized in that a vector modulation error calculation unit for determining a test result is provided in the signal processing unit.

  According to the invention of claim 6, by providing the signal processing unit with a vector modulation error calculation unit for determining the test result, an expensive signal analysis device that is conventionally required outside is unnecessary, The time for performing expected value matching can be reduced.

  The invention according to claim 7 is a DA converter for converting a digital transmission signal into an analog signal, an AD converter for converting an analog reception signal into a digital signal, and signal processing for modulating the digital transmission signal and demodulating the analog reception signal A test apparatus for testing a semiconductor integrated circuit having a section, wherein the digital tester inputs a noise-added digital signal to the input terminal of the DA converter via the digital signal input terminal of the semiconductor integrated circuit And connecting means for performing a test of at least the DA converter and the AD converter by connecting connection terminals of the DA converter and the AD converter.

  According to the seventh aspect of the present invention, a digital tester for inputting a digital signal added with noise to the input terminal of the DA converter via the digital signal input terminal of the semiconductor integrated circuit, and the connection terminal of the DA converter and the AD converter By connecting at least a DA converter and a connection means for testing the AD converter, when the semiconductor integrated circuit is a non-defective product, even if the digital signal contains noise, If the semiconductor integrated circuit is defective and the digital signal contains noise, it will not operate properly, so use a measuring instrument or tester equipped with an expensive signal analysis function that was required in the past. Low cost and more efficient semiconductor integrated circuit, especially DA converter, AD converter, and signal processing Test parts can be performed.

  The invention according to claim 8 is a DA converter for converting a digital transmission signal into an analog signal, an AD converter for converting an analog reception signal into a digital signal, and signal processing for modulating the digital transmission signal and demodulating the analog reception signal A test apparatus for testing a semiconductor integrated circuit having a section, a digital tester for inputting a digital signal added with noise to the DA converter via a digital signal input terminal of the semiconductor integrated circuit, By connecting connection terminals of the DA converter and the AD converter, at least connection means for testing the DA converter and the AD converter, and a signal for setting a test mode are output to the signal processing unit, A host computer for entering test results. The features.

  According to the eighth aspect of the present invention, the digital tester for inputting a digital signal added with noise to the DA converter via the digital signal input terminal of the semiconductor integrated circuit is connected to the connection terminals of the DA converter and the AD converter. By providing connection means for performing at least a test of the DA converter and AD converter, and a host computer for outputting a signal for setting a test mode to the signal processing unit and inputting a test result When the semiconductor integrated circuit is a non-defective product, the digital signal operates normally even if it contains noise. When the semiconductor integrated circuit is defective, the digital signal operates normally if it contains noise. Therefore, use a measuring instrument or tester equipped with an expensive signal analysis function that was required in the past. No low-cost, more efficient semiconductor integrated circuit, particularly DA converter, AD converter, allows a test of the signal processing unit.

  According to a ninth aspect of the invention, there is provided the semiconductor integrated circuit according to the seventh or eighth aspect, wherein the semiconductor integrated circuit is provided with a serial / parallel conversion circuit between the digital signal input terminal and the DA converter. It is characterized in that a signal can be input as serial data from the outside.

  According to the ninth aspect of the present invention, the semiconductor integrated circuit is provided with a serial / parallel conversion circuit between the digital signal input terminal and the DA converter so that the digital signal to the DA converter can be input as serial data from the outside. This eliminates the need for an expensive signal analysis device that was conventionally required outside, and at the same time, reduces the number of pins (number of terminals) used in the test.

  The invention according to claim 10 is a DA converter that converts a digital transmission signal into an analog signal, an AD converter that converts an analog reception signal into a digital signal, a signal processing unit that modulates the digital transmission signal and demodulates the analog reception signal , And a test apparatus for testing a semiconductor integrated circuit having a CPU capable of inputting a digital signal added with noise to the DA converter, and connecting at least connection terminals of the DA converter and the AD converter, Connection means for testing the DA converter and the AD converter is provided.

  According to the invention described in claim 10, by connecting the connection terminals of the DA converter and the AD converter, at least the connection means for testing the DA converter and the AD converter is provided. If this is the case, the digital signal will operate normally even if it contains noise, and if the semiconductor integrated circuit is defective, it will not operate properly if the digital signal contains noise. This eliminates the need for a measuring instrument or tester equipped with an expensive signal analysis function, and at the same time, enables testing by changing the type of noise, and at a lower cost and more efficiently for semiconductor integrated circuits, particularly DA converters, AD converters, and The signal processor can be tested.

The invention according to claim 11 is a DA converter that converts a digital transmission signal into an analog signal, an AD converter that converts an analog reception signal into a digital signal, a signal processing unit that modulates the digital transmission signal and demodulates the analog reception signal , And a test apparatus for performing a semiconductor integrated circuit having a CPU capable of inputting a noise-added digital signal to the DA converter, wherein at least the DA converter is connected by connecting a connection terminal of the DA converter and the AD converter. A connection means for testing the converter and the AD converter;
And a host computer for outputting a signal for setting a test mode to the signal processing unit and inputting a test result.

  According to the eleventh aspect of the present invention, by connecting the connection terminals of the DA converter and the AD converter, the connection means for performing at least the test of the DA converter and the AD converter and the signal for setting the test mode are signaled. When the semiconductor integrated circuit is a non-defective product, it operates normally even if the digital signal includes noise, and the semiconductor integrated circuit is provided with a host computer that outputs to the processing unit and inputs the test result. If it is a defective product, it will not operate properly if the digital signal contains noise, so a measuring instrument or tester equipped with an expensive signal analysis function, which was necessary in the past, is no longer necessary, and at the same time the noise type is changed. Semiconductor integrated circuits, especially DA converters and AD converters that can be tested, are low-cost and more efficient And perform the test of the signal processing unit.

  According to a twelfth aspect of the present invention, in the semiconductor integrated circuit according to any one of the seventh to eleventh aspects, the signal processing section is provided with a vector modulation error calculation section for determining a test result. Features.

  According to the twelfth aspect of the present invention, an expensive signal analysis device that has been conventionally required outside is not required, and at the same time, the time for performing expected value matching can be shortened.

  The invention according to claim 13 is a DA converter that converts a digital transmission signal into an analog signal, an AD converter that converts an analog reception signal into a digital signal, and a signal processing that modulates the digital transmission signal and demodulates the analog reception signal A test method for testing a semiconductor integrated circuit having a section, wherein a digital tester outputs a digital signal added with noise to the DA converter via a digital signal input terminal of the semiconductor integrated circuit, and the DA converter And a connection step for testing at least the DA converter and the AD converter by connecting the connection terminals of the AD converter.

  According to a thirteenth aspect of the present invention, the step of outputting a digital signal with noise added to the DA converter via the digital signal input terminal of the semiconductor integrated circuit by the digital tester and the connection terminals of the DA converter and the AD converter are connected. By providing at least a connection process for testing the DA converter and the AD converter, when the semiconductor integrated circuit is a non-defective product, the digital signal operates normally even if it contains noise. If the integrated circuit is defective, it will not operate properly if the digital signal contains noise, so it can be used at low cost without using a measuring instrument or tester equipped with an expensive signal analysis function that was required in the past. , More efficiently semiconductor integrated circuit, especially DA converter, AD converter, and signal processing unit Test can be performed.

  The invention according to claim 14 is a DA converter for converting a digital transmission signal into an analog signal, an AD converter for converting an analog reception signal into a digital signal, and a signal processing for modulating the digital transmission signal and demodulating the analog reception signal A test method for testing a semiconductor integrated circuit having a section, wherein a digital tester outputs a digital signal added with noise to the DA converter via a digital signal input terminal of the semiconductor integrated circuit, and the DA converter And connecting a connection terminal of the AD converter to output a signal for setting a test mode by a host computer and a connection process for testing at least the DA converter and the AD converter to the signal processing unit. And a process for inputting test results The method of testing a semiconductor integrated circuit, characterized in that.

  According to the fourteenth aspect of the present invention, the step of outputting a digital signal added with noise to the DA converter via the digital signal input terminal of the semiconductor integrated circuit by the digital tester and the connection terminals of the DA converter and the AD converter are connected. By providing at least a connection step for performing a test of the DA converter and the AD converter, and a step of outputting a signal for setting a test mode by the host computer to the signal processing unit and inputting a test result When the semiconductor integrated circuit is a non-defective product, the digital signal operates normally even if it contains noise. When the semiconductor integrated circuit is defective, the digital signal operates normally if it contains noise. Measuring instruments or testers equipped with expensive signal analysis functions that were previously required At low cost without using more efficiently semiconductor integrated circuit, particularly DA converter, AD converter, allows a test of the signal processing unit.

  According to a fifteenth aspect of the present invention, in the semiconductor integrated circuit according to the thirteenth or fourteenth aspect, a serial-parallel conversion circuit is provided between the digital signal input terminal and the DA converter, and the digital signal to the DA converter is provided. It is characterized in that a signal can be input as serial data from the outside.

  According to the fifteenth aspect of the present invention, the semiconductor integrated circuit is provided with a serial / parallel conversion circuit between the digital signal input terminal and the DA converter so that the digital signal to the DA converter can be input as serial data from the outside. This eliminates the need for an expensive signal analysis device that was conventionally required outside, and at the same time, reduces the number of pins (number of terminals) used in the test.

  The invention according to claim 16 is a DA converter that converts a digital transmission signal into an analog signal, an AD converter that converts an analog reception signal into a digital signal, a signal processing unit that modulates the digital transmission signal and demodulates the analog reception signal , And a test method for testing a semiconductor integrated circuit having a CPU capable of inputting a noise-added digital signal to the DA converter, wherein at least the DA converter is connected by connecting a connection terminal of the DA converter and the AD converter. A connection step for testing the converter and the AD converter is provided.

  According to the sixteenth aspect of the present invention, a connection step for performing a test of at least the DA converter and the AD converter is provided by connecting the connection terminals of the DA converter and the AD converter. If this is the case, the digital signal will operate normally even if it contains noise, and if the semiconductor integrated circuit is defective, it will not operate properly if the digital signal contains noise. This eliminates the need for a measuring instrument or tester equipped with an expensive signal analysis function, and at the same time, enables testing by changing the type of noise, and at a lower cost and more efficiently for semiconductor integrated circuits, particularly DA converters, AD converters, and The signal processor can be tested.

  The invention according to claim 17 is a DA converter that converts a digital transmission signal into an analog signal, an AD converter that converts an analog reception signal into a digital signal, a signal processing unit that modulates the digital transmission signal and demodulates the analog reception signal , And a test method of a semiconductor integrated circuit having a CPU capable of inputting a noise-added digital signal to the DA converter, wherein at least the DA converter and the AD converter connecting the connection terminals of the DA converter and the AD converter A connection step for performing a test, and a step of outputting a signal for setting a test mode to the signal processing unit by a host computer and inputting a test result.

  According to the seventeenth aspect of the present invention, there is provided a connection step for performing a test of at least the DA converter and the AD converter for connecting the connection terminals of the DA converter and the AD converter, and a signal for setting the test mode by the host computer. And outputting a test result to the signal processing unit. When the semiconductor integrated circuit is a non-defective product, the digital integrated circuit operates normally even if it contains noise. If it is a defective product, it will not operate properly if the digital signal contains noise, so a measuring instrument or tester equipped with an expensive signal analysis function, which was necessary in the past, is no longer necessary, and at the same time the noise type is changed. Semiconductor integrated circuits, especially DA converters and AD converters that can be tested, are low-cost and more efficient And perform the test of the signal processing unit.

According to an eighteenth aspect of the present invention, in the semiconductor integrated circuit according to any one of the thirteenth to seventeenth aspects, the signal processing section is provided with a vector modulation error calculating section for determining a test result. Features.
According to the eighteenth aspect of the present invention, an expensive signal analysis device that has conventionally been required outside is not necessary, and at the same time, the time for performing expected value matching can be shortened.

  According to the present invention, a digital signal to which noise has been added can be input to the DA converter from the outside, and a terminal for testing the DA converter and AD converter using the digital signal and the signal processing unit is provided. If the semiconductor integrated circuit is a good product, it operates normally even if the digital signal contains noise. If the semiconductor integrated circuit is a defective product, it does not work properly if the digital signal contains noise. It is possible to test a semiconductor integrated circuit more efficiently at a low cost without using a measuring instrument or tester equipped with an expensive signal analysis function that is necessary.

  The semiconductor integrated circuit of the present embodiment includes a DA converter that converts a digital transmission signal into an analog signal, an AD converter that converts an analog reception signal into a digital signal, and signal processing that modulates the digital transmission signal and demodulates the analog reception signal. A digital signal obtained by adding noise to the DA converter from the outside, and inputting the output signal of the DA converter to the signal processing unit via the AD converter, so that at least the DA converter and A terminal group for performing a test of the AD converter is provided.

  Here, the signal processing unit and the DA converter are disconnected during the test, and the signal processing unit and the DA converter are connected after the test is completed. Further, the test can be performed not only on the DA converter and the AD converter but also on the signal processing unit at the same time. As the connection means for inputting the output signal of the DA converter to the AD converter, for example, a coaxial cable can be mentioned, but a twisted cable or a parallel feeder may be used.

  The semiconductor integrated circuit according to the present embodiment also performs a DA converter that converts a digital transmission signal into an analog signal, an AD converter that converts an analog reception signal into a digital signal, and modulates the digital transmission signal and demodulates the analog reception signal. A semiconductor integrated circuit having a signal processing unit, wherein a digital signal input terminal for inputting a digital signal added with noise to the DA converter from the outside, and an output signal of the DA converter are input to the AD converter at least, A connection terminal for performing a test of the DA converter and the AD converter, a setting terminal for inputting a signal for setting a test mode from the outside, and an output terminal for outputting a test result And

  In addition to the above configuration, the semiconductor integrated circuit of this embodiment is provided with a serial / parallel conversion circuit between the digital signal input terminal and the DA converter so that the digital signal to the DA converter can be input from the outside as serial data. It may be.

  The semiconductor integrated circuit according to the present embodiment also performs a DA converter that converts a digital transmission signal into an analog signal, an AD converter that converts an analog reception signal into a digital signal, and modulates the digital transmission signal and demodulates the analog reception signal. A semiconductor integrated circuit having a signal processing unit, a CPU that can input a digital signal with noise added to a DA converter, and a DA converter output signal input to the AD converter to at least test the DA converter and the AD converter. And a terminal group for performing the operation.

  The semiconductor integrated circuit according to the present embodiment also performs a DA converter that converts a digital transmission signal into an analog signal, an AD converter that converts an analog reception signal into a digital signal, and modulates the digital transmission signal and demodulates the analog reception signal. A semiconductor integrated circuit having a signal processing unit, a CPU that can input a digital signal with noise added to a DA converter, and a DA converter output signal input to the AD converter to at least test the DA converter and the AD converter. And a setting terminal for inputting a signal for setting a test mode from the outside, and an output terminal for outputting a test result.

  In addition to the above configuration, the semiconductor integrated circuit according to the present embodiment may include a vector modulation error calculation unit that performs test result determination in the signal processing unit.

The semiconductor integrated circuit test apparatus according to the present embodiment performs a DA converter that converts a digital transmission signal into an analog signal, an AD converter that converts an analog reception signal into a digital signal, and modulates the digital transmission signal and demodulates the analog reception signal. A test apparatus for testing a semiconductor integrated circuit having a signal processing unit, and a digital tester for inputting a noise-added digital signal to an input terminal of a DA converter via a digital signal input terminal of the semiconductor integrated circuit And connecting means for performing at least a test of the DA converter and the AD converter by connecting connection terminals of the DA converter and the AD converter.
Here, examples of the digital tester include a semiconductor tester TS6000H ++ manufactured by Yokogawa Electric Corporation.

  The semiconductor integrated circuit test apparatus according to the present embodiment includes a DA converter that converts a digital transmission signal into an analog signal, an AD converter that converts an analog reception signal into a digital signal, and modulation of the digital transmission signal and demodulation of the analog reception signal. A test apparatus for testing a semiconductor integrated circuit having a signal processing unit for performing a digital tester for inputting a digital signal added with noise to a DA converter via a digital signal input terminal of the semiconductor-to-integrated circuit And connecting the connection terminals of the DA converter and AD converter to output at least connection means for testing the DA converter and AD converter and a signal for setting the test mode to the signal processing unit, and the test result And a host computer for inputting That.

  In addition to the above configuration, the semiconductor integrated circuit test apparatus according to the present embodiment includes a serial-parallel conversion circuit between the digital signal input terminal and the DA converter, and serially transmits the digital signal to the DA converter from the outside. You may enable it to input by data.

  In addition, the semiconductor integrated circuit test apparatus of this embodiment includes a DA converter that converts a digital transmission signal into an analog signal, an AD converter that converts an analog reception signal into a digital signal, modulation of the digital transmission signal, and demodulation of the analog reception signal. A test apparatus for testing a semiconductor integrated circuit having a signal processing unit to perform and a CPU that can input a digital signal with noise added to the DA converter, by connecting connection terminals of the DA converter and the AD converter, Connection means for performing at least a test of the DA converter and the AD converter is provided.

  In addition, the semiconductor integrated circuit test apparatus of this embodiment includes a DA converter that converts a digital transmission signal into an analog signal, an AD converter that converts an analog reception signal into a digital signal, modulation of the digital transmission signal, and demodulation of the analog reception signal. A test apparatus for performing a semiconductor integrated circuit having a signal processing unit to be performed and a CPU capable of inputting a digital signal added with noise to a DA converter, and connecting at least a DA converter and an AD converter by connecting connection terminals thereof It is characterized by comprising connection means for testing the converter and AD converter, and a host computer for outputting a signal for setting a test mode to the signal processing unit and inputting the test result.

  In addition to the above-described configuration, the semiconductor integrated circuit test apparatus according to the present embodiment may include a vector modulation error calculation unit that performs test result determination in the signal processing unit.

  The semiconductor integrated circuit test method of this embodiment includes a DA converter that converts a digital transmission signal into an analog signal, an AD converter that converts an analog reception signal into a digital signal, and modulation of the digital transmission signal and demodulation of the analog reception signal. A test method for testing a semiconductor integrated circuit having a signal processing unit, wherein a digital tester outputs a digital signal added with noise to a DA converter via a digital signal input terminal of the semiconductor integrated circuit, a DA converter, A connection step for performing a test of at least the DA converter and the AD converter by connecting the connection terminal of the AD converter is provided.

  In addition, the semiconductor integrated circuit testing method of this embodiment includes a DA converter that converts a digital transmission signal into an analog signal, an AD converter that converts an analog reception signal into a digital signal, and modulation of the digital transmission signal and demodulation of the analog reception signal. A test method for testing a semiconductor integrated circuit having a signal processing unit for performing a process of outputting a digital signal added with noise to a DA converter via a digital signal input terminal of the semiconductor integrated circuit by a digital tester; By connecting the connection terminals of the converter and the AD converter, at least a connection process for testing the DA converter and the AD converter and a signal for setting the test mode by the host computer are output to the signal processing unit, and the test result And a process of inputting That.

  In addition to the above configuration, the semiconductor integrated circuit test method of this embodiment includes a serial / parallel conversion circuit between the digital signal input terminal and the DA converter, and the digital signal to the DA converter is externally transmitted. More serial data may be input.

  Also, the semiconductor integrated circuit testing method of this embodiment includes a DA converter that converts a digital transmission signal into an analog signal, an AD converter that converts an analog reception signal into a digital signal, modulation of the digital transmission signal, and demodulation of the analog reception signal. A test method for testing a semiconductor integrated circuit having a signal processing unit to be performed and a CPU capable of inputting a digital signal added with noise to the DA converter, and connecting at least a DA converter and an AD converter by connecting connection terminals thereof A connection step for testing the converter and the AD converter is provided.

  Also, the semiconductor integrated circuit testing method of this embodiment includes a DA converter that converts a digital transmission signal into an analog signal, an AD converter that converts an analog reception signal into a digital signal, modulation of the digital transmission signal, and demodulation of the analog reception signal. A method for testing a semiconductor integrated circuit having a signal processing unit to be performed and a CPU capable of inputting a digital signal with noise added to the DA converter, wherein at least the DA converter and the AD converter connected to the connection terminals of the DA converter and the AD converter are tested And a step of outputting a signal for setting a test mode to a signal processing unit and inputting a test result by a host computer.

  In addition to the above configuration, in the semiconductor integrated circuit test method of this embodiment, the semiconductor integrated circuit may include a vector modulation error calculation unit for determining a test result in the signal processing unit.

  The above-described embodiment is a preferred embodiment of the present invention, and the scope of the present invention is not limited to the above-described embodiment alone, and various modifications are made without departing from the gist of the present invention. Implementation is possible.

A first embodiment of the present invention will be described with reference to FIG.
FIG. 1 is a conceptual diagram showing Example 1 of a test environment for an analog part of a semiconductor integrated circuit according to the present invention. In the following, each embodiment will be described in the case where the semiconductor integrated circuit is a wireless LAN chip.

  In the figure, 10 is a wireless LAN chip as a semiconductor integrated circuit, 11 is an interface HOSTi / F for connecting the wireless LAN chip 10 to an external host computer HOST (not shown), 12 is a signal processing circuit for performing wireless LAN modulation / demodulation processing, 13 Is an FFT circuit for performing FFT (Fast Fourier Transform) processing, 14, 15 are DA converters (DAC: I channel, Q channel), 16, 17 are AD converters (ADC: I channel, Q channel), 18 Represents a CPU for controlling the wireless LAN chip 10, and 19 represents a digital tester.

Here, the output terminals (not shown) of the DA converters 14 and 15 are electrically connected directly to the input terminals (not shown) of the AD converters 16 and 17 on the test board by cables (for example, coaxial cables) L1 and L2, respectively. Yes.
In this embodiment, when a signal is applied from the outside (in this embodiment, outside the HOST I / F 11) to set the mode for testing the analog unit, the signal processing circuit 12 enters the test mode, and the semiconductor Digital data can be input from the outside of the integrated circuit 10 to input terminals (not shown) of the DA converters 14 and 15 of the I channel and Q channel via a digital signal input terminal (not shown).
In this embodiment, 10-bit data can be input to the I channel and Q channel from the digital tester 19.

The input terminals of the DA converters 14 and 15, the input terminal of the test mode setting signal of the HOST I / F 11, and the output terminal of the test result of the HOST I / F 11 test the DA converters 14 and 15 and the AD converters 16 and 17. Constitutes a terminal.
In this state, the digital tester 19 inputs the data obtained by adding the maximum noise added to the normal baseband signal to the DA converters 14 and 15 within the range that can be normally received as the wireless LAN chip 10.
Here, the noise generation source is one in which a pattern to which noise is added can be created in advance by a simulation tool (not shown) and input by the tester 19.

  The DA converters 14 and 15 convert the data including the noise into an analog signal and send it out. Since the output terminals of the DA converters 14 and 15 and the input terminals of the AD converters 16 and 17 are connected on the test board, the analog signals sent from the DA converters 14 and 15 are input to the AD converters 16 and 17. The Signals input from the AD converters 16 and 17 are converted into digital data, sent to the signal processing circuit 12, and demodulated via the FFT circuit 13.

  If the DA converters 14 and 15 and the AD converters 16 and 17 satisfy the design standards (non-defective products), they should be able to receive normally even if the maximum noise is added within the receivable range. It is.

  On the other hand, if the DA converters 14 and 15 and the AD converters 16 and 17 do not satisfy the design standard (defective product), the DA converters 14 and 15 or the data to which the maximum noise is added within the receivable range are added. Since noise components generated by the AD converters 16 and 17 are added, they cannot be received normally.

  Therefore, the reception data can be output to the outside from the HOST I / F 11 and verified with the expected value. When the data can be received normally, the received data and the expected value are the same, and therefore it can be determined that both the DA converters 14 and 15 and the AD converters 16 and 17 are satisfactory (non-defective). This eliminates the need for expensive signal analyzers that were conventionally required outside.

  As described above, according to the present embodiment, the wireless LAN chip 10 does not require an expensive signal analysis device that has been conventionally required outside.

A second embodiment of the present invention will be described with reference to FIG.
FIG. 2 is a conceptual diagram showing Example 2 of the test environment of the analog part of the semiconductor integrated circuit according to the present invention. Hereinafter, the same reference numerals are used for the same members as those in the embodiment shown in FIG.
The difference of the present embodiment from the first embodiment is that serial-parallel conversion circuits 21 and 22 are used.

In the figure, 20 is a wireless LAN chip as a semiconductor integrated circuit, 11 is an interface for connecting the wireless LAN chip 20 and an external host computer HOST (not shown), 12 is a signal processing circuit for performing wireless LAN modulation / demodulation processing, and 13 is FFT processing. 14 and 15 are DA converters (I channel and Q channel), 16 and 17 are AD converters (I channel and Q channel), 18 is a CPU for controlling the wireless LAN chip 20, 19 is a digital tester, 21 , 22 is a serial / parallel conversion circuit (I channel, Q channel) for converting serial data input from the outside of the semiconductor integrated circuit 10 through a digital signal input terminal (not shown) into 10-bit BUS (parallel data). For).
Here, the output terminals of the DA converters 14 and 15 are electrically connected directly to the input terminals of the AD converters 16 and 17 on the test board by cables L1 and L2, respectively.

  In this embodiment, when the analog section test mode is set from the outside (in this embodiment, outside the HOST I / F 11), the signal processing circuit 12 enters the test mode, and the I channel and Q channel are set from the outside. Digital data can be input to the DA converters 14 and 15. In this embodiment, serial data can be input from the digital tester 19 to each of the I channel and Q channel.

  In this state, the data obtained by adding the maximum noise to the normal baseband signal within the range that can be normally received from the digital tester 19 as the wireless LAN chip 20 is added to the wireless LAN chip 20 in a serial format (serial data). Enter. The input serial data is converted into 10-bit BUS data (parallel format data: parallel data) by the serial / parallel conversion circuits 21 and 22 and input to the DA converters 14 and 15.

  The DA converters 14 and 15 convert the data into analog signals and send them out. Since the DA converters 14 and 15 and the AD converters 16 and 17 are connected on the test board, the analog signals transmitted from the DA converters 14 and 15 are input to the AD converters 16 and 17. Signals input from the AD converters 16 and 17 are converted into digital data, sent to the signal processing circuit 3, and demodulated via the FFT circuit 13.

  If the DA converters 14 and 15 and the AD converters 16 and 17 satisfy the design standards (non-defective products), they should be able to receive normally even if the maximum noise is added within the receivable range. It is.

On the other hand, when the DA converters 14 and 15 and the AD converters 16 and 17 do not satisfy the design standard (defective product), the DA converters 14 and 15 or the data to which the maximum noise is added within the receivable range are added. Since noise components generated by the AD converters 16 and 17 are added, they cannot be received normally.
Therefore, the reception data can be output to the outside from the HOST I / F 11 and verified with the expected value.

If the data can be received normally, the received data and the expected value are the same, so it can be determined that both the DA converters 14 and 15 and the AD converters 16 and 17 are satisfactory (non-defective).
As described above, according to the present embodiment, the wireless LAN chip 20 does not require an expensive signal analysis device that was conventionally required outside, and at the same time, the number of pins used in the test can be reduced.

A third embodiment of the present invention will be described with reference to FIG.
FIG. 3 is a conceptual diagram showing a third embodiment of the test environment of the analog portion of the semiconductor integrated circuit according to the present invention.
The difference of the present embodiment from the second embodiment is that a CPU 31 for testing the DA converters 14 and 15 and the AD converters 16 and 17 is provided.

In the figure, 30 is a wireless LAN chip as a semiconductor integrated circuit, 11 is an interface for connecting the wireless LAN chip 30 and an external host computer HOST (not shown), 12 is a signal processing circuit for performing wireless LAN modulation / demodulation processing, and 13 is FFT processing. FFT circuit for performing
14 and 15 are DA converters (I channel, Q channel), 16 and 17 are AD converters (I channel and Q channel), and 21 and 22 are external to the semiconductor integrated circuit 10 via digital signal input terminals (not shown). A serial / parallel conversion circuit (for I channel and Q channel) for converting serial data input into 10-bit BUS (parallel data), 31 is a CPU capable of controlling the wireless LAN chip 30 and generating noise , 32 indicate digital testers, respectively. Here, the output terminals of the DA converters 14 and 15 are electrically connected directly to the input terminals of the AD converters 16 and 17 on the test board by cables L1 and L2, respectively. Further, the noise generated by the CPU 31 is obtained by adding an unnecessary component to the input signal, and is different from noise (for example, B radio waves) generally referred to.

In this embodiment, when the analog section test mode is set from the outside (in this embodiment, outside the HOST I / F 11), the signal processing circuit 12 enters the test mode, and the I channel and Q channel are set from the outside. Digital data can be input to the DA converters 14 and 15 via the CPU 31.
In this embodiment, serial data can be input from the digital tester 33 via the CPU 31 for each of the I channel and the Q channel.

  In this state, the baseband signal to which no noise is added is input from the digital tester 33 to the wireless LAN chip 30 in a serial format. The input serial data is converted into 10-bit BUS data (parallel data) by the serial / parallel conversion circuits 21 and 22 and input to the CPU 31. The CPU 31 adds noise to the data by a preprogrammed algorithm and transfers the data to the DA converters 14 and 15.

  The DA converters 14 and 15 convert the data into analog signals and send them out. Since the DA converters 14 and 15 and the AD converters 16 and 17 are connected on the test board, the analog signals transmitted from the DA converters 14 and 15 are input to the AD converters 16 and 17. Signals input from the AD converters 16 and 17 are converted into digital data, sent to the signal processing circuit 12, and demodulated via the FFT circuit 13.

  If the DA converters 14 and 15 and the AD converters 16 and 17 satisfy the design standards (non-defective products), they should be able to receive normally even if the maximum noise is added within the receivable range. It is.

On the other hand, when the DA converters 14 and 15 and the AD converters 16 and 17 do not satisfy the design standard (defective product), the DA converters 14 and 15 or the data to which the maximum noise is added within the receivable range are added. Since noise components generated by the AD converters 16 and 17 are added, they cannot be received normally.
Therefore, the reception data can be output to the outside from the HOST I / F 11 and verified with the expected value.
If the data can be received normally, the received data and the expected value are the same, and therefore it can be determined that both the D converters 14 and 15 and the AD converters 16 and 17 are satisfactory (non-defective).

  As described above, according to the present embodiment, the wireless LAN chip 30 can be tested by changing the type of noise at the same time as an expensive signal analysis device conventionally required outside is unnecessary.

A fourth embodiment of the present invention will be described with reference to FIG.
FIG. 4 is a conceptual diagram showing Embodiment 4 of the test environment of the analog part of the semiconductor integrated circuit according to the present invention.
The difference between the present embodiment and the first embodiment is that an EVM (Error Vector Module) calculating unit 41 is used.

In the figure, 40 is a wireless LAN chip as a semiconductor integrated circuit, 11 is an interface for connecting the wireless LAN chip 40 and an external HOST (not shown), 12 is a signal processing circuit for performing wireless LAN modulation / demodulation processing, and 13 is an FFT for performing FFT processing. Circuits 14 and 15 are DA converters (I channel and Q channel), 16 and 17 are AD converters (I channel and Q channel), 18 is a CPU that controls the wireless LAN chip 40, 19 is a digital tester, and 41 is during reception The EVM calculation units for calculating the EVM (vector modulation error) are respectively shown.
Here, the output terminals of the DA converters 14 and 15 are electrically connected directly to the input terminals of the AD converters 16 and 17 via the cables L1 and L2 on the test board, respectively.

In this embodiment, when the analog section test mode is set from the outside (in this embodiment, outside the HOST I / F 11), the signal processing circuit 12 enters the test mode, and the digital signal is input from the outside of the semiconductor integrated circuit 10. Digital data can be input to the I-channel and Q-channel DA converters 14 and 15 via signal input terminals (not shown).
In this embodiment, 10-bit data can be input from the digital tester 19 to each of the I channel and the Q channel.

  In this state, the digital tester 19 inputs data obtained by adding the maximum noise-added data to the normal baseband signal within a range that can be normally received as the wireless LAN chip 40 to the DA converters 14 and 15. The DA converters 14 and 15 convert the data into analog signals and send them out. Since the DA converters 14 and 15 and the AD converters 16 and 17 are connected on the test board, the analog signals transmitted from the DA converters 14 and 15 are input to the AD converters 16 and 17. Signals input from the AD converters 16 and 17 are converted into digital data, sent to the signal processing circuit 12, and demodulated via the FFT circuit 13. At the time of demodulation, the EVM calculating unit 41 calculates EVM, and the calculated EVM value is output to the outside via the HOST I / F 11.

  If the AD converters 16 and 17 satisfy the design standard (non-defective products), the EVM value is smaller than a certain value (threshold value) even if the maximum noise is added within the receivable range. It can be determined that the product is non-defective.

  On the other hand, if the DA converters 14 and 15 and the AD converters 16 and 17 do not satisfy the design standard (defective product), the DA converter 14, 15 or noise components generated by the AD converters 16 and 17 are added, so the EVM value exceeds the threshold value, and it can be determined that the product is defective.

  As described above, according to the present embodiment, in the wireless LAN chip 40, an expensive signal analysis device that is conventionally required outside is unnecessary, and at the same time, the time for performing expected value matching can be shortened.

  In each of the above embodiments, the semiconductor integrated circuit is described as a wireless LAN chip. However, the present invention is not limited to this, and includes a DA converter, an AD converter, and a signal processing circuit to perform communication. It may be a semiconductor integrated circuit.

  The present invention can be used for a semiconductor integrated circuit such as a wireless LAN, a test apparatus thereof, and a test method thereof.

It is a conceptual diagram which shows Example 1 of the test environment of the analog part of the semiconductor integrated circuit which concerns on this invention. It is a conceptual diagram which shows Example 2 of the test environment of the analog part of the semiconductor integrated circuit which concerns on this invention. It is a conceptual diagram which shows Example 3 of the test environment of the analog part of the semiconductor integrated circuit which concerns on this invention. It is a conceptual diagram which shows Example 4 of the test environment of the analog part of the semiconductor integrated circuit which concerns on this invention. It is a conceptual diagram which shows an example of the test environment of the analog part of the conventional semiconductor integrated circuit.

Explanation of symbols

10 Semiconductor integrated circuit (wireless LAN chip)
11 HOST I / F (interface)
12 signal processing circuit 13 FFT circuit 14, 15 DA converter (DAC)
16, 17 AD converter (ADC)
18 CPU
19 Digital tester

Claims (18)

Semiconductor integrated circuit having a DA converter that converts a digital transmission signal into an analog signal, an AD converter that converts an analog reception signal into a digital signal, and a signal processing unit that modulates the digital transmission signal and demodulates the analog reception signal Because
By inputting a digital signal with noise added to the DA converter from the outside and inputting the output signal of the DA converter to the signal processing unit via the AD converter, at least the DA converter and the AD converter are tested. A semiconductor integrated circuit comprising a terminal group for performing the operation. Semiconductor integrated circuit having a DA converter that converts a digital transmission signal into an analog signal, an AD converter that converts an analog reception signal into a digital signal, and a signal processing unit that modulates the digital transmission signal and demodulates the analog reception signal Because
A digital signal input terminal for inputting a digital signal added with noise to the DA converter from the outside;
By connecting the output signal of the DA converter to the AD converter, at least a connection terminal for testing the DA converter and the AD converter;
A setting terminal for inputting a signal for setting the test mode from the outside;
A semiconductor integrated circuit comprising: an output terminal for outputting a test result.   3. The semiconductor according to claim 2, wherein a serial-parallel conversion circuit is provided between the digital signal input terminal and the DA converter so that a digital signal to the DA converter can be input as serial data from the outside. Integrated circuit. Semiconductor integrated circuit having a DA converter that converts a digital transmission signal into an analog signal, an AD converter that converts an analog reception signal into a digital signal, and a signal processing unit that modulates the digital transmission signal and demodulates the analog reception signal Because
A CPU capable of inputting a digital signal with noise added to the DA converter;
A semiconductor integrated circuit comprising: a terminal group for performing a test of at least the DA converter and the AD converter by inputting an output signal of the DA converter to the AD converter. Semiconductor integrated circuit having a DA converter that converts a digital transmission signal into an analog signal, an AD converter that converts an analog reception signal into a digital signal, and a signal processing unit that modulates the digital transmission signal and demodulates the analog reception signal Because
A CPU capable of inputting a digital signal with noise added to the DA converter;
A connection terminal for testing at least the DA converter and the AD converter by inputting an output signal of the DA converter to the AD converter;
A setting terminal for inputting a signal for setting the test mode from the outside;
A semiconductor integrated circuit comprising: an output terminal for outputting a test result.   6. The semiconductor integrated circuit according to claim 1, wherein a vector modulation error calculation unit for determining a test result is provided in the signal processing unit. Testing of a semiconductor integrated circuit having a DA converter that converts a digital transmission signal into an analog signal, an AD converter that converts an analog reception signal into a digital signal, and a signal processing unit that modulates the digital transmission signal and demodulates the analog reception signal A testing device for performing
A digital tester for inputting a noise-added digital signal to the input terminal of the DA converter via the digital signal input terminal of the semiconductor integrated circuit;
A test apparatus for a semiconductor integrated circuit, comprising: connection means for performing a test of at least the DA converter and the AD converter by connecting connection terminals of the DA converter and the AD converter. Testing of a semiconductor integrated circuit having a DA converter that converts a digital transmission signal into an analog signal, an AD converter that converts an analog reception signal into a digital signal, and a signal processing unit that modulates the digital transmission signal and demodulates the analog reception signal A testing device for performing
A digital tester for inputting a noise-added digital signal to the DA converter via a digital signal input terminal of the semiconductor integrated circuit;
By connecting connection terminals of the DA converter and the AD converter, at least connection means for testing the DA converter and the AD converter;
A test apparatus for a semiconductor integrated circuit, comprising: a host computer for outputting a signal for setting a test mode to the signal processing unit and inputting a test result.   The semiconductor integrated circuit is characterized in that a serial-parallel conversion circuit is provided between the digital signal input terminal and the DA converter so that the digital signal to the DA converter can be input from the outside as serial data. 9. The test apparatus for a semiconductor integrated circuit according to claim 7 or 8. A DA converter that converts a digital transmission signal into an analog signal, an AD converter that converts an analog reception signal into a digital signal, a signal processing unit that modulates the digital transmission signal and demodulates the analog reception signal, and noise to the DA converter A test apparatus for testing a semiconductor integrated circuit having a CPU capable of inputting an added digital signal,
A test apparatus for a semiconductor integrated circuit, comprising: connection means for performing at least a test of the DA converter and the AD converter by connecting connection terminals of the DA converter and the AD converter. A DA converter that converts a digital transmission signal into an analog signal, an AD converter that converts an analog reception signal into a digital signal, a signal processing unit that modulates the digital transmission signal and demodulates the analog reception signal, and noise to the DA converter A test apparatus for performing a semiconductor integrated circuit having a CPU capable of inputting an added digital signal,
By connecting connection terminals of the DA converter and the AD converter, at least connection means for testing the DA converter and the AD converter;
A test apparatus for a semiconductor integrated circuit, comprising: a host computer that outputs a signal for setting a test mode to the signal processing unit and inputs a test result.   12. The semiconductor integrated circuit testing apparatus according to claim 7, wherein the signal processing unit is provided with a vector modulation error calculation unit for determining a test result. Testing of a semiconductor integrated circuit having a DA converter that converts a digital transmission signal into an analog signal, an AD converter that converts an analog reception signal into a digital signal, and a signal processing unit that modulates the digital transmission signal and demodulates the analog reception signal A test method for performing
Outputting a digital signal added with noise to the DA converter via a digital signal input terminal of the semiconductor integrated circuit by a digital tester;
A method for testing a semiconductor integrated circuit, comprising: a connection step for testing at least the DA converter and the AD converter by connecting connection terminals of the DA converter and the AD converter. Testing of a semiconductor integrated circuit having a DA converter that converts a digital transmission signal into an analog signal, an AD converter that converts an analog reception signal into a digital signal, and a signal processing unit that modulates the digital transmission signal and demodulates the analog reception signal A test method for performing
Outputting a digital signal added with noise to the DA converter via a digital signal input terminal of the semiconductor integrated circuit by a digital tester;
A connection step for testing at least the DA converter and the AD converter by connecting the connection terminals of the DA converter and the AD converter;
A test method for a semiconductor integrated circuit, comprising: a step of outputting a signal for setting a test mode by a host computer to the signal processing unit and inputting a test result.   The semiconductor integrated circuit is characterized in that a serial-parallel conversion circuit is provided between the digital signal input terminal and the DA converter so that the digital signal to the DA converter can be input from the outside as serial data. The method for testing a semiconductor integrated circuit according to claim 13 or 14. A DA converter that converts a digital transmission signal into an analog signal, an AD converter that converts an analog reception signal into a digital signal, a signal processing unit that modulates the digital transmission signal and demodulates the analog reception signal, and noise to the DA converter A test method for testing a semiconductor integrated circuit having a CPU capable of inputting an added digital signal,
A method for testing a semiconductor integrated circuit, comprising: a connection step for testing at least the DA converter and the AD converter by connecting connection terminals of the DA converter and the AD converter. A DA converter that converts a digital transmission signal into an analog signal, an AD converter that converts an analog reception signal into a digital signal, a signal processing unit that modulates the digital transmission signal and demodulates the analog reception signal, and noise to the DA converter A test method of a semiconductor integrated circuit having a CPU capable of inputting an added digital signal,
A connection step for testing at least the DA converter and the AD converter for connecting the connection terminals of the DA converter and the AD converter;
A method for testing a semiconductor integrated circuit, comprising: a step of outputting a signal for setting a test mode to the signal processing unit and inputting a test result by a host computer.   18. The semiconductor integrated circuit testing method according to claim 13, wherein the signal processing unit is provided with a vector modulation error calculation unit for determining a test result.

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