JP2007123931A - Semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To easily provide a semiconductor device having an improved withstand voltage against an excessively high voltage caused by the static electricity applied to a terminal of this device having input/output circuits easily connectable to a bus line etc. provided for data communications between semiconductor devices. <P>SOLUTION: The semiconductor device 10 has a diode 13 connected between a terminal T1 and a reference potential line GND with the anode connected to this line, and a protective circuit 4 having a NPN transistor 15 in which the base is connected to the emitter through a resistance 16 and the collector is connected to the terminal T1, serially connecting to a diode 12 of which cathode is connected to a power voltage line, between the terminal T1 and the power voltage line. When a voltage over the punch-through voltage of the transistor 15 is applied to the terminal T1, a current I1 or I2 caused by this voltage flows to the power voltage line through the transistor 15. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

The present invention relates to a semiconductor device, and more particularly to a configuration of a semiconductor device provided with a protection circuit so that it can be protected from breakdown due to application of a high voltage such as static electricity.

When a person or machine charged with a high voltage of several tens to several tens of kV due to static electricity generated by friction or the like touches the semiconductor device, the static electricity is charged for several μs through the terminal of the semiconductor device and the internal circuit. By discharging in a short time of several milliseconds, an internal element of the semiconductor device may be destroyed, and a breakdown phenomenon called electrostatic breakdown may occur that impairs its function and characteristics. In particular, in the case of a semiconductor device called a CMOS or Bi-CMOS having field effect (MOS) transistors as circuit elements, the gate oxide film has a relatively low withstand voltage and an excessively high voltage is applied. Since a gate oxide film is easily broken, a protection circuit that allows a high-voltage current applied by static electricity or the like to flow through a low-impedance power supply voltage line (VDD) or a reference potential line (GND) is provided for each input / output unit. By providing, the semiconductor device is protected from destruction.

A conventional semiconductor device 10a shown in FIG. 4 includes an input / output unit 1a connected to a terminal T1 and an internal circuit 3 that performs signal processing and the like. The input / output unit 1a is between the terminal T1 and the internal circuit 3. An input / output circuit 2 for buffering a signal and a protection circuit 4a for preventing an excessively high voltage applied to the terminal T1 from being applied to the input / output circuit 2 and the internal circuit 3 as they are. Yes. The protection circuit 4a includes resistors 11 and 14 connected in series between the terminal T1 and the input / output circuit 2, and a connection point between these resistors to the power supply voltage line (VDD) and the reference potential line (GND). And diodes 12 and 13 connected in a reverse bias state.

Here, the protection operation of the protection circuit 4a will be described with the power supply voltage VH (V), the reference potential VL (V), and the forward voltage of each diode VF (V). When a voltage exceeding (VH + VF) is applied to the terminal T1 due to static electricity or the like, a current flows through a path indicated by a broken line I1 through the resistor 11 and the diode 12, so that the voltage is dropped at the resistor 11 theoretically. Only the voltage (VH + VF) is applied to the input / output circuit 2, the internal circuit 3, etc., and is protected from destruction due to the application of a high voltage. Similarly, when a negative voltage lower than (VL -VF) is applied to the terminal T1, current flows through a path indicated by a broken line I2 through the resistor 11 and the diode 13, so theoretically, the voltage drop at the resistor 11 Only the applied voltage (VL -VF) is applied, and the device is protected from destruction due to the application of a high voltage.

However, in the semiconductor device 10a having such an input / output unit 1a, when the terminal T1 is connected to a bus line connected to another semiconductor device (not shown) to which the power supply voltage is applied, the power supply voltage is connected to the semiconductor device 10a. Even when no voltage is applied, a voltage lower than the input voltage by the forward voltage (VF) of the diode 12 is applied to the power supply voltage line via the diode 12 and unnecessary power is consumed in the semiconductor device 10a. In addition, the operation may become unstable and adversely affect other semiconductor devices via a bus line or the like.

If the diode 12 is eliminated, such a problem is eliminated. However, if the diode 12 is simply eliminated, the protection function against the electrostatic breakdown is lost. Therefore, when an excessively high voltage due to static electricity or the like is applied, the semiconductor device The circuit element 10a may be destroyed, resulting in malfunction, and time and cost will be required for investigating the cause and replacing the semiconductor device 10a.

Therefore, the present invention solves these problems, and although the semiconductor device has an input / output circuit that can be easily connected to a bus line or the like provided for data communication between the semiconductor devices, the terminal is excessively charged due to static electricity or the like. An object of the present invention is to easily provide a semiconductor device with improved withstand voltage when a high voltage is applied.

In order to solve the above problem, the semiconductor device according to claim 1 is a semiconductor device 10 having an input / output circuit 2 capable of applying a signal having a voltage higher than the voltage of the power supply voltage line (VDD) from the terminal T1. The first diode 13 is connected between the terminal T1 and the reference potential line (GND) with the anode at the reference potential line side, and the base is connected between the terminal T1 and the power supply voltage line via the resistor 16. Has a protection circuit 4 in which an NPN transistor 15 having a collector connected to the terminal T1 and a second diode 12 having a cathode connected to the power supply voltage line are connected in series. When a voltage exceeding the voltage is applied to the terminal T1, a current (I1 or I2) based on the voltage can be supplied to the power supply voltage line via the transistor 15 and applied to the input / output circuit 2. Voltage, characterized in that so as to reduce that.

In addition to the semiconductor device according to claim 1, the semiconductor device according to claim 2 is provided between the power sources for suppressing voltage fluctuations of the power supply lines (VDD, GND) due to the current flowing through the protection circuit 2. The protective circuit 5 is provided between the reference potential line near the terminal T1 and the power supply voltage line. With such a configuration, in the semiconductor device according to claim 1 and claim 2, even if a signal having a voltage higher than the power supply voltage applied to the semiconductor device is connected, an unnecessary current flows from the terminal to the power supply voltage line. The protective circuit operates to reduce the voltage applied to the input / output circuit and internal circuit when an excessively high voltage due to static electricity or the like is input to the terminal. Thus, the inter-power supply protection circuit operates so as to suppress the fluctuation of the voltage of the power supply voltage line or the reference potential line.

According to the present invention, an unnecessary current does not flow from the terminal to the power supply voltage line even when a signal having a voltage higher than the voltage of the power supply voltage line applied to the semiconductor device is connected. There is an effect that it is possible to provide a semiconductor device that can be easily connected to a bus line or the like for data communication provided in. In addition, when an abnormal input voltage due to static electricity or the like is applied to the terminal, the protection circuit operates so that the voltage applied to the input / output circuit and the internal circuit decreases, and the power supply voltage line or reference potential line of the input / output unit Since the inter-power supply protection circuit operates so as to suppress the fluctuation of the voltage of the IC, the voltage applied to the input / output circuit and the internal circuit is suppressed, and the withstand voltage against breakdown due to the application of static electricity etc. is improved As a result, the reliability of the semiconductor device can be improved.

Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. In the present specification, the same or similar circuit elements are denoted by the same reference numerals throughout the drawings to simplify the overlapping description. In the following description, the voltage of the power supply voltage line (VDD) is VH (V), the voltage of the reference potential line (GND) is VL (V), the forward voltage of each diode is VF (V), and the transistor punch The through voltage is VPT (V), the power supply voltage line and the reference potential line are referred to as power supply lines, and the voltage ((VH + VPT + VF) or (V A voltage lower than VPT + VF)) is called "normal input voltage", and an excessively high voltage exceeding the normal voltage (input voltage higher than (VH + VPT + VF) or voltage lower than (VL-VF)) is called "abnormal input voltage". I will explain.

FIG. 1 shows a circuit configuration example of a semiconductor device 10 according to the present invention, which is connected to a terminal T1 serving as an input terminal or an output terminal of the semiconductor device 10 and a bus line connected to a semiconductor device (not shown) to transmit signals with an external circuit. And an internal circuit 3 that receives the transmitted signal and performs signal processing and the like. The input / output unit 1 has an input / output circuit 2 for buffering a signal between the terminal T1 and the internal circuit 3, and the input / output circuit 2 and the internal circuit 3 when an abnormal input voltage is applied to the terminal T1. Is composed of a protection circuit 4 for preventing damage to the power supply and an inter-power supply protection circuit 5 connected between the power supply lines of the input / output unit 1. Usually, a plurality of input / output units 1 are arranged mainly in the periphery of the semiconductor chip, and the protection circuit 4 is arranged as close as possible to the terminal T1 in order to increase the protection effect. In FIG. 1, only one input / output unit 1 connected to the terminal T1 is shown for ease of explanation.

The input / output circuit 2 is an input circuit 2a using a CMOS inverter circuit as an input circuit for transmitting a signal from an external circuit to the internal circuit 3, and an output circuit for outputting a signal from the internal circuit 3 to the external circuit via a terminal T1. The output transistor 2b is an NMOS open drain output circuit. The protection circuit 4 includes a resistor 11 and a resistor 14 connected in series between the terminal T1 and the input / output circuit 2, and a diode 13 having an anode connected to the reference potential side between the connection point of each resistor and the reference potential. And a transistor 15 and a diode 12 connected in series between the connection point of each resistor and the power supply voltage. The collector of the transistor 15 is connected to the connection point of each resistor, the base is connected to the emitter via the resistor 16, the emitter is connected to the anode of the diode 12, and is connected to the power supply voltage via the diode 12. The punch-through voltage of the transistor 15 is set to several V to several tens V higher than the power supply voltage. The resistors 11 and 14 are formed of polysilicon or the like so that a parasitic diode is not formed with respect to the power supply voltage line, and the resistance values thereof are set to several tens of ohms to several hundreds of ohms and several hundreds of ohms or more, respectively. Thus, it is formed thicker than the resistor 14. The inter-power supply protection circuit 5 will be described later with reference to FIGS.

The operation of the circuit of FIG. 1 will be described. First, the following operation is performed in a normal operation state where a constant power supply voltage is applied to the semiconductor device 10 and a signal of a normal input voltage within (VH + VPT + VF) is input / output to / from the terminal T1. That is, at the time of signal input, the output transistor 2b is set in a non-conductive state (OFF state), and a signal is input from another semiconductor device to the terminal T1, and the input signal is transmitted to the internal circuit 3 via the input circuit 2a. Is done. At this time, since the transistor 15 is non-conductive, no current flows through the power supply voltage line. At the time of signal output, the output line 2b is turned on (ON state) or non-conductive according to the output signal from the internal circuit 3, so that the bus line or the like connected to the terminal T1 is set to a low level or a high level. The output signal is transmitted by maintaining the level.

In addition, the transistor 15 of the protection circuit 4 does not conduct even in the operation stop state in which the power supply voltage is not applied to the semiconductor device 10 and the signal of the normal input voltage within (VPT + VF) is input / output to the terminal T1. No current flows through the diode 12 to the power supply voltage line, and the power supply voltage of the semiconductor device 10 is supplied and the semiconductor device 10 does not operate.

On the other hand, when an abnormal input voltage due to static electricity or the like is applied to the terminal T1, the following operation is performed. That is, when a voltage equal to or higher than the normal input voltage ((VH + VPT + VF) or (VH + VPT)) is applied to the terminal T1, the transistor 15 causes punch-through and becomes conductive, and current flows along the path indicated by the broken line I1. Since the current flows, the voltage applied to the input / output circuit 2 and the internal circuit 3 of the semiconductor device 10 is dropped by the resistor 11 and is theoretically lowered to a voltage of (VH + VPT + VF). In addition, when a negative voltage having an absolute value of (VL -VF) or more is applied to the terminal T1, current flows through the path indicated by the broken line I2, so that the voltage applied to the internal circuit or the like is dropped by the resistor 11. Theoretically, the voltage drops to (VL -VF).

Because of this operation, unnecessary current flows and is consumed by the semiconductor device 10 even when an input signal having a voltage higher than the power supply voltage applied to the semiconductor device 10 is applied to the terminal T1 during normal operation or when the operation is stopped. In addition, when an abnormal input voltage is applied, a current flows through the protection circuit 4 so that the input / output circuit 2 and the internal circuit 3 can be protected from destruction.

Instead of the above embodiment, the connection order of the transistor 15 and the diode 12 is changed, the protection circuit for the transistor 15 and the diode 12 is arranged on the terminal T1 side of the resistor 11, or the terminal T1 side of the resistor 11 is arranged. The output impedance may be lowered by connecting the drain of the output transistor 2b. When the terminal T1 is used only as an output, the resistance values of the resistors 11 and 14 are made as small as possible or omitted, or a diode parasitically formed by the output transistor 2b is used as the diode 13. May be. The input / output circuit 2 may be provided in the internal circuit 3 instead of being provided in the input / output unit 1, or may be provided separately between the input / output unit 1 and the internal circuit 3. The circuit configuration may be arbitrary. Furthermore, the voltage of the signal input to the terminal T1 may be the same as or lower than the power supply voltage applied to the semiconductor device 10. And so on.

FIG. 2 shows a specific circuit configuration example (5a) of the inter-power supply protection circuit 5 of FIG. 1, and shows the same configuration as that filed by the applicant in Japanese Patent Application No. 7-330818. That is, it is composed of an NMOS transistor 5c whose drain and gate are both connected to the power supply voltage and whose source is connected to the reference potential, and a diode 5d whose cathode is connected to the power supply voltage and whose anode is connected to the reference potential. Has been. The transistor 5c is not the same as the transistor using a gate oxide film having a thickness of several hundreds of angstroms used for the internal circuit 3 or the like. A transistor is formed by using a gate oxide film with a field oxide film having a thickness of 10 thousand thousand Å, and the channel length between the source and the drain is larger than the channel length of the transistor mainly used in the internal circuit 3 or the like. By forming it to be several μm long, the threshold voltage (VTH) of the transistor is formed to be several tens of volts.

With such a configuration, when the voltage partially rises according to the resistance value of the power supply voltage line of the input / output unit 1 due to the current flowing through the path indicated by the broken line I1 in FIG. A current also flows through the reference potential line along the path indicated by the broken line I3 via the protection circuit 5, and the voltage fluctuation of the power supply voltage line is suppressed. In the case where the voltage partially decreases in accordance with the resistance value of the reference potential line of the input / output unit 1 due to the current flowing through the path indicated by the broken line I2 in FIG. As a result, current also flows through the power supply voltage line along the path indicated by the broken line I4, and the voltage fluctuation of the reference potential line is suppressed. Further, when the voltage between the power supply voltage line and the reference potential line becomes larger than the threshold voltage of the transistor 5c, the transistor 5c becomes conductive and current flows from the power supply voltage line to the reference potential line. Voltage fluctuation between the voltage line and the reference potential line is suppressed. When the voltage of the reference potential line is partially higher than (VH + VF), current flows from the reference potential line to the power supply voltage line via the diode 5d.

FIG. 3 shows another circuit configuration example (5b) of the inter-power supply protection circuit 5 of FIG. 1, in which a punch-through voltage (VPT2) is used instead of the MOS transistor 5c used in the inter-power supply protection circuit 5a of FIG. A configuration using an NPN type transistor 5e set to tens of volts higher than the voltage, the emitter is connected to the reference potential, the base is connected to the reference potential through the resistor 5f, and the collector is connected to the power supply voltage Has been. With such a configuration, an operation similar to that of the circuit of FIG. 2 is performed using not the threshold voltage of the MOS transistor 5c but the punch-through voltage of the transistor 5e as a reference voltage for conduction.

Note that the inter-power supply protection circuit 5 is not limited to the above-described circuit. For example, the inter-power supply protection circuit shown in FIGS. 2 and 3 can be formed in one input / output unit 1 at the same time, or around the semiconductor chip. You may arrange | position for every formed several input / output part, and may arrange | position so that it may continue to a some terminal. Further, the diode 5d shown in FIGS. 2 and 3 may be omitted, and a similar effect may be obtained by a diode formed parasitically when forming the element.

A circuit diagram showing an embodiment of the present invention, The circuit diagram which shows the specific example of the protection circuit between power supplies used for this invention, The circuit diagram which shows the other specific example of the protection circuit between power supplies used for this invention, It is a circuit diagram which shows the example of the conventional protection circuit.

Explanation of symbols

1: Input / output unit 2: Input / output circuit 3: Internal circuit 4: Protection circuit 5: Protection circuit between power supplies 10: Semiconductor device

Claims (2)

A semiconductor device having an input / output circuit capable of applying a signal having a voltage higher than a voltage of a power supply voltage line from a terminal, wherein a first diode is connected between the terminal and a reference potential line with an anode at a reference potential line side. An NPN transistor having a base connected to the emitter via a resistor between the terminal and the power supply voltage line, a collector on the terminal side, and a second diode having a cathode on the power supply voltage line side. A protection circuit connected in series, and when a voltage exceeding the punch-through voltage of the transistor is applied to the terminal, a current due to the voltage can flow through the transistor to a power supply voltage line; A semiconductor device characterized in that the applied voltage is lowered. The power supply line protection circuit for suppressing the voltage fluctuation of the power supply line due to the current flowing through the protection circuit is provided between the reference potential line and the power supply voltage line in the vicinity of the terminal. Semiconductor device.

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