JP2007122776A - Optical disk device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To suppress the time resolution reduction of an RF sum signal based on a phase difference between the reproducing signals of preceding sides and those of succeeding side in a pit advancing direction. <P>SOLUTION: The preceding side reproducing signals (signal A+signal D) and succeeding side reproducing signals (signal B+signal C) from the 4-division photodetector of an optical pickup 10 are supplied to A/D12 and A/D14 respectively. The A/D12 executes sampling based on a first CLK, and the A/D14 executes sampling based on a second CLK. The first CLK and the second CLK are displaced each other in phase and the phase shift between the reproducing signals of preceding sides and those of succeeding side is compensated by the phase shift between their clock signals. The phase shift between the first CLK and the second CLK is adjusted so as to obtain the best reproducing signal quality regarding jitters, error rate, or the like. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to processing of a reproduction signal output from an optical disc apparatus, and more particularly from a divided photodetector.

  2. Description of the Related Art Conventionally, in an optical disk apparatus, a reproduction power laser beam is irradiated from a laser diode of an optical pickup onto an optical disk, the reflected light is photoelectrically converted by a four-divided photodetector of the optical pickup, and an output signal of each photodetector of the four-divided photodetector is output. A reproduction RF signal is obtained by addition.

  However, when the reproduction-power laser beam passes through the pits on the optical disk, there may be a phase difference between the output side of the quadrant photodetector obtained from the pit reflected light on the leading side and the trailing side in the pit traveling direction. is there. This phase difference is caused by diffraction due to the pit depth on the optical disk, a pickup optical system, and the like, and changes according to the optical disk device, the type of the optical disk, the reproduction speed, and the like. As for the types of optical discs, in general, in the CD / DVD-ROM, the succeeding signal is delayed in phase with respect to the preceding signal, and in the CD / DVD-RW, the succeeding signal is relative to the preceding signal. The phase is advanced, and there is almost no phase difference in the CD / DVD-R.

  FIG. 4 shows the configuration of the reproduction system of the optical disc apparatus, and FIG. 5 shows the phase of each signal. In FIG. 4, pits 6 are formed on the track of the optical disc 5, and the optical disc 5 is irradiated with a laser beam 100 having a reproduction power, and the reflected light is detected by a four-divided photodetector 10a. The four-divided photo detector 10 a is divided into four photo detectors, photo detector A to photo detector D. Photo detectors A and B are located on the inner peripheral side of optical disc 5, and photo detectors C and D are located on the outer peripheral side of optical disc 5. Further, the photodetectors A and D and the photodetectors B and C are divided with respect to the track direction of the optical disc 5, and the pit 6 moves in the optical direction from the right in the figure as the optical disc 5 rotates. And D are a group of photo detectors located on the leading side, and photo detectors B and C are a group of photo detectors located on the following side. The signal A from the photo detector A, the signal B from the photo detector B, the signal C from the photo detector C, and the signal D from the photo detector D are supplied to the adder 16, and all the signals are added to generate a reproduction RF signal (signal A + signal B + Signal C + signal D) is output. The reproduced RF signal is supplied to the decoder and demodulated.

  Signals A and D are signals on the leading side, and signals B and C are signals on the following side. Due to the type of optical disc 5 and diffraction due to the pit depth, the signals on the following side are signals on the leading side. There is a case where a phase difference occurs with respect to the signal, and FIG. That is, the signal B + C on the succeeding side is delayed in phase by the time t with respect to the signal A + D on the preceding side.

  When the phase lag occurs in this way, the resolution of the reproduced RF signal, which is the sum signal of these signals, decreases, causing an increase in jitter at the time of demodulation and deterioration of the reproduced signal quality.

  The following patent document describes at least a pair of photodetectors for receiving reflected light from an optical disc in the direction of an information track of the optical disc in order to reduce the waveform distortion of a reproduction signal due to the frequency characteristics of the optical head. And a phase advance means for advancing the phase of the photodetector output at a high frequency is provided at one output stage of the pair of photodetectors, and the output of the phase advance means and the pair of photodetectors Adding the other output is disclosed.

JP 7-98938 A

  However, as described above, the phase difference can be changed in various ways depending on the type of optical disk device or optical disk, the playback speed, etc., so that the phase difference cannot be compensated for by advancing or delaying the phase in an analog manner by the phase advance means. The signal quality cannot be improved sufficiently.

  The present invention reliably compensates for a phase difference between a leading side signal and a trailing side signal that change variously depending on the type of an optical disk and the like, and suppresses a reduction in resolution of a reproduction sum signal, thereby improving reproduction signal quality. Is to provide.

  The present invention includes at least a light receiving unit that is divided into at least two in the track direction of the optical disk and photoelectrically converts reflected light from the optical disk by each of the divided elements and outputs a first reproduction RF signal and a second reproduction RF signal, respectively. First analog-to-digital conversion means for converting the first reproduction RF signal to a digital signal and outputting the first digital signal; and second for converting the second reproduction RF signal to a digital signal and outputting a second digital signal. An analog-to-digital converting means; an adding means for adding and outputting the first digital signal and the second digital signal; and a first clock for supplying a first clock signal for instructing conversion timing to the first analog-to-digital converting means. And a second clock supply for supplying a second clock signal for instructing the conversion timing to the second analog-digital converting means. And adjusting means for compensating for the phase difference between the first reproduction RF signal and the second reproduction RF signal by adjusting the phase difference between the first clock signal and the second clock signal. To do.

  According to the present invention, the phase difference between the first reproduction RF signal and the second reproduction RF signal is compensated by adjusting the phase difference between the two clock signals indicating the conversion timing in the analog / digital conversion means (A / D). can do. In the present invention, since the phase difference is compensated by adjusting the conversion timing, that is, the sampling timing, the phase difference between the first reproduction RF signal and the second reproduction RF signal varies variously according to the type and reproduction speed of the optical disk. However, it is possible to adaptively adjust the phase difference of the clock signal accordingly to suppress a reduction in the resolution of the reproduction sum signal, and to ensure the reproduction signal quality.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings.

  FIG. 1 shows a conceptual configuration of an optical disc apparatus according to the present embodiment. The optical disc apparatus is roughly divided into a recording system for recording data and a reproducing system for reproducing data recorded on the optical disc. Since the recording system is similar to a known configuration, only the reproducing system is shown. ing.

  The optical pickup 10 includes a light source and a lens for irradiating the optical disk with laser light, and a quadrant photodetector that photoelectrically converts reflected light from the optical disk and outputs it as an RF signal. At the time of data reproduction, a laser beam of reproduction power is emitted from the light source, and each detector of the four-divided photodetector receives the reflected light and outputs it as an RF signal. As shown in FIG. 4, the quadrant photodetector is composed of detectors A to D, the detectors A and D are arranged on the leading side, the detectors B and C are arranged on the trailing side, the signal A from the physic detector A, and the photodetector. A signal B is output from B, a signal C is output from the photodetector C, and a signal D is output from the photodetector D. The sum signal A + D of the signals A and D from the preceding photodetectors A and D is supplied to an analog-to-digital converter (A / D) 12, and the sum signal B + C of the signals B and C from the photodetectors B and C is analog. It is supplied to a digital converter (A / D) 14.

  Each of A / D 12 and A / D 14 converts an input analog signal into a digital signal. The timing of digital conversion, that is, the sampling timing is controlled by the first clock signal (first CLK) and the second clock signal (second CLK). That is, the A / D 12 converts the signal A + signal D into a digital signal based on the first CLK, and the A / D 14 converts the signal B + signal C into a digital signal based on the second CLK signal. The phase of the first CLK and the second CLK are shifted from each other, so that the sampling timings at the A / D 12 and A / D 14 are different. The phase difference between the first CLK and the second CLK is adjusted according to the phase difference between the signal A + signal D, which is the preceding signal, and the signal B + C, which is the succeeding signal. When the signal B + signal C that is the succeeding signal is delayed from the signal A + signal D that is the preceding signal, the phase of the second CLK is delayed from the phase of the first CLK by the delay. This compensates for a phase shift between the preceding signal and the succeeding signal. Both the digital signal A + signal D from the A / D 12 and the digital signal B + signal C from the A / D 14 are supplied to the adder 16.

  The adder 16 adds the two signals to generate a digital signal A + signal B + signal C + signal D. This signal is a sum signal of the signals from the four detectors of the four-divided photodetector and is supplied to the decoder as a reproduction signal.

  In the present embodiment, the phase difference between the preceding signal and the succeeding signal is compensated by adjusting the sampling timing at the A / D 12 and A / D 14, so that it depends on the type of the optical disk device or optical disk. Even if the phase difference changes variously, the phase difference between the first CLK and the second CLK can be adjusted adaptively to compensate for the phase difference between the preceding side and the following side with high accuracy.

  The first CLK and the second CLK may be generated by different clock signal generators, or may be generated by a single clock signal generator. The phase difference between the first CLK and the second CLK must be adjusted to be equal to the phase difference between the preceding and succeeding signals. Therefore, various clock signals whose phases are shifted as the second CLK with respect to the first CLK are generated and supplied to the A / D 14. Then, the reproduction signal quality such as jitter and error rate is monitored, and the clock signal having the phase with the best reproduction quality is selected as the second CLK. Of course, when the phase difference between the preceding and succeeding signals can be detected with high accuracy by some means in advance, the first CLK and the second CLK may be generated based on the phase difference information.

  Hereinafter, the configuration of the optical disc apparatus according to the present embodiment will be described in more detail.

  FIG. 2 shows a configuration block diagram of the present embodiment. The pit 6 formed on the track of the optical disk 5 is irradiated with the laser beam 100, and the reflected light is detected by the four-divided photodetector 10a of the optical pickup. The quadrant photodetector is composed of four detectors A to D. Detectors A and D are arranged on the leading side in the moving direction (arrow direction in the figure) of the optical disc 5, and detectors B and C are arranged on the following side in the moving direction. The signals from the detectors A and D are added and supplied as an RF1 signal to the amplifier 10b, and the signals from the detectors B and C are added and supplied as an RF2 signal to the amplifier 10b.

  The amplifier 10b amplifies both signals with a gain A and supplies them to a low-pass filter (LPF) and equalizers (EQ) 10c, 10d.

  The LPF / EQ 10c and the LPF / EQ 10d remove high frequency noise from the RF1 signal and the RF2 signal, respectively, or slightly boost a specific frequency band and supply them to the A / D 12 and A / D 14. The LPF / EQ 10c and the LPF / EQ 10d preferably have the same characteristics, and may have a simple LPF or a slight boost characteristic near the highest frequency.

  The A / D 12 and A / D 14 convert the RF1 signal and the RF2 signal into digital signals, respectively. The conversion timing in the A / D 12 is determined by the clock signal CLK1, and the RF1 signal is sampled and converted into a digital signal at the rising timing of CLK1. The conversion timing at the A / D 14 is determined by the clock signal CLK2, and the RF2 signal is sampled and converted into a digital signal at the rising timing of CLK2. CLK1 and CLK2 are generated by the phase variable frequency divider 26 and supplied to the A / D 12 and A / D 14. CLK1 and CLK2 are clock signals having a phase difference, and the phase difference between the RF1 signal and the RF2 signal is compensated by this phase difference. A / D 12 and A / D 14 supply the digital signal to adder 16.

  The adder 16 adds two digital signals to obtain a reproduction signal. The reproduction signal is gain-adjusted by an AGC (auto gain control circuit) 18 and then supplied to the decoder 20. The signal demodulated by the decoder 20 is supplied as reproduction data to a host device such as a personal computer and also supplied to the CPU 24 in order to evaluate the decoding quality such as jitter. The decoder 20 demodulates the digital signal (RF1 digital signal + RF2 digital signal) using the clock signal CLK3 supplied from the PLL 22. The PLL 22 includes a zero cross detector 22a that detects a zero cross point of the reproduction signal from the AGC 18, a phase comparator 22b, a charge pump 22c, a current-voltage converter (IV) 22d, a voltage controlled oscillator (VCO) 22e, and a 1 / N frequency divider. A clock signal synchronized with the phase of the input reproduction signal from the VCO 22e. The clock signal from the VCO 22e is supplied to the decoder 20 and to the phase variable frequency divider 26.

  The CPU 24 measures the error rate of the decode signal from the decoder 20 and supplies a control signal for reducing the error rate to the phase variable frequency divider 26.

  The phase variable frequency divider 26 divides the clock signal from the PLL 22 to generate clock signals having various phase differences. That is, the input clock signal is divided to generate CLK1, and a plurality of clock signals having different phases are sequentially generated with reference to the CLK1. These multiple clock signals are candidates for CLK2. The CPU 24 instructs the phase variable frequency divider 26 to sequentially change CLK2, searches for the phase of the clock signal that minimizes the jitter and error rate, and finally selects the phase of CLK2. The phase variable frequency divider 26 supplies the adder 16 with an addition clock signal. The addition clock signal is also generated based on the clock signal from the VCO 22e. In this embodiment, two types of signals corresponding to the phase of CLK2 are generated. The addition timing in the adder 16 is controlled by these two kinds of signals, and controls whether CLK2 is delayed or advanced with respect to CLK1.

  FIG. 3 shows a clock signal generated by the phase variable frequency divider 26. These are a clock signal group and an addition clock signal group in which the phase of CLK1 is variously changed with reference to the phase of CLK1. “VCO” is a signal output from the VCO 22 e of the PLL 22. The phase variable frequency divider 26 first generates a clock signal “CLK1” synchronized with the signal from the VCO 22e. In this embodiment, the transmission frequency of the VCO 22e of the PLL 22 is set to 8 times the channel clock (1T of the RF signal). This “CLK1” is supplied to the A / D 12.

  Next, using this “CLK1” as a reference, a plurality of clock signals having different phases are generated. “CLK2-PH-7” is a signal delayed in phase by one clock cycle of the VCO output signal with respect to “CLK1”, and “CLK2-PH-6” is 2 of the VCO output signal with respect to “CLK1”. The signal is delayed by one clock period with respect to the clock, that is, “CLK2-PH-7”, and “CLK2-PH-5” is delayed by three clock periods with respect to “CLK1”. “CLK2-PH-4” is a signal delayed in phase by 4 clock periods with respect to “CLK1”, and “CLK2-PH-3” is only 5 clock periods with respect to “CLK1”. The signal is delayed in phase, “CLK2-PH-2” is a signal delayed in phase by 6 clock cycles with respect to “CLK1”, and “CLK2-PH-1” is 7 with respect to “CLK1”. Clock lap Min a signal delayed by the signal "CLK2-PH0" are in phase signal between "CLK1" in signal delayed by 8 clock cycles for the "CLK1". “CLK2-PH1” is a signal having the same phase as “CLK2-PH-7”. Similarly, “CLK2-PH2” is in phase with “CLK2-PH-6” and “CLK2-PH3”. Is the same phase as “CLK2-PH-5”, “CLK2-PH4” is the same phase as “CLK2-PH-4”, “CLK2-PH5” is the same phase as “CLK2-PH-3”, “CLK2-PH6” "Is in phase with" CLK2-PH-2 "and" CLK2-PH7 "is in phase with" CLK2-PH-1 ". As described above, the phase variable frequency divider 26 generates 15 clock signals “CLK2-PH-7” to “CLK2-PH7”. The phase variable frequency divider 26 supplies any of these 15 clock signals to the A / D 14 as CLK2 based on a command from the CPU 24. For example, the phase variable frequency divider 26 sequentially supplies 15 types of clock signals to the A / D 14. The CPU 24 monitors the error rate in each clock signal and selects the clock signal with the lowest error rate.

  Here, for example, “CLK2-PH-4” and “CLK2-PH4” have the same phase, and the A / D 14 samples the RF2 signal at the same timing. Both the case where the phase of the RF2 signal is delayed with respect to the RF1 signal and the case where the phase of the RF2 signal is advanced can be covered by the clock signal in relation to the addition timing in the adder 16.

  That is, CLK2-PH-4 and CLK2-PH4 are exemplified. When CLK2-PH-4 is supplied to A / D14 as CLK2, the RF2 signal is converted to a digital signal at A / D14 at timing T1, and the timing is set. At T0, the RF1 signal is converted into a digital signal by A / D12, and the adder 16 adds at timing T3 based on the addition CLK1 synchronized with the VCO output signal. This adds the phase of the RF1 signal to the RF2 signal. This corresponds to a delay of 4 / 8T, that is, the phase of the RF2 signal is advanced by 4 / 8T with respect to the RF1 signal. On the other hand, when CLK2-PH4 is supplied to A / D14 as CLK2, the RF1 signal is converted to a digital signal at A / D12 at timing T0, the RF2 signal is converted to a digital signal at A / D14 at timing T2, The adder 16 adds at timing T4 based on CLK2 for addition, which corresponds to delaying the phase of the RF2 signal by 4 / 8T with respect to the RF1 signal. The phase variable frequency divider 26 supplies CLK1 for addition to the adder 16 in the case of CLK2-PH-7 to CLK2-PH-1, and CLK2 for addition in the case of CLK2-PH0 to CLK2-PH7. Is supplied to the adder 16. The addition CLK2 is generated by delaying the addition CLK1 by 4 clock cycles. From the above, the phase difference between the RF1 signal and the RF2 signal can be determined in correspondence with any phase difference (including not only when the phase is delayed but also when the phase is advanced) with respect to the RF1 signal. Can be compensated.

  Here, in general, there is almost no phase shift when the optical disc is a CD / DVD-R, the phase of the trailing signal is delayed in the CD / DVD-ROM, and the trailing signal is delayed in the CD / DVD-RW. Since the phase tends to advance, the adjustment of CLK2 is not performed when the optical disc type is the R system, only the advance of the phase of CLK2 is performed in the ROM system, and only the adjustment of delaying the phase of CLK2 can be performed in the RW system. . Thereby, adjustment time can be shortened.

  A specific processing algorithm is as follows. First, when an optical disk is mounted on an optical disk device, prior to data reproduction, data is reproduced by seeking the optical pickup at a part of the optical disk where RF data already exists to obtain an RF1 signal and an RF2 signal. Then, the phase of the CLK2 and the addition timing at the adder 26 are changed by the phase CPU 24 and the phase variable frequency divider 26. There are 15 phases of CLK2 and 2 types of CLK for addition. If the phase of CLK2 is determined, the phase of CLK for addition is also determined accordingly. At each CLK 2, the CPU 24 evaluates the reproduced signal output from the adder 26, the error rate of the signal demodulated by the decoder 20, and the reproduced signal such as PRSNR and SbER if PRML processing is performed. Select a good CLK2 phase. After CLK2 is optimized by the above processing, data is reproduced from the optical disc.

  Alternatively, in the manufacturing process of the optical disk device, the reproduction signal quality is evaluated with the above algorithm for various optical disks and various rotation speeds, and the optimum phase and addition timing of CLK2 are learned to store the nonvolatile signal in the optical disk device. May be stored in the memory 30. When the optical disk is loaded, the CPU 24 reads the type of the optical disk from the disk information recorded in the lead-in area, and reads and sets the phase and addition timing of CLK2 according to the reproduction speed from the nonvolatile memory 30. The phase of CLK2 stored in the non-volatile memory 30 is defined as a two-dimensional map for each type of optical disc and each reproduction speed, but may be simply a one-dimensional map for each type of optical disc. In this case, the CPU 24 adjusts the phase of CLK2 for each type of optical disk regardless of the reproduction speed. However, as described above, the phase difference between the RF1 signal and the RF2 signal can change depending on the reproduction speed in addition to the type of the optical disk, and therefore it is preferable to adjust the phase difference in consideration of the reproduction speed.

  As mentioned above, although embodiment of this invention was described, this invention is not restricted to this, Other forms are possible. For example, in this embodiment, the VCO output of the PLL 22 is eight times the channel clock, but the phase difference adjustment accuracy can be improved by making the VCO output higher.

  In the present embodiment, the quadrant photodetector 10a is used. However, it may be divided into two or more in the front-rear direction with respect to the pit progression direction, and may be divided into two or six instead of four.

It is a conceptual lineblock diagram of an embodiment. It is a configuration block diagram of an embodiment. It is a timing chart which shows the phase of CLK2 and CLK for addition. It is generation | occurrence | production explanatory drawing of the conventional reproduction | regeneration RF signal. It is phase difference explanatory drawing of a preceding side signal and a succeeding side signal.

Explanation of symbols

  5 optical disc, 6 pits, 10 optical pickup, 10a quadrant photo detector, 12, 14 A / D, 16 adder, 20 decoder, 22 PLL (phase locked loop), 24 CPU, 26 phase variable frequency divider.

Claims (7)

Light receiving means that is divided into at least two in the track direction of the optical disk, and photoelectrically converts the reflected light from the optical disk by each of the divided elements and outputs a first reproduction RF signal and a second reproduction RF signal, respectively;
First analog-to-digital conversion means for converting the first reproduction RF signal into a digital signal and outputting the first digital signal;
Second analog-to-digital conversion means for converting the second reproduction RF signal into a digital signal and outputting a second digital signal;
Adding means for adding and outputting the first digital signal and the second digital signal;
First clock supply means for supplying a first clock signal for instructing conversion timing to the first analog-digital conversion means;
Second clock supply means for supplying a second clock signal for instructing conversion timing to the second analog-digital conversion means;
Adjusting means for compensating a phase difference between the first reproduction RF signal and the second reproduction RF signal by adjusting a phase difference between the first clock signal and the second clock signal;
An optical disc apparatus comprising: The apparatus of claim 1, further comprising:
Third clock supply means for supplying a third clock signal for instructing addition timing to the addition means;
And the adjusting means adjusts the phase difference between the first clock signal and the second clock signal and adjusts the phase of the third clock signal. The apparatus of claim 1.
The second clock supply means supplies a plurality of clock signals having different phase differences with respect to the first clock signal as the second clock signal,
The adjusting means detects the reproduction signal quality obtained when each of the plurality of clock signals is supplied, and selects the clock signal having the best detected reproduction signal quality, thereby selecting the first clock signal and the second clock signal. An optical disc apparatus for adjusting a phase difference of a clock signal. The apparatus of claim 3.
The second clock supply means supplies a clock signal having a phase delayed from the first clock signal and a clock signal having a phase advanced from the first clock signal as a plurality of clock signals having different phase differences from each other. An optical disc apparatus characterized by the above. The apparatus of claim 2, further comprising:
A PLL circuit for generating a clock signal synchronized with the signal from the adding means;
The first clock supply means, the second clock supply means, and the third clock supply means are all synchronized with the clock signal from the PLL circuit, and the first clock signal and the second clock signal And an optical disc apparatus for generating the third clock signal. The apparatus of claim 1, further comprising:
Disc information acquisition means for reading the type of optical disc;
Storage means for storing in advance an optimum phase difference of the second clock signal with respect to the first clock signal for each type of optical disc;
And the adjusting means reads from the storage means an optimum phase difference according to the type of the optical disk read by the disk information acquiring means, and adjusts the phase of the second clock signal. apparatus. The apparatus of claim 6.
The storage means stores in advance an optimum phase difference of the second clock signal with respect to the first clock signal for each type of optical disk and for each reproduction speed,
The adjustment means reads out the optimum phase difference according to the type of optical disk read by the disk information acquisition means and the reproduction speed at the time of data reproduction from the storage means, and adjusts the phase of the second clock signal. An optical disc apparatus characterized by the above.

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