JP2007114288A - Display device and method of driving same - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To enable a display device which writes a current signal as a video signal to perform excellent display with pixels in a row selected first in an effective scanning period without depending upon a scanning direction. <P>SOLUTION: The display device in which each pixel PX includes a driving circuit and a display element OLED performs a writing operation wherein a video signal is written to the driving circuit in each selection period while a current source CS1 and the driving circuit are connected through a video signal line DL, performs a display operation wherein a driving current is supplied to the display element OLED in each non-selection period while the driving circuit and a pixel electrode are connected, and performs a precharging operation wherein a precharging signal is written to the video signal line DL in a blanking period while a current source CS2 and the video signal line DL are connected. The precharging signal is made larger when the scanning direction of a scanning signal line SL1 approaches the connection position between the video signal line DL and current source CS2 than when the scanning direction moves away from the connection position. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a display device and a driving method thereof, and more particularly to an active matrix display device that supplies a current signal as a video signal to a pixel and a driving method thereof.

  Patent Document 1 describes an active matrix organic EL display device that employs a current copy type circuit as a pixel circuit. In this display device, a current signal is supplied to each pixel as a video signal, and the organic EL element emits light with a luminance corresponding to the magnitude of the video signal.

  When driving this display device, the effective scanning period and the blanking period (vertical blanking period) are normally repeated alternately. In the effective scanning period, for example, pixels are sequentially selected for each row, and a video signal is written to the selected pixels. The organic EL element of each pixel should emit light at a luminance corresponding to the magnitude of the previous video signal during the non-selected period and blanking period of the effective scanning period. However, in practice, the reproducibility of gradation may be insufficient for the pixels in the first row selected in the effective scanning period.

The inventor has found that this problem occurs for the following reasons.
For example, when raster display is performed, the potential of the video signal line is between the end of writing of the video signal to the pixel of the first selected row and the end of writing of the video signal to the last selected row. It is almost constant. Therefore, these pixels emit light with substantially equal brightness.

  However, normally, the potential of the video signal line immediately after the blanking period is greatly different from the previous potential. Therefore, when a small video signal is written in the pixels included in the first selected row, the video signal is likely to be insufficiently written. As a result, the above-described luminance unevenness occurs.

By the way, the organic EL display device may be mounted on a plurality of devices having different designs. There are various types of use of organic EL display devices in these devices. For example, in some devices, the scanning direction is a direction away from the video signal line driver (hereinafter referred to as a forward direction), and in other devices, the scanning direction is a direction closer to the video signal line driver (hereinafter referred to as a reverse direction). is there. Even if the same device is used under certain conditions, the scanning direction may be the forward direction, and when used under other conditions, the scanning direction may be the reverse direction. is there.
US Pat. No. 6,373,454

  SUMMARY OF THE INVENTION An object of the present invention is to enable a display device that writes a current signal as a video signal to a pixel to perform good display with pixels in a row selected first in an effective scanning period without depending on the scanning direction. is there.

  According to a first aspect of the present invention, a video signal line, a plurality of scanning signal lines crossing the video signal line, a first current source that outputs a video signal, and a second current source that outputs a precharge signal, A drive circuit arranged corresponding to an intersection of the video signal line and the plurality of scanning signal lines, connected to the first power supply terminal and outputting a drive current having a magnitude corresponding to the input signal, and a pixel A plurality of pixels each including a display element including an electrode, a counter electrode connected to the second power supply terminal, and an active layer interposed therebetween, and in each selection period, the video signal line The first current source and the drive circuit are connected via a write operation to write the video signal as the input signal to the drive circuit, and in each non-selection period, the drive circuit and the pixel electrode Connect the drive current to the display Performing a display operation to flow to a child, performing a precharge operation of connecting the second current source and the video signal line and writing the precharge signal to the video signal line in a blanking period, and the plurality of scanning signals When the scanning direction of the line is a direction approaching a connection position between the video signal line and the second current source, the precharge signal is compared with a case where the scanning direction is a direction away from the connection position. A display device is provided that is characterized by having a larger value.

  According to a second aspect of the present invention, a video signal line, a plurality of scanning signal lines crossing the video signal line, a first current source that outputs a video signal, and a second current source that outputs a precharge signal, A drive circuit arranged corresponding to an intersection of the video signal line and the plurality of scanning signal lines, connected to the first power supply terminal and outputting a drive current having a magnitude corresponding to the input signal, and a pixel A display device driving method comprising: a plurality of pixels each including a display element including an electrode, a counter electrode connected to a second power supply terminal, and an active layer interposed therebetween, In the selection period, the first current source and the drive circuit are connected via the video signal line, and a writing operation for writing the video signal as the input signal to the drive circuit is performed. In each non-selection period, The drive circuit is connected to the pixel electrode. And performing a display operation of flowing the drive current to the display element, and connecting the second current source and the video signal line to write the precharge signal to the video signal line during a blanking period. When the scanning direction of the plurality of scanning signal lines is a direction approaching a connection position between the video signal line and the second current source, the scanning direction is a direction away from the connection position. In comparison, there is provided a driving method characterized in that the precharge signal is made larger.

  According to the present invention, a display device that writes a current signal as a video signal to a pixel can perform good display with pixels in a row selected first in an effective scanning period without depending on the scanning direction.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. In addition, in each figure, the same referential mark is attached | subjected to the component which exhibits the same or similar function, and the overlapping description is abbreviate | omitted.

  FIG. 1 is a plan view schematically showing a display device according to a first aspect of the present invention. FIG. 2 is a partial cross-sectional view schematically showing an example of a structure that can be employed in the display device of FIG. FIG. 3 is an equivalent circuit diagram showing a part of the display device of FIG. In FIG. 2, the display device is drawn such that its display surface, that is, the front surface or the light emitting surface faces downward, and the back surface faces upward.

  This display device is a bottom emission type organic EL display device adopting an active matrix driving method. This display device can switch the scanning direction between a forward direction and a reverse direction.

  The organic EL display device of FIG. 1 includes a display panel DP, a video signal line driver XDR, a scanning signal line driver YDR, and a controller (not shown).

The display panel DP includes, for example, an insulating substrate SUB such as a glass substrate. On the substrate SUB, as shown in FIG. 2, for example, a SiN _x layer and a SiO _x layer are sequentially stacked as the undercoat layer UC.

  On the undercoat layer UC, for example, a semiconductor layer SC which is a polysilicon layer in which a channel and a source / drain are formed, a gate insulating film GI which can be formed using, for example, TEOS (tetraethyl orthosilicate), and a MoW, for example, The gates G are sequentially stacked, and they constitute a top gate type thin film transistor. In this example, these thin film transistors are p-channel thin film transistors, and are used as the drive control element DR and the switches SWa to SWc shown in FIGS.

  On the gate insulating film GI, one electrode of the capacitor C shown in FIGS. 1 and 3 and the scanning signal lines SL1 and SL2 are further arranged. These can be formed in the same process as the gate G.

  As shown in FIG. 1, the scanning signal lines SL1 and SL2 each extend in the row direction (X direction) of the pixels PX, and are alternately arranged in the column direction (Y direction) of the pixels PX. These scanning signal lines SL1 and SL2 are connected to the scanning signal line driver YDR.

The gate insulating film GI, the gate G, the scanning signal lines SL1 and SL2, and one electrode of the capacitor C are covered with an interlayer insulating film II shown in FIG. The interlayer insulating film II is made of, for example, SiO _x formed by a plasma CVD method or the like. A part of the interlayer insulating film II is used as a dielectric layer of the capacitor C.

  On the interlayer insulating film II, the other electrode of the capacitor C shown in FIG. 1, the source electrode SE and the drain electrode DE shown in FIG. 2, and the video signal line DL and the power supply line PSL shown in FIG. 1 are arranged. . These can be formed in the same process and have, for example, a three-layer structure of Mo / Al / Mo.

  The source electrode SE and drain electrode DE are electrically connected to the source and drain of the thin film transistor through contact holes provided in the interlayer insulating film II.

As shown in FIG. 1, each video signal line DL extends in the Y direction and is arranged in the X direction. These video signal lines DL are connected to a video signal line driver XDR.
In this example, the power supply lines PSL extend in the Y direction and are arranged in the X direction.

The other electrode of the source electrode SE, the drain electrode DE, the video signal line DL, the power supply line PSL, and the capacitor C is covered with the passivation film PS shown in FIG. The passivation film PS is made of, for example, SiN _x .

  On the passivation film PS, as shown in FIG. 2, light-transmitting first electrodes PE are juxtaposed apart from each other as a front electrode. Each first electrode PE is a pixel electrode, and is connected to the drain electrode DE of the switch SWa through a through hole provided in the passivation film PS.

  The first electrode PE is an anode in this example. As a material of the first electrode PE, for example, a transparent conductive oxide such as ITO (indium tin oxide) can be used.

  A partition insulating layer PI shown in FIG. 2 is further disposed on the passivation film PS. In the partition insulating layer PI, a through hole is provided at a position corresponding to the first electrode PE, or a slit is provided at a position corresponding to a column or row formed by the first electrode PE. Here, as an example, the partition insulating layer PI is provided with a through hole at a position corresponding to the first electrode PE.

  The partition insulating layer PI is, for example, an organic insulating layer. The partition insulating layer PI can be formed using, for example, a photolithography technique.

  On the first electrode PE, an organic layer ORG including a light emitting layer is disposed as an active layer. The light emitting layer is, for example, a thin film containing a luminescent organic compound whose emission color is red, green, or blue. The organic layer ORG may further include a hole injection layer, a hole injection layer, a hole blocking layer, an electron transport layer, an electron injection layer, and the like in addition to the light emitting layer.

  The partition insulating layer PI and the organic layer ORG are covered with a second electrode CE as a counter electrode disposed to face the first electrode. The second electrode CE is a common electrode connected to each other between the pixels PX, and is a light-reflective cathode provided as a back electrode in this example. For example, the second electrode CE is electrically connected to an electrode wiring (not shown) formed on the same layer as the video signal line DL through a contact hole provided in the passivation film PS and the partition insulating layer PI. It is connected to the. Each organic EL element OLED includes a first electrode PE, an organic layer ORG, and a second electrode CE.

  On the insulating substrate SUB, a plurality of pixels PX are arranged in a matrix. These pixels PX are disposed in the vicinity of the intersection between the video signal line DL and the scanning signal line SL1.

  Each pixel PX includes an organic EL element OLED that is a display element, a drive circuit, and an output control switch SWa. In this example, the drive circuit includes a drive control element DR, a video signal supply control switch SWb, a diode connection switch SWc, and a capacitor C as shown in FIGS. As described above, in this example, the drive control element DR and the switches SWa to SWc are p-channel thin film transistors. The switches SWb and SWc switch the connection between the drain and gate of the drive control element DR and the video signal line DL between a first state in which they are connected to each other and a second state in which they are disconnected from each other. A switch group is configured.

  The drive control element DR, the output control switch SWa, and the organic EL element OLED are connected in series in this order between the first power supply terminal ND1 and the second power supply terminal ND2. In this example, the first power supply terminal ND1 is a high potential power supply terminal connected to the power supply line PSL, and the second power supply terminal ND2 is a low potential power supply terminal.

  The gate of the output control switch SWa is connected to the scanning signal line SL1. The video signal supply control switch SWb is connected between the video signal line DL and the drain of the drive control element DR, and its gate is connected to the scanning signal line SL2. The diode connection switch SWc is connected between the drain and gate of the drive control element DR, and the gate is connected to the scanning signal line SL2.

  The capacitor C is connected between the constant potential terminal and the gate of the drive control element DR. In this example, the capacitor C is connected between the first power supply terminal ND1 and the gate of the drive control element DR.

A video signal line driver XDR is arranged on the display panel DP. As shown in FIG. 3, the video signal line driver XDR includes current sources CS1 and CS2 and switches SW _cs and SW _vs for each video signal line DL. Further, the video signal line driver XDR includes a multiplexer MLT, a voltage source VS, a reference transistor TR _ref, and control lines CL1 and CL2.

  The multiplexer MLT includes input terminals to which a clock signal CLK, a start signal DATA, and a video signal DATA as a serial signal are input. Furthermore, the multiplexer MLT includes a plurality of output terminals for each current source CS1. The multiplexer MLT converts the video signal DATA as a serial signal into a parallel signal based on the clock signal CLK and the start signal DATA, and outputs this to each current source CS1. In this example, the multiplexer MLT outputs the video signal as a 6-bit digital signal to each current source CS1.

The reference transistor TR _ref is a p-channel field effect transistor in this example. The source of the reference transistor TR _ref is connected to the constant potential terminal ND1 ′ via the resistance element R, and the drain thereof is connected to the ground line. When the display device is driven, a reference current I _{ref is} passed between the source and drain of the reference transistor TR _ref .

  The current source CS1 is connected between the output terminal of the video signal line driver XDR, that is, the terminal connected to the video signal line DL, and the ground line. The current source CS1 converts the digital signal output as a parallel signal by the multiplexer MLT into an analog signal. In this example, the current source CS1 generates an analog video signal as a current signal from the 6-bit digital video signal output from the multiplexer MLT.

The current source CS1 includes a plurality of constant current sources TR _dgt and a plurality of switches SW _dgt . The constant current source TR _dgt and the switch SW _dgt are connected in series between the output terminal of the video signal line driver XDR and the ground line, respectively. In this example, the current source CS1 includes six constant current sources TR _dgt and six switches SW _dgt . In this example, the constant current source TR _dgt and the switch SW _dgt are p-channel field effect transistors.

The gates of the constant current sources TR _dgt are respectively connected to the gates of the reference transistors TR _ref . Each gate of the switch SW _dgt is connected to the output terminal of the multiplexer MLT.

For example, the constant current source TR _dgt has the same structure as the reference transistor TR _ref except that one of them has the same structure as the reference transistor TR _ref and the remaining five have different channel widths. Yes. The six constant current sources TR _dgt are, for example, 1 times, 2 times, 4 times, 8 times, 16 times, 32 times larger than the reference current I _ref while the switch SW _dgt connected to them is closed. Each constant current is output.

The switch SW _cs and the current source CS2 are connected in series in this order between the output terminal of the video signal line driver XDR and the ground line.

The current source CS2 is a constant current source that outputs a precharge current or a precharge signal as a current signal. The gate of the current source CS2 is connected to the gate of the reference transistor TR _ref .

The switch SW _cs is a p-channel field effect transistor in this example. The gate of the switch SW _cs is connected to the control line CL1. A control signal PRC described later is input to the control line CL1.

The switch SW _vs and the voltage source VS are connected in series in this order between the output terminal of the video signal line driver XDR and the ground line.

  The voltage source VS outputs a constant voltage as a reset signal. For example, the voltage source VS is a constant voltage that is substantially equal to or higher than the voltage of the video signal line DL to be set by the writing operation when the video signal has the lowest gradation.

The switch SW _vs is a p-channel field effect transistor in this example. The gate of the switch SW _vs is connected to the control line CL2. For example, a control signal BLK whose signal level changes substantially corresponding to switching between a blanking period and an effective scanning period is input to the control line CL2.

  A scanning signal line driver YDR is further arranged on the display panel DP. As described above, the scanning signal lines SL1 and SL2 are connected to the scanning signal line driver YDR.

  A controller (not shown) is connected to the video signal line driver XDR and the scanning signal line driver YDR.

The controller outputs a control signal such as a clock signal CLK and a start signal DATA to the video signal line driver XDR and also outputs a video signal DATA as a serial signal. Further, the controller outputs a control signal such as a clock signal and a control signal to the scanning signal line driver YDR. The control in the scanning direction can be performed by a controller, for example.

This organic EL display device is driven by the following method, for example.
FIG. 4 is a timing chart schematically showing an example of a driving method of the display device shown in FIGS. FIG. 4 illustrates a driving method in the case where the pixel PX forms M rows, where the horizontal axis indicates time and the vertical axis indicates potential.

In FIG. 4, among the “XDR output”, a period expressed as “I _sig m” indicates a period during which the video signal line driver XDR outputs the video signal I _sig m to the video signal line DL, and is expressed as “V _rst ”. The period during which the video signal line driver XDR outputs the reset signal V _rst to the video signal line DL is shown. During the period indicated as “I _prc ”, the video signal line driver XDR _{applies the} precharge current I _prc to the video signal line DL. Is shown. In FIG. 4, the waveforms indicated by “SL1 potential” and “SL2 potential” indicate the potentials of the scanning signal lines SL1 and SL2, respectively. The waveforms indicated by “CL1 potential” and “CL2 potential” are the control lines CL1 and CL2. Each potential is shown. Note that “m” in the “m-th row” is a number assigned in order from the row closest to the video signal line driver XDR.

In this driving method, the scanning direction is the forward direction, and the effective scanning period and the blanking period are alternately repeated. In the effective scanning period, the switches SW _vs and SW _cs are kept open, and the pixel PX is selected for each row. The writing operation is performed in the selection period of each pixel PX, and the display operation is performed in the non-selection period.

  For example, in the period in which the m-th row pixel is selected (hereinafter referred to as the m-th row selection period), first, the switch SWa of the m-th row pixel PX is opened. Next, a 6-bit digital video signal is output from the multiplexer MLT to each current source CS1, and the switches SWb and SWc of the pixels PX in the m-th row are closed.

The current source CS1 converts the digital video signal into a write current I _sig m as an analog video signal. The write current I _sig m flows from the first power supply terminal ND1 to the current source CS1. Thus, the gate potential of the drive control element DR is set to a value when the write current I _sig m flows between the source and drain of the drive control element DR.

  Thereafter, the switches SWb and SWc are opened. Further, the m-th row selection period is ended by closing the switch SWa.

When the switch SWa is closed, a drive current I _drv m having a magnitude corresponding to the write current I _sig m flows through the organic EL element OLED. In the non-selection period, the switch SWa remains closed. Therefore, the organic EL element OLED of each pixel PX continues to emit light with a luminance corresponding to the magnitude of the drive current I _drv m until the pixel PX is next selected.

  In the blanking period, the following reset operation and precharge operation are sequentially performed. In the blanking period, the switches SWb and SWc are kept open for all the pixels PX.

That is, first, all the switches SW _dgt are opened. Next, the switch SW _vs is closed, and a reset signal is output from the voltage source VS to the video signal line DL. That is, the potential of the video signal line DL is set to the reset potential _Vrst . Thereafter, the switch SW _vs is opened. This completes the reset operation.

Next, a precharge operation for writing a precharge signal to the video signal line DL is performed. That is, the switch SW _cs is closed for a predetermined time T, and a precharge current I _prc that is a constant current is supplied from the video signal line DL to the current source CS2. By this precharge operation, the potential of the video signal line DL is _lowered from the reset potential V _rst by a magnitude corresponding to the product I _prc × T of the current I _prc and time T.

By the way, if the video signal line driver XDR of this display device does not include the voltage source VS, the current source CS2, and the switches SW _vs and SW _cs , it is considered that the video signal line DL is in a floating state in the blanking period. be able to. However, in actuality, due to a leak current flowing in a protection circuit (not shown) connected to the video signal line DL, the video signal line DL is switched between the start and end of the blanking period. Potential may fluctuate. For example, the potential of the video signal line DL at the end of the blanking period may be lower than the lowest value of the potential of the video signal line DL to be set by the writing operation.

In this case, in order to display the gradation in the low gradation region by the pixel PX in the first row, the potential of the video signal line DL must be significantly increased by the writing operation in the first row selection period. However, since the write current I _sig 1 when displaying the gradation in the low gradation region is small, it is difficult to sufficiently change the potential of the video signal line DL within the first row selection period. Therefore, in the pixel PX in the first row, the gate potential of the drive control element DR cannot be accurately set to a value corresponding to the write current I _sig 1, and each gradation in the low gradation region is displayed with high reproducibility. Is difficult.

On the other hand, when the reset operation described with reference to FIGS. 1 to 4 is performed in the blanking period, the potential of the video signal line DL can be made substantially equal to the reset potential V _rst . Then, by performing a precharge operation subsequent to the reset operation, the potential of the video signal line DL immediately before starting the writing operation to the pixel PX in the first row is set to the potential V _rst − (I _prt × t) / Can be approximately equal to _CDL . Note that C _DL is the wiring capacitance of the video signal line DL.

Therefore, by appropriately setting the precharge current I _prc and the time T, the potential fluctuation amount of the video signal line DL necessary for displaying the gradation in the low gradation region by the pixel PX in the first row is remarkably reduced. can do. Therefore, each gradation in the low gradation region can be displayed with high reproducibility by the pixel PX in the row selected first in the effective scanning period.

  When the scanning direction is the forward direction, driving in the above-described method displays each gradation in the low gradation area with high reproducibility by the pixel PX in the row selected first in the effective scanning period. be able to. However, if the scanning direction is the reverse direction under the same conditions, there is a possibility that the gradations in the low gradation region cannot be displayed with high reproducibility by the pixels PX in the row selected first in the effective scanning period. There is. This is because a portion of the video signal line DL far from the video signal line driver XDR has a higher potential immediately after completion of the precharge operation than a portion near the video signal line driver XDR. Therefore, in this aspect, when the scanning direction is the reverse direction, for example, the following driving method is employed.

  FIG. 5 is a timing chart schematically showing another example of a method for driving the display device shown in FIGS. FIG. 5 illustrates a driving method in the case where the pixel PX forms M rows, where the horizontal axis indicates time and the vertical axis indicates potential.

In FIG. 5, among the “XDR output”, a period expressed as “I _sig m” indicates a period during which the video signal line driver XDR outputs the video signal I _sig m to the video signal line DL, and is expressed as “V _rst ”. The period during which the video signal line driver XDR outputs the reset signal V _rst to the video signal line DL is shown. During the period indicated as “I _prc ”, the video signal line driver XDR _{applies the} precharge current I _prc to the video signal line DL. Is shown. In FIG. 5, the waveforms indicated by “SL1 potential” and “SL2 potential” indicate the potentials of the scanning signal lines SL1 and SL2, respectively. The waveforms indicated by “CL1 potential” and “CL2 potential” are the control lines CL1 and CL2. Each potential is shown. Note that “m” in the “m-th row” is a number assigned in order from the row closest to the video signal line driver XDR.

  This driving method is the same as the driving method described with reference to FIG. 4 except that the scanning direction is reversed and the time T is longer. When the time T is made longer, the potential of the video signal line DL immediately after the completion of the precharge operation is lowered. Therefore, if the time T is appropriately set, each gradation in the low gradation region can be displayed with high reproducibility by the pixel PX in the row selected first in the effective scanning period.

  As described above, according to this aspect, the gradation in the low gradation region is increased in the pixel PX of the row selected first in the effective scanning period in both the forward direction and the backward direction. It can be displayed with reproducibility. In other words, according to this aspect, it is possible to perform good display with the pixels in the row selected first in the effective scanning period without depending on the scanning direction.

Next, the second aspect of the present invention will be described.
FIG. 6 is an equivalent circuit diagram showing a part of the display device according to the second aspect of the present invention. In the second mode, the structure shown in FIG. 6 is adopted for the video signal line driver XDR and a driving method described later is adopted. Other than this, the second mode is substantially the same as the first mode.

The video signal line driver XDR in FIG. 6 differs from the video signal line driver XDR in FIG. 3 in the following points. That is, the video signal line driver XDR in Figure 6, instead of the current source CS2 and the switch SW _cs, includes a current source CS2F and CS2R and switch SW _cs F and SW _cs R. The current sources CS2F and CS2R constitute a current source that outputs first and second precharge currents having different sizes. The video signal line driver XDR in FIG. 6 includes control lines CL1F and CL1R instead of the control line CL1.

The switch SW _cs F and the current source CS2F are connected in series in this order between the output terminal of the video signal line driver XDR and the ground line.

The current source CS2F is a constant current source that outputs the first precharge current or the first precharge signal as a current signal. The gate of the current source CS2F is connected to the gate of the reference transistor TR _ref .

The switch SW _cs F is a p-channel field effect transistor in this example. The gate of the switch SW _cs F is connected to the control line CL1F. A control signal PRC1 described later is input to the control line CL1F.

The switch SW _cs R and the current source CS2R are connected in series in this order between the output terminal of the video signal line driver XDR and the ground line.

The current source CS2R is a constant current source that outputs the second precharge current or the second precharge signal as a current signal. This current source CS2R outputs a larger constant current compared to the current source CS2F. The gate of the current source CS2R is connected to the gate of the reference transistor TR _ref .

The switch SW _cs R is a p-channel field effect transistor in this example. The gate of the switch SW _cs R is connected to the control line CL1R. A control signal PRC2 described later is input to the control line CL1R.

The display device according to the second aspect is driven by the following method, for example.
FIG. 7 is a timing chart schematically showing an example of the driving method of the display device according to the second aspect of the present invention. FIG. 8 is a timing chart schematically showing another example of the display device driving method according to the second aspect of the present invention. 7 and 8 illustrate a driving method in the case where the pixel PX forms M rows, the horizontal axis indicates time, and the vertical axis indicates potential.

7 and 8, of the "XDR output", the period indicated as "I _sig m" indicates a period in which the video signal line driver XDR outputs a video signal I _sig m to the video signal lines DL, "V _rst "Indicates a period in which the video signal line driver XDR outputs the reset signal V _rst to the video signal line DL, and a period indicated by" I _prc1 "indicates that the video signal line driver XDR is first connected to the video signal line DL. A period during which the precharge current I _prc1 is output is shown, and a period denoted as “I _prc2 ” indicates a period during which the video signal line driver XDR outputs the second precharge current I _prc2 to the video signal line DL. 7 and 8, waveforms indicated by “SL1 potential” and “SL2 potential” indicate potentials of the scanning signal lines SL1 and SL2, respectively, and waveforms indicated by “CL1F potential” and “CL1R potential” are control lines CL1F. And the waveform indicated by “CL2 potential” indicate the potential of the control line CL2. Note that “m” in the “m-th row” is a number assigned in order from the row closest to the video signal line driver XDR.

In the driving method of FIG. 7, the scanning direction is the forward direction. This driving method is the same as the driving method described with reference to FIG. 4 except for the following points. That is, in the driving method of FIG. 7, the switching operation of the switch SW _cs F is performed at the same timing as the switching operation of the switch SW _cs described with reference to FIG. In the driving method of FIG. 7, the switch SW _cs R is kept open in both the effective scanning period and the blanking period.

In the driving method of FIG. 8, the scanning direction is the reverse direction. This driving method is the same as the driving method described with reference to FIG. 4 except for the following points. That is, in the driving method of FIG. 8, the switching operation of the switch SW _cs R is performed at the same timing as the switching operation of the switch SW _cs described with reference to FIG. In the driving method of FIG. 8, the switch SW _cs F is kept open in both the effective scanning period and the blanking period.

In this embodiment, the time T1 when the switch SW _cs F is closed when the scanning direction is the forward direction and the time T2 when the switch SW _cs R is closed when the scanning direction is the reverse direction are the same. Then, the second precharge current I _prc2 that flows from the video signal line DL to the current source CS2 when the scanning direction is the reverse direction, and the video signal line DL to the current source CS2 when the scanning direction is the forward direction. It is made larger than the first precharge current I _prc1 that flows. That is, as in the first aspect, the precharge signal when the scanning direction is the reverse direction is made larger than the precharge signal when the scanning direction is the forward direction. Therefore, if the precharge currents I _prc1 and I _prc2 are appropriately set, each gradation in the low gradation region can be displayed with high reproducibility by the pixel PX in the row selected first in the effective scanning period.

  As described above, according to this aspect, the gradation in the low gradation region is increased in the pixel PX of the row selected first in the effective scanning period in both the forward direction and the backward direction. It can be displayed with reproducibility. In other words, according to this aspect, it is possible to perform good display with the pixels in the row selected first in the effective scanning period without depending on the scanning direction.

  In this embodiment, time T1 may be different from time T2. For example, the time T2 may be longer than the time T1. That is, the technique according to the second aspect can be combined with the technique according to the first aspect.

  In the first and second embodiments, the structure of FIGS. 1, 3 and 6 is employed for the pixel PX, but other structures may be employed for the pixel PX. For example, the diode connection switch SWc may be connected between the gate of the drive control element DR and the video signal line DL instead of being connected between the drain and gate of the drive control element DR. Alternatively, the video signal supply control switch SWb may be connected between the gate of the drive control element DR and the video signal line DL instead of being connected between the drain of the drive control element DR and the video signal line DL. .

1 is a plan view schematically showing a display device according to a first aspect of the present invention. FIG. 2 is a partial cross-sectional view schematically showing an example of a structure that can be employed in the display device of FIG. 1. FIG. 2 is an equivalent circuit diagram illustrating a part of the display device of FIG. 1. 4 is a timing chart schematically showing an example of a method for driving the display device shown in FIGS. 4 is a timing chart schematically showing another example of a method for driving the display device shown in FIGS. The equivalent circuit diagram which shows a part of display apparatus which concerns on the 2nd aspect of this invention. 9 is a timing chart schematically showing an example of a method for driving a display device according to a second aspect of the present invention. 6 is a timing chart schematically showing another example of the method for driving the display device according to the second aspect of the present invention.

Explanation of symbols

C ... capacitor, CE ... counter electrode, CL1 ... control line, CL1F ... control line, CL1R ... control line, CL2 ... control line, CS1 ... current source, CS2 ... current source, CS2F ... current source, CS2R ... current source, DE ... Drain electrode, DL ... Video signal line, DP ... Display panel, DR ... Drive control element, G ... Gate, GI ... Gate insulating film, II ... Interlayer insulating film, MLT ... Multiplexer, ND1 ... Power supply terminal, ND1 '... Constant Potential terminal, ND2 ... Power supply terminal, OLED ... Organic EL element, ORG ... Organic material layer, PE ... Pixel electrode, PI ... Partition insulating layer, PS ... Passivation film, PSL ... Power supply line, PX ... Pixel, R ... Resistance element, SC ... Semiconductor layer, SE ... Source electrode, SL1 ... Scanning signal line, SL2 ... Scanning signal line, SUB ... Insulating substrate, SWa ... Switch, SWb ... Switch, SWc ... Switch, S W _cs ... switch, SW _cs F ... switch, SW _cs R ... switch, SW _dgt ... switch, SW _vs ... switch, TR _dgt ... constant current source, TR _ref ... reference transistor, UC ... undercoat layer, VS ... voltage source , XDR: video signal line driver, YDR: scanning signal line driver.

Claims (5)

Video signal lines,
A plurality of scanning signal lines intersecting with the video signal lines;
A first current source for outputting a video signal;
A second current source for outputting a precharge signal;
A drive circuit arranged corresponding to an intersection of the video signal line and the plurality of scanning signal lines, connected to a first power supply terminal and outputting a drive current having a magnitude corresponding to an input signal; and a pixel electrode And a plurality of pixels each including a display element including a counter electrode connected to the second power supply terminal and an active layer interposed therebetween,
In each selection period, the first current source and the driving circuit are connected via the video signal line, and a writing operation for writing the video signal as the input signal to the driving circuit is performed.
In each non-selection period, the drive circuit and the pixel electrode are connected to perform a display operation of flowing the drive current to the display element,
In the blanking period, a precharge operation for connecting the second current source and the video signal line and writing the precharge signal to the video signal line is performed.
When the scanning direction of the plurality of scanning signal lines is a direction approaching the connection position between the video signal line and the second current source, as compared with the case where the scanning direction is a direction away from the connection position. A display device characterized by further increasing the precharge signal.   The display device according to claim 1, wherein the magnitude of the precharge signal is changed by changing the magnitude of the output current of the second current source.   The display device according to claim 1, wherein the magnitude of the precharge signal is changed by changing a time for connecting the second current source and the video signal line. A voltage source for outputting a reset signal;
2. The reset operation for connecting the voltage source and the video signal line and writing the reset signal to the video signal line is performed prior to the precharge operation in the blanking period. Display device. A video signal line; a plurality of scanning signal lines intersecting with the video signal line; a first current source for outputting a video signal; a second current source for outputting a precharge signal; the video signal line; A drive circuit arranged corresponding to the intersection with the scanning signal line, connected to the first power supply terminal and outputting a drive current having a magnitude corresponding to the input signal, and connected to the pixel electrode and the second power supply terminal. A display device comprising a plurality of pixels each including a display element including a counter electrode and an active layer interposed therebetween,
In each selection period, the first current source and the driving circuit are connected via the video signal line, and a writing operation for writing the video signal as the input signal to the driving circuit is performed.
In each non-selection period, the drive circuit and the pixel electrode are connected to perform a display operation of flowing the drive current to the display element,
In the blanking period, a precharge operation for connecting the second current source and the video signal line and writing the precharge signal to the video signal line is performed.
When the scanning direction of the plurality of scanning signal lines is a direction approaching the connection position between the video signal line and the second current source, as compared with the case where the scanning direction is a direction away from the connection position. A driving method characterized by further increasing the precharge signal.

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