JP2007111180A - Game machine - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a game machine which achieves the quick and accurate putting out of game media. <P>SOLUTION: When a number of prize balls command indicating 10 is received during a put-out processing, 10 is added to a total of expected put-out prize balls counter 10 to bring the value of the counter to 25. By an add-up processing which is performed when the value of a put-out operation counter for determining the degree of drive until the end of the putting out of game balls with a put-out motor reaches that as specified, a difference (10) between the current contents and the preceding contents of the total of expected put-out prize balls counter is added to the put-out operation counter and a counter of the number of prize balls yet to be put out to make the value of both the counters reach 11 respectively. The preceding contents of the total of expected put-out prize balls counter is made equal to the current contents of the counter. A sound/lamp control microcomputer specifies a display control command by conducting an arithmetic processing based on a performance control command from a game control microcomputer to be outputted to a microcomputer for display control. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a gaming machine represented by a pachinko gaming machine, a coin gaming machine, a slot machine, or the like. More specifically, a variable display unit is provided, which includes a variable display unit that displays each of a plurality of types of identification information, each of which is identifiable and whose display order is predetermined, in a plurality of display areas and displays a display result. The variation display unit starts the variation display of the identification information based on the satisfaction of the variation display start condition, and the display result of the variation display of the identification information is determined in advance. When the display result is obtained, the game state is controlled to a specific game state advantageous to the player. It relates to a gaming machine that is paid out as a prize.

  What is conventionally known as this type of gaming machine, for example, a game medium such as a game ball is launched into a game area by a launching device, and a prize area such as a prize opening provided in the game area is used. When a game medium wins, a predetermined number of prize balls may be paid out to the player. The game medium is paid out by a payout device. The payout device is generally controlled by a payout control means including a payout control microcomputer mounted on the payout control board. Since the progress of the game is controlled by game control means including a game control microcomputer mounted on the main board, information that can specify the number of winning balls based on the winning of the game medium in the winning area is obtained from the game control means. It is transmitted to the payout control means.

  The number of winning balls corresponding to the winning is determined, for example, as 10 or 15 according to each of the plurality of winning areas provided. There are some gaming machines that pay out the ball for each win when a win occurs. However, in order to shorten the total payout time, if consecutive wins occur, a winning ball based on multiple wins is displayed. There are also gaming machines that pay out in a lump without dividing. For example, when winnings corresponding to 10 winning balls are generated three times in succession, 30 winning balls are continuously paid out in a lump.

Further, when the payout control means is performing the prize ball payout control, when the information regarding the new prize ball payout is received from the game control means, the payout control means newly adds the number of unpaid prize balls at that time. There is a gaming machine that controls such that the number of prize balls is added and paid out in a lump including prize balls based on newly generated winnings (for example, see Patent Document 1).
Japanese Patent Laid-Open No. 2001-212321 (FIGS. 4, 5, paragraphs 0039 to 0048)

  However, in the gaming machine described in Patent Document 1, the payout sensor that detects the game ball after it has been paid out from the payout device driven by the payout motor has detected the last game ball (by detecting the game ball). On the condition that the value stored in the payout number storage area has become 0), the payout motor is stopped assuming that the payout of the game ball has ended. Then, when the payout sensor detects the last game ball, there is a possibility that a new game ball is paid out by driving the payout motor. That is, there is a problem that the accuracy of the continuous payout control that is not divided for each prize ball that is executed in order to realize quick prize ball payout is low.

  The present invention has been conceived in view of such circumstances, and an object of the present invention is to provide a gaming machine capable of performing more reliable payout control while realizing quick payout of game media.

Specific examples of means for solving the problems and their effects

(1) A variable display unit (for example, a variable display device 9) that displays a display result by performing variable display of a plurality of types of identification information (for example, decorative symbols) that can each be identified, When the display result of the variation display of the identification information becomes a predetermined specific display result (for example, jackpot symbol), it is controlled to a specific gaming state (for example, jackpot gaming state) advantageous for the player, A game machine in which a player plays a predetermined game and pays out a predetermined number of game media as prizes according to the establishment of a predetermined payout condition (for example, winning of a game ball in a winning opening) (for example, a pachinko machine) A gaming machine 1),
Game control means for controlling the progress of the game (for example, the game control microcomputer 560, FIG. 4, FIG. 5),
At least one of sound output means for outputting sound (for example, speaker 27) or light emitting means for emitting light (decorative lamp 25, ceiling frame lamp 28a, left frame lamp 28b, right frame lamp 28c) is displayed on the variation display section. A first effect control means (for example, a sound / lamp control microcomputer 700) that controls according to an aspect (for example, a display effect in the variable display device 9);
Second effect control means (for example, a display control microcomputer 800) for performing display control of the variable display section;
A payout means (for example, a ball payout device 97) for paying out game media;
Payout driving means (for example, payout motor 289) for driving the payout means to pay out the game medium;
A payout control means (for example, a payout control microcomputer including a payout control CPU 371) that controls the payout drive means in accordance with the payout control command received from the payout control command transmission means,
The game control means includes
Pre-decision means (for example, S386) for determining whether or not the display result of the variation display of the identification information is the specific display result;
When a predetermined payout condition is satisfied, a payout control command transmission means (for example, a prize ball process shown in FIG. 61) is executed to send a payout control command (for example, a payout control command for a prize ball number command) for instructing the number of game media to be paid out. Part)
First control command transmitting means (for example, game control) for transmitting a first control command (for example, effect control command) used for executing an effect based on the result determined by the prior determination means to the first effect control means. Part of the microcomputer 560 for executing S393, S395, S397, S405, S27),
The first effect control means includes:
A specifying means for specifying a second control command (for example, a display control command) based on the first control command output from the control signal output means (for example, performing S521, S522, and S523 as predetermined arithmetic processing). (For example, a portion for executing S504 and S505 in the sound / lamp control microcomputer 700);
Output means for outputting the second control command to the second effect control means (for example, a part for executing S506 in the sound / lamp control microcomputer 700);
The second effect control means performs display control of the variable display unit based on the second control command (for example, a portion for executing S605 and S606 in the display control microcomputer 800),
The payout control means includes
A prize game medium number data storage means (for example, a prize ball payout scheduled total counter formed in a RAM in the payout control microcomputer) for storing data indicating the number of game medium payouts according to the payout control command;
A payout control command receiving means for receiving the payout control command (for example, a part for executing a command reception interrupt process in the payout control means, see FIG. 88);
When the payout control command receiving means receives the payout control command, an adding means (for example, adding the payout number instructed by the payout control command to the data stored in the prize game medium number data storage means) , A part for executing command analysis processing in the payout control means (see FIG. 89),
When the data stored in the prize game medium number data storage means indicates that there is a game medium to be paid out, a payout start means (for example, in the payout control means) starts driving the payout drive means. SC631 to SC635 and SC627, SC628)
Increase determination means for determining whether or not the data stored in the prize game medium number data storage means has increased when the payout driving means is driving the payout means (for example, SC694 in the payout control means). To execute the process)
An increase number specifying means for specifying an increase number when the increase determining means determines that the data is increasing (for example, a part for executing a process of calculating a difference in the process of SC695 in the payout control means);
Drive amount data storage means (for example, a payout operation counter) for storing data capable of specifying the drive amount until the payout of the game medium by the payout drive means;
Drive amount update means for subtracting the data stored in the drive amount data storage means by an amount corresponding to the drive amount of the payout drive means (for example, a part for executing the processing of SC513 in the payout control means);
When the payout driving means is driving the payout means, data indicating the drive amount according to the increase number specified by the increase number specifying means is added to the data stored in the drive amount data storage means. Driving amount data adding means (for example, a part for executing addition processing in SC695 in the payout control means);
After the start of driving of the payout driving means by the payout starting means, the payout is performed when the data stored in the drive amount data storage means becomes a value (for example, 0) corresponding to the end of payout of the game medium. Dispensing stopping means for stopping the driving of the driving means (for example, processing for stopping the driving of the dispensing motor 289 is executed in response to the value of the dispensing operation counter becoming 0 in the dispensing motor brake processing of SC525 in the dispensing control means. Part).

  According to such a configuration, the prize game medium can be paid out quickly, and the prize game medium can be paid out accurately.

  Further, the first effect control means specifies the second control command based on the first control command from the game control means and outputs the second control command to the second effect control means, so that the second effect control means is based on the second control command. The display of the fluctuation display unit can be controlled.

(2) The game control means includes:
When the display result of the variation display of the identification information becomes a predetermined special display result (for example, a combination of probability variation big winning symbols) among the specific display results, the display result of the variation display is the specific display result. Probability variation control means (for example, S383 to S385, S810 to S812) for controlling to a probability variation state that is more improved than the normal gaming state that is different from the specific gaming state,
When it is determined by the prior determination means that the display result is the specific display result (for example, when YES is determined in S386 and YES is determined in S390), the specific display other than the special display result After temporarily stopping the result, any type of specific display result (for example, stop symbol at the end of change) from the special display result and the specific display result other than the special display result (for example, the temporary stop symbol during change) First effect display execution determining means (for example, S394, S398) for determining whether or not to execute a first effect display (for example, primary re-lottery display) for derivation display;
When the pre-determining means determines that the display result is the specific display result (for example, when YES is determined in S386 and YES is determined in S390), the specific gaming state is started. Later, second effect display execution determining means (for example, S394, S398) for determining whether or not to execute a second effect display (for example, secondary re-lottery display) indicating whether or not the probability variation state is to be executed. Including
The first control command transmission means sends a result command (for example, a symbol command) used to specify a determination result by the prior determination means when the variable information display is started. Including result command transmission means (for example, S395, S399, S418, S419, S27),
At least one of the first control command transmitted by the first control command transmitting unit or the result command transmitted by the result command transmitting unit (for example, a symbol command) is the first control command or the result command. A multi-command (for example, 8101h to 8103h, 8105h to 8105h) that can determine the determination result by the first effect display execution determination unit and the determination result by the second effect display execution determination unit based on at least one of 8107h),
The specifying means is:
First effect display execution determining means (for example, S514) for determining whether or not execution of the first effect display is instructed based on the multicommand;
On the condition that the execution of the first effect display is instructed by the first effect display execution determination means, the effect mode of the first effect display (for example, the type of the primary re-lottery display, First effect display mode determining means (for example, S552) for determining a temporary stop symbol during change),
Second effect display execution determining means (for example, S514) for determining whether or not execution of the second effect display is instructed based on the multi-command;
On the condition that the execution of the second effect display is instructed by the second effect display execution determination means, the effect mode of the second effect display (for example, the type of the secondary re-lottery display) Second effect display mode determining means (for example, S532) for determining
Based on the determination result of the prior determination unit specified based on the result command transmitted by the result command transmission unit and the determination result of the second effect display execution determination unit (for example, S540, S541, S542) , S543, S540a, and S546), a display result determining means (FIG. 30) for determining a display result of the variable display (for example, a stop symbol at the end of the change),
After starting the variable display of the identification information in response to the first control command transmitted by the first control command transmitting means, the variable display is displayed when the variable display time set for each variable display has elapsed. Fluctuation pattern specifying means (for example, S552, S556) for specifying a fluctuation pattern (decoration fluctuation pattern) for deriving and displaying the result,
The output means includes
The first effect display effect mode determined by the first effect display mode determination means, the second effect display effect mode determined by the second effect display mode determination means, and the display result determination means Information (for example, decoration variation pattern command, ending switching command) for enabling the display result of the determined variation display and the variation pattern identified by the variation pattern identifying unit to be identified by the second effect control unit. Is transmitted (for example, S524, S518b, S506).

  According to such a configuration, the first effect display and the second effect display are performed as the effect display related to whether or not the state is controlled to the probability variation state. Thereby, even when the specific display result other than the special display result is stopped in the variable display, the player can have an expectation that the first effect display or the second effect display may be performed. The interest of the player can be improved.

(3) a deficiency state detection means (for example, a ball break switch 187) for detecting a state in which a game medium for payout is deficient and outputting the detection signal to the game control means;
A storage state detection unit (for example, a full tank switch 48) that detects that the game medium stored after the payout has reached a predetermined amount (full tank) and outputs the detection signal to the game control unit; Including
When the detection signal from the deficiency state detection means or the detection signal from the storage state detection means is input to the game control means (for example, when YES is determined by SC226a or YES by SC226b), A non-payable notification command transmission means (e.g., SC227a, SC227b, S27) for transmitting a non-payable notification command (e.g., a ball out command, a full tank command) to the first effect control means;
Based on the payout impossible notification command, the first effect control means notifies at least one of the sound output means or the light emitting means that the game medium cannot be paid out (for example, S518c, S518d). , S518g, S518h, S565-S568, S570-S571), the payout impossible notification command is not output (for example, FIG. 69, FIG. 71, FIG. 72, FIG. 72 showing each processing of S521-S524 in the command setting processing of FIG. 68). 75 (a) does not output any payout impossible notification command such as a command for running out of a ball or a full tank command).

  According to such a configuration, the first effect control means notifies that the game medium cannot be paid out by operating at least one of the sound output means or the light emitting means based on the payout impossible notification command, Since the payout impossible notification command is not output, the number of command signals to be transmitted can be reduced, and the transmission / reception control of the command signals can be simplified.

(4) The game control means includes a random number circuit (for example, a random number circuit 503) for generating a random number,
The random number circuit includes:
Numerical data according to a predetermined order from a predetermined initial value to a predetermined final value within a predetermined range in which numerical data (for example, a count value) can be updated based on an input of a predetermined signal (for example, a clock signal) Numerical value updating means (for example, counter 521) for updating
Random number storage means (for example, random value storage circuit 531) for storing numerical data updated by the numerical value update means as random number values,
The game control means includes
Random number circuit initial setting means (for example, a part for executing SB15 in the game control microcomputer 560) for initial setting of the random number circuit when power supply to the gaming machine is started;
After the random number circuit initial setting means performs the initial setting of the random number circuit, interrupt setting means for setting to generate a timer interrupt every predetermined time (for example, execute S16 in the game control microcomputer 560) Part)
Interrupt processing execution means for executing timer interrupt processing including the game control processing (for example, processing of S21 to S32 (excluding S28 and S31) in the timer interrupt processing) when the timer interrupt occurs ( For example, a part for executing S20 to S33 in the game control microcomputer 560),
In the timer interrupt processing by the interrupt processing execution means, random number reading means (for example, S324 in the game control microcomputer 560) that reads the random number value stored in the random number storage means when the execution condition of the variable display is satisfied. Part to execute)
By determining whether or not the random number value read by the random number reading means matches a predetermined determination value, it is determined whether or not the display result of the variation display of the identification information is a specific display result. Display result determining means (for example, a part for executing S386 in the game control microcomputer 560),
In the initial setting, the random number circuit initial setting means identifies the game control microcomputer in which the predetermined initial value of the numerical data updated by the numerical value update means is assigned to each game control microcomputer. (For example, a part for executing SB154b in the game control microcomputer 560) based on microcomputer identification information (for example, an ID number unique to the game control microcomputer 560).

  According to such a configuration, the gaming control microcomputer performs the initial setting of the random number circuit from the start of power-on to the gaming machine until the timer interrupt setting is performed, and the microcomputer identification information is set in the initial setting. Since the base value is set as the initial value of the random number, the randomness of the random number generated by the random number circuit can be improved. In addition, since the randomness of random numbers can be improved, the timing of random number generation can be made difficult to be recognized by a player or a game store, and by generating a capture signal using a radio signal for a gaming machine It is possible to prevent the condition for shifting to the specific gaming state from being illegally established.

(5) A first state (for example, an open state) that is advantageous for the player and a second state that is disadvantageous for the player, provided in a game region (for example, the game region 7) into which a game medium (for example, a game ball) is to be shot A variable winning means (for example, a special variable winning device 20) that can be changed to any state (for example, a closed state);
The game control means includes
When the display result of the variation display of the identification information becomes the special display result (for example, a combination of probability variation big winning symbols), the variable winning means is set as the specific gaming state for a predetermined period (for example, one round 30 seconds). Changing to the first state is performed a predetermined number of times (for example, the number of times of 15 rounds) (for example, SA102 to SA109 in FIG. 51 are executed with the settings of SA92 and SA93 in FIG. 50), after the end of the specific gaming state The probability variation state (for example, the probability variation state) is shifted by the probability variation control means (for example, the probability variation control mode is shifted based on the probability variation flag being set in S812 in the special game process of FIG. 54). First specific game state control means (for example, S300 to S30 in FIG. 45) for controlling to one specific game state (first probability variation big hit game state) A),
When the display result of the variation display of the identification information becomes a predetermined display result (for example, a second probability variation big winning symbol) different from the special display result among the specific display results, the specific gaming state The variable winning means is set to the first state in at least one of a period shorter than the predetermined period (for example, one second for one round) and a number less than the predetermined number (for example, the number of two rounds). (For example, SA102 to SA109 in FIG. 51 are executed with the settings of SA94 and SA95 in FIG. 50), and after the specific gaming state is finished, the probability variation control means shifts to the probability variation state (for example, In the special game process of FIG. 54, the process proceeds to the probability variation control mode based on the probability variation flag being set in S812). Second specific game state control means to (e.g., S300～S308 in FIG. 45),
When the display result of the variation display of the identification information is not the special display result and the specific display result other than the predetermined display result, the variable winning means is set as the specific gaming state for a predetermined period (for example, 1 The change to the first state is performed a predetermined number of times (for example, the number of times of 15 rounds) (for example, SA102 to SA109 in FIG. 51 are executed with the settings of SA92 and SA93 in FIG. 50), and the specific game After completion of the state, the probability variation control means does not shift to the probability variation state (for example, the probability variation flag is not set in the special game process of FIG. 54 (for example, S813, S814 does not shift to the probability variation control mode). Third specific game state control means (for example, S30 in FIG. 45) for controlling to 3 specific game states (for example, normal big hit game state) It characterized in that it comprises a ～S308) and.

  According to such a configuration, the second specific gaming state is at least one of a state in which the variable winning means has a short change period to the first state and a state in which the variable winning means has a small number of changes to the first state. The player can be rescued in order to shift to the special game state after the end of the second specific game state.

(6) The game control means includes a plurality of random number circuits (for example, a 12-bit random number circuit 503a and a 16-bit random number circuit 503b) having different predetermined ranges of numerical data that can be updated by the numerical value updating means,
The random number circuit initial setting means sets a usable random number circuit from the plurality of random number circuits included in the game control means in the initial setting (for example, the game control microcomputer 560 executes SB151). ,
Random number stopping means for stopping the function of the random number circuit other than the random number circuit set to be usable by the random number circuit initial setting means (for example, when the game control microcomputer 560 sets the random number circuit 503 used in SB151, The counter 521 of the random number circuit that is set so as not to perform control is provided with a portion that controls the count value C not to be updated.

  According to such a configuration, since it is configured to set whether or not each of a plurality of random number circuits having different predetermined ranges of numerical data that can be updated is usable, only the random number circuit to be used is used. By setting, the range of the random number value to be generated can be appropriately set. Therefore, it is possible to prevent unnecessary random numbers from being processed during the execution of the timer interrupt process, and the control burden on the game control microcomputer can be reduced.

(7) The random number circuit initial setting means stores, in the initial setting, a numerical maximum value register (for example, random number maximum value setting register 535) in which a value as a maximum value in a predetermined range in which numerical data is updated is set. A predetermined maximum value (for example, a random number maximum value) is set within the range of numerical data that can be updated by the numerical value updating means (for example, a part where the game control microcomputer 560 executes SB152),
The numerical value updating means includes
Setting value determination for determining whether or not the predetermined maximum value set by the random number circuit initial setting means is equal to or less than a predetermined lower limit value (for example, “256” when the 12-bit random number circuit 503a is set). Means (for example, a part for executing SB153b in the game control microcomputer 560);
The numerical value maximum value register can be updated by the numerical value updating means when it is determined that the predetermined maximum value set in the numerical value maximum value register is not more than the predetermined lower limit value by the set value determining means. Maximum value resetting means (for example, a game control microcomputer 560) for resetting a predetermined value (for example, “4095” when the 12-bit random number circuit 503a is set) within a range of numerical data
For executing SB153c in FIG.

  According to such a configuration, since the value as the maximum value of the predetermined range in which the numerical data is updated is configured in advance, a value larger than the range of random numbers used during the execution of the timer interrupt process Can be prevented, and the processing load on the random number circuit and the game control microcomputer can be reduced. In addition, when the predetermined maximum value that is set is equal to or less than the predetermined lower limit value, the predetermined maximum value is reset, so that a malfunction of the game control microcomputer or a radio signal is used. It is possible to prevent an excessively small value from being set as the maximum value of the random number due to an action such as generating a captured signal to the gaming machine.

(8) The payout control means is a previous prize game medium number data storage means (for example, holding the data stored in the prize game medium number data storage means when the drive amount data addition means adds data) Including a previous award ball payout scheduled total counter formed in the RAM of the payout control microcomputer),
The increase determination means determines whether the data has increased by comparing the data stored in the prize game medium number data storage means with the data stored in the previous prize game medium number data storage means. Determination (for example, by the process of SC694),
The increase number specifying means specifies the difference between the data stored in the prize game medium number data storage means and the data stored in the previous prize game medium number data storage means as an increase number (for example, SC695). It is characterized by the above.

  According to such a configuration, it is determined whether or not the data has increased by comparing the data stored in the premium game medium number data storage means with the data stored in the previous premium game medium number data storage means. Since it is comprised so that it may determine, an increase number can be pinpointed correctly with a simple structure.

  (9) When the increase determining means determines that the data has increased, the payout control means transfers the data stored in the prize game medium number data storage means to the previous prize game medium number data storage means. It includes a premium game medium number data setting means to be set (for example, a portion for executing the processing of SC697 in the payout control means).

  According to such a configuration, when the increase determination means determines that the data has increased, the data stored in the prize game medium number data storage means is set in the previous prize game medium number data storage means. Since it is comprised, an increase number can be pinpointed correctly with a simple structure.

  Hereinafter, an embodiment of the present invention will be described with reference to the drawings. Note that a pachinko gaming machine is shown as an example of the gaming machine, but the present invention is not limited to a pachinko gaming machine, and may be other gaming machines such as a coin gaming machine and a slot machine. Includes a variable display unit that displays a plurality of types of predetermined identification information in a variable manner in each of a plurality of display areas and derives and displays a display result, and the display result of the variable display of the identification information is displayed in the variable display unit. When the predetermined specific display result is obtained, the specific game state is controlled to be advantageous to the player, and the display result of the variable display of the identification information is displayed as a special display determined in advance among the specific display results. Any game machine that is controlled to an advantageous special game state different from the specific game state after the specific game state ends when it is determined to be a result. It may be.

  First, an overall configuration of a pachinko gaming machine that is an example of a gaming machine will be described. FIG. 1 is a front view of the pachinko gaming machine 1 as seen from the front, and FIG. 2 is a front view showing the front of the game board.

  The pachinko gaming machine 1 includes an outer frame (not shown) formed in a vertically long rectangular shape and a game frame attached to the inside of the outer frame so as to be openable and closable. Further, the pachinko gaming machine 1 has a glass door frame 2 formed in a frame shape that is provided in the game frame so as to be opened and closed. The game frame includes a front frame (not shown) installed to be openable and closable with respect to the outer frame, a mechanism plate to which mechanism parts and the like are attached, and various parts attached to them (excluding a game board described later). Is a structure including

  As shown in FIG. 1, the pachinko gaming machine 1 has a glass door frame 2 formed in a frame shape. On the lower surface of the glass door frame 2 is a hitting ball supply tray (upper plate) 3. Below the hit ball supply tray 3, there are provided an extra ball receiving tray 4 for storing game balls that cannot be accommodated in the hit ball supply tray 3 and a hit ball operation handle (operation knob) 5 for firing game balls. A game board 6 is detachably attached to the back surface of the glass door frame 2. The game board 6 is a structure including a plate-like body constituting the game board 6 and various components attached to the plate-like body. A game area 7 is formed on the front surface of the game board 6.

  Referring to FIG. 2, near the center of game area 7, a variable display device (decorative symbol display device) 9 including a plurality of variable display units each displaying a decorative symbol for effect is provided. The fluctuation display device 9 includes, for example, three fluctuation display portions (symbol display areas) of “left”, “middle”, and “right”. The variation display device 9 performs variation display of the decorative symbol as a symbol for decoration (production) during the variation display period of the special symbol by the special symbol indicator 8. The variable display device 9 for performing variable display of decorative symbols is controlled by a display control microcomputer 800 (see FIG. 5) mounted on a display control board 80 described later. In addition, a special symbol display device (special symbol display device) 8 that variably displays special symbols as a plurality of types of identification information that can be distinguished from each other is provided at the top of the variable display device 9.

  Below the variable display device 9 are provided four special symbol hold memory indicators 18 for displaying the number of effective winning balls that have entered the start winning opening 14, that is, the number of hold memories (also referred to as start memory or start prize memory). ing. The special symbol hold memory display 18 displays up to four hold memory numbers in the order of winning. The special symbol hold storage display 18 increases the number of LEDs in the lit state by 1 each time there is a start winning in the start winning opening 14. Then, each time the special symbol display 8 starts the variable display, the special symbol hold storage indicator 18 decreases the number of LEDs in the lit state (that is, turns off one LED). Specifically, the special symbol hold storage display 18 shifts the lighting state every time the special symbol display 8 starts the variable display. In this example, the upper limit number (up to 4) is provided for the starting memory number by winning to the start winning opening 14, but the upper limit number may be four or more.

  The special symbol display 8 is realized by a simple and small display (for example, 7-segment LED) capable of variably displaying numbers from 0 to 5, for example. The special symbol display 8 may be configured to display various numbers such as 0 to 99 in a variable manner in order to make it difficult for the player to grasp a specific stop symbol. In addition, the variable display device 9 is used for decoration (for production) as a plurality of types of identification information that can identify each of the three variable display units during the special symbol variable display period by the special symbol display 8. A decorative display composed of numbers 0 to 5 as symbols is displayed.

  Below the variable display device 9, a variable winning ball device 15 that forms a start winning opening 14 is provided. The winning ball that has entered the start winning opening 14 is guided to the back of the game board 6 and detected by the start opening switch 14a. The variable winning ball device 15 is opened by a solenoid 16.

  Below the variable winning ball apparatus 15, a special variable winning ball apparatus 20 using an opening / closing plate that is controlled to be opened by the solenoid 21 in the big hit gaming state as the specific gaming state is provided. The special variable winning ball apparatus 20 is a means for opening and closing the big winning opening. Of the winning balls that have won the special variable winning ball device 20 and led to the back of the game board 6, the winning ball that has entered one (V winning area: special area) is detected by the V winning switch 22 and then counted by the count switch 23. The game ball that has been detected and entered the other area is detected by the count switch 23 as it is. On the back of the game board 6, a solenoid 21A for switching the route in the special winning opening is also provided.

  When the game ball passes through the gate 32 and is detected by the gate switch 32a, the display change display of the normal symbol display 10 that changes the normal symbol as a plurality of types of identification information is started. In this embodiment, the left and right lamps (the symbols can be visually recognized at the time of lighting) are turned on alternately to perform the variable display. When the stop symbol on the normal symbol display 10 is a predetermined symbol (winning symbol), the variable winning ball device 15 is opened for a predetermined number of times. In the vicinity of the normal symbol display 10, a normal symbol start memory display 41 having a display unit with four LEDs for displaying the number of winning balls that have passed through the gate 32 is provided. Each time there is a game ball passing through the gate 32, the normal symbol start memory display 41 increases the number of LEDs to be turned on by one. Then, each time the variable display of the normal symbol display 10 is started, the number of LEDs to be lit is reduced by one.

  The game board 6 is provided with a plurality of winning holes 29, 30, 33, 39, and winning of game balls to the winning holes 29, 30, 33, 39 is performed by winning hole switches 29a, 30a, 33a, 39a, respectively. Detected. Each winning opening 29, 30, 33, 39 constitutes a winning area provided in the game board 6 as an area for accepting game media and allowing winning. The start winning opening 14 and the big winning opening also constitute a winning area that accepts game media and allows winning. Decorative lamps 25 blinking and displayed during the game are provided around the left and right sides of the game area 7, and an outlet 26 for absorbing a game ball that has not won a prize is provided at the bottom. In addition, two speakers 27 that emit sound effects according to the game, such as whether or not the game state is a big hit or will be described later, are provided on the left and right upper portions outside the game area 7. Yes. On the outer periphery of the game area 7, a top frame lamp 28a, a left frame lamp 28b, and a right frame lamp 28c are provided. Further, a decoration LED is installed around each structure (such as a big prize opening) in the game area 7. The top frame lamp 28a, the left frame lamp 28b, the right frame lamp 28c, and the decorative LED are examples of decorative light emitters provided in the pachinko gaming machine 1, and change whether or not the gaming state is a big hit, which will be described later. It emits light along with the game, such as whether or not it is inside.

  In this example, a prize ball lamp 51 that is turned on during the payout of the prize ball is provided in the vicinity of the left frame lamp 28b, and a ball break lamp 52 that is turned on when the supply ball is cut in the vicinity of the top frame lamp 28a. Is provided. Further, a prepaid card unit (hereinafter referred to as “card unit”) 50 that enables lending a ball by inserting a prepaid card is installed adjacent to the pachinko gaming machine 1. Lighting control (lamp control) of light emitting means such as various decoration LEDs, decoration lamp 25, ceiling lamp 28a, left frame lamp 28b, and right frame lamp 28c, and sound generation control (sound control) from the sound output means of speaker 27 Is controlled by a sound / lamp control microcomputer 700 (see FIG. 5) which is mounted on a sound / lamp control board 70 which will be described later.

  The card unit 50 includes, for example, a usable indicator lamp that indicates whether or not the card unit 50 is in a usable state, a connecting table direction indicator that indicates which side of the pachinko gaming machine 1 corresponds to the card unit, and a card unit. When checking the card insertion indicator lamp indicating that a card is inserted in the card, the card insertion slot into which the card as a recording medium is inserted, and the card reader / writer mechanism provided on the back of the card insertion slot A card unit lock for releasing the card unit is provided.

  A game ball launched from the ball striking device by the player's operation enters the game area 7 through the hit ball rail, and then descends the game area 7. When the game ball enters the start winning port 14 and is detected by the start port switch 14a, the special symbol on the special symbol display 8 starts to be displayed in a variable state (variation) if the variation display of the symbol can be started. If the symbol display cannot be started, the number of reserved memories is increased by one.

  The special symbol display on the special symbol display 8 stops when a certain time has elapsed. If the special symbol (stop symbol) at the time of stoppage is a jackpot symbol (specific display result), the game shifts to a jackpot gaming state. That is, the special variable winning ball apparatus 20 is released until a predetermined time elapses or until a predetermined number (for example, 10) of gaming balls wins. Then, when the game ball is won in the V winning area and is detected by the V winning switch 22 while the special variable winning ball device 20 is opened, the continuation right is generated and the special variable winning ball device 20 is opened again. The generation of the continuation right is allowed a predetermined number of times (for example, 15 rounds). In addition, without providing the V winning area, the special variable winning ball apparatus 20 may always be allowed to be released up to the final round (for example, up to 15 rounds).

  When a predetermined big hit symbol (for example, “3”, “7”) is derived and displayed as the first probability variable big hit symbol (also referred to as a first probability variable big symbol), the variable display device 9 is combined with the first probability variable big hit symbol. It is shown that a certain odd-numbered flat eye is derived and displayed as a display result, or is in a probable change state in a secondary re-lottery display as described later. The display result of the combination of such first probability variation jackpot symbols is called the first probability variation jackpot display result. When the first probable jackpot display result is reached, the game is controlled to a jackpot gaming state that can be continued for 15 rounds, as will be described later, and then the probability fluctuation control mode (in the following embodiment, the probability fluctuation is abbreviated as probabilistic. For example, it is controlled in the probability variation control mode. Such a big hit gaming state is referred to as a first probability variation big hit gaming state. In the probability variation control mode, the display result of the variation display of the special symbol and the decorative symbol is the display of the jackpot symbol as compared to the normal gaming state in which the probability variation control mode is not in the state and not in the jackpot gaming state. It is included in a special gaming state that is a gaming state that tends to result. This special gaming state can also be defined as a gaming state that is advantageous to a player different from the big hit gaming state.

  Further, when a special jackpot symbol (for example, “1”) predetermined as the second probability variation jackpot symbol (also referred to as the second probability variation symbol) is derived and displayed by the special symbol indicator 8, A predetermined combination of decorative symbols called is derived and displayed as a display result. The chances are combinations of symbols configured by combinations of symbols other than the first probability change jackpot display result as described above, and a plurality of types of display results are predetermined as the display results that give the player a chance. Such a display result is called a second probability variation jackpot display result. When the second probability variable jackpot display result is obtained, the game is controlled to the jackpot gaming state capable of continuing for two rounds as described later, and then controlled to the probability variation control mode. Such a big hit gaming state is referred to as a second probability variation big hit gaming state. In the present embodiment, the first probability variation jackpot symbol with probability variation and the second probability variation jackpot symbol are collectively referred to as probability variation jackpot symbol or probability variation symbol, and the jackpot symbol without probability variation is non-probable variation jackpot. It is called a symbol, a non-probable symbol, or a normal jackpot symbol.

  The decorative symbol displayed on the variable display device 9 is a decorative symbol that is variably displayed with a predetermined relationship with the special symbol variable display in order to enhance the decorative effect of the special symbol variable display on the special symbol display 8. There are implications. The predetermined relationship with respect to such a symbol includes, for example, a relationship in which the variation display of the decorative symbol is started when the variation display of the special symbol is started, the variation display of the special symbol is finished, and the display result is displayed. In some cases, the display of the display result is displayed after the decorative symbol variation display ends. When the special symbol indicator 8 derives and displays a big hit symbol (for example, 0 and an odd number of symbols) as a display result, a combination of big hit symbols in which the left, middle, and right symbols are flat on the variable display device 9 Is also derived and displayed as a display result.

  Next, the reach display mode (reach) will be described. The reach display mode (reach) in the present embodiment means that the symbols that have not been stopped when the stopped symbols constitute a part of the jackpot symbol, and that all or This is a state where some symbols are synchronously displayed while constituting all or part of the jackpot symbol.

  For example, in the variable display device 9, an effective line (one horizontal effective line in the case of the present embodiment) that is a hit when the symbol is stopped is determined in advance, and a part of the display area on the effective line is displayed. A state in which the variable display is performed in the display area on the active line that has not been stopped when the predetermined symbol is stopped (for example, among the left, middle, and right display areas in the variable display device 9) In the left and right display areas, the same symbol is stopped and the middle display area is still in variable display), and all or part of the display area on the active line Are displayed in a synchronized manner while constituting all or part of the jackpot symbol (for example, the variation display device 9 displays the variation in all of the left, middle, and right display areas and always displays them. The state) variable display in a state in which one of the symbols are aligned is made that reach the display mode or reach.

  In addition, during the reach, an unusual performance may be performed with a lamp or sound. This production is called reach production. Further, in the case of reach, a character (an effect display imitating a person or the like, which is different from a design (decoration design or the like)) or a background display mode (for example, color or the like) of the variable display device 9 is displayed. May be changed. This change in character display and background display mode is called reach effect display. In addition, some reach is set such that when it appears, a big hit is more likely to occur than normal reach (normal reach). Such special (specific) reach is called super reach.

  Also, during the decorative symbol variation display, when the display result is a jackpot symbol combination, the ornament symbol is temporarily stopped (for example, a normal jackpot symbol combination) temporarily (for example, a combination of jackpot symbols) (for example, , A state where the symbol is oscillating without being updated, hereinafter referred to as a temporary stop), and then the decorative symbol is variably displayed again, and the display result is finally confirmed as the first There may be a case where a re-lottery display is performed as a re-variable display for displaying a combination of probability variation jackpot symbols or a normal jackpot symbol combination. In this re-lottery display, when the display result of the variable display is a combination of jackpot symbols, it is possible to give the player an enjoyment whether it is a combination of the first positive variation jackpot symbol or a normal jackpot symbol combination. . The re-lottery display in the present embodiment may be performed before the big hit game is started or during the big hit game. Thus, the re-lottery display performed before the big hit game is started is referred to as a primary re-lottery display, and the re-lottery display performed during the big hit game is referred to as a secondary re-lottery display.

  In addition, for the variable display device 9, a notice may be executed by the appearance of a character, background screen switching, or the like. The advance notice refers to an effect that informs that there is a high possibility that a big hit will occur when it is executed, rather than when it is not executed.

  When the game ball passes through the gate 32, the normal symbol display unit 10 is in a state where the normal symbol is variably displayed. Further, when the stop symbol on the normal symbol display 10 is a predetermined symbol (winning symbol), the variable winning ball device 15 is opened for a predetermined time. Further, in the probability variation state, the probability that the stop symbol in the normal symbol display 10 becomes a winning symbol is increased, and the opening time and the number of times of opening of the variable winning ball device 15 are increased. That is, the opening time and the number of times of opening of the variable winning ball device 15 are increased when the stop symbol of the normal symbol is a winning symbol, the stop symbol of the special symbol is a probable big hit symbol, etc., which is disadvantageous for the player. Changes to an advantageous state. Note that increasing the number of times of opening is a concept including changing from a closed state to an open state.

  Next, the structure of the back surface of the pachinko gaming machine 1 will be described with reference to FIG. FIG. 3 is a rear view of the pachinko gaming machine 1 as seen from the back side.

  As shown in FIG. 3, on the back side of the pachinko gaming machine 1, there are a variable display control unit 49 including a display control board 80 on which a display control microcomputer for controlling the variable display device 9 is mounted, a game control microcomputer and the like. A mounted game control board (main board) 31 and a sound / lamp control board 70 on which a sound / lamp control microcomputer is mounted are installed. Further, a payout control board 37 on which a payout control microcomputer for performing ball payout control is mounted is installed.

  Further, a power supply substrate 910 and a touch sensor substrate 91 on which a power supply circuit for generating DC30V, DC21V, DC12V, and DC5V is mounted are provided. Most of the power supply substrate 910 overlaps with the main substrate 31, but there is an exposed portion that is exposed so as not to overlap with the main substrate 31. The exposed portion is supplied with the main board 31 and each electrical component control board (display control board 80 and payout control board 37) in the pachinko gaming machine 11 and each electrical component (electric power) provided in the pachinko gaming machine 1. There is provided a power switch as a power supply permission means for executing or shutting off the power supply to the component operating by this. Furthermore, a replaceable fuse is provided inside the power switch at the exposed portion (inside the substrate).

  An electrical component control means including an electrical component control microcomputer is mounted on the electrical component control board. The electrical component control means is an electrical component (game device: ball payout device 97, variable display device 9, lamp) provided in the pachinko gaming machine 1 in accordance with a command signal (control signal) as a command from the game control means or the like. And light emitters such as LEDs, speakers 27, etc.). Hereinafter, the main board 31 may be included in the electric component control board for explanation. In that case, the electrical component control means mounted on the electrical component control board includes a game control means, a means for controlling the electrical components provided in the pachinko gaming machine 1 in accordance with a command signal from the game control means and the like. Each of them. A substrate on which a microcomputer other than the main substrate 31 is mounted may be referred to as a sub-substrate.

  On the back side of the pachinko gaming machine 1, a terminal board 160 having terminals for outputting various information to the outside of the pachinko gaming machine 1 is installed above. The terminal board 160 has at least a ball break terminal for introducing and outputting an output of a ball break switch 187, which will be described later, a prize ball terminal for outputting prize ball information (prize ball number signal) to the outside, and A ball lending terminal for externally outputting ball lending information (ball lending number signal) is provided. Near the center, an information terminal board (information output board) 36 having terminals for outputting various information from the main board 31 to the outside of the pachinko gaming machine 1 is installed.

  The game balls stored in the storage tank 38 pass through the guide rail 39 and reach the ball payout device covered with the payout case 40A through the curve rod. A ball break switch 187 as a game medium break detection means is provided on the upper part of the ball payout device. When the ball break switch 187 detects a ball break, the dispensing operation of the ball dispensing device stops. The ball break switch 187 is a switch for detecting the presence or absence of a game ball in the game ball passage, but the ball break detection switch 167 for detecting the shortage of supply balls in the storage tank 38 is also an upstream portion (storage tank 38). In the vicinity of the head). When the ball break switch 187 detects a shortage of game balls, the game balls are replenished to the pachinko gaming machine 1 from the replenishment mechanism provided on the gaming machine installation island.

  When a large number of game balls as prizes based on winning prizes or game balls based on ball lending requests are paid out and the hitting ball supply tray 3 becomes full, the game balls are guided to the surplus ball receiving tray 4 through the surplus ball passage. Further, when the game ball is paid out, a sensing lever (not shown) presses a full tank switch (not shown) as the storage state detection means, and the full tank switch as the storage state detection means is turned on. In this state, the rotation of the payout motor in the ball payout device stops, the operation of the ball payout device stops, and the driving of the hitting ball launching device also stops.

  FIG. 4 is a front view (FIG. 4 (A)) and a cross-sectional view (FIG. 4 (B)) showing the ball dispensing device 97 covered with the dispensing case 40A. The ball payout device 97 is fixed to the lower part of the passage body installed between the ball break switch 187 and the ball payout device 97. The passage body has a ball passage for flowing down two rows of game balls in which the flow direction is changed to the left and right directions by the curve saddle. A ball break switch 187 (see FIG. 6) is installed on the upstream side of the ball passage. In practice, a ball break switch is installed in each ball passage. The ball break switch 187 detects the presence or absence of a game ball in the ball passage. When the ball break switch 187 stops detecting a game ball, the ball discharge device 97 has a payout motor (not shown in FIG. 4). The rotation is stopped and the payout of the game ball is immobilized.

  Further, the ball break switch 187 is locked by a locking piece at a position where, for example, it can be detected that 27 to 28 game balls are present in the ball path.

In the ball payout device 97, a payout motor (not shown) by a stepping motor as a payout driving means rotates a cam 292 as a payout mechanism, for example, so that one game ball is paid one by one based on a ball lending request. put out. Further, below the ball payout device 97, for example, a payout number count switch 301 using a proximity switch is provided. Each time one game ball falls from the ball payout device 97, the payout number count switch 301 installed at the lower part of the flow-down path 293 is turned on. That is, the payout number count switch 301 detects a game ball actually paid out from the ball payout device 97. Therefore, the payout control means can count the number of game balls actually paid out by the detection signal of the payout number count switch 301. In this example, the payout number count switch 301 detects both the paid-out prize balls and rental balls. That is, the payout of prize balls and the payout of rental balls are detected by the same detection means. Therefore, the number of parts can be reduced, and the cost of the gaming machine can be reduced. However, the payout of the winning ball and the payout of the rental ball may be detected by separate detection means.

  In addition, the ball payout device 97 is configured to perform both the winning ball payout and the ball lending, but the ball payout device that performs the payout and the ball payout device that performs the ball lending may be provided separately. Good. When separately provided, the payout means is composed of a ball payout device for paying out a prize ball and a ball payout device for lending a ball. Furthermore, for example, the configuration may be such that the winning ball payout and the ball lending are separated by changing the rotation direction of the cam or sprocket, or the ball payout device 97 exemplified in the present embodiment (the cam is rotated by the motor). The present invention can be applied to a ball payout device having any structure other than the above.

  FIG. 5 is a block diagram illustrating an example of a circuit configuration in the main board 31. 5 also shows a payout control board 37, an interface board 66, a relay board 77, a display control board 80, and a sound / lamp control board 70 mounted on the pachinko gaming machine 1. The main board 31 includes a game control microcomputer 560 serving as a basic circuit (corresponding to game control means) for controlling the pachinko gaming machine 1 according to a program, a ball break switch 187, a full switch 48, a gate switch 32a, a start The input driver circuit 58 that supplies signals from the mouth switch 14a, the V prize switch 22, the count switch 23, and the prize mouth switches 29a, 30a, 33a, and 39a to the game control microcomputer 560 and the variable prize ball apparatus 15 are opened and closed. The solenoid 16, the solenoid 21 that opens and closes the special variable winning ball apparatus 20, and the output circuit 59 that drives the solenoid 21 </ b> A for switching the path in the special winning opening according to a command from the game control microcomputer 560 are mounted. The detection signals of the ball break switch 187 and the full tank switch 48 are also input to the payout control board 37.

  The gate switch 32a, the start port switch 14a, the V winning switch 22, the count switch 23, the winning port switches 29a, 30a, 33a, 39a, and other switches may be referred to as sensors. That is, the name of the game medium detection means is not limited as long as it is a game medium detection means (game ball detection means in this example) that can detect a game ball. Each of the start port switch 14a, the count switch 23, and the winning port switches 29a, 30a, 33a, and 39a that perform winning detection is also a winning detection means that detects the winning of the game ball in the winning area. Note that even if a pass gate such as the gate 32 is used, if a prize ball is to be paid out, a game ball enters the pass gate, and a winning switch (for example, a switch provided on the pass gate (for example, The gate switch 32a) becomes a winning detection means. Furthermore, a game ball that has won the V winning area is detected by the V winning switch 22 and also by the count switch 23. Therefore, the number of game balls won in the special winning opening corresponds to the number detected by the count switch 23. However, the game balls won in the V prize area are detected only by the V prize switch 22, and the number of game balls won in the big prize opening is the number detected by the V prize switch 22 and the number detected by the count switch 23. You may make it become the sum. Further, the V winning area may not be provided, and a continuation right may always be generated in rounds other than the final round.

  The game control microcomputer 560 includes a ROM 54 for storing a game control (game progress control) program and the like, a RAM 55 as storage means (variation data storage means for storing fluctuation data) used as a work memory, and a program. Therefore, it includes a CPU 56 that performs a control operation and an I / O port unit 506. The ROM 54, the RAM 55, and the I / O port unit 506 are built in the game control microcomputer 560. That is, the game control microcomputer 560 is a one-chip microcomputer. The one-chip microcomputer only needs to incorporate at least the RAM 55, and the ROM 54 and the I / O port unit 506 may be external or built-in.

  In the game control microcomputer 560, the CPU 56 executes control in accordance with a program stored in the ROM 54. Therefore, the game control microcomputer 560 is specifically executed (or performs processing) hereinafter. The CPU 56 executes control according to a program. The same applies to microcomputers mounted on substrates other than the main substrate 31.

  The RAM 55 is a backup RAM as a non-volatile storage means that is partially or entirely backed up by a backup power source created on the power supply substrate 910. That is, even if the power supply to the pachinko gaming machine 1 is stopped, a part or all of the contents of the RAM 55 is stored for a predetermined period (until the backup power supply cannot be supplied because the capacitor as the backup power supply is discharged). The In particular, at least data (a special symbol process flag or the like) corresponding to the game state, that is, the control state of the game control means, and data indicating the number of unpaid prize balls are stored in the backup RAM. The data corresponding to the control state of the game control means is data necessary for restoring the control state before the occurrence of a power failure or the like based on the data when the power is restored after a power failure or the like occurs. Further, the data corresponding to the control state is defined as the data indicating the number of unpaid prize balls and the data indicating the game progress state. In this embodiment, it is assumed that the entire RAM 55 is backed up.

  A reset signal from the power supply board 910 is input to the reset terminal of the game control microcomputer 560. The reset signal from the power supply board 910 is also input to the reset terminal of the payout control microcomputer. When the reset signal becomes high level, the game control microcomputer 560 and the payout control microcomputer become operable, and when the reset signal becomes low level, the game control microcomputer 560 and the payout control microcomputer stop operating. It becomes a state. Accordingly, during the period in which the reset signal is at a high level, an allowance signal that allows the operation of the game control microcomputer 560 and the payout control microcomputer is output, and during the period in which the reset signal is at a low level, An operation stop signal for stopping the operations of the game control microcomputer 560 and the payout control microcomputer is output. A reset circuit may be mounted on each electric component control board (including the main board 31), or a reset circuit is mounted on one or more of the plurality of electric component control boards, and a reset signal is output therefrom. May be supplied to another electrical component control board.

  Furthermore, a power-off signal indicating that the power supply voltage from the power supply board 910 has decreased to a predetermined value or less is input to the input port of the game control microcomputer 560 via the payout control board 37. In addition, a clear signal indicating that the clear switch for instructing to clear the contents of the RAM is operated is input to the input port of the game control microcomputer 560.

  The clear signal is branched at the main board 31 and is also supplied to the payout control board 37. The state of the clear signal input by the game control microcomputer 560 via the input port may be output to the payout control board 37 via the output port.

  The game control microcomputer 560 transmits to the sound / lamp control board 70 an effect control command (effect control signal) as a control signal for instructing display control, sound control, and effect control including lamp control. The sound / lamp control board 70 receives the effect control command from the game control microcomputer 560 via the relay board 77, and performs the sound / lamp control microcomputer 700 for effect control including sound control and lamp control. And electric parts, such as I / O port part 78, are carried.

  The sound / lamp control microcomputer 700 includes a ROM 74 for storing sound control and lamp programs, a RAM 75 used as a work memory, and a CPU 76 for performing sound control and lamp control control operations according to the program. . This sound / lamp control microcomputer 700 responds to an effect control command transmitted from the main board 31 with a prize ball lamp 51, a ball break lamp 52, a decoration lamp 25, a game effect lamp 40, a top frame lamp 28a, and a left frame lamp 28a. Control related to various effects such as control of the frame lamp 28b and the right frame lamp 28c (lamp control) and game sound generation control (sound control) using the speaker 27 is performed. The sound / lamp control microcomputer 700 also performs control for transmitting a display control command for controlling the variable display device 9 to the display control board 80 based on the effect control command transmitted from the main board 31. Do.

  The display control board 80 receives a display control command from the sound / lamp control microcomputer 700 and performs display control in the variable display device 9, and an I / O port unit 87. Etc. are mounted. The display control microcomputer 800 includes a ROM 84 that stores a display control program and the like, a RAM 85 that is used as a work memory, and a CPU 86 that performs a display control operation according to the program. The display control microcomputer 800 performs control related to various display effects such as a variable display of the variable display device 9 in accordance with a display control command transmitted from the sound / lamp control microcomputer 700. Specifically, the following control is performed. In addition to the display control microcomputer 800, the display control board 80 is mounted with a VDP, a character ROM, and a VRAM (not shown). The VDP is a processing device having a display control function for performing image display and a high-speed drawing function, and performs display control of the variable display unit. CPU 86 reads necessary data from character ROM in accordance with the received effect control command. The character ROM is for storing image data to be displayed on the variable display device 9 in advance.

  Then, the CPU 86 outputs the data read from the character ROM to the VDP. The VDP operates based on data input from the CPU 86. Each VDP has a two-dimensional address space independent of the CPU 86, and VRAM is mapped there. The VDP generates image data to be displayed on the variable display device 9 according to the image data of the character ROM, and the VDP develops the image data in the VRAM. VRAM is a frame buffer memory for expanding image data generated by VDP. The image data developed in the VRAM is output to the variable display device 9.

  In the sound / lamp control microcomputer 700 according to the present embodiment, the sound output means and the light emission means are controlled in response to the effect display on the variation display device 9 performed in this way. The sound / lamp control microcomputer 700 is not limited to this, and only controls the sound output means or controls the light emitting means in response to the effect display on the variable display device 9. There may be.

  The game control microcomputer 560 transmits a payout control command to the payout control board 37. In accordance with the payout control command, the payout control board 37 operates the ball payout device 97 to perform payout control of the game ball. On the other hand, the payout control board 37 transmits a connection confirmation signal for confirming that the card unit 50 and the pachinko gaming machine 1 are connected to the game control microcomputer 560. If the card unit 50 and the pachinko gaming machine 1 are electrically connected, this connection confirmation signal is input to the game control microcomputer 560, but the card unit 50 and the pachinko gaming machine 1 are electrically connected. In the non-connected state, the connection confirmation signal is not input to the game control microcomputer 560. In that case, the game control microcomputer 560 stops the game control operation of the pachinko gaming machine 1.

  The hitting ball launching device for hitting and launching the game ball includes a launch motor 94 controlled by a circuit on the payout control board 37, and launches the game ball toward the game area 7 as the launch motor 94 rotates. A drive signal for driving the firing motor 94 is transmitted to the firing motor 94 via the touch sensor substrate 91. Then, the touch sensor detects that the player is touching the operation knob (hitting ball handle) 5 and a signal from the touch sensor is mounted on the touch sensor substrate 91 (the player applies to the operation knob 5). A circuit including a detection circuit for detecting whether or not it is touched). The circuit on the payout control board 37 stops the driving of the firing motor 94 when the signal from the touch sensor circuit indicates an off state.

  When the card unit 50 and the pachinko gaming machine 1 are not electrically connected, the payout control board 37 transmits a hitting ball stop signal to the touch sensor board 91, thereby playing the game. Even if the person touches the operation knob 5, the launch motor 94 stops or the game ball is not fired.

  Next, it is determined whether to make a big hit or out of the pachinko gaming machine 1 shown in this embodiment, whether to make a probable change state, determination of a change pattern in a change display (whether to reach a reach state) The processing procedure for the control contents such as determination of the stop symbol of the special symbol, etc. will be briefly described.

  Whether to win or not (big hit determination) is determined using a random number circuit 503a (also referred to as random R or random R1) as described later. The random number circuit 503 is a circuit that adds and updates the count value at an extremely high speed (for example, 10 MHz) regardless of clock control (for example, an interrupt process described later). The random number circuit (12-bit random number circuit) 503a is mounted on the game control microcomputer 560. When a signal from the start port switch 14a is input, the count value at that time is latched (temporarily held). When it is determined that there has been a start winning (for example, when the input signal is in the on state while the timer interruption count is performed a predetermined number of times), the latched count value is used as data for the start winning storage in the RAM 55. Store in the storage area.

  When it is determined that the big hit is determined by the big hit determination, the determination (probability change determination) of whether or not to enter the probability variation state uses the count value (random value) of the random counter for probability variation determination (also referred to as random R2). It is done. This random counter is for randomly determining whether or not a probability variation state is to be generated when it is determined to be a big hit in the big hit determination, and is within a predetermined numerical range (for example, 0 to 19). Numerical data updating means for updating numerical data, which is the first when the value of the counter extracted at a predetermined timing such as at the time of starting winning a prize coincides with a predetermined first certainty variation determination value “10-14”. It is determined to be in the probability variation state, and when it is coincident with a predetermined second probability variation determination value “15 to 19”, it is determined to be in the second probability variation state (see FIG. 30). On the other hand, when it is determined that the jackpot determination is out of the range, such a determination is not performed and the probability variation state is not controlled.

  In addition, the symbol determination in the special symbol variation display is performed by using a count value (random number value) of a random counter for special symbol determination (also referred to as random R3). This random counter is for determining a stop symbol of a special symbol, and is a numerical data updating means for updating numerical data within a predetermined numerical range (for example, 0 to 5). The stop symbol of the special symbol is determined based on the counter value extracted from the random R3 at a predetermined timing (for example, at the time of starting winning a prize) before the start of fluctuation. For example, when it is determined by the probability variation determination that the first probability variation state is set, a special symbol stop symbol is determined from predetermined first probability variation big hit symbols based on the counter value extracted from the random R3. When it is determined by the probability variation determination that the second probability variation state is set, the special symbol stop symbol is determined from the predetermined second probability variation big hit symbols based on the counter value extracted from the random R3. . When it is determined by the probability variation determination that the probability variation big hit is not made, a special symbol stop symbol is determined from predetermined non-probable variation big hit symbols based on the value of the counter extracted from the random R3. Further, when it is determined that the winning is determined by the big hit determination, based on the value of the counter extracted from the random R3, the stop symbol of the special symbol is determined from the predetermined missing symbols.

  In this embodiment, it is determined whether or not to change the probability using the random R2 count value, and the special symbol determination is performed to determine the stop symbol of the special symbol using the random R3 count value. Although the example has been described, the present invention is not limited to this, and the probability variation determination and the special symbol determination may be performed using the count value of one random counter. When it is determined that a big hit is determined by the big hit determination, a special symbol determination is performed to determine a stop symbol from the big hit symbol based on the count value from the random counter, and the determined stop symbol is a probability variable big hit symbol Depending on whether or not, the probability variation determination may be performed.

  In addition, the variation pattern for specifying the variation pattern reference variation time in the special symbol display 8 and the variation display in the variation display device 9 is a count value of a random counter for determining a variation pattern (also referred to as random R4). Using (random number value), it is selected and determined from a plurality of types of variation patterns. This random counter is for determining a fluctuation pattern at random, and is a numerical data updating means for updating numerical data within a predetermined numerical range (for example, 0 to 99). Are extracted at a predetermined timing. There are multiple types of variation patterns for when a big hit is determined by the big hit determination and when it is determined that a big hit is determined to be a big hit determination. Based on the relationship between the type and numerical data, the variation executed by the variation pattern corresponding to the numerical data that matches the counter value extracted from the random counter at a predetermined timing before starting the variation of the special symbol, such as at the time of starting winning It is determined as a pattern. In addition, when it is determined that the big hit is determined by the big hit determination, the fluctuation pattern is determined to be out of reach by the big hit determination, and when the reach state is determined by the reach determination (reach out of reach). A plurality of types are provided for each of a case where it is determined that a loss is determined by the jackpot determination and that a reach state is not determined by the reach determination (when the reach is not reached). The plurality of types of variation patterns include variation patterns that specify variation times during which a reach state can be generated in variation display on the variation display device 9. Such a variation pattern is called a reach variation pattern.

  When the reach variation pattern is selected and determined using the count value of the random counter for determining the variation pattern, it is determined that the winning pattern is determined to be out of play, and the left, middle and right symbols of the variation display device 9 are stopped. For determining the number of deviations used to determine the number of deviations (number of symbols, that is, the number of frames) as the deviation of the symbol (medium symbol which is the final stop symbol) with respect to the jackpot display result (combination of jackpot symbols) in the combination of The number of deviations is determined using the count value (random number value) of a random counter (also referred to as random R5). This random counter is for determining the number of deviations at random, and is a numerical data updating means for updating numerical data within a predetermined numerical range (for example, 0 to 4). Are extracted at a predetermined timing.

  When it is determined that a big hit is made by the big hit determination, the variable display device 9 is used for determining the re-lottery used for determining whether or not the re-lottery such as the primary re-lottery display or the secondary re-lottery display is performed. Using a count value (random number) of a random counter (also referred to as random R6), no re-lottery display is performed, primary re-lottery display is performed, secondary re-lottery display is performed, or primary re-lottery display is performed. It is then determined whether or not the secondary re-lottery display is performed. This random counter is numerical data updating means for updating numerical data within a predetermined numerical range (for example, 0 to 9), and is extracted at a predetermined timing such as before the start of fluctuation of a special symbol.

  As described above, the big hit determination function is realized by a numerical data update function using the random number circuit 503 as a hardware circuit built in the game control microcomputer 560. In addition, the probability variation determination function, reach determination function, variation pattern determination function, stop symbol determination function, deviation number determination function, and re-lottery determination function are realized by the numerical data update function using the software of the game control microcomputer 560. Is done.

  FIG. 6 is a block diagram showing components related to payout, such as the payout control board 37 and the ball payout device 97. As shown in FIG. 6, the payout control board 37 is equipped with a payout control microcomputer (an example of an electrical component control microcomputer) including a payout control CPU 371. In this embodiment, the payout control microcomputer is a one-chip microcomputer and has at least a built-in RAM. Further, the RAM is backed up in the same manner as the RAM 55 in the main board 31. The payout control CPU 371, the RAM, the ROM (not shown) storing the payout control program, the I / O port, etc. constitute payout control means. Therefore, the payout control means is realized by a payout control CPU 371, a payout control microcomputer including a RAM, a ROM, and an I / O port, but is mainly realized by a payout control CPU 371 that executes control according to a program.

  Detection signals from the full tank switch 48 and the payout number count switch 301 are input to the I / O port 372 f of the payout control board 37 via the relay board 72. Further, detection signals from the ball break switch 187 and the payout motor position sensor 295 are input to the I / O port 372e of the payout control board 37 via the relay board 72. The payout motor position sensor 295 is a sensor composed of a light emitting element (LED) and a light receiving element for detecting the rotational position of the payout motor 289. The payout control CPU 371 of the payout control board 37 performs the ball payout process when the detection signal from the ball break switch 187 indicates a ball full state or when the detection signal from the full tank switch 48 indicates a full tank state. Stop. Further, when the detection signal from the full tank switch 48 indicates a full tank state, the ball launching from the ball striking device is stopped. The detection signals of the ball break switch 187 and the full switch 48 are also input to the main board 31.

  When there is a winning, the output circuit 67 of the main board 31 outputs a prize ball number command indicating the number of prize balls to be paid out as a payout control command (payout command signal). Then, an INT signal (strobe signal) for instructing fetching of the payout control command is output (turns on). A power supply confirmation signal (connection confirmation signal) indicating that the main board 31 is connected is also output from the output circuit 67 of the main board 31.

  The payout control command is input to the I / O port 372e via the input circuit 373A. The INT signal is input to a maskable interrupt terminal (hereinafter also simply referred to as an interrupt terminal) of the payout control CPU 371. The payout control CPU 371 inputs a payout control command via the I / O port 372e in an interrupt process based on the input of the INT signal to the interrupt terminal, and the number of game balls indicated by the award ball number command is received. In order to pay out, the ball paying device 97 is controlled to be driven. A power supply confirmation signal (connection confirmation signal) indicating that the main board 31 is connected is also output from the output circuit 67 of the main board 31.

  The payout control CPU 371 receives a prize ball information signal indicating the number of prize balls to be paid out and a ball lending number signal indicating the number of balls to be lapped through the output port 372b. Output) 160. A driver circuit is provided outside the output port 372b, but is not shown in FIG.

  Also, the payout control CPU 371 outputs an error signal to the error display LED 374 using a 7-segment LED via the output port 372c. A detection signal from an error release switch 375 for releasing the error state is input to the input port 372f of the payout control board 37. The error cancel switch 375 is used to cancel the error state by software reset.

  Further, a drive signal from the payout control board 37 to the payout motor 289 is transmitted to the payout motor 289 in the payout mechanism portion of the ball payout device 97 via the output port 372a and the relay board 72. A driver circuit (motor drive circuit) is installed outside the output port 372a, but is not shown in FIG. The drive signal from the payout control board 37 to the firing motor 94 is transmitted to the firing motor 94 via the output port 372a and the touch sensor board 91.

  A card unit control microcomputer is mounted on the card unit 50 installed adjacent to the gaming machine. In addition, the card unit 50 is provided with an available display lamp, a connecting table direction indicator, a card insertion display lamp, a card insertion slot, and the like. A frequency display LED 60, a ball lending LED 61, a ball lending switch 62, and a return switch 63 provided in the vicinity of the hitting ball supply tray 3 are connected to the interface board (relay board) 66.

  A card lending switch signal indicating that the ball lending switch 62 has been operated and a return switch signal indicating that the return switch 63 has been operated are given to the card unit 50 from the interface board 66 in accordance with the player's operation. . Further, a card balance display signal indicating a prepaid card balance and a ball lending display signal are given from the card unit 50 to the interface board 66. Between the card unit 50 and the payout control board 37, a connection signal (VL signal), a unit operation signal (BRDY signal), a ball lending request signal (BRQ signal), a ball lending completion signal (EXSC signal) and a pachinko machine operation signal ( PRDY signal) is transmitted / received via the input port 372f and the output port 372d. An interface board 66 is interposed between the card unit 50 and the payout control board 37. Therefore, a signal such as a connection signal (VL signal) is transmitted and received between the card unit 50 and the payout control board 37 via the interface board 66 as shown in FIG.

  FIG. 7 shows a circuit configuration of the main board 31, a signal line of an effect control command transmitted from the main board 31 to the sound / lamp control board 70, and a display transmitted from the sound / lamp control board 70 to the display control board 80. It is a block diagram which shows the signal line of a control command.

  As shown in FIG. 7, the main board 31 is connected with wiring from the start port switch 14a. The main board 31 is also provided with wiring from a special variable winning ball apparatus 20 having a large winning opening, and various switches 29a, 30a, 33a, 39a for detecting a winning of a game ball to other winning holes. It is connected. Further, the main board 31 is connected to a solenoid 16 for opening and closing the variable winning ball apparatus 15, a solenoid 21 for opening and closing the special variable winning ball apparatus 20, and a wiring to the solenoid 21A for switching the path in the special winning opening. .

  The main board 31 includes a game control microcomputer 560, an input driver circuit 58, and an output circuit 59. The game control microcomputer 560 operates in accordance with a clock circuit 501, a reset controller 502 that functions as a system reset means, a random number circuit 503a, a ROM 54 that stores a game control program, a RAM 55 that is used as a work memory, and a program. A CPU 56, a CTC 504 for sending an interrupt request signal to the CPU, and an I / O port 506 are incorporated.

  The clock circuit 501 outputs a system clock signal to the CPU 56, and outputs a reference clock signal CLK having a predetermined period generated by dividing the system clock signal by 27 (= 128) to each random number circuit 503a. When a low level signal is input for a certain period, the reset controller 502 outputs a predetermined initialization signal to the CPU 56 and each random number circuit 503a to reset the game control microcomputer 560.

  As shown in FIG. 7, the game control microcomputer 560 includes a random number circuit 503a. The random number circuit 503a is a random number circuit (hereinafter also referred to as a 12-bit random number circuit) that generates a 12-bit pseudo-random number. The 12-bit random number circuit 503a has a function of generating a random number having a value in a range that can be generated by 12 bits (that is, a range from 0 to 4095). In this embodiment, the case where the game control microcomputer 560 includes one random number circuit will be described. However, the game control microcomputer 560 includes a plurality of random number circuits and switches according to the game state. You may do it.

  Between the main board 31 and the sound / lamp control board 70, there are eight signal lines AD0 to AD7 for transmitting an effect control command and an effect control INT signal signal line for transmitting a strobe signal. Is provided. Further, between the sound / lamp control board 70 and the display control board 80, there are eight signal lines BD0 to BD7 for transmitting display control commands, and signals of display control INT signals for transmitting strobe signals. Lines are provided.

  The sound / lamp control microcomputer 700 receives effect control commands from AD0 to AD7 at the capture timing indicated by the effect control INT signal. The sound / lamp control microcomputer 700 determines an effect to be executed based on the received effect control command, and performs sound control and lamp control to be performed in response to the determined effect. Drive signals and various lamp drive signals are output. Further, the sound / lamp control microcomputer 700 transmits a display control command indicating the display control of the variation display device 9 to be performed in response to the determined presentation using the signal lines BD0 to BD7, and the display control INT. Send a signal.

  The display control microcomputer 800 receives display control commands from the BD0 to BD7 at the capturing timing indicated by the display control INT signal. Then, the display control microcomputer 800 controls the display of the variable display device 9 in accordance with the received display control command. In such a configuration, when the effect determined based on the effect control command is performed in the variable display device 9 by the display control microcomputer 800, the sound / lamp control microcomputer 700 generates the effect in the variable display device 9. Sound control and lamp control are performed in accordance with the above. In other words, by the action of the specific means executed by the sound / lamp control microcomputer 700, the presentation is determined based on the presentation control command as the first control signal, and the display control content for executing the presentation is shown. 2 A display control command as a control signal is specified. The specified display control command is transmitted to the display control microcomputer 800 by the sound / lamp control microcomputer 700. The sound / lamp control microcomputer 700 performs sound control and lamp control corresponding to the display control contents. As a result, it is possible to perform a sound effect or a lamp effect that is consistent (synchronized) with the display effect in the variable display device 9.

  Next, the configuration of the random number circuit 503 will be described. FIG. 8 is a block diagram illustrating a configuration example of the random number circuit 503. In this embodiment, the basic configurations of the 12-bit random number circuit 503a and the 16-bit random number circuit 503b are the same. As shown in FIG. 8, the random number circuit 503 includes a counter 521, a comparator 522, a count value permutation changing circuit 523, a clock signal output circuit 524, a count value update signal output circuit 525, a random value read signal output circuit 526, a random number update. A system selection signal output circuit 527, a selector 528, a random number circuit activation signal output circuit 530, a random value storage circuit 531, an inversion circuit 532, a latch signal generation circuit 533, and a timer circuit 534 are included.

  In this embodiment, the random number circuit 503 determines whether or not the display result of variable display of a plurality of types of identification information is a specific display result (for example, the combination of display symbols of the special symbol display device 8 is a combination of jackpot symbols) A random number for determination is generated. If the game control microcomputer 560 determines that the specific display result is based on the random number generated by the random number circuit 503, the game state is shifted to a specific game state (for example, a big hit game state) advantageous to the player. . It should be noted that a random number for determination other than the jackpot symbol, such as a random number for probability variation determination for determining whether or not the random number generated by the random number circuit 503 is a probability variation, and a random number for variation pattern determination for determining a variation pattern for a special symbol. It may be used as

  The counter 521 receives the predetermined signal selected by the selector 528 and outputs a count value C in response to the signal input from the selector 528. In this case, the counter 521 inputs a predetermined initial value, cyclically updates the count value C from the initial value to a predetermined final value according to a certain rule, and outputs it. Further, when the count value C is updated to the final value, the counter 521 outputs a notification signal indicating that the count value C has been updated to the final value to the CPU 56. In this embodiment, when a notification signal is output from the counter 521, the CPU 56 updates the initial value.

  In this embodiment, every time a signal is input from the selector 528 (every time a rising edge in the signal from the selector 528 is input), the counter 521 increments the count value C from “0” to “4095” by one. Count up. Further, when the counter 521 counts up the count value C to “4095”, the counter 521 outputs a notification signal indicating that the count value C has been updated to the final value to the CPU 56. Then, the CPU 56 inputs a notification signal from the counter 521 and updates the initial value. Then, the counter 521 counts up the count value C again from the initial value updated by the CPU 56 to “4095”. Further, when counting up to “4095”, the counter 521 starts counting from “0” again. Then, the counter 521 outputs a notification signal to the CPU 56 when it counts up to a value (final value) immediately before the updated initial value. In this embodiment, the comparator 522 outputs a notification signal to the counter 521 when all count values are input, as will be described later. In this case, when the notification signal is input from the comparator 522, the counter 521 resets the count value to “0”.

  The count value permutation change circuit 523 includes a count value permutation change register (RSBC) 536, an update rule selection register (RRC) 542, and an update rule memory 543. The count value permutation change register 536 stores count value permutation change data “01h” for changing the permutation (order of arrangement from the initial value to the final value), which is the update order of the count value C counted up by the counter 521. . When the numerical value permutation change data “01h” is stored in the count value permutation change register 536, the count value permutation change circuit 523 displays the count value C permutation that the counter 521 counts up and updates. The permutation is changed to a different permutation from when “01h” is not stored.

FIG. 9 is an explanatory diagram illustrating an example of the update rule selection register 542. The update rule selection register 542 is a register that sets an update rule used for rearranging the order of count values output from the counter 521 (changing the permutation). In this embodiment, an update rule used for changing the permutation of count values output from the counter 521 is set by setting a register value in the update rule selection register 542. As shown in FIG. 9, the update rule selection register 542 is an 8-bit register, and the initial value is set to “0 (= 00h)”. The update rule selection register 542 is configured in a state where bits 0 to 3 can be written and read. In addition, the update rule selection register 542 is configured in a state where bits 4 to 7 cannot be written or read. Therefore, the update rule selection register 54
Even if control is performed to write a value to bit 4 to bit 7 of 2, the value read from bit 4 to bit 7 is all “0 (= 0000b)”.

  The value (register value) of the update rule selection register 542 is changed from “0 (= 00h)” to “15” in response to the count value permutation change data “01h” being written in the count value permutation change register 536. (= 0Fh) ”is updated cyclically. That is, each time the count value permutation data “01h” is written to the count value permutation change register 536, the register value of the update rule selection register 542 is incremented by “1” from “0”. Return to "0".

  FIG. 10 is an explanatory diagram showing an example of the update rule memory 543. As shown in FIG. 10, the update rule memory 543 stores the value (register value) of the update rule selection register 542 and the count value update rule in association with each other. In the example shown in FIG. 10, for example, when the register value 1 is set in the update rule selection register 542, it can be seen that the permutation of the count values output by the counter 521 is changed using the update rule B. In FIG. 10, the update rule A is the same update rule as that by which the counter 521 updates the count value C, and is stored in the update rule memory 543 in association with the register value “0”. Also, in the update rule memory 543, update rules B to P different from the update rule in which the counter 521 updates the count value C are stored in association with the register values “1” to “15”.

  When the count value permutation change data “01h” is written in the count value permutation change register 536, the count value permutation change circuit 523 first counts from the counter 521 until the final count value “4095” is first input. The count value is output as it is according to the currently set update rule. The count value permutation changing circuit 523 changes the count value update rule when the final value “4095” of the count value is input from the counter 521. When the initial value is changed by the CPU 56, the count value permutation changing circuit 523 inputs the final value after the change (the value immediately before the initial value) from the counter 521, and updates the count value. Will be changed.

  The count value permutation change circuit 523 selects an update rule corresponding to the register value of the update rule selection register 542 from the update rule memory 543, and sets it as an update rule used for changing the count value permutation. The count value permutation change circuit 523 changes the permutation from the initial value of the count value to the final value according to the set update rule when the counter 521 starts updating the count value again in order from the initial value “0”. To do. When the initial value is changed by the CPU 56, the count value permutation changing circuit 523 starts counting in accordance with the set update rule when the counter 521 starts updating the count value in order from the changed initial value. The permutation from the initial value to the final value will be changed. Then, the count value permutation change circuit 523 outputs a count value according to the changed permutation.

  In this embodiment, when the maximum random number to be generated is limited by setting the maximum random number in a random number maximum value setting register 535 described later, the count value permutation changing circuit 523 counts The value C is limited to the maximum random number or less, and the permutation is changed and output. For example, it is assumed that the random number maximum value “256” is set in the random number maximum value setting register 535, and the count value permutation changing circuit 523 changes the update rule A to the update rule B to change the count value permutation. Shall. In this case, the count value permutation changing circuit 523 changes the count value permutation to “256 → 255” according to the update rule B based on the random number maximum value “256” set in the random number maximum value setting register 535 of the comparator 522. → → → 0 "and output.

  As described above, when the count value permutation change data “01h” is written in the count value permutation change register 536, the count value permutation change circuit 523 changes the update rule to use the permutation of the count value C. Change and output. Therefore, the randomness of the random number generated by the random number circuit 503 can be improved.

  FIG. 11 is an explanatory diagram illustrating an example in which the count value permutation changing circuit 523 changes the permutation of the count values output from the counter 521. As shown in FIG. 11, the CPU 56 writes the count value permutation change data “01h” into the count value permutation change register 536 at a predetermined timing. Then, 1 is added to the register value of the update rule selection register 542. For example, the register value of the update rule selection register 542 is updated from “0” to “1”. When the register value is updated, the count value permutation changing circuit 523 updates the “update rule A” corresponding to the register value “0” before the update until the final value “4095” of the count value is input from the counter 521 for the first time. The count value is updated according to "." At this time, the count value permutation changing circuit 523 outputs the count values in a permutation of “0 → 1 →... → 4095” according to the update rule A.

  When the final value “4095” of the count value is input from the counter 521, the count value permutation changing circuit 523 selects “update rule B” corresponding to the updated register value “1” from the update rule memory 543. To set. When the count value permutation changing circuit 523 starts to input the count values after the initial value “0” from the counter 521 again, the count value permutation changing circuit 523 changes the permutation of the count values according to the selected “update rule B” and outputs it. In this example, the count value permutation changing circuit 523 changes the permutation from “0 → 1 →... → 4095” to “4095 → 4094 →... → 0” and outputs the count value.

  Thereafter, the count value permutation change register 536 is reset in response to the count value permutation change circuit 523 starting the count value updating operation in accordance with the updated update rule, as will be described later. Then, until the next count value permutation change data “01h” is written to the count value permutation change register 536, the count value permutation change circuit 523 counts the permutation as “4095 → 4094 →. Continue to output values.

  When the count value permutation change data “01h” is written again to the count value permutation change register 536 by the CPU 56, the register value of the count value permutation change register 536 is updated from “1” to “2”. When the final value “4095” of the count value is input from the counter 521, the count value permutation changing circuit 523 selects and sets “update rule C” corresponding to the register value “2” from the update rule memory 543. . When the count value permutation changing circuit 523 starts to input the count value after the initial value “0” again from the counter 521, the count value permutation changing circuit 523 updates and outputs the count value permutation in accordance with the “update rule C” selected and set. In this example, the count value permutation changing circuit 523 changes the permutation from “4095 → 4094 →... → 0” to “1 → 3 →... → 4095 → 0 →. Is output.

  As described above, the count value permutation register 536 is reset, and then the count value permutation data “01h” is written again into the count value permutation change register 536, whereby the permutation of the count values can be further changed.

  FIG. 12 is an explanatory diagram illustrating an example of the count value permutation change register 536. The count value permutation change register 536 is a register that sets count value permutation change data “01h” for changing the permutation of count values counted up by the counter 521. As shown in FIG. 12, the count value permutation change register 536 is a readable 8-bit register, and the initial value is set to “0 (= 00h)”. Further, count value permutation change register 536 is configured such that only bit 0 can be written and read. That is, count value permutation change register 536 is configured such that bits 1 to 7 cannot be written or read. Therefore, even if control is performed to write values to bits 1 to 7 of the count value permutation change register 536, the values read from bits 1 to 7 are all “0 (= 0000000b)”.

  Note that the value of the count value permutation change register 536 is reset by the CPU 56 in response to the count value permutation change circuit 523 starting a count value update operation in accordance with the updated update rule. In this case, the CPU 56 returns the value written in the count value permutation change register 536 from the count value permutation change data “01h” to the initial value “0 (= 00h)”.

  The comparator 522 includes a random number maximum value setting register (RMX) 535 that stores random number maximum value setting data for designating the maximum value of random R (random number maximum value). The comparator 522 limits the update range of the count value updated by the counter 521 according to the random number maximum value indicated in the random number maximum value setting data stored in the random number maximum value setting register 535. In this embodiment, the comparator 522 has a random number maximum value (for example, “00FFh”) indicated by the count value input from the counter 521 and the random number maximum value setting data (for example, “00FFh”) stored in the random number maximum value setting register 535. 256 "). When the comparator 522 determines that the input count value is equal to or less than the random number maximum value, the comparator 522 outputs the input count value to the random value storage circuit 531.

  In this embodiment, the comparator 522 specifically performs the following control. The comparator 522 obtains the initial value of the count value from the CPU 56 when updating the initial value of the count value, and obtains the number of count values from the initial value to the maximum random number. For example, when the initial value of the count value is “157” and the maximum random number value is “256”, the comparator 522 calculates the number of count values from the initial value to the maximum random number value as “100”. Further, the comparator 522 counts up how many count values are input from the initial value as the count values are input from the count value permutation changing circuit 523. When the number of input count values from the initial value reaches “100”, the comparator 522 determines that all count values from the initial value “157” to the maximum value “256” have been input. Then, the comparator 522 outputs a notification signal indicating that all count values have been input to the counter 521. By determining based on the number of count values, even when the count value permutation circuit 523 has changed the count value permutation, the comparator 522 limits the update range of the count value to the maximum random number or less. When all count values are input, a notification signal can be output to the counter 521.

  An operation in which the comparator 522 limits the update range of the count value will be described. In this example, a case where the count value permutation changing circuit 523 selects the update rule A and the random number maximum value “256” is set in the random number maximum value setting register 535 will be described.

While the counter 521 is updating the count value from “0” to “256”, the count value permutation changing circuit 523 updates based on the random number maximum value “256” set in the random number maximum value setting register 535. In accordance with rule A, the count values from “0” to “256” are output to the comparator 522 as they are. In this case, the count value permutation changing circuit 523 receives the value of the random number maximum value “256” from the comparator 522, determines whether the count value input from the counter 521 is larger than the random number maximum value, and the update rule is changed. Even when it is set (for example, update rule B), the count values from “257” to “4095” are compared based on the random number maximum value “256” set in the random number maximum value setting register 535. The data is not output to the device 522. For example, when the initial value is set to “0”, the counter 521 has a final value “2”.
When the count value is updated to “56”, a notification signal is output to the CPU 56. When the notification signal is output, the CPU 56 changes the initial value of the count value of the counter 521. In this example, it is assumed that the initial value is changed to “50” by the CPU 56.

  Based on the update rule A, while the count value is input from “0” to “255” from the count value permutation changing circuit 523, the comparator 522 inputs the count value below the maximum random number “256”. Therefore, the input count value is output to the random value storage circuit 531 as it is. Next, when the count value input from the count value permutation changing circuit 523 reaches “256”, the comparator 522 outputs the input count value to the random value storage circuit 531 and all the values from the initial value to the maximum value. A notification signal indicating that the count value is input is output to the counter 521. Specifically, the comparator 522 receives an initial value (“0” in this example) of the count value from the CPU 56 when changing the initial value of the count value, and the random number maximum value (the main value) from the initial value “0”. In the example, the number of count values up to “256” (in this example, “257”) is obtained. When the number of count values input from count value permutation changing circuit 523 reaches 257, a notification signal indicating that all count values have been input is output to counter 521. In this example, since the CPU 56 changes the initial value to “50”, the counter 521 does not reset the count value even when the notification signal is input from the comparator 522, and the changed initial value “50”. The count value is updated.

  While the counter 521 updates the count value from the changed initial value “50” to “256”, the count value permutation changing circuit 523 sets the random number maximum value “256” set in the random number maximum value setting register 535. Based on the update rule A, the count values from “50” to “256” are output to the comparator 522 as they are. Further, the count value permutation changing circuit 523 does not output the count values from “257” to “4095” to the comparator 522 based on the random number maximum value “256” set in the random number maximum value setting register 535. When the count value to be updated by the counter 521 makes one round (when updated 257 times), when the count value permutation change data is written in the count value permutation change register 536, the count value permutation change circuit 523 Change the permutation of count values and output. For example, when the update rule is changed to the update rule B, the count value permutation changing circuit 523 changes the count value permutation from “256 → 255 →... 50” and outputs the result.

  While the count values from “256” to “50” are input from the count value permutation changing circuit 523, the comparator 522 outputs the input count value as it is to the random value storage circuit 531. Next, when the count value input from the count value permutation change circuit 523 reaches “50”, the comparator 522 outputs the input count value to the random value storage circuit 531 and all the values from the initial value to the maximum value. A notification signal indicating that the count value is input is output to the counter 521. Specifically, the comparator 522 receives the initial count value (“50” in this example) from the CPU 56 when the initial count value is changed, and the random number maximum value (this In the example, the number of count values up to “256” (in this example, “207”) is obtained. When the number of count values input from count value permutation changing circuit 523 reaches 207, a notification signal indicating that all count values have been input is output to counter 521.

  Even when the count value permutation changing circuit 523 changes the count value permutation, the comparator 522 outputs a notification signal to the counter 521 when the number of count values reaches 207. By doing so, even if the permutation of the count values is changed, the notification signal is counted based on the input of all the count values from the initial value “50” to the maximum value “256”. 521 can be output.

  When the notification signal is input from the comparator 522, the counter 521 resets the initial value of the count value and returns it to “0”. Then, the counter 521 updates the count value from “0”. When the value of the counter 521 is updated again from “0”, the count value permutation changing circuit 523 outputs the count values from “49” to “0” to the comparator 522 based on the count value from the counter 521. The comparator 522 outputs the count value to the random value storage circuit 531 based on the count value input from the count value permutation changing circuit 523. When the counter 521 updates the count value to the final value (“49” in this example), the counter 521 outputs a notification signal to the CPU 56. When the notification signal is output, the initial value of the count value of the counter 521 is changed again by the CPU 56.

  By repeating the operation as described above, the comparator 522 causes the counter 521 to continuously count up the count value from “0” to the maximum random number “256”, and the value from “0” to “256”. Is stored in the random value storage circuit 531 as a random R (random number value). In other words, the comparator 522 limits the update range of the count value to the random number maximum value “256” or less, and causes the counter 521 to update the count value.

  FIG. 13 is an explanatory diagram illustrating an example of the random number maximum value setting register 535. FIG. 13A shows an example of the random number maximum value setting register 535 installed in the 12-bit random number circuit 503a. FIG. 13B shows an example of the random number maximum value setting register 535 installed in the 16-bit random number circuit 503b. First, the random number maximum value setting register 535 mounted in the 12-bit random number circuit 503a will be described. As shown in FIG. 13A, in the 12-bit random number circuit 503a, the random number maximum value setting register 535 is a 16-bit register, and the initial value is set to “4095 (= 0FFFh)”. The random number maximum value setting register 535 is configured so that bits 0 to 11 can be written and read. The random number maximum value setting register 535 is configured such that bits 12 to 15 cannot be written or read. Therefore, in the 12-bit random number circuit 503a, even if control is performed to write values to bits 12 to 15 of the random number maximum value setting register 535, the values read from bits 12 to 15 are all “0 (= 0000b)”. Is.

  The random number maximum value set in the random number maximum value setting register 535 has a predetermined lower limit value. In this embodiment, when random number maximum value setting data “0000h” to “00FEh” designating a value smaller than the lower limit value “256” is written in the random number maximum value setting register 535, the CPU 56 stores the random number maximum value setting register. The random number maximum value setting data “0FFFh” for specifying the initial value “4095” is set again in 535. That is, the random number maximum value that can be set in the random number maximum value setting register 535 is from “256” to “4095”, and when the CPU 56 determines that a value smaller than the lower limit value “256” is set, the random number maximum value Is reset to a predetermined value “4095”. The CPU 56 controls the random number maximum value setting register 535 in which the random number maximum value setting data is written to be unwritable until the game control microcomputer 560 is system-reset by the reset controller 502.

  Next, the random number maximum value setting register 535 mounted in the 16-bit random number circuit 503b will be described. As shown in FIG. 13B, in the 16-bit random number circuit 503b, the random number maximum value setting register 535 is a 16-bit register, and the initial value is set to “65535 (= FFFFh)”. Further, in the 16-bit random number circuit 503b, the random number maximum value setting register 535 is configured in a state in which all of the bits 0 to 15 can be written and read.

  When random number maximum value setting data “0000h” to “00FEh” for designating a value smaller than the lower limit value “256” is written in the random number maximum value setting register 535, the CPU 56 stores the initial value in the random number maximum value setting register 535 in the initial value. The random number maximum value setting data “FFFFh” specifying the value “65535” is reset. That is, the random number maximum value that can be set in the random number maximum value setting register 535 is from “256” to “65535”, and when the CPU 56 determines that a value smaller than the lower limit value “256” is set, the random number maximum value Is reset to a predetermined value “65535”. The CPU 56 controls the random number maximum value setting register 535 in which the random number maximum value setting data is written to be unwritable until the game control microcomputer 560 is system-reset by the reset controller 502.

  The clock signal output circuit 524 includes a cycle setting register (RPSB) 537 for storing cycle setting data for designating the cycle of the clock signal output to the selector 528 and the inverting circuit 532 (that is, the count value update cycle). The clock signal output circuit 524 divides the reference clock signal CLK input from the clock circuit 501 mounted on the game control microcomputer 560 based on the period setting data stored in the period setting register 537, and generates a random number circuit. A clock signal (random number generating clock signal SBI1) used to generate a random number value is generated inside 503. By doing so, the clock signal output circuit 524 operates to output the random number generation clock signal SBI1 for updating the count value C to the counter 521 on condition that the clock signal has been input a predetermined number of times. . The period setting data is data for setting how many times the reference clock signal CLK input from the clock circuit 501 is to be divided. The clock output circuit 524 outputs the generated random number generating clock signal SBI1 to the selector 528 and the inverting circuit 532. For example, when the cycle setting data “0Fh (= 16)” is written in the cycle setting register 537, the clock signal output circuit 524 divides the reference clock signal CLK input from the clock circuit 501 by 16, and generates random numbers. A clock signal SBI1 is generated. In this case, the cycle of the random number generating clock signal SBI1 generated by the clock signal output circuit 524 is “cycle of system clock signal × 128 × 16”.

  FIG. 14 is an explanatory diagram illustrating an example of the period setting register 537. As shown in FIG. 14, the period setting register 537 is an 8-bit register, and the initial value is set to “256 (= FFh)”. The cycle setting register 537 is configured in a state where both writing and reading are possible.

In addition, a predetermined lower limit value is determined for the value of the cycle setting data set in the cycle setting register 537. In this embodiment, when the cycle setting data “00h to 06h” designating a value smaller than the lower limit value “system clock signal cycle × 128 × 7” is written in the cycle setting register 537, the CPU 56 In 537, the cycle setting data “07h” for specifying the lower limit value “system clock signal cycle × 128 × 7” is reset. That is, the period that can be set in the period setting register 537 is “system clock signal period × 128 × 7” to “system clock signal period × 128 × 256”, and the CPU 56 is set to a value smaller than the lower limit value. If it is determined that the cycle setting data is correct, the cycle setting data is reset. The CPU 56 controls the period setting register 537 in which the period setting data is written to be unwritable until the game control microcomputer 560 is system-reset by the reset controller 502.

  Note that the clock signal output circuit 524 may output the reference clock signal CLK to the counter 521 and the inverting circuit 532 without setting the period setting data in the period setting register 537. In this case, the CPU 56 does not need to perform processing for setting the value of the cycle setting data set in the cycle setting register 537 by comparing it with the lower limit value. Further, the counter 521 updates the count value C every time the reference clock signal CLK is input from the clock signal output circuit 524.

  The count value update signal output circuit 525 includes a count value update register (RGN) 538 that stores count value update data “01h”. The count value update data is data for requesting update of the count value. Count value update signal output circuit 525 outputs count value update signal SBI 3 to selector 528 in response to count value update data “01h” being written to count value update register 538.

  FIG. 15 is an explanatory diagram illustrating an example of the count value update register 538. As shown in FIG. 15, the count value update register 538 is an unreadable 8-bit register and is configured so that only bit 0 can be written. Therefore, even if control is performed to write a value to bits 1 to 7 of the count value update register 538, it is invalidated.

  The random value read signal output circuit 526 includes a random value take-in register (RLT) 539 for storing random value take-in data “01h”. The random value acquisition data is data for requesting acquisition of the count value to the random value storage circuit 531. The random value read signal output circuit 526 generates a latch value read signal for requesting reading of the random value in response to the random value take-in data “01h” being written in the random value take-in register 539. Output to the circuit 533.

  FIG. 16 is an explanatory diagram showing an example of the random value fetch register 539. As shown in FIG. 16, the random value fetch register 539 is an unreadable 8-bit register. The random value fetch register 539 is configured so that only bit 0 can be written. That is, even if control is performed to write a value to bits 1 to 7 of the random value fetch register 539, it is invalidated.

  The random number update method selection signal output circuit 527 includes a random number update method selection register (RTSB) 540 that stores random number update method selection data. The random number update method selection data is data for designating one of the random number update methods, which is a method for updating the value of the random R. The random number update method selection signal output circuit 527 responds to the random number update method selection data written in the random number update method selection register 540, and corresponds to the random number update method specified by the written random number update method selection data. The update method selection signal is output to the selector 528 and the latch signal generation circuit 533.

  FIG. 17A is an explanatory diagram illustrating an example of the random number update method selection register 540. As shown in FIG. 17A, the random number update method selection register 540 is an 8-bit register, and the initial value is set to “00h”. The random number update method selection register 540 is configured in a state where bits 0 to 1 can be written and read. The random number update method selection register 540 is configured in a state where bits 2 to 7 cannot be written or read. Therefore, even if control is performed to write values to bits 2 to 7 of the random number update method selection register 540, the values are invalidated and all the values read from bits 2 to 7 are “0 (= 000000b)”.

  FIG. 17B is an explanatory diagram of an example of random number update method selection data written to the random number update method selection register 540. As shown in FIG. 17B, the random number update method selection data is composed of 2-bit data. The random number update method selection data “01b” is used to specify the first random number update method. The random number update method selection data “10b” is used to specify the second random number update method. In this embodiment, the first random number update method is a method of updating the count value triggered by the output of the count value update signal SBI3 from the count value update signal output circuit 525. The second random number update method is a method of updating the count value triggered by the output of the random number generation clock signal SBI1 from the clock signal output circuit 524. Further, when the random number update method selection data “01b” or “10b” is written in the random number update method selection register 540, the random number circuit 503 is ready to be activated. On the other hand, when the random number update method selection data “00b” or “11b” is written to the random number update method selection register 540, the random number circuit 503 cannot be activated.

  The selector 528 selects either the count value update signal SBI 3 output from the count value update signal output circuit 525 or the random number generation clock signal SBI 1 output from the clock signal output circuit 524, and outputs it to the counter 521. When a random number update method selection signal (also referred to as a first random number update method selection signal) corresponding to the first random number update method is input from the random number update method selection signal output circuit 527, the selector 528 outputs a count value update signal. The count value update signal SBI3 output from the circuit 525 is selected and output to the counter 521. On the other hand, when a random number update method selection signal (also referred to as a second random number update method selection signal) corresponding to the second random number update method is input from the random number update method selection signal output circuit 527, the selector 528 outputs a clock signal. The random number generation clock signal SBI1 output from the circuit 524 is selected and output to the counter 521. Note that when the first update method selection signal is input from the random number update method selection signal output circuit 527, the selector 528 receives a clock signal in accordance with the count value update signal SBI3 output from the count value update signal output circuit 525. A numerical value update instruction signal for instructing update of numerical data synchronized with the random number generating clock signal SBI1 output from the output circuit 524 may be output to the counter 521.

  The random number circuit activation signal output circuit 530 includes a random number circuit activation register (RSBT) 541 that stores random number circuit activation data “80h”. The random circuit activation data is data for requesting activation of the random number circuit 503. When random number circuit activation data “80h” is written to the random number circuit activation register 541, the random number circuit activation signal output circuit 530 outputs a predetermined random number circuit activation signal to the counter 521 and the clock signal output circuit 537, and the counter 521 and the clock The signal output circuit 524 is turned on. The random number circuit 503 is activated by starting the count value updating operation by the counter 521 and the internal clock signal output operation by the clock signal output circuit 524.

  FIG. 18 is an explanatory diagram showing an example of the random number circuit activation register 541. As shown in FIG. 18, the random number circuit activation register 541 is an 8-bit register, and the initial value is set to “00h”. The random number circuit activation register 541 is configured such that only bit 7 can be written and read. In addition, the random number circuit activation register 541 is configured such that bits 0 to 6 cannot be written or read. That is, even if control is performed to write a value to bits 0 to 6 of the random number circuit activation register 541, it is invalid, and all the values read from bits 0 to 6 are “0 (= 000000b)”.

  The random value storage circuit 531 is a 16-bit register, for example, and stores a random R value that is a random number used in the jackpot determination in the game control process. The random value storage circuit 531 stores the count value C output from the counter 521 via the comparator 522 as a random R value in response to the latch signal SBL input from the latch signal generation circuit 533. Then, each time the latch signal SBL is input from the latch signal generation circuit 533, the random value storage circuit 531 reads the count value C updated by the counter 521 and stores the random R value.

  FIG. 19 is a circuit diagram showing a configuration example of the random value storage circuit 531. As shown in FIG. 19, the random value storage circuit 531 includes two AND circuits 201 and 203, two NOT circuits 202 and 204, 16 flip-flop circuits 2101 to 2116, and 16 OR circuits. 2201-2216.

  As shown in FIG. 19, the input terminal of the AND circuit 201 is connected to the output terminal of the latch signal generation circuit 533 and the output terminal of the NOT circuit 204, and the output terminal is connected to the input terminal of the NOT circuit 202 and the flip-flop circuit 2101. Are connected to clock terminals Clk1 to Clk16. The input terminal of the NOT circuit 202 is connected to the output terminal of the AND circuit 201, and the output terminal is connected to one input terminal of the AND circuit 203.

  The input terminal of the AND circuit 203 is connected to the output terminal of the NOT circuit 202 and the CPU 56 mounted on the game control microcomputer 560, and the output terminal is connected to the input terminal of the NOT circuit 204. The input terminal of the NOT circuit 204 is connected to the output terminal of the AND circuit 203, and the output terminal is connected to one input terminal of the AND circuit 201 and one input terminal of the OR circuits 2201 to 2216.

  The input terminals D1 to D16 of the flip-flop circuits 2101 to 2116 are connected to the output terminal of the comparator 522. The clock terminals Clk1 to Clk16 of the flip-flop circuits 2101 to 2116 are connected to the output terminal of the AND circuit 201, and the output terminals Q1 to Q16 are connected to the other input terminals of the OR circuits 2201 to 2216.

  The input terminals of the OR circuits 2201 to 2216 are connected to the output terminal of the NOT circuit 204 and the output terminals of the flip-flop circuits 2101 to 2116, and the output terminals are connected to the CPU 56 mounted on the game control microcomputer 560. .

  The operation of the random value storage circuit 531 will be described. FIG. 20 is a timing chart showing the timing at which each signal is input to the random value storage circuit 531 and the timing at which the random value storage circuit 531 outputs each signal. As shown in FIG. 20, when the output control signal SBC (high level signal in this example) is not input from the CPU 56 mounted on the game control microcomputer 560 (that is, to one input terminal of the AND circuit 203). When the latch signal SBL is input from the latch signal generation circuit 533 (when the input is at the low level) (at the timing T1, T2, T7 in the example shown in FIG. 20), the two input terminals of the AND circuit 201 are supplied. Both inputs are high. Therefore, the signal SBR output from the output terminal of the AND circuit 201 is at a high level. The signal SBR output from the AND circuit 201 is input to the clock terminals Clk1 to Clk16 of the flip-flop circuits 2101 to 2116.

  The flip-flop circuits 2101 to 2116 are responsive to the rising edges of the signal SBR input from the clock terminals Clk1 to Clk16, and the bit data C1 to C1 of the count value C input from the comparator 522 via the input terminals D1 to D16. C16 is latched and stored as bit data R1 to R16 of the random value. The flip-flop circuits 2101 to 2116 output random R bit data R1 to R16 to be stored from the output terminals Q1 to Q16.

  When the output control signal SBC is not input (in the example shown in FIG. 20, the period up to the timing T3 and the period after the timing T6), the input to one input terminal of the AND circuit 203 is at the low level. The signal SBG output from the output terminal of the circuit 203 is at a low level. The signal SBG output from the AND circuit 203 is inverted by the NOT circuit 204 to be a high level signal. A high level signal is input from the NOT circuit 204 to one input terminal of each of the OR circuits 2201 to 2216.

  As described above, since the input to one of the input terminals of the OR circuits 2201 to 2216 is at a high level, the OR is input regardless of whether the signal input to the other input terminal is at a high level or a low level. The circuits 2201 to 2216 output high level signals. That is, the signals SBO1 to SBO16 output from the OR circuits 2201 to 2216 are all at a high level regardless of whether the values of the input random R bit data R1 to R16 are “0” or “1”. (“1”). By doing so, the value output from the random value storage circuit 531 is always “65535 (= 1111111111111111b)”, and the random R cannot be read from the random value storage circuit 531. That is, even if an attempt is made to read a random number from the random value storage circuit 531, only the same value “65535” can always be read from the random value storage circuit 531, and when the output control signal SBC is not input, the random value storage circuit 531 is in an unreadable (disabled) state. When the 16-bit random number circuit 503b is used, the value “65535” as the random number value may be used. In this case, even if the game control microcomputer 560 reads the value “65535”, it cannot determine whether the value is a random number or an unreadable state. Therefore, in the determination table for each jackpot determination shown in FIG. 27, when the random R is “65535”, it may be set to determine “lost” in advance.

  When the latch control signal SBC is input from the CPU 56 when the latch signal SBL is not input from the latch signal generation circuit 533 (in the example shown in FIG. 20, the period from the timing T4 to the timing T6), Since both inputs to the two input terminals are at a high level, the signal SBG output from the output terminal of the AND circuit 203 is at a high level. The signal SBG output from the AND circuit 203 is inverted in the NOT circuit 204 to be a low level signal. A low level signal is input from the NOT circuit 204 to one input terminal of the OR circuits 2201 to 2216.

  As described above, since the input to one input terminal of the OR circuits 2201 to 2216 is at a low level, when the signal input to the other input terminal is at a high level, the output from the output terminals of the OR circuits 2201 to 2216 is high. A level signal is output. In addition, when a signal input to the other input terminal of the OR circuits 2201 to 2216 is at a low level, a low level signal is output from the OR circuits 2201 to 2216. That is, the values of the random R bit data R1 to R16 input to the other input terminals of the OR circuits 2201 to 2216 are unchanged from the output terminals of the OR circuits 2201 to 2216 (that is, the values of the bit data R1 to R16 are “ “1” is output when it is “1” and “0” when it is “0”). By doing so, random R can be read from the random value storage circuit 531. That is, when the output control signal SBC is input, the random value storage circuit 531 is in a readable (enable) state.

However, if the latch signal SBL is input from the latch signal generation circuit 533 before the output control signal SBC is input from the CPU 56, the input to one input terminal of the AND circuit 203 is at a low level. Even if the output control signal SBC is input while the signal SBL is input (in the example shown in FIG. 20, the period from the timing T3 to the timing T4), the signal SBG output from the output terminal of the AND circuit 203 Remains low. The signal SBG output from the AND circuit 203 is inverted in the NOT circuit 204 to be a high level signal. A high level signal is input from the NOT circuit 204 to one input terminal of the OR circuits 2201 to 2216.

  As described above, since the input to one of the input terminals of the OR circuits 2201 to 2216 is at a high level, the OR is input regardless of whether the signal input to the other input terminal is at a high level or a low level. The signals SBO1 to SBO16 output from the circuits 2201 to 2216 are all at a high level. Even though the output control signal SBC is input, the random R cannot be read from the random value storage circuit 531. That is, when the latch signal SBL is input, the random value storage circuit 531 cannot receive the output control signal SBC. When the 16-bit random number circuit 503b is used, the value “65535” as the random number value may be used. In this case, even if the game control microcomputer 560 reads the value “65535”, it cannot determine whether the value is a random number or an unreadable state. Therefore, in the determination table for each jackpot determination shown in FIG. 27, when the random R is “65535”, it may be set to determine “lost” in advance.

  In addition, when the output control signal SBC is input from the CPU 56 before the latch signal SBL is input from the latch signal generation circuit 533, the input to one input terminal of the AND circuit 201 is at a low level. Even if the latch signal SBL is input while the control signal SBC is input (the timing T5 in the example shown in FIG. 20), the signal SBR output from the output terminal of the AND circuit 201 remains at the low level. It becomes. Therefore, the signal SBR input to the clock terminals Clk1 to Clk16 of the flip-flop circuits 2101 to 2116 does not rise from the low level to the high level, and the random R bit data R1 to R16 stored in the flip-flop circuits 2101 to 2116. Is not updated despite the latch signal SBL being input. That is, when the output control signal SBC is input, the random value storage circuit 531 cannot receive the latch signal SBL.

  The inversion circuit 532 generates an inverted clock signal SBI2 in which the polarity of the clock signal is inverted by inverting the signal level in the random number generation clock signal SBI1 input from the clock signal output circuit 524. Further, the inverting circuit 532 outputs the generated inverted clock signal SBI2 to the latch signal generating circuit 533.

  The latch signal generation circuit 533 is configured using a selector, a flip-flop circuit, and the like. The latch signal generation circuit 533 receives the random number read signal from the random number read signal output circuit 526 and the inverted clock signal SBI2 from the inversion circuit 532, and latch signal for storing the random value in the random value storage circuit 531. SBL is output. The latch signal generation circuit 533 outputs the latch signal SBL according to the random value update method designated by the random number update method selection signal from the random number update method selection signal output circuit 527. In this case, when the first random number update method selection signal output circuit 527 receives the first random number update method selection signal output circuit 527, the latch signal generation circuit 533 selects the inverted clock signal SBI2 output from the inversion circuit 532, and the latch signal This is output to the random value storage circuit 531 as SBL. On the other hand, when the second random number update method selection signal is input from the random number update method selection signal output circuit 527, the latch signal generation circuit 533 inverts the random value read signal output from the random value read signal output circuit 526. In synchronization with the rising edge of the inverted clock signal SBI2 output from the circuit 532, the latch signal SBL is output to the random value storage circuit 531.

  The timer circuit 534 inputs a winning detection signal SBSB from the starting port switch 14a to the effect that the winning of the game ball to the starting port 14 has been detected. The timer circuit 534 measures the time during which the winning detection signal SBSB is continuously input from the start port switch 14a. Then, when the measurement time reaches a predetermined period (for example, 3 mSB), the timer circuit 534 writes the random value fetch data “01h” into the random value fetch register 539 of the random value read signal output circuit 526. For example, the timer circuit 534 is configured by an up counter or a down counter that is activated in response to the input of a high level signal. The timer circuit 534 receives the reference clock signal CLK sequentially input from the clock circuit 501 while the input from the start port switch 14a is at a high level (that is, while the winning detection signal SBSB is continuously input). Count up or down. Then, when the count value to be counted up or down reaches a value corresponding to 3 mSB, the timer circuit 534 determines that the winning detection signal SBSB is input from the start port switch 14a, and receives the random number value capture data “01h”. Write to the random value fetch register 539.

  FIG. 21 is an explanatory diagram showing an example of an address map of a storage area in the game control microcomputer 560. As shown in FIG. 21, the area from address 0000h to address 1FFFh in the storage area of the game control microcomputer 560 is allocated to the ROM 54. An area from addresses 7E00h to 7FFFh is allocated to the RAM 55. Further, the area from the address FD00h to the address FE00h is allocated to a built-in register such as the random number maximum value setting register 535.

  As shown in FIG. 21, the area from address 0000h to address 1FFFh allocated to the ROM 54 includes a user program area and a user program management area. A program (user program) 550 created in advance by a user (for example, a game machine manufacturer) is stored in the user program area in the area of addresses 0000h to 1F7Fh. Further, data (user program execution data) necessary for the CPU 56 to execute the user program 550 is stored in the user program management area in the area of addresses 1F80h to 1FFFh. Of the areas 7E00h to 7FFFh allocated to the RAM 55, the areas 7E00h to 7EFFh are unused areas, and the areas 7EFFh to 7FFFh are used as work areas.

  FIG. 22 is an explanatory diagram showing an example of an address map in the user program management area. As shown in FIG. 22, in the area of address 1F97h, an initial value changing method selected by the user among the initial value changing methods that are methods for changing the initial value input to the counter 521 is designated. The initial value change method setting data is stored. In addition, in the areas 1F98h and 1F99h, RAM address data for specifying an address (designated RAM address) in the RAM 55 designated in advance by the user among addresses 7EFFh to 7FFFh allocated to the RAM 55 is stored. The In this case, of the values indicating the designated RAM address, the lower value of the designated RAM address is stored in the 1F98h address, and the higher value of the designated RAM address is stored in the 1F99h address.

  FIG. 23 is an explanatory diagram of an example of the initial value change method setting data. As shown in FIG. 23, the initial value change data is composed of 8-bit data. The initial value change data “00h” is data specifying that the initial value is not changed as the initial value change method. In this embodiment, when the initial value change data “00h” is set, the counter 521 of the random number circuit 503 updates the count value from a predetermined initial value “0” to a predetermined final value. Become. Further, the initial value change data “01h” is data specifying that the initial value input to the counter 521 is changed to a value based on an ID number for identifying the game control microcomputer 560 as an initial value change method. It is. In this embodiment, when the initial value change data “01h” is set, the initial value of the counter value updated by the counter 521 is changed from “0” to a value based on the ID number. The count value is updated from the initial value to a predetermined final value.

  The user program 550 stored in the user program area will be described. FIG. 24 is an explanatory diagram showing a configuration example of the user program 550. As shown in FIG. 24, in this embodiment, the user program 550 includes a random number circuit setting program 551 composed of a plurality of types of program modules, a display result determination program 552, a count value permutation change program 554, and a random program. And a numerical value update program 555.

  The random number circuit setting program 551 is a program for causing the random number circuit 503 to execute a random number circuit setting process for performing an initial setting for updating the random R value. That is, the CPU 56 functions as random number circuit setting means by executing processing according to the random number circuit setting program 551.

  FIG. 25 is an explanatory diagram showing a configuration example of the random number circuit setting program 551. As shown in FIG. 25, the random number circuit setting program 551 includes a random number maximum value setting module 551a, a random number update method selection module 551b, a cycle setting module 551c, a random number circuit activation module 551d, as a plurality of types of program modules. An initial value changing module 551e and a random number circuit selecting module 551f are included.

The random number maximum value setting module 551a is a program module for causing the random number circuit 503 to set the maximum value of the random R preset by the user (for example, the manufacturer of the gaming machine). The CPU 56 executes processing according to the random number maximum value setting module 551a, thereby writing random number maximum value setting data for specifying the maximum value of the random R preset by the user in the random number maximum value setting register 535. By doing so, the CPU 56 sets the maximum value of the random R preset by the user in the random number circuit 503. For example, when “255” is set in advance as the maximum value of the random R by the user, the CPU 56 writes the random number maximum value setting data “00FFh” in the random number maximum value setting register 535, and the maximum value of the random R is “255”. Is set in the random number circuit 503.

  The random number update method selection module 551b is a program module for causing the random number circuit 503 to set the random number update method (first random number update method or second random number update method) selected by the user. The CPU 56 writes the random number update method selection data “01b” or “10b” designating the random number update method selected by the user in the random number update method selection register 540 by executing the process according to the random number update method selection module 551b. By doing so, the CPU 56 sets the random number update method selected by the user in the random number circuit 503. Therefore, the game control microcomputer 560 has a function of selecting either the first random number update method or the second random number update method as the random number update method used by the random number circuit 503 for the random number update.

  The cycle setting module 551c is a program for causing the random number circuit 503 to set the cycle of the internal clock signal preset by the user (that is, the cycle in which the clock signal output circuit 524 outputs the clock signal to the selector 528 and the inverting circuit 532). It is a module. The CPU 56 writes the period setting data for designating the period of the internal clock signal preset by the user in the period setting register 537 by executing the process according to the period setting module 551c. By doing so, the CPU 56 sets the cycle of the internal clock signal preset by the user in the random number circuit 503. For example, when the cycle of the internal clock signal is set in advance as “system clock signal cycle × 128 × 16” by the user, the CPU 56 writes the cycle setting data “0Fh” in the cycle setting register 537 and sets the internal clock signal The period “system clock signal period × 128 × 16” is set in the random number circuit 503.

  The random number circuit activation module 551d is a program module for activating the random number circuit 503. The CPU 56 activates the random number circuit 503 by writing the random number circuit activation data “80h” to the random number circuit activation register 541 by executing processing according to the random number circuit activation module 551d.

  The initial value change module 551e is a program module for changing the initial value of the count value updated by the counter 521. The CPU 56 functions as an initial value changing unit by executing processing according to the initial value changing module 551e. The CPU 56 executes the initial value changing module 551e to change the initial value of the count value updated by the counter 521 by the initial value changing method selected by the user. By doing so, the game control microcomputer 560 has a function of selecting an initial value changing method.

  In this embodiment, when initial value change method setting data “01h” is stored in the area of address 1F97h in the user program management area, the CPU 56 sets the initial value of the count value for each game control microcomputer 560. The value is changed to a value calculated based on the assigned unique ID number.

  For example, the game control microcomputer 560 associates in advance a predetermined storage area of the RAM 55 with the ID number of the game control microcomputer 560 and the calculated value obtained by performing a predetermined calculation based on the ID number. I remember it. In this case, for example, if the ID number of the game control microcomputer 560 is “100”, the calculated value “150” obtained by adding the predetermined value “50” to the ID number “100” is set in advance as the ID number. Are stored in association with each other. Further, for example, the calculated value “50” obtained by subtracting the predetermined value “50” from the ID number “100” is stored in advance in association with the ID number. Further, for example, only a predetermined value may be stored in advance in association with the ID number. Then, the game control microcomputer 560 uses a value “150” obtained by adding an ID number (for example, “100”) to a predetermined value (for example, “50”) stored in advance as an initial value of the count value. In addition, the game control microcomputer 560 uses a value “50” obtained by subtracting a predetermined value (for example, “50”) stored in advance from the ID number (for example, “100”) as the initial count value. It may be a value.

  When the initial value change method setting data “01h” is stored, the CPU 56 changes the initial value of the count value to the calculated value based on the ID number stored in advance. By doing so, the randomness of the random number generated by the random number circuit 503 can be further improved, and the initial value of the random number can be made difficult to recognize only by looking at the ID number of the game control microcomputer 560. . Therefore, it is possible to more reliably prevent the transition condition to the big hit state from being illegally established by an action such as generating a captured signal using a radio signal to the gaming machine, and improving security. Can be improved.

  For example, when initial value change method setting data “01h” is stored, the CPU 56 calculates the ID number of the game control microcomputer 560 and a predetermined value (for example, adds the predetermined value to the ID number). The initial value of the count value is changed to the calculated value obtained. In this case, for example, the CPU 56 may calculate a value that is randomly changed using a random number as an ID number, thereby randomly updating a value used for the calculation and obtaining an initial value. By doing so, the randomness of the random numbers generated by the random number circuit 503 can be further improved.

  The random number circuit selection module 551f is a program module for setting a random number circuit to be used when executing a timer interrupt process including a game control process from among the random number circuits 503 built in the game control microcomputer 560. The CPU 56 executes a process according to the random number circuit selection module 551f, so that any of the two random number circuits (12-bit random number circuit 503a and 16-bit random number circuit 503b) built in the game control microcomputer 560 is selected. Set whether to use when executing timer interrupt processing. For example, the CPU 56 uses a 12-bit random number circuit 503a or 16-bit as a random number circuit used when executing the timer interrupt process according to a predetermined set value (a value set in advance by the user) stored in a predetermined storage area of the RAM 55. The random number circuit 503b is set.

  Note that both the 12-bit random number circuit 503a and the 16-bit random number circuit 503b may be set as random number circuits used when the timer interrupt process is executed. In this case, for example, the game control microcomputer may perform a jackpot determination based on the random number generated by the 12-bit random number circuit 503a and may perform the probability variation determination based on the random number generated by the 16-bit random number circuit 503b. . In this embodiment, the random value storage circuit 531 is present in each of the 12-bit random number circuit 503a and the 16-bit random number circuit 503b (that is, a random number storage circuit that stores a random number for 12 bits and a random number for 16 bits). And a random number storage circuit for storing the same). When both the 12-bit random number circuit 503a and the 16-bit random number circuit 503b are set, the game control microcomputer 560 outputs the random number read from the 12-bit random number circuit 503a and the random number read from the 16-bit random number circuit 503b. , And stored in separate buffer areas provided in the RAM 55. Therefore, even when the timing for reading a random number from the 12-bit random number circuit 503a and the timing for reading a random number from the 16-bit random number circuit 503b are the same, two different random numbers can be extracted and stored in different buffer areas.

  The random value update program 555 is a program for updating the value of the random R stored in the random value storage circuit 531 when the first random number update method is selected as the random number update method. The CPU 56 functions as a random value updating unit by executing processing according to the random value updating program 555. When the first random number update method is selected, the CPU 56 executes the random number value update program 555 and writes the count value update data “01h” in the count value update register 538, whereby the count value is stored in the counter 521. And the value of the random R stored in the random value storage circuit 531 is updated. When the second random number update method is selected as the random number update method, the counter 521 is updated with the random number generation clock signal output from the clock signal output circuit 537, and the random value storage circuit 531 is updated. The value of random R stored in is updated.

  The display result determination program 552 is a program for determining whether or not the display result in the special symbol display device 8 is a jackpot symbol. The CPU 56 functions as a display result determination unit by executing processing according to the display result determination program 552.

  In this embodiment, the CPU 56 follows the display result determination program 552 in response to the fact that the game ball has won the variable winning ball device 15 and a condition (execution condition) for executing the variable symbol variable display is established. Execute the process. Then, the CPU 56 reads the updated random R value from the random value storage circuit 531 and determines whether or not the display result in the special symbol display device 8 is a jackpot symbol.

  FIG. 26 is an explanatory diagram illustrating an operation in which the CPU 56 updates the random R value or reads the random R value when the first random number update method is selected. As shown in FIG. 26, when the first random number update method is selected, the CPU 56 writes the count value update data “01h” into the count value update register 538, thereby storing the random value stored in the random value storage circuit 531. The value of R (for example, “2”) is updated. Then, the CPU 56 receives the random R value from the random value storage circuit 531 in response to the fact that the game ball has won the variable winning ball device 15 and the condition (execution condition) for executing the variable symbol special display is established. (For example, “2”) is read out.

  When the random R value stored in the random value storage circuit 531 is further updated, an interval equal to or longer than the cycle of the system clock signal output from the clock circuit 501 has elapsed since the random R value was updated during the previous update. Sometimes, the count value update data “01h” must be written to the count value update register 538. This is because it is necessary to secure time for reading the updated random R value from the random value storage circuit 531.

  FIG. 27 is an explanatory diagram illustrating an operation in which the CPU 56 updates the random R value or reads the random R value when the second random number update method is selected. As shown in FIG. 27, when the second random number update method is selected, the CPU 56 writes the random value take-in command “01h” into the random value take-in register 539, thereby outputting the count value output from the counter 521. (For example, “2”) is taken into the random value storage circuit 531 to update the random R value stored in the random value storage circuit 531. Then, the CPU 56 reads the updated random R value (for example, “2”) from the random value storage circuit 531.

  Specifically, when the second random number update method is selected, the counter 521 updates the count value C using the input of the random number generation clock signal SBI1 as a trigger. After that, when the random value fetch command “01h” is written to the random value fetch register 539, the latch signal generation circuit 533 outputs the latch signal SBL to the random value storage circuit 531. Then, the random value storage circuit 531 reads and stores the count value output from the counter 521 with the input of the latch signal SBL as a trigger. Then, the CPU 56 reads the value of random R stored in the random value storage circuit 531.

  If the CPU 56 does not write the random value acquisition command “01h” to the random value acquisition register 539, even if the counter 521 updates the count value, the random value storage circuit 531 stores the random value that the counter 521 updates. Do not read. For example, the CPU 56 writes the random value acquisition command “01h” into the random value acquisition register 539, causes the count value “3” output from the counter 521 to be acquired into the random value storage circuit 531, and the random value storage circuit 531 stores it. Assume that the random R value “3” is updated. In this case, if the CPU 56 does not write the random number value capture command “01h” again in the random number capture register 539, the count value output from the counter 521 is updated from “3” to “4” or “5”. The random value stored in the random value storage circuit 531 is not updated, and the random value read from the random value storage circuit 531 remains “3”.

  The count value permutation change program 554 writes count value permutation change data “01h” to the count value permutation change register 536, and executes count value permutation change processing for changing the permutation of count values stored in the random value storage circuit 531. It is a program for. The CPU 56 functions as numerical data permutation changing means by executing processing according to the count value permutation changing program 554. The CPU 56 executes the count value permutation change program 554 and writes the count value permutation change data “01h” in the count value permutation change register 536, whereby the count value permutation change circuit 523 outputs and inputs to the random value storage circuit 531. The permutation of the count values to be changed.

  As shown in FIG. 28, the game control microcomputer 560 includes a special figure holding memory 570, a jackpot determination table memory 571, a flag memory 572, a start winning port switch timer memory 573, and a variation pattern determination table memory. 574.

  In the special figure holding memory 570, the game ball wins the variable winning ball apparatus 15 and the execution condition for the special symbol variation display is established, but the variation display start condition is not yet established (for example, the special symbol display device 8 is a memory for storing pending data including the number of times the execution condition of the variable display is satisfied. The special figure holding memory 570 has four entries, and each entry is read from the random number storage circuit of the random number circuit 503a according to the winning number in the order in which the game balls are won in the variable winning ball device 15. Random R values are stored in association with each other. In addition, whenever the special symbol variation display on the special symbol display 8 is finished once or the big hit gaming state is terminated, the variation display start condition based on the top information of the special symbol holding memory 570 is set. The change display based on the top information of the special figure holding memory 570 is executed. In this case, when the start condition of the special symbol variation display is satisfied, the information registered in the second or lower place in the special figure holding memory 570 is advanced by one place. Further, when the game ball newly wins the variable winning ball device 15 during the special symbol variation display, the random R value read from the random value storage circuit based on the new winning is the special figure pending. It is registered in an empty entry in the memory 570.

  The jackpot determination table memory 571 stores a plurality of jackpot determination tables and the like used by the CPU 56 to determine whether or not the display result of the special symbol display 8 is a jackpot symbol. Specifically, the big hit determination table memory 571 includes a normal big hit determination table used in the normal state shown in FIG. 29, a positive change big hit determination table used in the probability change state, and a positive change in the big hit determination shown in FIG. FIG. 32 shows a probability variation determination table used to determine whether or not to enter a state, a non-probability variation big hit table used to determine whether or not a re-lottery is performed at the time of non-probability big hit shown in FIG. A probability variation big hit table used to determine whether or not a re-lottery is performed at the time of the first probability variation big hit shown in (a), and whether or not a re-lottery is performed at the second probability variable big hit shown in FIG. A probability variation big hit table used for determination and a loss time table used to determine the number of shifts and the like when the reach shifts shown in FIG. 33 are stored.Here, using FIG. 29 to FIG. 33, the normal big hit determination table, the probability variation big hit determination table, the probability variation judgment table, the non-probability variation big hit table, the probability variation big hit stored in the big hit judgment table memory 571. The time table and the off time table will be described.

  First, referring to FIG. 29, the normal big hit determination table is a value for determining that a value that can be extracted from random R1 is different from a value for determining a big hit as a value that is normally looked up. The symbol contents can be specified in correspondence with the distribution. The normal-time big hit determination table performs a determination to make a big hit when the value from the random R1 is “0 to 11”, and makes a determination to make a shift when the value is other than “0 to 11”. Distribution is set to do.

  In addition, the probability change big hit determination table is assigned in advance to a value that can be extracted from the random R1 as a value that is determined to be a big hit as a value that is looked up at the time of probability change, Corresponding to the distribution, the symbol contents can be specified. The probability change big hit determination table makes a decision to make a big hit when the value from the random R1 is “0 to 59”, and makes a decision to make a shift when the value is other than “0 to 59”. Distribution is set to do.

  When the big hit is determined, the probability variation determination table shown in FIG. 30 is referred to. The probability variation determination table determines whether to make a big hit with a non-probable variation symbol when the value from the random R2 is “0-9”, and makes a big hit with the first probability variation symbol when it is “10-14”. The distribution is set so that the determination is made, and when it is “15 to 19”, the determination is made to make a big hit by the second probability variation symbol.

  When it is determined to make a big hit based on a non-probability variable symbol, the non-probable big hit table shown in FIG. 31 is referred. The non-probability big hit table determines that there is no re-lottery when the value from the random R6 is “0-4”, and executes the primary re-lottery display when it is “5-6”. Is determined to execute secondary re-lottery display when it is “7-8”, and is determined to execute primary re-lottery display and secondary re-lottery display when it is “9”. , Distribution is set.

  The game control microcomputer 560 determines that the sound / lamp control microcomputer 700 is to be a non-probable big hit by big hit determination, and when the re-lottery is not executed, “8100h” is set as an effect control command. When the symbol command is transmitted and the determination to execute the primary re-lottery display is performed, the symbol command “8101h” is transmitted as the effect control command, and the determination to execute the secondary re-lottery display is performed. The symbol command “8102h” is transmitted as the effect control command, and the symbol command “8103h” is transmitted as the effect control command when it is determined that the primary re-lottery display and the secondary re-lottery display are executed. . When “8101h” or “8103h” is transmitted as the symbol command, a value of “15” is set as the value of α indicating the time for performing the first re-lottery display. When “8100h” or “8102h” is transmitted as the symbol command, a value of “0” is set as the value of α. The symbol commands 8101h to 8103h are multi-commands that specify that it has been determined to make a non-probable big hit by big hit determination and that it has been decided to perform re-lottery display.

  When it is determined to make a big hit based on the first probability variation symbol, the first probability variation big hit table shown in FIG. The first probability variation big hit table determines that there is no re-lottery when the value from the random R6 is “0”, and determines that the primary re-lottery display is executed when the value is “1-3”. When “4-6”, the determination to execute the secondary re-lottery display is performed, and when “7-9”, the determination to execute the primary re-lottery display and the secondary re-lottery display is performed. , Distribution is set.

  When it is determined to make a big hit based on the first probability variation symbol, the probability variation big hit table shown in FIG. 32 is referred to. The probability variation big hit table determines that there is no re-lottery when the value from the random R6 is “0”, and determines that the primary re-lottery display is executed when the value is “1-3”. It is determined that the secondary re-lottery display is executed when it is “4-6”, and the primary re-lottery display and the secondary re-lottery display are determined when it is “7-9”. Minutes are set.

  The game control microcomputer 560 determines that the sound / lamp control microcomputer 700 is to be the first probability variable big hit by big hit determination, and “8104h” as the effect control command when the re-lottery is not executed. When the symbol command is transmitted and the determination to execute the primary re-lottery display is made, the symbol command “8105h” is transmitted as the effect control command, and the determination to execute the secondary re-lottery display is made. The symbol command “8106h” is transmitted as the effect control command, and the symbol command “8107h” is transmitted as the effect control command when it is determined that the primary re-lottery display and the secondary re-lottery display are executed. The When “8105h” or “8107h” is transmitted as the symbol command, the value “15” is set as the value of α. When “8105h” or “8107h” is transmitted as the symbol command, a value of “0” is set as the value of α. The symbol commands 8105h to 8107h are multi-commands that specify that it is determined to be a probable big hit by big hit determination and that it is decided to perform a re-lottery display.

  When it is determined to make a big hit based on the second probability variation symbol, the second probability variation big hit table shown in FIG. 32B is referred to. In the second probability variation big hit table, when the value from the random R6 is “0 to 9”, that is, all the possible values of the random R6 are determined not to be redrawn, and the symbol command transmitted at that time is “811Eh”, and a value of “0” is set as the value of α.

  When it is determined to be lost, a loss time table shown in FIG. 33 is referred to. The non-reach time table that is referred to when the fluctuation pattern determined as described later does not generate reach and the non-reach time table that is determined as described later and the fluctuation pattern determined as described later generate reach. It is composed of a reach time table that is referred to when the reach shift variation pattern.

  The non-reach time table is configured to set an outage that does not generate reach as the symbol content. The game control microcomputer 560 transmits a symbol command “8108h” as an effect control command to the sound / lamp control microcomputer 700 when it is determined that the game is to be disengaged by the jackpot determination and no reach is generated. Is done.

  The reach time table determines that when the value from the random R5 is “0”, the middle symbol is left and “+1 frame shift” from the right symbol, and when it is “1”, the middle symbol is left, The right symbol is determined to be “+2 frame shift”. When “2”, the middle symbol is determined to be left and from the right symbol is “−1 frame shift”. When it is “3”, the middle symbol is determined. Is determined to be “-2 frames shifted” from the left and right symbols, and when “4”, the distribution is determined to be determined as “± 3 frames shifted” from the left and right symbols. Is set. Here, the top means one design of a decorative design.

  Note that the game control microcomputer 560 is a time when the sound / lamp control microcomputer 700 is determined to be out of the jackpot determination and the reach to generate reach is out of place, and the “+1 frame shift” is detected. "8109h" symbol command is transmitted as an effect control command when the determination "" is made, and "810Ah" symbol command is transmitted as an effect control command when the determination is "+2 frame shift" The symbol command “810Bh” is transmitted as an effect control command when the determination of “−1 frame shift” is made, and as the effect control command when the determination of “−2 frame shift” is made. When the symbol command of “810Ch” is transmitted and it is determined that “± 3 frames shift”, the effect is produced. The symbol command of "810Dh" is transmitted as a control command.

  When “8108h” is transmitted as a symbol command, a value of “0” is set as a value of β indicating a time for variably displaying symbols (symbol frame advance) for the number of deviations. When “8109h” is transmitted as the symbol command, a value of “1” is set as the value of β. When “810Ah” is transmitted as the symbol command, a value of “2” is set as the value of β. When “810Bh” is transmitted as the symbol command, a value of “−1” is set as the value of β. When “810Ch” is transmitted as a symbol command, a value of “−2” is set as a value of β. When “810Dh” is transmitted as the symbol command, a value of “3” is set as the value of β. The symbol commands 8109h to 810Dh are multi-commands that specify that the reach is determined to be shifted and the determined number of shifts of the middle symbol.

  Here, the number of symbol shifts is described. FIG. 34 is a diagram for explaining the number of misplaced decorative designs. In FIG. 34, when the reach is shifted, the number of shifts of the medium symbol with respect to the combination of the big hit symbols will be described using an example in which “3” is used as a reference (when 333 is a combination of the big hit symbols). The display order of the decorative symbols is determined in advance in the symbol order of “0” to “5”. For example, the symbol displayed before “3” is a jackpot symbol (“3”) + 1 frame “4”, and the symbol displayed after “3” is a jackpot symbol (“3”) − 1. It is “2” of the frame. In the case of this embodiment, the decorative symbols are six symbols of “0” to “5”, and the number of shifts of the middle symbol with respect to the big hit symbol can be specified in the range of “± 1” to “± 3”.

  Returning to FIG. 28, various flags used in the game control process for controlling the progress of the game are set in the flag memory 572. For example, in the flag memory 572, a probability change flag indicating that the gaming state is a probability change state and a big hit flag indicating that the game state is a big hit state are set.

  The start port switch timer memory 573 stores a timer value that is added or cleared in accordance with the winning detection signal SS input from the start port switch 14a.

  The variation pattern determination table memory 574 stores a variation pattern determination table used by the CPU 56 to determine a variation pattern for specifying the reference variation time for variation display in the special symbol display 8 and the variation display device 9. The reference variation time is a reference time for calculating variation time for performing variation display in the special symbol display 8 and the variation display device 9. For example, when the above-described primary re-lottery display is performed during the variation display, the variation time is calculated by adding the value of α to the reference variation time. Further, when the reach is lost, the fluctuation time is calculated by adding the value of β to the reference fluctuation time.

  Here, the variation pattern determination table stored in the variation pattern determination table memory 574 will be described with reference to FIG. As the variation pattern in the present embodiment, one variation pattern is determined based on the state of the big hit flag and the value of the random R4 that are set when it is determined that the big hit is made by the big hit determination.

  When the big hit flag is set to the ON state, the big hit hour variation pattern determination table is referred to. The big hit hour fluctuation pattern determination table is determined as a fluctuation pattern in which one fluctuation pattern per normal reach having a reference fluctuation time of “20 seconds” is executed when the value of the random R4 is within a range of “0 to 9”. Two fluctuation patterns per normal reach having a reference fluctuation time of “25 seconds” when it is within the range of “10 to 19” are determined as execution patterns, and when within the range of “20 to 39”, the reference fluctuation time is “35”. As a variation pattern to be executed, one variation pattern per super reach of “second” is executed as a variation pattern, and two variation patterns per super reach having a reference variation time of “45 seconds” when the variation range is “40 to 99”. Distribution is set as determined. In this way, the big hit fluctuation pattern determination table is executed in the order of two fluctuation patterns per normal reach, one fluctuation pattern per super reach, and two fluctuation patterns per super reach, rather than the ratio at which one fluctuation pattern per normal reach is determined. The distribution is set so that the ratio determined as the fluctuation pattern is high.

  On the other hand, when the big hit flag is not set to the ON state, the loss variation pattern determination table is referred to. The deviation variation pattern determination table is determined as a variation pattern to be executed by a normal deviation variation pattern having a reference variation time of “10 seconds” when the value of the random R4 is within the range of “0 to 79”. When the value is within the range of “˜87”, the normal reach deviation with the reference fluctuation time of “15 seconds” is determined as the fluctuation pattern to be executed. ”Is determined as the variation pattern to be executed, and when it is within the range of“ 93 to 96 ”, the super-reach out of 1 variation pattern is determined as the variation pattern to be executed. , The fluctuation pattern executed by the two fluctuation patterns out of the super reach with the reference fluctuation time of “40 seconds” within the range of “97 to 99”. As determined as over emissions, sorting is set. In this way, the deviation variation pattern determination table has the highest rate of determination of the deviation deviation from the normal, the normal reach deviation 1 fluctuation pattern, the normal reach deviation 2 fluctuation pattern, the super reach deviation 1 fluctuation pattern, and the super reach deviation deviation 2 fluctuation pattern. In this order, the distribution is set so that the ratio determined as the variation pattern to be executed becomes lower.

  The game control microcomputer 560 uses the deviation variation pattern determination table, and a variation pattern command of “8000h” is transmitted as an effect control command when a variation variation pattern of normal is determined as the variation pattern. A variation pattern command of “8001h” is transmitted as an effect control command when the normal reach deviation 1 variation pattern is determined, and a variation pattern command of “8002h” is transmitted as an effect control command when the normal reach deviation 2 variation pattern is determined. Then, when the super-reaching deviation 1 variation pattern is determined, a variation pattern command “8003h” is transmitted as an effect control command, and when the super-reaching deviation 2 variation pattern is determined, 8004h "variation pattern command of is sent.

  The game control microcomputer 560 uses a big hit hour variation pattern determination table, and when a variation pattern is determined as one variation pattern per normal reach, a variation pattern command of “8010h” is transmitted as an effect control command. When two variation patterns per normal reach are determined, a variation pattern command “8011h” is transmitted as an effect control command. When one variation pattern per super reach is determined, a variation pattern command “8012h” is defined as an effect control command. Is transmitted, and a variation pattern command of “8013h” is transmitted as an effect control command when two variation patterns per super reach are determined.

  Next, with reference to FIG. 36, a timing chart showing an example of a decorative symbol variation display in the case of reaching out of reach will be described. At the start of variation, for example, “810Dh” indicating a ± 3 frame shift as a symbol command and “8003h” indicating one shift pattern as a variation pattern command from the game control microcomputer 560 are sound / lamp control microcomputers. Suppose that it is transmitted to 700.

  When the sound / lamp control microcomputer 700 receives the variation pattern command and the symbol command, the variation display device 9 starts the variation display of the left, middle and right symbols all at once, and stops and displays the left and right symbols. When a symbol is generated, the symbols from -3 frames are shifted to symbols that are -2 frames shifted, -1 frame shifted, symbols that are a combination of jackpot symbols, +1 frames shifted, and +2 frames shifted. When the feed is displayed, the symbol confirmation command is received at the timing when the symbol frame advance is displayed up to +3 frames shifted, the middle symbol stops at the symbol shifted by +3 frames on the left and right symbols, and the decorative symbol is displayed. The change display of is terminated. Note that the reference variation time described above with reference to FIG. 35 refers to the time that elapses from the start of variation display until the symbol that is a combination of the big hit symbols passes through symbol frame advancement. The fluctuation time refers to the time elapsed from the start of the fluctuation display until the middle symbol stops the symbol shifted by +3 frames of the left and right symbols, that is, the time obtained by adding the value of β to the reference fluctuation time.

  Next, the operation of the pachinko gaming machine 1 will be described. FIG. 37 and FIG. 38 show the main process executed by the game control microcomputer 560 in response to the start of power supply to the pachinko gaming machine 1 and the reset signal to the game control microcomputer 560 becoming high level. It is a flowchart which shows. When the input level of the reset terminal to which the reset signal is input becomes high level, the game control microcomputer 560 executes a security check process that is a process for confirming whether the contents of the program are valid, The main process after S (hereinafter simply referred to as S) 1 is started. In the main process, the game control microcomputer 560 first performs necessary initial settings.

  In the initial setting process, the game control microcomputer 560 first sets the interruption prohibited (S1). Next, an interrupt mode for maskable interrupts is set (S2), and a stack pointer designation address is set in the stack pointer (S3). In S2, an address synthesized from the value (1 byte) of the specific register (I register) of the game control microcomputer 560 and the interrupt vector (1 byte: least significant bit 0) output from the built-in device is Set to the mode that indicates the included address. When a maskable interrupt is generated, the game control microcomputer 560 automatically sets the interrupt disabled state and saves the contents of the program counter in the stack.

  Next, the built-in device register is set (initialized) (S4). By the process of S4, the CTC (counter / timer) and PIO (parallel input / output port), which are built-in devices (built-in peripheral circuits), are set (initialized).

  The game control microcomputer 560 used in this embodiment also incorporates an I / O port (PIO) and a timer / counter circuit (CTC) 504.

  Next, it is confirmed whether or not the power-off signal is in an OFF state according to the state of bit 0 of the input port 1 (S5). When power supply to the pachinko gaming machine 1 is started, the output voltage of various power sources such as a + 5V power source gradually reaches a specified value, but the power-off signal is not output by the process of S5 (that is, By confirming that the power supply voltage is stable, the game control microcomputer 560 can confirm that the power supply voltage is stable.

  When the power-off signal is on, the game control microcomputer 560 turns off the power-off signal again after a predetermined period (for example, 0.1 second) (S80). Check if it exists. If the power-off signal is off, the RAM 55 is set to an accessible state (S6), and the process proceeds to a clear signal check process.

  When the power-off signal is in the on state, software delay processing for delaying the start timing of the gaming device control processing (game control processing) for controlling the progress of the game by software may be executed. By such software delay processing, the start timing of the game control processing can be delayed as compared with the case where the software delay processing is not executed. When the delay process is executed, a situation occurs in which another control board cannot receive a command transmitted from the game control board (main board 31) with respect to another control board (for example, the payout control board 37). Can be prevented.

  Note that the game control microcomputer 560 may confirm the state of the clear signal only once via the input port 0, but may confirm the state of the clear signal a plurality of times. For example, when it is confirmed that the clear signal is in the off state, after a delay time of a predetermined time (for example, 0.1 seconds), the clear signal state is reconfirmed. If it is confirmed that the clear signal is in the ON state at that time, it is determined that the clear signal is in the ON state. Further, at this time, if it is confirmed that the clear signal is in the OFF state, after a predetermined delay time, the clear signal state may be reconfirmed. Here, the number of reconfirmations is not limited to once or twice, but may be three or more times. It is also possible to check twice and check again when the check results do not match.

  Next, the game control microcomputer 560 checks whether or not the clear switch-on flag is set (S7). If the clear switch on flag is not set, data protection processing of the backup RAM area (for example, power supply stop processing such as addition of parity data) is performed when power supply to the pachinko gaming machine 1 is stopped. It is confirmed whether or not (S8). When power supply stops, processing for protecting data in the backup RAM area is performed. When it is confirmed that such power supply stop processing has been performed, the game control microcomputer 560 stores the power supply stop processing, that is, the control state at the time of power supply stop. It is determined that When it is confirmed that the power supply stop process is not being performed, the game control microcomputer 560 executes an initialization process.

  Whether or not the power supply stop process has been performed is determined by the value of the backup monitoring timer stored in the backup RAM area in the power supply stop process according to the execution of the power supply stop process (for example, 2). ) Is confirmed by whether or not. Note that such a confirmation method is merely an example. For example, a flag indicating that the power supply stop process has been executed is set in the backup flag area in the power supply stop process, and the flag is set in S8. If it is confirmed that the power supply is stopped, it may be determined that the power supply stop process has been performed.

  If it is determined that the control state at the time of stopping power supply is stored, the game control microcomputer 560 performs data check (parity check in this example) in the backup RAM area (S9). Clear data (00) is set in the checksum data area, and the checksum calculation start address is set in the pointer. Also, the number of checksum calculations corresponding to the number of data to be checksum is set. Then, the exclusive OR of the contents of the checksum data area and the contents of the RAM area pointed to by the pointer is calculated. The calculation result is stored in the checksum data area, the pointer value is incremented by 1, and the checksum calculation count value is decremented by 1. The above processing is repeated until the value of the checksum calculation count becomes zero. When the value of the checksum calculation count becomes 0, the game control microcomputer 560 inverts the value of each bit of the contents of the checksum data area and uses the inverted data as a checksum.

  In the power supply stop process, a checksum is calculated by the same process as described above, and the checksum is stored in the backup RAM area. In S9, the calculated checksum is compared with the stored checksum. When the power supply is stopped after an unexpected power failure or the like, the data in the backup RAM area should be saved, so the check result (comparison result) is normal (matched). That the check result is not normal means that the data in the backup RAM area may be different from the data when the power supply is stopped. In such a case, since the internal state cannot be returned to the state when the power supply is stopped, the initialization process (the process of S10 to S14) that is executed when the power is turned on but not when the power supply is stopped is executed. To do.

  If the check result is normal, the game control microcomputer 560 returns the game state restoration process for returning the internal state of the game control means and the control state of the electrical component control means such as the effect control means to the state when the power supply is stopped. To do. Specifically, the start address of the backup setting table stored in the ROM 54 is set as a pointer (S91), and the contents of the backup setting table are sequentially set in the work area (area in the RAM 55) (S92). The work area is backed up by a backup power source. In the backup setting table, initialization data for an area that may be initialized in the work area is set. By the processes in S91 and S92, the saved contents remain as they are in the portion of the work area that should not be initialized. The parts that should not be initialized include, for example, data indicating a gaming state before the power supply is stopped (such as a special symbol process flag), an area where the output state of the output port is saved (output port buffer), and unpaid prize balls This is the part where data indicating the number is set.

  Further, the game control microcomputer 560 sets the head address of the backup command transmission table stored in the ROM 54 as a pointer (S93), and proceeds to S15.

  In the initialization process, the game control microcomputer 560 first performs a RAM clear process (S10). Note that the predetermined data may be left as it is without initializing the entire area of the RAM 55. Further, the start address of the initialization setting table stored in the ROM 54 is set as a pointer (S11), and the contents of the initialization setting table are sequentially set in the work area (S12).

  By the processing of S11 and S12, for example, a normal symbol determination random number counter, a normal symbol determination buffer, a special symbol buffer, a total prize ball number storage buffer, a special symbol process flag, an award ball flag, a ball out flag, etc. Accordingly, an initial value is set in a flag for selectively performing processing. In addition, a bit corresponding to the output port that outputs the connection confirmation signal in the output port buffer is set (corresponding to the ON state of the connection confirmation signal).

  The game control microcomputer 560 sets the initial address of the initialization command transmission table stored in the ROM 54 as a pointer (S13), and issues an initialization command for initializing the sub-board according to the contents. Processing to transmit to the sub-board is executed (S14). As an initialization command, a command indicating an initial symbol displayed on the variable display device 9, an initialization command to the payout control board 37, or the like can be used.

  The game control microcomputer 560 executes a random number circuit setting process for initial setting of the random number circuit 503a (S15). In this case, the CPU 56 performs setting according to the random number circuit setting program 551 to make the random number circuit 503a update the value of the random R1.

  The game control microcomputer 560 sets a timer interrupt setting for setting a CTC register built in the game control microcomputer 560 so that a timer interrupt is periodically taken every predetermined time (for example, 2 ms). Processing is executed (S16). In other words, for example, a value corresponding to 2 ms is set in a predetermined register (time constant register) as an initial value. In this embodiment, it is assumed that a timer interrupt is periodically taken every 2 ms.

  When the setting of the timer interrupt is completed, the game control microcomputer 560 repeatedly executes the display random number update process (S18). The game control microcomputer 560 disables the interrupt when the display random number update process is executed (S17), and enters the interrupt enable state when the display random number update process ends (S19). Note that the display random numbers are random R3, which is a random counter for determining special symbols, random R4, which is a random counter for determining variation patterns, random R5, which is a random counter for determining the number of deviations, and re-lottery determination. The display random number update process is a process for updating the count value of the counter for generating the display random number.

  Note that when the display random number update process is executed, the interrupt disabled state is executed because the display random number update process is also executed in the timer interrupt process described later. This is to avoid this. That is, if the timer interrupt is generated during the processing of S18 and the count value of the counter for generating the display random number is updated during the timer interrupt processing, the continuity of the count value is impaired. There is. However, such an inconvenience does not occur if the interrupt is prohibited during the process of S18.

  As described above, the game store clerk and the like can easily perform the initial operation by starting the power supply to the pachinko gaming machine 1 (for example, turning on the power switch) while the clear switch is turned on and the clear signal is output. Can be executed. That is, RAM clear or the like can be performed.

  Next, the random number circuit setting process (S15) in the main process will be described. FIG. 39 is a flowchart showing random number circuit setting processing. In the random number circuit setting process, the CPU 56 first executes the process according to the random number circuit selection module 551f included in the random number circuit setting program 551, and from among the random number circuits 503a and 503b built in the game control microcomputer 560, the game A random number circuit used at the time of execution of the timer interrupt process including the control process is set (SB151). For example, the game control microcomputer 560 stores, in a predetermined storage area of the RAM 55, specification information for specifying the random number circuit 503 used when executing a timer interrupt process set by a user (for example, a game machine manufacturer). I remember it. Then, the CPU 56 selects either the 12-bit random number circuit 503a or the 16-bit random number circuit 503b according to the designation information stored in the predetermined storage area of the RAM 55, and uses the selected random number circuit when executing the timer interrupt process. Set as a random number circuit. Note that both the 12-bit random number circuit 503a and the 16-bit random number circuit 503b may be set as random number circuits used when the timer interrupt process is executed. In this case, for example, the game control microcomputer may perform a jackpot determination based on the random number generated by the 12-bit random number circuit 503a and may perform the probability variation determination based on the random number generated by the 16-bit random number circuit 503b. .

  When the game control microcomputer 560 sets the random number circuit 503 used in the SB 151, for example, by stopping the operation of the counter 521 or the clock signal output circuit 524, the counter 521 of the random number circuit that is set not to be used. Does not update the count value C. Further, for example, the game control microcomputer 560 updates the count value C of the counter 521 of the random number circuit that is set not to use, but the game control microcomputer 560 does not output the output control signal SBC. Control may be performed so that random numbers cannot be read from the random value storage circuit 531. Further, for example, the game control microcomputer 560 prevents the random value fetch data “01h” from being written into the random value fetch register 539 of the random number circuit that is set not to be used. Control may be performed so that the latch signal SBL is not output to the random value storage circuit 531.

  As described above, by setting the random number circuit 503 to be used, by setting only the random number circuit 503 to be used, it is possible to appropriately set the range of the random number value to be generated. Further, it is possible to prevent unnecessary random numbers from being processed during the execution of the timer interrupt process, and the control burden on the game control microcomputer 560 can be reduced. For example, when a big hit determination is performed using a determination table including a distant value (for example, “1” and “100”) as a big hit determination value, the big hit is determined with a predetermined big hit probability (for example, 1/100). As a result, the number of types of determination values to be processed is smaller when the random number by the 12-bit random number circuit 503a is used than when the random number by the 16-bit random number circuit 503b is used, and the game control microcomputer 560 is used. The control burden is reduced.

  Further, the CPU 56 executes processing in accordance with the random number maximum value setting module 551a included in the random number circuit setting program 551, and generates random number maximum value setting data for designating a random number maximum value preset by the user as a random number maximum value setting register 535. (SB152). By doing so, the random number maximum value of random R preset by the user is set in the random number circuit 503. When the 12-bit random number circuit 503a is set as the random number circuit used when the timer interrupt is executed, the CPU 56 sets the random number maximum value designating the random number maximum value (any value from “0” to “4095”). Data is written into the random number maximum value setting register 535 of the 12-bit random number circuit 503a. Further, when the 16-bit random number circuit 503b is set as the random number circuit used when the timer interrupt is executed, the CPU 56 sets the random number maximum value for designating the maximum random number value (any value from “0” to “65535”). Data is written into the random number maximum value setting register 535 of the 16-bit random number circuit 503b.

  In this embodiment, when “0” to “255” are set as the random number maximum value, the random number maximum value is reset to a predetermined value in the random number maximum value resetting process described later. Even when control is performed to write a value greater than “256” as the random number maximum value, values “0” to “255” are set in the random number maximum value setting register 535 due to data corruption or the like. In the case where it is lost, the random number maximum value is reset to a predetermined value in the random number maximum value resetting process described later.

  As described above, since the maximum value of the random number to be generated is set in the random number maximum value setting register 535 in advance in SB152, a random number having a value larger than the range of random numbers used during the execution of the timer interrupt process is generated. And the processing load on the random number circuit 503 and the game control microcomputer 560 can be reduced.

  Further, the CPU 56 checks whether or not the random number maximum value set in the random number maximum value setting register 535 in SB152 is equal to or less than a predetermined lower limit value. The random number maximum value resetting process is executed to reset the random number maximum value set in (SB153).

  Further, the CPU 56 executes processing in accordance with the initial value changing module 551e included in the random number circuit setting program 551, and executes initial value changing processing for changing the initial value of the count value updated by the counter 521 of the random number circuit 503 (SB154). ).

  Further, the CPU 56 executes processing according to the random number update method selection module 551b included in the random number circuit setting program 551, and writes the random number update method selection data in the random number update method selection register 540 (SB155). By doing so, the random number update method of the random number circuit 503 is set. In this embodiment, the CPU 56 writes the random number update method selection data “10h” in the random number update method selection register 540. That is, in this embodiment, the second random number update method is set as the random number update method of the random number circuit 503.

  Further, the CPU 56 executes processing according to the cycle setting module 551c included in the random number circuit setting program 551, and sets the cycle setting data (the reference clock signal for how many minutes) that specifies the cycle of the random number generation clock signal SBI1 preset by the user. The data for setting whether to make a rotation) is written in the period setting register 537 (SB156). By doing so, the cycle of the random number generating clock signal SBI1 preset by the user is set in the random number circuit 503.

  Further, the CPU 56 sets whether or not to update the initial value input to the counter 521 when the count value is updated to a predetermined final value by the counter 521 of the random number circuit 503 (SB157). For example, the game control microcomputer 560 sets in advance a setting value indicating whether or not to update the initial value input to the counter 521 when the count value is updated to a predetermined final value by the counter 521. And stored in a predetermined area of the RAM 55. Whether or not the CPU 56 updates the initial value input to the counter 521 when the counter 521 updates the count value to a predetermined final value according to a predetermined set value stored in a predetermined storage area of the RAM 55. Set up. In this embodiment, when the CPU 56 determines to update the initial value input to the counter 521 in SB157, the initial value is updated when the count value is updated to a predetermined final value (when a notification signal is input from the counter 521). An initial value update flag indicating that the value is updated is set.

  Further, the CPU 56 sets whether or not to change the permutation of the count values updated by the counter 521 when the count value is updated to a predetermined final value by the counter 521 of the random number circuit 503 (SB158). For example, the game control microcomputer 560 sets a preset value indicating whether or not to change the permutation of count values output by the counter 521 when the counter 521 updates the count value to a predetermined final value. Is stored in a predetermined area of the RAM 55. Then, the CPU 56 changes the permutation of count values output by the counter 521 when the count value is updated to a predetermined final value by the counter 521 in accordance with a predetermined set value stored in a predetermined storage area of the RAM 55. Set whether or not. In this embodiment, when the CPU 56 determines in SB158 that the permutation of count values output by the counter 521 is to be changed, it indicates that the permutation of count values is changed when the count values are updated to a predetermined final value. Set the count value permutation flag. In this embodiment, the case where the count value permutation change flag is set in accordance with a predetermined set value in SB158 will be described. Then, the CPU 56 changes the permutation of the count values output by the counter 521 based on the fact that the count value permutation change flag is set in the count value permutation changing process described later.

  Then, the CPU 56 executes processing according to the random number circuit activation module 551d included in the random number circuit setting program 551, and writes the random number circuit activation data “80h” in the random number circuit activation register 541 (SB159). By doing so, the game control microcomputer 560 activates the random number circuit 503.

  Next, the random number maximum value resetting process (SB153) in the random number circuit setting process will be described. FIG. 40 is a flowchart showing the random number maximum value resetting process. In the random number maximum value resetting process, the CPU 56 reads the random number maximum value set in the random number maximum value setting register 535 (SB153a). When the 12-bit random number circuit 503a is set as the random number circuit used when the timer interrupt process is executed, the CPU 56 reads the random number maximum value set in the random number maximum value setting register 535 of the 12-bit random number circuit 503a. When the 16-bit random number circuit 503b is set as the random number circuit used when the timer interrupt process is executed, the CPU 56 reads the random number maximum value set in the random number maximum value setting register 535 of the 16-bit random number circuit 503b.

  The game control microcomputer 560 determines whether or not the read random number maximum value is equal to or less than a predetermined lower limit value (SB153b). When the 12-bit random number circuit 503a is set, the maximum random number that can be set in the 12-bit random number circuit 503a is from “256” to “4095”. It is determined whether or not the random number maximum value read from is less than or equal to the lower limit value “256”. When the 16-bit random number circuit 503b is set, the maximum random number that can be set in the 16-bit random number circuit 503b is from “256” to “65535”. It is determined whether or not the maximum random number read from the register 535 is equal to or lower than the lower limit “256”.

  When the read random number maximum value is less than or equal to the lower limit value, the game control microcomputer 560 resets the random number maximum value set in the random number maximum value setting register 535 to a predetermined value (SB153c). When the 12-bit random number circuit 503a is set, the CPU 56 determines that the random number maximum value read from the random number maximum value setting register 535 of the 12-bit random number circuit 503a is equal to or less than the lower limit “256”, the CPU 56 determines the random number maximum value setting register 535. The random number maximum value set in is reset to a predetermined value “4095”. When the 16-bit random number circuit 503b is set, if it is determined that the random number maximum value read from the random number maximum value setting register 535 of the 16-bit random number circuit 503b is equal to or less than the lower limit “256”, the CPU 56 sets the random number maximum value. The random number maximum value set in the register 535 is reset to a predetermined value “65535”.

  As described above, when the random number maximum value set in the random number maximum value setting register 535 is less than or equal to the predetermined lower limit value, the random number maximum value is reset to a predetermined value. Therefore, it is possible to prevent an excessively small value from being set as the maximum value of the random number due to a malfunction of the game control microcomputer 560 or an action such as generating a capture signal using a radio signal for the game machine. be able to. Therefore, it is possible to prevent a situation in which a random number having an excessively small value range from the minimum value to the maximum value is generated.

  Next, the initial value changing process (SB154) in the random number circuit setting process will be described. FIG. 41 is a flowchart showing the initial value changing process. In the initial value changing process, the CPU 56 first reads the initial value changing method setting data stored in the area 1F97h in the user program execution data area, and specifies the initial value changing method selected by the user. In this case, the CPU 56 determines whether or not the value of the read initial value changing method setting data is “01h” (SB154a), thereby specifying the initial value changing method selected by the user.

  When the value of the initial value change method setting data is “01h”, the CPU 56 sets the initial value input to the counter 521 of the random number circuit 503 to a value set based on the ID number unique to the game control microcomputer 560. Change (SB154b). For example, the game control microcomputer 560 associates in advance a predetermined storage area of the RAM 55 with the ID number of the game control microcomputer 560 and the calculated value obtained by performing a predetermined calculation based on the ID number. I remember it. In SB154b, the CPU 56 changes the initial value of the count value to the calculated value based on the ID number stored in advance. Further, for example, in SB 154b, the CPU 56 calculates the ID number of the game control microcomputer 560 and a predetermined value (for example, the ID number (for example, “100”) and sets the predetermined value (for example, “100”). The initial value of the count value is set to the calculated value (for example, “200”) obtained by addition. When the initial value input to the counter 521 is changed, the CPU 56 sets an initial value change flag indicating that the initial value of the count value has been changed (SB154c).

  When the game control microcomputer 560 changes the initial value input to the counter 521 in the SB 154b, the game control microcomputer 560 checks the value of the random number maximum value setting register 535 of the comparator 522 of the random number circuit 503 and sets it based on the ID number. It is determined whether the obtained value is equal to or greater than the maximum random number. When it is determined that the value set based on the ID number is equal to or greater than the maximum random number, the game control microcomputer 560 does not change the initial value input to the counter 521 (for example, the initial value is “0”). Do not change). By doing so, it is possible to prevent a situation where the initial value of the count value is set to a value equal to or greater than the maximum random number.

  In SB154a, when the value of the initial value change method setting data is not “01h” (that is, the value of the initial value change method setting data stored in the area 1F97h of the user program execution data area is “00h”) ), The CPU 56 does not change the initial value of the count value, ends the initial value changing process, and proceeds to SB155.

  By executing the random number circuit setting process, various signals are input to the random number circuit 503 when the timer interrupt process including the game control process is performed, and various signals are generated in the random number circuit 503. FIG. 42 is a timing chart showing the timing at which each signal is input to the random number circuit 503 and the timing at which each signal is generated in the random number circuit 503.

  As shown in FIG. 42, the clock circuit 501 increases the signal level of the output terminal from the low level to the high level at predetermined intervals (timing T11, T21,... Shown in FIG. 42). A reference clock signal CLK (see FIG. 42A) is input to 503.

  The clock signal output circuit 524 divides the reference clock signal CLK supplied from the clock circuit 501 to generate a random number generation clock signal SBI1 (see FIG. 42B). For example, the clock signal output circuit 524 raises the signal level of the output terminal from the low level to the high level at timings T11, T12,..., And changes the signal level from the high level to the low level at timings T21, T22,. To output a random number generating clock signal SBI1.

  42 shows a case where the clock signal output circuit 524 generates the random number generating clock signal SBI1 by dividing the reference clock signal CLK by two for easy understanding. However, in the actual random number circuit, the period that can be set in the period setting register 537 is from “system clock signal period × 128 × 7” to “system clock signal period × 128 × 256”. Therefore, in an actual random number circuit, the clock signal output circuit 524 is set in the cycle setting register 537 in a range from “system clock signal cycle × 128 × 7” to “system clock signal cycle × 128 × 256”. The reference clock signal CLK is divided by a frequency dividing ratio corresponding to the cycle setting data “07h” to “FFh” to generate a random number generating clock signal SBI1. The random number generating clock signal SBI 1 generated by the clock signal output circuit 524 is output to the selector 528 and the inverting circuit 532.

  In this embodiment, since the second random number update method is set in the random number circuit setting process, the second random number update method selection signal is input from the random number update method selection signal output circuit 527 to the selector 528. When the second random number update method selection signal output circuit 527 receives the second random number update method selection signal output circuit 527, the selector 528 selects the random number generation clock signal SBI1 input from the clock signal output circuit 524 and outputs it to the counter 521. . The counter 521 updates the count value C and outputs it to the count value permutation change circuit 523 every time the rising edge of the random number generation clock signal SBI1 supplied from the selector 528 is input.

  The inversion circuit 532 generates the inverted clock signal SBI2 (see FIG. 42C) by inverting the signal level of the random number generation clock signal SBI1 input from the clock signal output circuit 524. For example, the inverting circuit 532 lowers the signal level of the output terminal from the high level to the low level at timings T11, T12,..., And the signal level from the low level to the high level at timings T21, T22,. As a result, the inverted clock signal SBI2 is output. The inverted clock signal SBI2 generated by the inverting circuit 532 is output to the latch signal generating circuit 533.

  When a predetermined time (for example, 3 milliseconds) elapses after the winning detection signal SBSB (see FIG. 42D) is input to the latch circuit generation circuit 533, the random number value read signal output circuit 526 is disturbed. A numerical reading signal is input. For example, when the signal level of the output terminal of the random number read signal output circuit 526 rises from a low level to a high level, the random value read signal is input to the latch signal generation circuit 533. The latch signal generation circuit 533 inverts the random value read signal input from the random value read signal output circuit 526 in response to the input of the second random number update method selection signal from the random number update method selection signal output circuit 527. A latch signal SBL (see FIG. 33E) is output in synchronization with the rising edge of the inverted clock signal SBI2 supplied from 532.

  As described above, the random number circuit 503 updates the count value C at the timings T11, T12, T13... And outputs the latch signal SBL at the timing T22 different from the timings T11, T12, T13. The random number value is stored in 531.

  Next, the game control process will be described. FIG. 43 is a flowchart showing the timer interrupt process. When a timer interrupt occurs during execution of the main process, specifically, during a period when interrupts are permitted during the execution of the loop process of S17 to S19, the game control microcomputer 560 causes the timer interrupt to occur. The game control process is executed in the timer interrupt process activated in response to the occurrence of the game. In the timer interrupt process, the game control microcomputer 560 first executes a power-off process (power-off detection process) that detects whether or not a power-off signal is output (whether or not it is turned on) ( S20). Next, detection signals of switches such as the gate switch 32a, the start port switch 14a, the count switch 23, and the winning port switches 29a, 30a, 33a, and 39a are input through the switch circuit 58, and their state is determined (switch) Process: S21). Specifically, if the state of the input port for inputting the detection signal of each switch is ON, the value of the switch timer provided corresponding to each switch is incremented by one.

  Next, the game control microcomputer 560 confirms whether the initial value is updated when the count value is updated to a predetermined final value in the random number circuit setting process (see S15), and the random number is set. Processing for updating the initial value input to the counter of the circuit 503 is performed (initial value updating processing: S22). Further, the game control microcomputer 560 performs a process of updating the count value of the counter for generating the display random number (display random number update process: S23). In addition, the game control microcomputer 560 performs a process of updating the count value of the probability variation determination counter used for determining whether or not to control to the probability variation state when it is determined that the big hit (random probability probability determination random number). Update process: S23a). The random R3 to R6 are updated by S18 and S23 described above, and the random R2 is updated by S23a.

  When the initial value update process and the display random number update process are performed, the game control microcomputer 560 performs a special symbol process (S25). In the special symbol process control, corresponding processing is selected and executed in accordance with a special symbol process flag for controlling the pachinko gaming machine 1 in a predetermined order according to the gaming state. The value of the special symbol process flag is updated during each process according to the gaming state. Further, the normal symbol process is performed (S26). In the normal symbol process, the corresponding process is selected and executed according to the normal symbol process flag for controlling the display state of the normal symbol display 10 in a predetermined order. The value of the normal symbol process flag is updated during each process according to the gaming state.

  Next, the game control microcomputer 560 performs a process of sending an effect control command by setting an effect control command related to the effect in a predetermined area of the RAM 55 in synchronization with the change of the special symbol (effect control command control process: S27). In addition, that the effect is synchronized with the variation of the special symbol means, for example, that the variation time (variation display period) of the decorative symbol is the same.

  Furthermore, the game control microcomputer 560 performs information output processing for outputting data such as jackpot information, start information, probability variation information supplied to the hall management computer, for example (S28).

  Further, the game control microcomputer 560 executes prize ball processing for setting the number of prize balls based on detection signals from the prize opening switches 29a, 30a, 33a, 39a, etc. (S29). Specifically, a payout command signal such as a prize ball number signal indicating the number of prize balls is output to the payout control board 37 in response to winning detection based on turning on the prize opening switches 29a, 30a, 33a, 39a, etc. . The payout control microcomputer 370 mounted on the payout control board 37 drives the ball payout device 97 in response to receiving a prize ball number signal indicating the number of prize balls.

  Then, the game control microcomputer 560 executes a storage process for checking increase / decrease in the number of reserved memories (S30). In addition, a test terminal process, which is a process for outputting a test signal for enabling the control state of the pachinko gaming machine 1 to be confirmed outside the pachinko gaming machine 1, is executed (S31). Further, in this embodiment, a RAM area (output port buffer) corresponding to the output state of the output port is provided. However, the game control microcomputer 560 is related to the solenoid in the RAM area of the output port 2. Is output to the output port (S32: solenoid output processing). Thereafter, the game control microcomputer 560 sets the interrupt permitted state (S33), and ends the process.

  With the above control, in this embodiment, the game control process is started periodically (for example, every 2 ms). In this embodiment, the game control process is executed by the timer interrupt process. However, in the timer interrupt process, for example, only a flag indicating that an interrupt has occurred is set. It may be executed in the main process based on the setting. Further, the processes of S21 to S32 (except S28 and S31) correspond to a game control process for controlling the progress of the game.

  Further, the game control microcomputer 560 executes a process of counting the number of times the timer interrupt process has been executed. Each time the game control microcomputer 560 executes the timer interrupt process, the game control microcomputer 560 counts up an interrupt number counter indicating the number of times the timer interrupt process has been executed. For example, when the game control microcomputer 560 completes the solenoid output process in S32, the game control microcomputer 560 adds 1 to the value of the interrupt counter indicating the number of times the timer interrupt process has been executed.

  Further, for example, in the timer interrupt process, the switch process (see S21), the effect control command control process (see S27), and the interrupt count process (the number of times the timer interrupt process described above has been executed) in the game control process. Only the process of counting the game (see S322 described later) may be executed, and the other processes of the game control process may be executed in the main process. In this case, in the loop process from S17 to S19 in the main process, the CPU 56 of the game control microcomputer 560 executes the processes of S22 to S26 and S29 to S33 (except S31) in the game control process. (The above interrupt count processing is not included). When the CPU 56 detects that the timer interrupt count has reached a predetermined number (for example, 3 times) after counting the interrupt count as described above in the timer interrupt process (see S322), the random number circuit It is determined that the condition for reading the random number value from 503a is satisfied, and a random number reading flag indicating that the condition for reading the random number value is satisfied is set. In the main process, the CPU 56 determines whether or not the random number read flag is set when executing the start port switch passing process (see S312) in the special symbol process (see S25). Is set, the output control signal SC is output to the random value storage circuit of the random number circuit 503a (see S323), and the value of the random R1 stored as the random value in the random value storage circuit is read (see FIG. (See S324). Then, in the main process, the CPU 56 determines whether or not to make a big hit based on the read random number value when executing the special symbol normal process (see S300) in the special symbol process (see S25). Become.

  Next, the initial value update process (S22) in the timer interrupt process will be described. FIG. 44 is a flowchart showing the initial value update process. In the initial value update process, the game control microcomputer 560 checks the state of the notification signal indicating that the count value C output from the counter 521 of the random number circuit 503 has been updated to the final value (SB220). When it is detected that the notification signal is in the on state, the game control microcomputer 560 checks whether or not the initial value update flag is set (SB221). That is, the game control microcomputer 560 checks whether or not the setting for updating the initial value is made when the count value is updated to a predetermined final value in the random number circuit setting process (see SB157).

  When the initial value update flag is set, the game control microcomputer 560 determines to update the initial value input to the counter 521 when the counter 521 of the random number circuit 503 updates the count value to a predetermined final value. To do. If the initial value update flag is set, the game control microcomputer 560 checks whether the initial value change flag is set (SB222). That is, the game control microcomputer 560 determines whether or not the initial value of the count value is currently changed (that is, whether or not it is changed to a value based on the ID number of the game control microcomputer 560).

  When the initial value change flag is set (that is, the initial value is currently changed based on the value based on the ID number of the game control microcomputer 560), the game control microcomputer 560 inputs the initial value to the counter 521. The value is returned to the original value (for example, “1”) from the value based on the ID number of the game control microcomputer 560 (SB223). Then, the game control microcomputer 560 resets the initial value change flag (SB224) and ends the initial value update process.

  When the initial value change flag is not set (that is, the initial value is not currently changed), the game control microcomputer 560 uses the initial value input to the counter 521 as the ID number of the game control microcomputer 560. The value is changed to the original value (SB225). In this case, for example, if the ID number of the game control microcomputer 560 is “100”, the initial value input to the counter 521 is calculated by adding a predetermined value “100” to the ID number “100”. Change to the value “200”. Further, for example, the initial value input to the counter 521 is changed to the calculated value “50” obtained by subtracting the predetermined value “50” from the ID number “100”. Then, the game control microcomputer 560 sets an initial value change flag (SB226), and ends the initial value update process.

  When both the 12-bit random number circuit 503a and the 16-bit random number circuit 503b are set, in SB225, the game control microcomputer 560 uses the random number read from one random number circuit (for example, the 12-bit random number circuit 503a) as a predetermined value. The initial value input to the counter 521 may be obtained by adding the value to the ID number. Then, the game control microcomputer 560 may use the random number read from the other one (for example, the 16-bit random number circuit 503b) as the random number for determining the big hit.

  When the game control microcomputer 560 updates the initial value input to the counter 521 in SB225, the game control microcomputer 560 checks the value of the random number maximum value setting register 535 of the comparator 522 of the random number circuit 503 and sets it based on the ID number. It is determined whether or not the obtained value is greater than or equal to the maximum random number. When it is determined that the value set based on the ID number is equal to or greater than the maximum random number, the game control microcomputer 560 does not update the initial value input to the counter 521 with the predetermined value (for example, the predetermined value “ 0 ”is not updated). By doing so, it is possible to prevent a situation where the initial value of the count value is set to a value equal to or greater than the maximum random number.

  If it is determined in SB220 that the notification signal is in the off state, or if it is determined in SB221 that the initial value update flag is not set, the game control microcomputer 560 updates the initial value input to the counter 521. The initial value update process is terminated without any processing, and the process proceeds to SB23.

  Next, the special symbol process (S25) in the main process will be described. FIG. 45 is a flowchart showing an example of a special symbol process processing program executed by the game control microcomputer 560. When the game control microcomputer 560 performs the special symbol process, if the start opening switch 14a for detecting that the game ball has won the start winning opening 14 provided in the game board 6 is turned on. That is, if a start winning that causes the game ball to win the start winning opening 14 has occurred (S311), after performing the start opening switch passing process (S312), any one of S300 to S308 is performed according to the internal state. Perform the following process.

  Special symbol normal processing (S300): State in which special symbol variation display can be started (for example, since the symbol variation has not been made in the special symbol display 8 and the previous symbol variation in the special symbol display 8 has ended) Wait until the predetermined period has passed and the game is not in a big hit game. When the special symbol variation display can be started, the start winning memory number for the special symbol is confirmed. If the start winning memorization number is not 0, it is determined whether or not the result of the special symbol variation display is a big hit based on the random R1 generated by the random number circuit 503a. Then, the internal state (special symbol process flag) is updated to shift to S301.

  Special symbol stop symbol setting process (S301): A special symbol stop symbol after the change display of the special symbol is determined. Then, the symbol command is transmitted to the sound / lamp control microcomputer 700, and the internal state (special symbol process flag) is updated to shift to S302.

  Fluctuation time setting process (S302): A fluctuation pattern is determined .: A fluctuation time from the start of fluctuation display until the display result is derived and displayed (stop display) is decided as the fluctuation time of the fluctuation display of the special symbol. To do. In addition, a variation pattern command is transmitted to the sound / lamp control microcomputer 700, and a variation time timer for measuring the variation time of the special symbol (elapsed time from the start of variation display) is started. Then, the internal state (special symbol process flag) is updated to shift to S303.

  Special symbol variation process (S303): When a predetermined time (time indicated by the variation time timer in S302) elapses, the internal state (special symbol process flag) is updated to shift to S304.

  Special symbol stop process (S304): A symbol confirmation command used to instruct the stop of the decorative symbol is transmitted to the sound / lamp control board 70. Moreover, the special symbol in the special symbol display 8 is stopped. If the stop symbol of the special symbol is a jackpot symbol, the internal state (special symbol process flag) is updated to shift to S305. Otherwise, the internal state is updated to shift to S300. It should be noted that the symbol confirmation command may not be transmitted. In this case, the sound / lamp control board 70 sets the fluctuation time to the fluctuation time timer based on the fluctuation pattern command from the main board 31 and the symbol command, and updates the fluctuation time timer to update the decoration pattern. It is sufficient to monitor the fluctuation time of the original and perform a process of stopping the decorative symbol when it is determined that the fluctuation time has elapsed.

  Preliminary winning opening opening process (S305): Control for opening the large winning opening is started. Specifically, a counter (for example, a counter that counts the number of game balls that have entered the big winning opening) and a flag (a flag used when detecting winning in the winning opening) are initialized, and the solenoid 21 is driven. Open the big prize opening. Also, the process timer sets the execution time of the big prize opening opening process and sets the big hit flag. Then, the internal state (special symbol process flag) is updated to shift to S306.

  Processing for opening a special prize opening (S306): Control for sending a presentation control command for round display of the special prize opening to the sound / lamp control board 70 and closing conditions for the special prize opening (for example, a predetermined number (for example, 10 To confirm that the game balls have won). When the closing condition of the big prize opening is satisfied, the internal state is updated to shift to S307.

  Specific area valid time processing (S307): Monitors whether or not the V winning switch 22 has passed, and performs processing for confirming that the big hit gaming state continuation condition is satisfied. If the condition for continuing the big hit gaming state is satisfied and there are still remaining rounds, the internal state is updated to shift to S305. Further, when the big hit gaming state continuation condition is not satisfied within a predetermined effective time, or when all rounds are finished, the internal state is updated to shift to S308.

  Big hit end process (S308): Control is performed to cause the effect control means to perform display control for notifying the player that the big hit gaming state has ended. Then, the internal state is updated to shift to S300. In the big hit end process, a process of setting the probability change flag to the ON state is also performed on the condition that the probable big hit symbol has stopped due to the termination or the probability change big hit symbol has been raised by the secondary re-lottery display. Done. Thereby, the control to the probability variation state can be started.

  FIG. 46 is a flowchart showing the start port switch passing process (S312). In the start-port switch passing process, the game control microcomputer 560 has reached the maximum value of 4, which is the start-winning memory number indicated by the start-winning counter (or the start-winning memory number stored in the special figure holding memory 570). (S321). If the start winning memory number has not reached 4, the game control microcomputer 560 determines whether or not the number of executions of the timer interruption process indicated by the interruption execution number counter has reached a predetermined number (for example, 3 times). Is confirmed (S322). When it is detected that the game ball has won the start winning opening 14, the game control microcomputer 560 resets the interrupt execution counter. Then, the game control microcomputer 560 checks whether or not the interrupt execution number counter has reached a predetermined number after the game ball has won the start winning opening 14.

  The value preset as the predetermined number of times in S322 is determined as follows. As described above, the timer circuit of the random number circuit 503a measures the time during which the winning detection signal SS is continuously input from the start port switch 14a, and if it detects that the measurement time has reached a predetermined period, Write capture data “01h”. In this embodiment, a predetermined period (for example, 3 ms) measured by the timer circuit is a period in which a predetermined number of timer interrupt processes are executed (for example, 6 ms when the timer interrupt process is performed three times every 2 ms). ) Is set to a predetermined number (for example, three times) used in S322. By setting in such a manner, it is possible to prevent the random number from being read again after the random number is read and before the random number value stored in the random value storage circuit is updated. It is possible to prevent a random number having the same value as the random number read out from being read out again.

  When the number of executions of the timer interrupt process has reached a predetermined number, the CPU 56 outputs an output control signal SC to the random number value storage circuit of the specified random number circuit 503a, so that the random number value storage circuit can be read (enabled). Control is performed (S323).

  The CPU 56 reads the value of the random R1 stored as the random value from the random value storage circuit of the random number circuit 503a (S324). At this time, the CPU 56 further reads the values of random R2 to R6. Further, the CPU 56 stores the random values R1 to R6 read in S324 in, for example, a predetermined buffer area provided in the RAM 55 (S325). Further, when the values of the random numbers R1 to R6 are stored in the buffer area, the CPU 56 stops outputting the output control signal SC to the random value storage circuit and controls the random value storage circuit to an unreadable (disabled) state (S326). ). Further, the CPU 56 resets the interrupt execution number counter (S327). Then, the CPU 56 sets the values of the random R1 to R6 stored in the predetermined buffer area to the head of the empty entry in the special figure reservation memory 570 (S328), and adds 1 to the start winning counter count number. The stored number is increased by 1 (S329).

  If the start prize is stored in S321 but the maximum value of 4 has been reached, and if the number of executions of the timer interrupt process has not reached the predetermined number in S322, the start port switch passing process is terminated.

  As described above, the timer interrupt process has been executed a predetermined number of times in reading the random R from the random value storage circuit in the start port switch passing process (that is, continued while the timer interrupt process is executed a predetermined number of times). The random number is read from the random value storage circuit on the condition that the winning detection signal SS is input). Therefore, it is possible to prevent the random number from being read again after the random number is read and before the value of the random number stored in the random value storage circuit is updated. Further, it is possible to prevent a random number having the same value as the random number read from the previous random number value storage circuit from being read again.

  Next, the special symbol normal process (S300) in the special symbol process will be described. FIG. 47 is a flowchart showing a special symbol normal process executed when the big hit game is finished. In the special symbol normal processing, the game control microcomputer 560 is in a state where the variation of the special symbol can be started (for example, when the value of the special symbol process flag is a value indicating S300) (S380), The random numbers R1 to R6 stored in correspondence with the holding number “1” are read from the special figure holding memory 570 (S381). In this case, the game control microcomputer 560 decrements the number of reserved memories by decrementing the count of the start winning counter by 1, and the second to fourth entries (holding number “2”) in the special figure holding memory 570. To “4”), the values of the random numbers R1 to R6 are shifted upward by one entry (S382).

  Further, the game control microcomputer 560 checks whether or not the probability variation flag is set (S383). That is, the game control microcomputer 560 checks whether or not the game state is controlled to the certain change state. If the probability change flag is not set, the game control microcomputer 560 determines that the game state is a normal state other than the probability change state, and determines whether or not the display result of the special symbol display 8 is a jackpot symbol. As a table used for this, a normal big hit determination table (see FIG. 29) is set (S384). When the probability change flag is set, the game control microcomputer 560 determines that the game state is a probability change state and determines whether or not the display result of the special symbol display 8 is a big hit symbol. As a table used for the above, a probability change big hit determination table (see FIG. 29) is set (S385).

  The game control microcomputer 560 determines whether or not the display result of the special symbol display 8 is a jackpot symbol based on the value of the random R1 stored in the predetermined buffer area in the start port switch passing process (S386). ). In this case, the game control microcomputer 560 determines whether or not to win, using the normal jackpot determination table set in S384 or the probability change jackpot determination table set in S385.

  If it is determined that the display result of the special symbol display 8 is a big hit symbol, the game control microcomputer 560 turns on a big hit flag indicating that it is a big hit state (S387). If the display result of the special symbol display 8 is determined not to be a big hit symbol, the game control microcomputer 560 turns off the big hit flag (S388). Then, the game control microcomputer 560 updates the value of the special symbol process flag to a value corresponding to the special symbol stop symbol setting process (S389).

  Next, the special symbol stop symbol setting process (S301) in the special symbol process process will be described. FIG. 48 is a flowchart showing special symbol stop symbol setting processing. In the special symbol stop symbol setting process, first, in S390, it is determined whether or not the big hit flag is set to the on state. When it is determined that the big hit flag is set to the on state, it is determined in S391 whether or not the value of the random R2 is a value within the range of “10 to 14”. That is, it is determined whether or not to generate the first probability variation big hit.

  When it is determined in S391 that the value of the random R2 read in S381 is a value within the range of “10 to 14”, the random R3 read in S381 from “3, 7” which is the first probability variation symbol in S392. A process of determining a jackpot symbol based on the value is performed. For example, when the value of the read random R3 is 0, 2, or 4, the probability variation symbol “3” is determined as the big hit symbol, and when the read random R3 value is 1, 3, or 5, the probability variation is determined. A process of determining the symbol “7” as a big hit symbol is performed.

  In S393, a process of looking up the probability variation big hit table described with reference to FIG. 32A is performed. In S394, processing for determining whether or not re-lottery is executed according to the value of the random R6 read in S381 is performed. In S395, as the symbol command to be transmitted to the sound / lamp control board 70, processing for setting the probability variation big hit symbol command according to the determination in S394 is performed.

  On the other hand, if the value of the random R2 is not within the range of “10-14”, the control proceeds to S403, and it is determined whether or not the value of the random R2 is within the range of “15-19”. The If the determination result is YES, in S404, a process of determining a jackpot symbol from the second probability variable symbol based on the value of random R3 is performed. Since the second probability variation symbol is only “1” in the present embodiment, the symbol of “1” is determined over the entire range that the random R3 can take. The winning symbol of “1” is referred to as the second probability variation big winning symbol as described above. Next, the process proceeds to S401 after the process of setting the second probability variation big hit symbol command is performed in S405.

  On the other hand, if NO is determined in S403, a process of determining a big hit symbol based on the value of the random R3 read in S381 from "0,5" which is a non-probable variable symbol in S396 is performed. For example, when the read random R3 value is 0, 2, or 4, the non-probable variable “0” is determined as the big hit symbol, and when the read random R3 value is 1, 3, or 5, the non-probable variable symbol is determined. The process of determining “5” as a big hit symbol is performed.

  In S397, a process of looking up the non-probable variation big hit table described with reference to FIG. 31 is performed. In S398, processing for determining whether or not re-lottery is executed is performed according to the value of the random R6 read in S381. In S399, as the symbol command transmitted to the sound / lamp control board 70, a process of setting a non-probable variation big hit symbol command according to the determination in S398 is performed. When the probability variation flag is set to the on state, processing for setting the probability variation flag to the off state is performed. Thereby, the control to the probability variation state can be finished.

  When it is determined in S390 that the big hit flag is not set to the ON state, in S400, a process of determining a deviation symbol based on the value of the random R3 read in S381 from "2,4" which is a deviation symbol is performed. For example, when the read random R3 value is 0, 2, or 4, “2” is determined as the off symbol, and when the read random R3 value is 1, 3, or 5, “4” is determined as the off symbol. Processing is performed.

  In S401, a process of setting the symbol determined in any of S392, S396, or S400 as a scheduled stop symbol is performed. When the later-described variation time has elapsed since the start of the special symbol variation display, the scheduled stop symbol set in S401 is stopped and displayed as the display result of the special symbol variation display. When the above-described secondary re-lottery display is performed, the display result is not stopped even if the later-described fluctuation time elapses, and the scheduled stop symbol is changed after the secondary re-lottery display is performed. You may control to stop-display as a display result of a display. In S402, processing for updating the value of the special symbol process flag to a value corresponding to the variation time setting processing is performed.

  Next, the variation time setting process (S302) in the special symbol process will be described. FIG. 49 is a flowchart showing the variation time setting process. In the variation time setting process, first, in S410, it is determined whether or not the big hit flag is set to the on state. When it is determined that the big hit flag is set in the ON state, in S411, a process for looking up the big hit hour variation pattern determination table described with reference to FIG. 35 is performed.

  In S412, according to the value from the random R4 read out in S381, processing for determining a variation pattern is performed using the big hit hour variation pattern determination table looked up in S411.

  On the other hand, when it is determined in S410 that the big hit flag is not set, processing for looking up the loss variation pattern determination table described with reference to FIG. 35 is performed in S413.

  In S414, a process for determining a variation pattern is performed using the loss variation pattern determination table looked up in S413 according to the value from the random R4 read in S381.

  In S415, processing is performed to determine whether or not the variation pattern determined in S414 is a reach deviation variation pattern. When it is determined in S415 that the reach is a deviation variation pattern, a process for looking up the reach time table among the loss time tables described in FIG. 33 is performed in S416. In S417, processing for determining the number of shifts of the medium symbol is performed according to the value from the random R5 read in S381. In S418, a process of setting an outlier symbol command corresponding to the number of deviations determined in S417 is performed.

  On the other hand, when it is determined in S415 that the reach is not a deviation variation pattern, as described with reference to the non-reach time table among the loss time tables shown in FIG. Is set as a symbol command.

  The setting of the symbol command in S395, S399, S418, and S419 described above specifically refers to a process of setting symbol command data in the buffer of the RAM 55. The set symbol command is output from the game control microcomputer 560 to the sound / lamp control microcomputer 700 in S27 of FIG. 43 as an effect control command.

  In S420, a process of setting a variation pattern command corresponding to the variation pattern determined in S412 or S414 is performed as the variation pattern command transmitted to the sound / lamp control microcomputer 700.

  The setting of the variation pattern command in S420 specifically refers to a process of setting variation pattern command data in the buffer of the RAM 55. The set variation pattern command is output as an effect control command from the game control microcomputer 560 to the sound / lamp control microcomputer 700 in S27 of FIG.

  In S421, it is specified from the reference fluctuation time of the fluctuation pattern determined in S412 or S414, the value of α specified from the symbol command determined in S394 or S398, or the number of deviations of the medium symbol determined in S417. Based on the value of β, processing for setting the variation time is performed. In S422, based on the variation pattern determined in S412 or S414, the special symbol process flag value is updated to a value corresponding to the special symbol variation process in order to start a new variation display on the special symbol display 8. The process is performed, and the variable time setting process is terminated.

  FIG. 50 is a flowchart showing the pre-opening process for the special winning opening in the special symbol process (S305). In the pre-opening process for the big prize opening, the game control microcomputer 53 performs the following process.

  First, it is determined whether or not the second probability variable big hit flag is set by determining whether or not the second probability variable big hit flag is set (SA91). When it is determined that it is determined that the second probability variation big hit is not made (when it is decided to be the first probability variation big hit or normal big hit), the upper limit value data of the number of rounds is set to 15 times (SA92), The upper limit value data of the opening time of the special winning opening 21 in each round is set to 30 seconds (SA93), and the process proceeds to SA96 described later. As a result, the upper limit number of rounds executed in the special winning opening opening process is 15, and the maximum open time in each round is 30 seconds. On the other hand, when it is determined that the second probability variation jackpot has been determined, the upper limit value data for the number of rounds is set to 2 (SA94), and the upper limit value data for the opening time of the big winning opening 21 in each round. Is set to 1 second (SA95), and the process proceeds to SA96 to be described later. As a result, the upper limit number of rounds executed in the special prize opening opening process is two, and the opening time in each round is one second.

  In SA96, in addition to the upper limit value of the number of rounds and the upper limit value of the opening time, data necessary for controlling the big hit gaming state is set. As an example, the interval period between rounds in the jackpot gaming state is set by SA96. Thereby, when the second re-lottery display during the big hit is performed as described above, the interval period between the sixth round and the seventh round is larger than when the second re-lottery display during the big hit is not performed. The time is longer than the interval period between the other rounds, and is set to a time during which the second big lottery display can be executed. Then, the value of the special symbol process flag is updated to a value corresponding to the special winning opening opening process (SA146) (SA97), and the process returns.

  FIG. 51 is a flowchart showing the special winning opening opening process (S306) in the special symbol process. In the special prize opening opening process, the game control microcomputer 53 performs the following process.

  First, the final round in the jackpot gaming state set in the above-described pre-opening process of the big prize opening is described as the last round in the jackpot gaming state does not continue until the final round in the jackpot gaming state is reached. Whether or not the end of the big hit gaming state is determined based on the completion of the upper limit number of rounds (15 times for the first probability variable big hit and 15 times for the normal positive big hit and 2 times for the second probability variable big hit) (SA101). If it is determined that the big hit gaming state has ended, the process proceeds to SA110 described later. On the other hand, when it is determined that it is not at the end of the big hit gaming state, it is determined whether or not the start condition of each round is satisfied (SA102).

  In SA102, for example, when the time from the start of the big hit gaming state comes to the start timing of the first round, or when the interval period between rounds in which the time is predetermined for each round ends. It is determined that the start condition for each round is satisfied when the predetermined start timing of each round is reached, as in

  When it is determined that the start condition for each round is not satisfied, the process proceeds to SA105 described later. On the other hand, when it is determined that the start condition of each round is satisfied, processing to be performed at the start of each round such as opening the special winning opening 21 is executed (SA103). Then, a setting (command set) for transmitting a round start command for each round (for example, a third round start command for the third round) is performed (SA104). When the round start command is set in this way, the round start command is output in S27 of FIG. After SA104, the process proceeds to SA105. In the case of this embodiment, there is a case where the second big lottery display as described above is performed during the interval period between the sixth round and the seventh round. The interval period between the sixth round and the seventh round is greater when the second re-lottery display during the big hit is performed than when the second re-lottery display during the big hit is not performed. It is set to a time that is longer than the time that the secondary re-lottery display during the big hit is executable. For this reason, the round start command is not transmitted during the big hit secondary re-lottery display. On the other hand, when the second re-lottery display during the big hit is not performed, the interval period between the sixth round and the seventh round is set to the same time as the interval period between the other rounds. Such an interval period is set by SA96 in FIG.

  In SA105, it is determined whether or not each round is in a round state that is a state other than at the start and end of the round. If it is in a round state, for example, processing performed during each round such as counting the number of winning prizes to the big winning opening 21 during the round is executed (SA106), and the process proceeds to SA107. On the other hand, if not in a round state, the process proceeds to SA107 as it is.

  In SA107, it is determined whether or not the end condition of each round is satisfied. In SA107, for example, when there is a predetermined number (10) of winnings in the winning a prize opening 21 during the round as described above, or the winning time opening time set in the above-described pre-opening process of the winning a prize opening It is determined that the end condition of each round is satisfied when the predetermined end timing of the round is reached, such as when the earlier one of the conditions when the upper limit value of elapses is satisfied.

  In SA107, when it is determined that the end condition of each round is not satisfied, the process returns. On the other hand, when it is determined that the end condition of each round is satisfied, the special winning opening 21 is closed, and it is confirmed whether or not the condition for continuing the big hit gaming state to the next round is satisfied. Processing performed at the end of each round is executed (SA108). Then, a setting (command set) for transmitting a round end command for each round (for example, a third round end command for the third round) is performed (SA109). When the round end command is set in this way, the round end command is output in S27 of FIG. After SA109, return.

  As described above, when it is determined that the end of the big hit gaming state is determined in SA101, the setting for transmitting an ending display command for specifying the contents of the ending display performed at the end of the big hit gaming state (set of commands) (SA110). Specifically, when the second re-lottery flag at the end of the big hit is set and the first certainty variable big hit flag is not set, a setting for transmitting the first certain-variable no-up display designation command after the second re-lottery do. Further, when the second re-lottery flag at the end of the big hit is set and the first probability variation big hit flag is set, a setting is made to transmit the display designation command with the first positive variation after the second re-lottery. . Further, when the second probability variable jackpot flag is set, it is at the end of the second probability variable jackpot gaming state, so a setting is made to transmit the second probability variable jackpot end display designation command. If the second re-lottery flag is not set at the end of the big hit and the second probability variable big hit flag is not set, the second re-lottery display is not performed at the end of the big hit gaming state. Since it is at the end of the gaming state, it is set to transmit a big hit normal end display designation command. The ending display command set in SA110 is transmitted to the display control board 80 by the effect control command control process (S27) of FIG.

  Next, it is determined whether or not to display the secondary re-lottery display at the end of the big hit based on determining whether or not the secondary re-lottery flag at the end of the big hit is set (SA111). When it is determined that the secondary re-lottery display at the end of the big hit will be performed, a predetermined time when the secondary re-lottery display at the end of the big hit is performed in the big hit end timer which is a timer for managing the big hit end display as the ending display is predetermined. The big hit end timer is started by setting the set time (SA113), and the big hit end display corresponding to the secondary re-lottery display at the end of the big hit is started (SA114). Here, the time set in the big hit end timer when performing the second big lottery display at the time of big hit is set longer than the time set in the big hit end timer when performing the big hit normal end display. . Then, the value of the special symbol process flag is updated to a value corresponding to the big hit end process (SA147) (SA119), and the process returns.

  Further, when it is determined by SA111 that the secondary re-lottery display is not performed at the end of the big hit, based on checking whether or not the second positive variable big hit flag is set, the end of the second positive variable big hit gaming state It is determined whether or not (SA112). When it is determined that it is not at the end of the second probable big hit gaming state, that is, at the end of the normal big hit gaming state, a predetermined time when the big hit normal end display is performed is set in the big hit end timer. As a result, the big hit end timer is started (SA115), and the big hit end display corresponding to the big hit normal end display is started (SA116). Then, the value of the special symbol process flag is updated to a value corresponding to the big hit end process (SA147) (SA119), and the process returns.

  On the other hand, when it is determined by SA112 that the second probability variable jackpot gaming state is ended, the jackpot end timer is started by setting a predetermined time when the second probability variable jackpot end display is performed in the jackpot end timer. (SA117) and start the big hit end display corresponding to the big hit normal end display (SA118). Then, the value of the special symbol process flag is updated to a value corresponding to the big hit end process (SA147) (SA119), and the process returns.

  Next, the specific area valid time process (S307) in the special symbol process will be described. FIG. 52 is a flowchart showing the specific area valid time processing. In the specific area valid time process, first, in S430, a process of determining whether or not there is a V prize based on a detection signal from the V prize switch 22 is performed. When it is determined in S430 that there has been a V prize, processing for determining whether or not there is a remaining round is performed in S431. When it is determined in S431 that there is a remaining round, a process of updating the value of the special symbol process flag to a value corresponding to the pre-opening process for the big prize opening is performed in S432.

  On the other hand, when “NO” is determined in S430 or S431, in S433, whether or not the big hit symbol command set in S395 or S399 is a big hit symbol command for performing the secondary re-lottery display, that is, secondary re- Processing for determining whether or not to perform lottery display is performed. When it is determined in S433 that secondary re-lottery display is to be performed, processing for setting T1 as an effect timer for performing secondary re-lottery display is performed in S434. On the other hand, when it is determined in S433 that the secondary re-lottery display is not performed, a process of setting T2 as an effect timer for performing the normal ending display is performed in S435. Note that a value smaller than the value of T1 is set as the value of T2 in the present embodiment. Thereby, the execution time of the normal ending display can be made shorter than the execution time of the secondary re-lottery display.

  In S436, processing for setting an ending switch command for switching to the effect of notifying that the big hit has ended is performed. In S437, a process of updating the value of the special symbol process flag to a value corresponding to the jackpot end process is performed in order to end the jackpot. In the big hit ending process, the effect timer T1 or T2 set in S434 or S435 is subtracted, and when it is determined that it has reached 0, an ending end command is sent to the sound / lamp control microcomputer 700. And the process of updating the value of the special symbol process flag to a value corresponding to the special symbol normal process is performed.

  FIG. 53 is a flowchart showing the big hit end process (S308). In S800, processing for updating the jackpot end timer is performed. This big hit end timer is a timer set by SA113, SA117, SA115, etc. described above, and is subtracted and updated by "1" every 2 msec by S800. Next, in S801, it is determined whether or not the jackpot end timer has timed out. If the timeout has not occurred, the jackpot end processing ends. If the timeout has occurred, that is, if the value of the jackpot end timer becomes “0”, the special game processing is performed in S802. This special game process will be described with reference to FIG.

  Next, in S803, a process of setting a jackpot flag is performed, and in S804, a process of setting the special symbol process flag to the special symbol normal process is performed, and the jackpot end process ends.

  FIG. 54 is a flowchart showing the special game process (S802). First, at S810, it is determined whether or not the end of the current big hit is the end of the probable big hit. If the first probability variation big hit or the second probability variation big hit is over, the process proceeds to S811, and it is determined whether or not the probability variation flag is set. If the probability variation flag is not set, processing for setting the probability variation flag is performed in S812. Next, in S815, processing for resetting the big hit flag is performed. On the other hand, when the probability variation big hit is completed when the probability variation state has already been reached, the probability variation flag has already been set, and the process proceeds to S815 without setting the probability variation flag in S812.

  On the other hand, when the end of the big hit is not the end of the probable big hit, a determination is made in S813 as to whether or not the probable change flag is set, and if not, the process proceeds to S815. If YES in step S814, the process proceeds to step S815 after the probability variation flag is reset in step S814. That is, if a big hit occurs in the probability variation state and the big hit is not a probability variation big hit, the probability variation flag is reset in S814, and the probability variation state ends.

  FIG. 55A is an explanatory diagram showing an example of a command form of a payout control command sent from the main board 31 to the payout control board 37. FIG. In this embodiment, the payout control command has a 2-byte structure, the first byte represents MODE (command classification), and the second byte represents EXT (command type). The first bit (bit 7) of the MODE data is always “1”, and the first bit (bit 7) of the EXT data is always “0”. Note that the command form shown in FIG. 55A is an example, and other command forms may be used. For example, a 1-byte command or a command with 3 or more bytes may be used. The display control command is also configured as shown in FIG.

  FIG. 55B is a timing chart showing the relationship between an 8-bit control signal (for example, a payout control command) and an INT signal (for example, a payout control signal INT) that constitute a control command for the electrical component control means. As shown in FIG. 55 (b), the game control means turns the INT signal on after the MODE or EXT data is output to the output port. Further, the INT signal is turned off when a sufficient period of time has elapsed for interrupting the electric component control microcomputer. Further, after the second byte data is set as an output port, the INT signal is turned on, and then the NT signal is turned off.

  56 (a) and 56 (b) are explanatory views showing an example of the contents of the payout control command. In the example shown in FIGS. 56A and 56B, a command F0XX (H) of MODE = F0 (H) is used as a payout control command corresponding to a prize ball number command (payout number command). The number of payouts corresponding to the number of game balls to be paid out by “XX” being EXT is shown. FIGS. 56A and 56B also show a connection confirmation signal transmitted through one signal line. The connection confirmation signal is output when the main board 31 rises (when the game control unit starts the game control process) and notifies the payout control board 37 that the main board 31 has risen. A connection confirmation signal of the substrate 31). The connection confirmation signal is also a signal indicating that a prize ball can be paid out. In this embodiment, in the payout control means, the connection confirmation signal is generated when the cable including the signal line between the main board 31 and the payout control board is disconnected or the connector connecting the cable and the board is disconnected. However, the game control means mounted on the main board 13 may be turned off when any error is detected while the game is in progress.

  Next, transmission of the payout control command by the game control means will be described. FIG. 57 is an explanatory diagram showing an example of bit assignment of input ports in the game control means. As shown in FIG. 57, the detection of the V count switch 22, the count switch 23, the gate switch 32a, the winning port switches 33a, 24a, 29a, and 30a, and the start port switch 14a are detected in bits 0 to 7 of the input port 0, respectively. A signal is input. In addition, the bits 0 and 1 of the input port 1 are input with a power-off signal from the power monitoring board 910 and a detection signal of the clear switch 921 from the power board 910, respectively. The detection signal from each switch is logically inverted in the input driver circuit 58.

  Next, the switch process (SC22) in the main process will be described. In this embodiment, when the ON state of the detection signal of each switch related to winning detection or gate passage continues for a predetermined time, it is determined that the switch is surely turned on, and processing corresponding to the switch on is started. FIG. 58 is an explanatory diagram showing each 1-byte buffer formed in the RAM 55 used in the switching process. The previous port buffer is a buffer in which the previous switch-on / off determination result (for example, 4 mSC before) is stored. The port buffer is a buffer in which the contents of port 0 inputted this time are stored. The switch-on buffer is a buffer in which the corresponding bit is set to 1 when switch on is detected and the corresponding bit is set to 0 when switch off is detected.

  FIG. 59 is a flowchart showing a processing example of the switch processing in S21 in the game control processing. In the switch process, the CPU 56 first inputs data input to the input port 0 (see FIG. 57) (SC101), and sets the input data in the port buffer (SC102). Next, the initial value of the wait counter formed in the RAM 55 is set (SC103), and the value of the wait counter is subtracted by 1 until the value of the wait counter becomes 0 (SC104, SC105).

When the value of the wait counter reaches 0, input port 0 data again (
SC106) AND is performed for each bit between the input data and the data set in the port buffer (SC107). Then, the operation result of the logical product is set in the port buffer (SC108). Of the two input data input from the input port 0 with a time interval of approximately [initial value of wait counter × (processing time of SC104, SC105)] by the processing of SC103 to SC108, both are “1”. Only those bits that are marked "1" in the port buffer. That is, if the switch detection signal is kept on for the predetermined period [initial value of wait counter × (processing time of SC104, SC105)], the corresponding bit in the port buffer becomes “1”.

  Further, the CPU 56 performs exclusive OR for each bit between the data previously set in the port buffer and the data set in the port buffer (SC109). In the exclusive OR operation result, the bit corresponding to the switch for which the previous switch on / off determination result (for example, 4 mSC before) is different from the switch on / off determination result determined to be on this time is “ 1 ”. Further, the CPU 56 performs a logical product for each bit between the operation result of the exclusive OR and the data set in the port buffer (SC110). As a result, of the bits corresponding to the switches for which the previous switch on / off determination result and the switch on / off determination result determined to be on this time are different (according to the exclusive OR operation result), the current on Only the bit corresponding to the switch determined to be (by AND operation) remains as “1”.

The CPU 56 sets the logical product operation result in SC110 in the switch-on buffer (SC111), and sets the contents of the port buffer in which the operation result in SC108 is set in the previous port buffer (SC112).

  With the above processing, among the switches that have been on for a predetermined period of time, the switch on / off determination result of the previous time (for example, 4 mSC before) is off, that is, the switch has changed from the off state to the on state. The bit corresponding to the switch is “1” in the switch-on buffer.

Then, the CPU 56 executes a winning switch check process (SC113).
FIG. 60 is a flowchart showing a winning switch check process. In the winning switch check process, if the bit corresponding to the count switch 23 in the switch buffer is “1”, the CPU 56 increments the value of 15 counters (SC131, SC132), and the normal winning mouth switch (winning mouth) in the switch buffer. If each bit corresponding to the switches 29a, 30a, 33a, 39a) is “1”, the counter is incremented by 10 (SC133, SC134), and the bit corresponding to the switch buffer is “1”. For example, four counters are incremented by one (SC135, SC136). When it is detected in SC 133 that there are a plurality of “1” bits, the value of the 10 counter is increased by a value corresponding to the number of bits. Further, the 15 counter, the 10 counter, and the 4 counter are 1-byte counters formed in the RAM 55, respectively.

  In this embodiment, 15 winning balls are paid out for winning through the big winning opening, 4 winning balls are paid out for winning through the starting winning opening 14, and winning through other ordinary winning openings. Suppose that 10 prize balls are paid out.

  FIG. 61 is a flowchart showing an example of the winning ball process in S29 in the timer interrupt process. In the prize ball processing, the CPU 56 performs control for setting a command transmission table in which a payout control command indicating the number of prize balls corresponding to the winning is stored (for example, setting in a register) and transmitting the payout control command. . First, the value of the 15 counter is checked (SC211). The 15 counter is counted up when a game ball wins a big winning opening and the count switch 23 is turned on. If the value of the 15 counter is not 0, the command transmission table storing 15 prize ball number commands is set (SC212), and the command control process is executed (SC213). Also, the value of the 15 counter is decremented by 1 (SC214).

  If the value of the 15 counter is 0, the value of the 10 counter is checked (SC215). The ten counter is counted up when a game ball wins a normal winning opening and the winning opening switches 29a, 30a, 33a, 39a are turned on. If the value of the 10 counter is not 0, the command transmission table in which 10 winning ball number commands are stored is set (SC216), and command control processing is executed (SC217). Also, the value of the 10 counter is decremented by 1 (SC218).

  If the value of the 10 counter is 0, the value of the 4 counter is checked (SC221). The four counter is counted up when the game ball wins the start winning opening and the start opening switch 14a is turned on. If the value of the four counter is not 0, the command transmission table for the four winning ball number instructions is set (SC222), and the command control process is executed (SC223). Also, the value of the four counter is decremented by 1 (SC224).

  After the process of SC214, SC218, or SC224 is executed, the ball break process (SC225a) and the full tank process (SC225b) are executed. Both of these processes will be described later.

  As described above, when a payout control command is to be output from the game control means to the payout control board 37, the command transmission table is set. Then, a payout control command is transmitted based on the contents of the command transmission table. The command transmission table is stored in the ROM 54.

  FIG. 62A is an explanatory diagram showing a configuration example of the command transmission table. One command transmission table is composed of three consecutive bytes of address, and INT data is set in the first byte. Further, MODE data of the first byte of the payout control command is set in the command data 1 of the second byte. In the command data 2 of the third byte, EXT data of the second byte of the payout control command is set.

  In the process shown in FIG. 61, only a command transmission table setting process related to one payout control command is performed per process, but a plurality of command transmission table setting processes may be performed. For example, when a plurality of winnings are stored in the 15 counter, 10 counter, and 4 counters, a plurality of command transmission table setting processes may be performed in one winning ball signal process.

  In the prize ball process, the processes of SC212, SC213, SC216, SC217, SC222, and SC223 are executed immediately when the 15 counter, 10 counter, or 4 counter reaches a non-zero value. In addition, the 15 counter, the 10 counter, or the 4 counter is detected when the corresponding switches 14a and 23 and winning port switches 29a, 30a, 33a, and 39a are turned on. Although there is a detection delay of several mSC, it is immediately incremented by +1. Accordingly, the game control means can immediately transmit a prize ball number command to the payout control means in response to the input of a winning detection signal from the winning detection means provided for each winning area.

  Although the payout control command will be described here, INT data, command data 1 and command data 2 are set in the command transmission table as shown in FIG. 62A when a display control command is transmitted. ing.

  FIG. 62B is an explanatory diagram showing a configuration example of INT data. Bit 0 in the INT data indicates whether or not a payout control command should be transmitted to the payout control board 37. In this example, if bit 0 is “1”, it indicates that a payout control command should be sent. Accordingly, “01 (H)” is set in the INT data in the command transmission table for the payout control command. Note that bit 1 of the INT data is a bit indicating whether or not a sound / lamp control command should be transmitted. Therefore, “01 (H)” is set in the INT data in the command transmission table for the sound / lamp control command.

  FIG. 63A is a flowchart showing the ball break process of SC225a. The CPU 56 first determines whether or not the ball-out switch is ON (SC226a). If a ball break detection signal is input from the ball break switch 187, a ball break command is set (SC227a). On the other hand, if the ball break switch is not turned on and the ball break command is set, the ball break command is reset (SC228a).

  FIG. 63B is a flowchart showing the full tank process of SC225b. The CPU 56 first determines whether or not the full tank switch is ON (SC226b). If the full tank detection signal from the full tank switch 48 is input, a full command is set (SC227b). On the other hand, if the full tank command is set when the full tank switch is not turned ON, the full tank command is reset (SC228a). It should be noted that once the ball-out command and full-fill command are set, the command is continuously transmitted to the sound / lamp control board 70 until the next reset.

  FIG. 63C is a flowchart illustrating an example of command control processing. The command control process is a process including a command transmission process. In the command control process, the CPU 56 first sets the address of the command transmission table (set in a register or the like) as a read pointer (SC231). Then, the data pointed to by the read pointer (in this case, INT data of the command transmission table) is loaded into the argument 1 (SC232). The argument 1 is formed in the RAM 55, for example, and becomes input information for a command transmission process to be described later. Also, the read pointer is incremented by 1 (SC233). Therefore, the value pointed to by the read pointer matches the address of command data 1 in the command transmission table.

  Therefore, the CPU 56 reads the command data 1 and sets it to the argument 2 (SC234). The argument 2 is also formed in the RAM 55, for example, and becomes input information for command transmission processing to be described later. Then, the command transmission processing routine is called (SC235).

  FIG. 64 is a flowchart showing a command transmission routine. In the command transmission routine, the CPU 56 first sets the data set as the argument 1, that is, the INT data, in the work area determined as the comparison value (SC251). Next, the number of transmissions = 2 is set in the work area determined as the number of processes (SC252). Then, the port address for outputting the payout control command is set to the IO address (SC253).

  Next, the CPU 56 shifts the comparison value to the right by 1 bit (SC254). As a result of the shift processing, it is confirmed whether or not the carry bit has become 1 (SC255). When the carry bit becomes 1, it means that the rightmost bit in the INT data is “1”. In this embodiment, two shift processes are performed. For example, when it is specified that a payout control command should be sent, the carry bit is set to 1 in the first shift process.

  When the carry bit becomes 1, the data set in the argument 2, in this case, the command data 1 (that is, MODE data) is output to the address set as the IO address (SC 256). Since the port address for outputting the payout control command is set in the IO address when the first shift processing is performed, the MODE data of the payout control command is eventually output to port 1.

  Next, the CPU 56 adds 1 to the IO address (SC257) and subtracts 1 from the number of processes (SC258). It is assumed that the port address for outputting the display control command is set in the IO address by the addition process for the IO address. Then, the CPU 56 confirms the value of the processing number (SC259), and if the value is not 0, returns to the SC254. Shift processing is performed again at SC254.

  In the second shift process, the value of bit 1 in the INT data is pushed out, and the carry flag is set to “1” or “0” depending on the value of bit 1. Therefore, it is checked whether or not it is specified that the display control command should be sent out. As described above, when each shift process is performed, an IO address corresponding to a command (payout control command, display control command) checked by the shift process is set as the IO address. Therefore, when the carry flag becomes “1”, the control command is sent to the output port corresponding to the payout control command or the display control command. That is, a single common module can perform control command transmission processing for each electric component control means.

  Next, the CPU 56 reads the content of the argument 1 in which the INT data before the start of the shift process is stored (SC260), and outputs the read data to the output port for outputting the INT signal (SC261). In the INT data, the bit corresponding to the output bit of the INT signal corresponding to the control command (payout control command, display control command) output in the processing of SC251 to SC259 is “1”. Therefore, the INT signal corresponding to the payout control command or the display control command is turned on.

  Next, the CPU 56 sets a predetermined value in the wait counter (SC262), and subtracts one by one until the value becomes 0 (SC263, SC264). This process is a process for setting the ON period of the INT signal. When the value of the wait counter becomes 0, clear data (00) is set (SC265), and the data is output to the output port for outputting the INT signal (SC266). Therefore, the INT signal is turned off. Then, a predetermined value is set in the wait counter (SC262), and one by one is subtracted until the value becomes 0 (SC268, SC269). This process is a process for setting a period until the start of output of EXT data.

  As described above, the MODE data of the first byte of the control command is transmitted. Therefore, the CPU 56 increments the read pointer by 1 in SC236 shown in FIG. Accordingly, the area of command data 2 in the third byte is designated by the read pointer. The CPU 56 loads the contents of the indicated command data 2 into the argument 2 (SC237).

  Next, the CPU 56 calls a command transmission processing routine (SC238). Therefore, the EXT data is transmitted at the same timing as the transmission of MODE data.

  As described above, a 2-byte control command (payout control command, display control command) is transmitted to the corresponding electrical component control means. When the electric component control means detects the falling edge of the INT signal, the control command capturing process is started. In addition, each electric component control means may start taking in the control command at the rising edge of the INT signal. Further, the polarity of the INT signal may be reversed from that shown in FIG.

  Next, the operation of the sound / lamp control microcomputer 700 will be described. FIG. 65 is a flowchart showing the sound / lamp control main process executed by the sound / lamp control microcomputer 700. In the sound / lamp control main processing, first, initialization processing is performed for clearing the RAM area, setting various initial values, initializing a timer for determining the activation control activation interval, and the like (S501).

  When the initialization process is completed, the sound / lamp control microcomputer 700 monitors a timer interrupt flag (S502). When a timer interrupt occurs, the sound / lamp control microcomputer 700 sets “1” as the value of the timer interrupt flag in the timer interrupt process. If “1” is set as the value of the timer interrupt flag in S502, the sound / lamp control microcomputer 700 clears the value of the timer interrupt flag (S503) and executes the following effect control processing. .

  A timer interrupt occurs every 33 ms, for example. That is, the sound / lamp control process is started, for example, every 33 ms. In the timer interrupt process in this embodiment, only the process of setting “1” as the value of the timer interrupt flag is performed, and the specific sound / lamp control process is executed in the main process. The sound / lamp control process may be executed in the process.

  In the effect control process, first, a command analysis process for analyzing the received effect control command is executed (S504). Next, an effect to be executed is determined from a plurality of types of effects based on the received effect control command, and a process of setting a display control command corresponding to the determined effect is executed (S505). And the process which transmits the set display control command to the microcomputer 800 for display control is performed (S506).

  Also, a sound control process for performing sound control based on the effect determined according to the received effect control command (a process for executing sound control by selecting a process corresponding to the control state) is executed (S507). . Further, lamp control (prize ball lamp 51, ball break lamp 52, decoration lamp 25, game effect lamp 40, top frame lamp 28a, left frame lamp 28b, and right frame based on the effect determined according to the received effect control command. A lamp control process for controlling the lamp 28c (a process for executing a lamp control by selecting a process corresponding to the control state) is executed (S508). As a result, it is possible to perform a sound effect or a lamp effect that is consistent (synchronized) with the display effect in the variable display device 9.

  Next, a random number update process for updating a predetermined random counter is executed (S509). In the random number update process, for example, a random counter for determining an effect for determining an effect to be executed from a plurality of types of effects (also referred to as RS1), a random counter for determining a symbol for determining a combination of stop symbols (left RS2-1 for symbol determination, RS2-2 for middle symbol determination, and RS2-2 for right symbol determination) are used to determine the type of secondary re-lottery display. Various random counters such as a random counter (also referred to as RS3) and a temporary counter for determining a temporary stop symbol (also referred to as RS4) for determining a combination of temporary stop symbols to be temporarily stopped in the re-lottery display are updated. Thereafter, the process returns to S502 for checking the timer interrupt flag.

  Here, the various random counters updated in the random number update process of S509 will be described in detail. FIG. 66 is a diagram for explaining various random counters used by the sound / lamp control microcomputer 700 for effect control. FIG. 66 shows four types of random counters, random counters RS1 to RS4.

  First, the random RS1 is a random counter for updating a count value used to randomly determine which effect is to be executed based on the variation pattern command among the effect control commands transmitted from the game control microcomputer 560. It is. The random RS1 is updated every 33 msec, updated from 0 and updated to 99 which is the upper limit, and then updated from 0 again.

  Random RS2-1 to Random RS2-3 update the count value used to randomly determine which symbol is to be stopped based on the symbol command among the effect control commands transmitted from the game control microcomputer 560. It is a random counter for. Random RS2-1 to Random RS2-3 are updated from 0 and updated from 0 again after being updated to 5 which is the upper limit. RS2-1 is updated every 33 msec. Also, the random RS2-2 is incremented by one for each carry of the random R2-1. Random RS2-3 is incremented by one for each carry of random RS2-2.

  In the present embodiment, when the probability variation big hit symbol command is input from the game control microcomputer 560, the stop symbol from the odd symbol is displayed so that the combination of the three combinations of the odd ornament symbol is stopped and displayed. It is determined. In addition, when a non-probable big hit symbol command is input from the game control microcomputer 560, the stop symbol is determined from the even number of decorative symbols so that a combination of three even numbered decorative symbols is stopped and displayed. .

  When the variation pattern command input from the game control microcomputer 560 to the sound / lamp control microcomputer 700 is a reach deviation variation pattern command for generating a reach state, the left determined by RS2-1 is used. The same symbol as the symbol is determined as the stop symbol of the right symbol, and the symbol arranged at the position of the number of deviations specified from the left symbol and the symbol command determined using RS2-1 is determined as the stop symbol of the middle symbol. Processing is performed.

  The random RS3 is a random counter for determining the secondary re-lottery display used for determining whether or not to perform the secondary re-lottery display. The random RS3 is updated from 0 and updated to the upper limit of 3, and then again. It is added and updated from 0. The random RS3 is incremented by 1 every timer interrupt, that is, every 33 msec.

  Random RS4 is a random counter for updating a count value used to randomly determine which symbol is temporarily stopped as a jackpot symbol based on the symbol command transmitted from the game control microcomputer 560. The random RS4 is updated every 33 msec, updated from 0, updated to 5 which is the upper limit thereof, and then updated from 0 again.

  FIG. 67 is a flowchart showing a subroutine program of command analysis processing in which the sound / lamp control microcomputer 700 analyzes the effect control command input from the game control microcomputer 53.

  First, in S510, an effect control command received by the sound / lamp control microcomputer 700 is temporarily stored in a storage area provided in the RAM 75 mounted on the sound / lamp control microcomputer 700. A process is performed to determine whether or not there is a new received command in the command receiving buffer.

  When it is determined that there is a new received command in S510, the received command is read in S512, and in S513, it is determined whether or not the read command is a symbol command. If it is determined in S513 that the command is a symbol command, processing for setting a flag corresponding to the symbol command is performed in S514, and the process proceeds to S515. In S514, when the symbol command is a non-probable variable big hit command, a big hit flag indicating that a non-probable variable big hit is generated is set to an on state, and when the symbol command is the first positive variable big hit command (8104h to 8107h), the first The first probability variable big hit flag indicating that a probability variation big hit is to be set is set to an on state, and the second probability variable big hit flag indicating that a second probability variable big hit is generated when the second probability variable big hit command (811Eh) is on. In this case, the primary re-lottery display indicating that the primary re-lottery display is to be performed is set to the on state when the command is the primary re-lottery display, and the secondary re-lottery display is performed. Sometimes the secondary re-lottery flag indicating that the secondary re-lottery display will be performed is set to the ON state, and the number of shifts of the medium symbol when the reach is lost is specified Process of setting the ON state the number of shifted flag corresponding to the shift speed is performed when a that command.

  On the other hand, when it is determined in S513 that the command is not a symbol command, processing for determining whether or not the command is a variation pattern command is performed in S515. When it is determined in S515 that the command is a variation pattern command, processing for setting an effect start flag for starting an effect such as variable display is performed in S516. On the other hand, when it is determined in S515 that the command is not a variation pattern command, in S517, it is determined whether or not the command is a symbol determination command for ending the decorative symbol variation display. When it is determined in S517 that the received command is a symbol confirmation command, a stop flag is set in S518, and a command for instructing stoppage of the ornament symbol is transmitted to the display control microcomputer 800. The process for identifying and setting the stop command is performed, and the command analysis process is terminated. When the symbol confirmation command is received as an effect control command in this way, the relationship between the symbol confirmation command and the stop command is associated with one to one, and for example, transmitted in response to the reception of the symbol confirmation command. The display control command to be transmitted is specified in correspondence with the received effect control command, such as specifying the stop command to be performed. The set stop command is transmitted to the display control microcomputer 800 in S506.

  On the other hand, when it is determined in S517 that the received command is not a symbol determination command, processing for determining whether or not it is an ending switch command is performed in S518a. When it is determined in S518a that the received command is an ending switch command, a process of setting an ending start flag in S518b and setting an ending start command set in S560 described later with reference to FIG. Do. The ending start command is a command that is transmitted to the display control microcomputer 800 and used to start an effect indicating that the big hit has ended. The setting of the ending start command specifically refers to a process of setting the ending start command data in the buffer of the RAM 55. The set ending start command is output as a display control command from the sound / lamp control microcomputer 700 to the display control microcomputer 800 in S506 of FIG.

  Next, it is determined in S518c whether or not the command read in S521 is a ball break command. In the case of a ball break command, a ball break flag is set in S518d. The ball break flag is used for storing that a ball break has occurred. If the command read in S521 is not a ball-out command, it is determined in S518e whether or not the ball-out flag has already been set, and if it is set, it is reset by S518f.

  Next, it is determined in S518g whether or not the command read in S521 is a full command. In the case of a full command, a full flag is set in S518h. The full tank flag is for storing that a full tank state has occurred. If the command read in S521 is not a full command, it is determined in S518i whether or not the full flag is already set, and if it is set, it is reset in S518j.

  In S519, when there is another received command, a flag corresponding to the received command is set, and the command analysis processing is terminated. For example, when an ending end command is received, an ending end flag is set and a process of transmitting the ending end command to the display control microcomputer 800 is performed.

  FIG. 68 is a flowchart showing a subroutine program of command setting processing for executing processing for setting various commands when the effect start flag is set in S516 of FIG.

  First, in S520, a process for determining whether or not an effect start flag is set is performed. If it is determined in S520 that the effect start flag is not set to the on state, the command setting process is terminated. On the other hand, when it is determined in S520 that the effect start flag is set, processing of reading the values of random RS1 to random RS4 and storing them in a predetermined buffer area is performed in S520a. Then, a secondary re-lottery display determination process for determining the type of secondary re-lottery display is performed in S521, and a decorative symbol determination process for determining a combination of decorative symbols to be stopped in the variable display device 9 is performed in S522. In S523, a decoration variation pattern determination process for determining a variation pattern of the decoration symbol in the variation display device 9 is performed. In S524, a display control command setting process for setting a display control command specified based on the determination process in S521 to S523 is performed. The command setting process is terminated.

  FIG. 69 is a flowchart for explaining the secondary re-lottery display determination process (S521) of the command setting process.

  In the secondary re-lottery display determination process, first, in S530, a process for determining whether or not the secondary re-lottery flag is set is performed. When it is determined that the secondary re-lottery flag is not set to the on state, the secondary re-lottery display determination process is terminated. On the other hand, when it is determined in S530 that the secondary re-lottery flag is set to the ON state, the secondary re-lottery display type determination table used for determining the type of the secondary re-lottery display in S531 is looked up. Processing is performed. In S532, a process for determining the type of secondary re-lottery display based on the value of the random RS3 read in S520a is performed, and the secondary re-lottery display determining process is terminated.

  Here, the secondary re-lottery display type determination table will be described. FIG. 70 is a diagram for explaining a secondary re-lottery display type determination table. In the secondary re-lottery display type determination table, when the value from the random RS3 is “0”, the normal re-lottery is determined, and when it is “1”, the return re-lottery is determined. The distribution is set so that the slip re-lottery is determined at a certain time and the two-stage re-lottery is determined at "3". The normal re-lottery refers to an effect in which the jackpot symbol as the final stop symbol is stopped and displayed by variably displaying while maintaining the combination of the jackpot symbol. Return re-lottery is a variation display with the combination of jackpot symbols maintained, and after passing through the final stop symbol, a display to return to the final stop symbol is performed, and the jackpot symbol as the final stop symbol is displayed. An effect that stops display. The slip re-lottery is an effect in which the display is variably displayed while maintaining the combination of the jackpot symbols, the display is made to slide from the symbol before the final stop symbol, and the jackpot symbol as the final stop symbol is stopped and displayed. . The two-stage re-lottery refers to an effect in which the big hit symbol as a final stop symbol is stopped and displayed after the variable display is performed while temporarily maintaining the combination of the big hit symbols and temporarily stopped.

  FIG. 71 is a flowchart for explaining the decorative symbol determination process (S522) of the command setting process.

  In the decorative symbol determination process, first, in S540, a process of determining whether or not the big hit flag is set to the on state is performed. When it is determined in S540 that the big hit flag is set, in S541, it is determined whether or not the primary re-lottery flag is set in the ON state. When it is determined in S541 that the primary re-lottery flag is set to the on state, processing is performed to determine whether or not the secondary re-lottery flag is set to the on state in S542. When it is determined in S542 that the secondary re-lottery flag is set to the ON state, Processing for determining a combination of non-probable big hit symbols using the value of the random RS4 read in S520a is performed. Here, the fluctuating temporary stop symbol means a non-probable variable big hit symbol that is temporarily stopped before the first re-lottery display is performed. Further, the stop symbol at the end of change refers to a jackpot symbol that is stopped when the variable symbol display is ended. In S544 in the present embodiment, the same non-probable variable big hit symbol is determined from the non-probable variable big hit symbol as the variable temporary stop symbol and the variable end stop symbol. As the time stop symbol, different non-probable variation big hit symbols may be determined among the non-probable variation big hit symbols. For example, when the variable temporary stop symbol is determined using the value of the random RS4, the next non-probable big hit symbol of the determined variable temporary stop symbol (for example, when the determined variable temporary stop symbol is “222”) , “444”) may be determined as the stop symbol at the end of fluctuation.

  On the other hand, when it is determined in S542 that the secondary re-lottery flag is not set to the ON state, the combination of the non-probable variation big hit symbol as the changing temporary stop symbol in S542a is determined using the random RS4 value read in S520a. Processing is performed.

  If it is determined in S541 that the primary re-lottery flag is not set to the on state, processing is performed in S543 to determine whether or not the secondary re-lottery flag is set to the on state. When it is determined in S543 that the secondary re-lottery flag is not set to the on state, the process proceeds to S546. On the other hand, when it is determined in S543 that the secondary re-lottery flag is set to the on state, a combination of non-probable big hit symbols is determined using the value of the random RS4 read in S520a as a stop symbol at the end of variation in S545. Processing is performed.

  In S546, a process is performed to determine whether or not the first probability variation big hit flag is set to the on state. If it is determined in S546 that the first probability variation jackpot flag is set to the ON state, the combination of the first probability variation jackpot symbol is determined as the final stop symbol in S547 using the value of the random RS2-1 read in S520a. The process is performed, and the decorative symbol determination process is terminated. In the determination processing in S547, for example, “111” is determined as the final stop symbol when the value of the counter extracted from the random RS2-1 is “0”, and “333” is determined as the final stop symbol when it is “1”. Is determined. Similarly, when the counter values extracted from the random RS2-1 are “2”, “3”, “4”, “5”, “555”, “111”, “333”, “333” “555” is determined.

  On the other hand, when it is determined in S546 that the first likelihood variable big hit flag is not set to the ON state, it is determined in S546a whether or not the second certain variable big hit flag is set, and if it is set, S546b. Thus, a process of determining a combination of symbols of chance hits (see FIG. 83 (d)) as a stop symbol using the read random RS2-1 value is performed.

  When it is determined in S546a that the second probability variation jackpot flag is not set, a process of determining a combination of non-probability variation jackpot symbols as the final stop symbol in S548 using the value of the random RS2-1 read in S520a, The decorative symbol determination process ends. Note that the final stop symbol is a stop symbol at the end of change because the secondary re-lottery display is not performed except when YES is determined in S542 or S543. In the determination process in S548, for example, “000” is determined as the final stop symbol when the value of the counter extracted from the random RS2-1 is “0”, and “222” as the final stop symbol when the counter value is “1”. Is determined. Similarly, when the counter value extracted from the random RS2-1 is “2”, “3”, “4”, “5”, “444”, “000”, “222”, “444” is determined.

  On the other hand, when it is determined in S540 that the big hit flag is not set in the on state, processing for determining whether or not the deviation number flag is set in the on state in S540a is performed. When it is determined in S540a that the deviation number flag is set to the ON state, the left and right symbols are determined as the final stop symbols in S540b using the value of the random RS2-1 read in S520a. The process of determining the number of decorative symbols specified by the left symbol and the number of deviation flags determined as the middle symbol is performed, and the decorative symbol determining process is terminated.

  On the other hand, when it is determined in S540a that the deviation number flag is not set to the ON state, the value of random RS2-1 to random RS2-3 read out in S520a is used as the final stop symbol in S549, and the like. The decorative design determining process is terminated. In addition, when the final stop symbol corresponding to random RS2-1 to random RS2-3 coincides with the combination of accidental big hit symbol, or when a reach state is generated, it is corrected so that it becomes an out-of-sequence symbol that does not generate a reach state. Thus, each stop symbol is determined.

  FIG. 72 is a flowchart for explaining a decoration variation pattern determination process (S523) in the command setting process.

  In the decoration variation pattern determination process, first, a process of looking up a table corresponding to the variation pattern command received in S551 is performed. In S552, the process of determining the decoration variation pattern is performed using the table looked up in S551 in accordance with the value of the random RS1 read in S520a, and the decoration variation pattern determination process is terminated.

  Here, the table looked up in S551 will be described. 73 and 74 are diagrams for explaining a decoration variation pattern determination table used for determining a decoration variation pattern. In the present embodiment, the decoration variation pattern determination table corresponding to the variation pattern command transmitted from the game control microcomputer 560 is looked up, and one decoration variation pattern is determined based on the value of the random RS1. Is done. FIG. 73 shows the entire decoration variation pattern determination table corresponding to variation pattern commands that can be transmitted from the game control microcomputer 560. FIG. 74 shows a decoration variation pattern determination table for each variation pattern command in the entire decoration variation pattern determination table shown in FIG. The decoration variation pattern column shown in FIG. 74 shows the lower byte of the display control command transmitted from the sound / lamp control microcomputer 700 to the display control microcomputer 800 for each symbol command. The change time of the decoration change pattern is shown in parentheses.

  When the variation pattern command received from the game control microcomputer 560 is “8000h”, the table for 8000 hours is referred to. In the 8000 o'clock table, when the value of the random RS1 is in the range of “0 to 69”, the ornamental normal deviation variation pattern without notice is determined, and when the value of the random RS1 is in the range of “70 to 89”, the notice 1 is executed. When the notice 1 decoration normal deviation variation pattern is determined and is within the range of “90 to 96”, the notice 2 decoration normal deviation variation pattern is determined and is within the range of “97 to 99”. The distribution is set so that the variation pattern of the normal deviation 3 for performing the advance notice 3 is determined. Note that the notice 1 to notice 3 are performed in different modes, such as the character that appears, the timing of appearance, and the type of background image. That is, the variation display means, the sound output means, and the light emission means are controlled in different modes depending on which of the notice 1 to notice 3 is executed.

  FIG. 74 (a) is a diagram for explaining the 8000 hour table. As shown in FIG. 74 (a), when the ornamental normal deviation variation pattern without notice is determined, “00” is determined as the lower byte of the display control command, and 10 seconds is determined as the variation time. Similarly, when the notice 1 decoration normal deviation fluctuation pattern is determined, when the notice 2 decoration normal deviation fluctuation pattern is determined, or when the notice 3 decoration normal deviation fluctuation pattern is determined, the lower byte of the display control command is “ “01”, “02”, and “03” are determined, and 10 seconds is determined as the variation time.

  Next, when the variation pattern command received from the game control microcomputer 560 is “8001h”, the table for 8001 is referred to. In the 8001 o'clock table, when the value of the random RS1 is in the range of “0 to 64”, the normal reach deviating 1 variation pattern without notice is determined, and when the random RS1 value is in the range of “65 to 84”, the notice 1 is displayed. Preliminary 1-decoration normal reach deviating 1 variation pattern to be executed is determined, and the 2-division normal reach deviating 1 deviating pattern is determined when it is within the range of “85 to 93”, and within the range of “94 to 99” At this time, the distribution is set so that the 1-variation pattern is determined to be out of the normal-reach 3 decoration for executing the advance notice 3.

  FIG. 74B is a diagram for explaining the 8001 hour table. As shown in FIG. 74 (b), the table for 8001 is composed of a plurality of decoration variation pattern determination tables corresponding to the symbol commands received from the game control microcomputer 560. When the received symbol command is “8109h”, the 8109 o'clock table is looked up. Similarly, when “810Ah”, “810Bh”, “810Ch”, and “810Dh” are received as received symbol commands, the 810A hour table, the 810B hour table, the 810C hour table, and the 810D hour table are respectively displayed. Looked up.

  For example, when the ornamental normal reach without notice 1 variation pattern is determined and the received symbol command is “8109h”, “10” is determined as the lower byte of the display control command and the variation time is determined as 16 seconds. Similarly, when a variation pattern of unrecognized decorative normal reach without notice is determined and the received symbol commands are “810Ah”, “810Bh”, “810Ch”, “810Dh”, “14” is used as the lower byte of the display control command. , “18”, “1C”, and “20” are determined, and 17 seconds, 14 seconds, 13 seconds, and 18 seconds are respectively determined as the variation times. Similarly, when the notice 1 decoration normal reach deviation 1 fluctuation pattern, the notice 2 decoration normal reach deviation 1 fluctuation pattern, and the notice 3 decoration normal reach deviation 1 fluctuation pattern are determined, the display control command corresponding to the received symbol command is also subordinate. Bytes and variation times are determined.

  Next, when the variation pattern command received from the game control microcomputer 560 is “8002h”, the 8002 hour table is referred to. In the 8002 o'clock table, when the value of the random RS1 is in the range of “0 to 59”, the decorative normal reach deviation 2 variation pattern without notice is determined, and when the random RS1 value is in the range of “60 to 80”, the notice 1 is displayed. Preliminary 1-decoration normal reach deviating 2 variation pattern to be executed is determined, and when 2-division pattern is within the range of “81-92”, the 2-division normal reach deviating 2-variation pattern is determined and within the range of “93-99” At this time, the distribution is set so that the notice 3 decoration for executing the notice 3 and the normal reach deviating 2 variation pattern are determined.

  FIG. 74C is a diagram for explaining the 8002 hour table. As shown in FIG. 74 (c), the table for 8002 is composed of a plurality of decoration variation pattern determination tables corresponding to the symbol commands received from the game control microcomputer 560. When the received symbol command is “8109h”, the 8109 o'clock table is looked up. Similarly, when “810Ah”, “810Bh”, “810Ch”, and “810Dh” are received as received symbol commands, the 810A hour table, the 810B hour table, the 810C hour table, and the 810D hour table are respectively displayed. Looked up.

  For example, if the ornamental normal reach without notice 2 variation pattern is determined and the received symbol command is “8109h”, “30” is determined as the lower byte of the display control command and 21 seconds is determined as the variation time. Similarly, when the ornamental normal reach deviation 2 variation pattern without notice is determined and the received symbol commands are “810Ah”, “810Bh”, “810Ch”, “810Dh”, “34” as the lower byte of the display control command , “38”, “3C”, and “40” are respectively determined, and 22 seconds, 19 seconds, 18 seconds, and 23 seconds are respectively determined as the variation times. Similarly, when the notice 1 decoration normal reach deviation 2 fluctuation pattern, the notice 2 decoration normal reach deviation 2 fluctuation pattern, and the notice 3 decoration normal reach deviation 2 fluctuation pattern are determined, the display control command corresponding to the received symbol command is also subordinate. Bytes and variation times are determined.

  Next, when the variation pattern command received from the game control microcomputer 560 is “8010h”, the table for the 8010 hour is referred to. In the table for 8010 o'clock, when the value of the random RS1 is within the range of “0 to 24”, one variation pattern per decoration normal reach without notice is determined, and when the value of the random RS1 is within the range of “25 to 35”, the notice 1 is displayed. 1 variation pattern per normal reach for the advance notice 1 decoration to be executed is determined, and 1 change pattern per normal reach for the advance notice 2 decoration to execute the advance notice 2 is within the range of “36 to 74” and within the range of “75 to 99” At this time, the distribution is set so that one variation pattern is determined per normal reach for the three ornaments for performing the third notification.

  FIG. 74D is a diagram for explaining the 8010 o'clock table. As shown in FIG. 74 (d), the table for 8010 o'clock is composed of a plurality of decoration variation pattern determination tables corresponding to the symbol commands received from the game control microcomputer 560. When the received symbol command is “8100h”, “8104h”, or “811Eh”, the 8100, 8104, and 811E hour tables are looked up. Similarly, when “8101h” or “8105h”, “8102h” or “8106h”, “8103h” or “8107h” is received as the received symbol commands, the table for 8101 hour and 8105 hour, and the table for 8102 hour and 8106 respectively. The time table, the table for 8103 o'clock and 8107 o'clock, is looked up.

  For example, when one variation pattern per ornamental normal reach without notice is determined and the received symbol command is “8100h” or “8104h”, or when the symbol command “811Eh” at the time of determining the second probability variation big hit is present, the display control command “90” is determined as the low-order byte, and 20 seconds is determined as the variation time. Similarly, when one variation pattern per decorative normal reach without notice is determined and the received symbol command is “8101h” or “8105h”, “8102h” or “8106h”, “8103h” or “8107h”, the display control is performed. “94”, “98”, and “9C” are determined as the lower bytes of the command, respectively, and 35 seconds, 20 seconds, and 35 seconds are determined as the variation times, respectively. Similarly, when one variation pattern per one normal reach of a notice, one variation pattern per one normal reach of a notice, and one variation pattern per one normal reach of a notice three decoration is determined, the display control command corresponding to the received symbol command is also subordinate. Bytes and variation times are determined.

  When the received symbol command is “8101h” or “8105h”, “8103h” or “8107h” for performing the first re-lottery, the notice effect is determined and the type of the first re-lottery display is determined. The For example, when one variation pattern per decoration normal reach without notice is determined, normal re-lottery is determined. Similarly, when the 1 variation pattern per normal reach for the advance notice, the 1 change pattern per normal reach for the 2 advance notice, and the 1 change pattern per normal reach for the 3 advance notice are determined, the return redraw, the slide redraw, and the two-stage redraw, respectively. It is determined. The normal re-lottery, return re-lottery, slip re-lottery, and 2-stage re-lottery as the types of primary re-lottery display are the normal re-lottery, return re-lottery, and slide described as the types of secondary re-lottery display, respectively. The description will not be repeated because it is the same as the re-lottery and the 2-stage re-lottery.

  Next, when the variation pattern command received from the game control microcomputer 560 is “8013h”, the table for 8013 is referred to. In the table for 8013 o'clock, when the value of the random RS1 is within the range of “0-9”, two variation patterns per ornamental super reach without notice are determined, and when the random RS1 is within the range of “10-14”, the notice 1 2 variation patterns per decoration super-reach for executing the notification 2 are determined, and 2 variation patterns per decoration 2-super-reach for executing the notification 2 are determined within the range of “15 to 29”, and “30 to 99” are determined. The distribution is set so that two variation patterns per three super-reach for the notice 3 decoration for executing the notice 3 are determined within the range.

  FIG. 74 (e) is a diagram for explaining the table for 8013 o'clock. As shown in FIG. 74 (e), the table for 8013 o'clock is composed of a plurality of ornament variation pattern determination tables corresponding to the symbol commands received from the game control microcomputer 560. When the received symbol command is “8100h” or “8104h”, the table for 8100 o'clock and 8104 o'clock is looked up. Similarly, when “8101h” or “8105h”, “8102h” or “8106h”, “8103h” or “8107h” is received as the received symbol commands, the table for 8101 hour and 8105 hour, and the table for 8102 hour and 8106 respectively. The time table, the table for 8103 o'clock and 8107 o'clock, is looked up.

  For example, when two variation patterns per ornamental super reach without notice are determined and the received symbol command is “8100h” or “8104h”, “C0” is determined as the lower byte of the display control command and the variation time is 45 seconds. Is determined. Similarly, when two variation patterns per ornamental super reach without notice are determined and the received symbol command is “8101h” or “8105h”, “8102h” or “8106h”, “8103h” or “8107h”, “C4”, “C8”, and “CC” are determined as the lower bytes of the control command, respectively, and 60 seconds, 45 seconds, and 60 seconds are determined as the variation times, respectively. Similarly, when the two-variation pattern per super-reach for the first notice, the two-variation pattern per super-reach for the second notice, and the two-variation pattern per super-reach for the three notices are determined, display control corresponding to the received symbol command is performed. The lower byte and variation time of the command are determined.

  When the received symbol command is “8101h” or “8105h”, “8103h” or “8107h” for performing the first re-lottery, the notice effect is determined and the content of the first re-lottery is determined. . For example, when two variation patterns per ornamental super reach without notice are determined, normal re-lottery is determined as the contents of the first re-lot. Similarly, when the two variation patterns per super-reach for the first notice decoration, the two variation patterns per super-reach for the second notice decoration, and the two fluctuation patterns per super-reach for the three notice decorations are determined, the return re-lottery is performed as the contents of the first re-lot. , Slip re-lottery, two-stage re-lottery is determined.

  As described above, the decoration variation pattern determination tables for the 8000 hour, 8001 hour, 8002 hour, 8010 hour, and 8013 hour of the ornament variation pattern determination table of FIG. 73 have been described. Similarly, the ornament variation pattern determination table for 8004 o'clock, 8011 o'clock, and 8012 o'clock is configured so that one ornament variation pattern is determined based on the value of random RS1, and the design command The lower byte and the variation time of the display control command are determined every time.

  With this configuration, the sound / lamp control microcomputer 700 in this embodiment is used for game control even if the variation pattern commands received from the game control microcomputer 560 are the same variation pattern command. The lower byte and the variation time of the display control command according to the symbol command received from the microcomputer 560 can be determined. Further, the sound / lamp control microcomputer 700 determines the type of the notice effect and the first re-lottery by determining the decoration variation pattern based on the value of the random RS1 with reference to the decoration variation pattern determination table. Can do.

  Note that the decoration variation pattern determination table shown in FIG. 73 indicates that any one of the notices 1 to 3 when the variation pattern command received from the game control microcomputer 560 is “8000h to 8004h”. One of the notices 1 to 3 is executed when the variation pattern command received from the game control microcomputer 560 is one of “8010h to 8014h”, rather than the ratio at which the decoration variation pattern to be executed is determined. The distribution is set so that the proportion of the decoration variation pattern to be determined is increased.

  FIG. 75A is a flowchart for explaining the display control command setting process (S524) in the command setting process.

  In the display control command setting process, first, in S555, the sound / lamp control microcomputer is based on the symbols already determined in S522 (excluding the final stop symbols displayed by performing the secondary re-lottery display). Processing for specifying the upper byte of the display control command transmitted from 700 to the display control microcomputer 800 is performed. Specifically, when “YES” is determined in S542 or S543 of FIG. 71, the upper byte for specifying the changing temporary stop symbol and the changing end stop symbol determined in S544 or S545 is specified. On the other hand, if “YES” is not determined in either S542 or S545, the upper byte based on the changing temporary stop symbol determined in S542a or the final stop symbol determined in S547, S548, S540b, or S549. Is identified.

  Here, the first upper byte specifying table used for specifying the upper byte of the display control command from the determined symbol will be described. FIG. 76 is a diagram for explaining the first upper byte specifying table.

  For example, when “000” is determined as the changing temporary stop symbol and the change end stop symbol in S544, “00” is specified as the upper byte. In S545, when “444” is determined as the stop symbol at the end of change, “16” is specified as the upper byte. When “222” is determined as the changing temporary stop symbol in S542a and “000” is determined as the final stop symbol in S548, “06” is specified as the upper byte. Furthermore, when “003” is determined as the final stop symbol in S549, “1A” is specified as the upper byte. As described above, when the first upper byte specifying table is determined as “YES” in S540 and is determined as “YES” in S542 or S543, the temporary stop symbol during change and the end of change determined in S544 It is configured so that one upper byte can be specified from the combination of stop symbols, the stop symbol at the end of change determined in S545. In addition, the first upper byte specifying table is determined in S540 or S548 when it is determined as “YES” in S540 and is not determined as “YES” in S542, and in the changing temporary stop symbol determined in S542a. Further, it is configured such that one upper byte can be specified from the combination of the final stop symbols. Further, the first upper byte specifying table specifies one upper byte from the final stop symbols determined in S547 and S548 when “YES” is determined in S540 and “YES” is not determined in S543. It is configured to be able to. Further, the first upper byte specifying table is configured to be able to specify one upper byte from the final stop symbol determined in S540b or S549 when “YES” is not determined in S540. Yes.

  Returning to FIG. 75A, in S556, the lower byte of the display control command transmitted from the sound / lamp control microcomputer 700 to the display control microcomputer 800 from the decoration variation pattern determined in S552 of FIG. A process for specifying is performed. Specifically, processing for specifying the lower byte of the display control command corresponding to one decoration variation pattern determined using FIG. 73 and FIG. 74 described above is performed.

  In S557, a process of specifying and setting a 2-byte decoration variation pattern command as a display control command based on the upper byte specified in S555 and the lower byte specified in S556 is performed. The setting of the decoration variation pattern command specifically refers to a process of setting the decoration variation pattern command data in the buffer of the RAM 75. The set decoration variation pattern command is output as a display control command from the sound / lamp control microcomputer 700 to the display control microcomputer 800 in S506 of FIG.

  In S558, when “YES” is determined in S542 or S543, the final stop symbol determined in S547 or S548, that is, the big hit symbol determined as the symbol displayed by performing the secondary re-lottery display. Based on the above, processing for specifying the upper byte of the display control command is performed.

  Here, the second upper byte specifying table for specifying the upper byte from the jackpot symbol will be described. FIG. 77 (a) is a diagram for explaining a second upper byte specifying table for specifying upper bytes from the jackpot symbol. The second upper byte specifying table is configured such that one upper byte can be specified from the jackpot symbol. For example, when the big hit symbol is “000”, “111”... “555”, “00”, “01”.

  Returning to FIG. 75 (a), in S559, processing for specifying the lower byte of the display control command from the type of the secondary re-lottery display determined in S532 of FIG. 69 is performed.

  Here, the lower byte specifying table for specifying the lower byte from the type of the secondary re-lottery display will be described. FIG. 77 (b) is a diagram for explaining a lower byte specifying table for specifying the lower byte from the type of the secondary re-lottery display. The lower byte specifying table is configured such that one lower byte can be specified from the type of secondary re-lottery display. For example, when the type of secondary re-lottery display is “normal re-lottery”, “return re-lottery”, “slip re-lottery”, or “two-stage re-lottery”, “01” is set as the lower byte of the display control command. , “02”, “03”, “04”, “05”.

  In S560, a process of specifying and setting a 2-byte ending start command as a display control command based on the upper byte specified in S558 and the lower byte specified in S559 is performed. The setting of the ending start command specifically refers to a process of storing the data of the ending start command in a command setting buffer provided in the RAM 75. The stored ending start command is set in the buffer of the RAM 75 in the above-described S518b when it is determined YES in the above-described S518a, and from the sound / lamp control microcomputer 700 in the S506 in FIG. The data is output to the display control microcomputer 800. That is, the ending start command set in S560 is stored in the command setting buffer of the RAM 75 until YES is determined in S518a, and is output to the display control microcomputer 800 when YES is determined in S518a. . When the secondary re-lottery display is not performed, a process for specifying and setting a command (for example, “1111”) for specifying that the secondary re-lottery display is not performed is performed.

  FIG. 75B is a flowchart showing the sound control process in S57. In the sound control process, first, in S565, it is determined whether or not a ball break flag is set. If it is set, control is performed to generate a ball breaking sound from the speaker 27 in S566. On the other hand, if it is determined in S567 that the full flag is set, control is performed to generate a full sound from the speaker 27 in S568. If it is determined in S567 that the full tank flag is not set, other sound control is performed in S569.

  FIG. 75C is a flowchart showing the lamp control process in S58. In the lamp control process, first, in S570, it is determined whether or not a ball break flag is set. If it is set, control is performed to turn on the ball break lamp 52 in S571. On the other hand, if it is determined in S570 that the ball break flag is not set, other lamp control is performed in S572.

  Next, the operation of the display control microcomputer 800 will be described. FIG. 78 is a flowchart showing a display control main process executed by the display control microcomputer 800. In the display control main process, first, an initialization process is performed for clearing the RAM area, setting various initial values, initializing a timer for determining a display control activation interval, and the like (S601).

  When the initialization process is completed, the display control microcomputer 800 monitors the timer interrupt flag (S602). When a timer interrupt occurs, the display control microcomputer 800 sets “1” as the value of the timer interrupt flag in the timer interrupt process. If "1" is set as the value of the timer interrupt flag in S602, the display control microcomputer 800 clears the value of the timer interrupt flag (S603) and executes the following display control processing.

  A timer interrupt occurs every 33 ms, for example. That is, the display control process is activated every 33 ms, for example. In the timer interrupt process in this embodiment, only the process of setting “1” as the value of the timer interrupt flag is performed, and the specific display control process is executed in the main process. The display control process may be executed in

  In the display control process, first, a power-off process for monitoring whether or not a power-off signal is output is executed (S604). Next, command analysis processing for analyzing the received display control command is executed (S605). Next, display control process processing is performed (S606). In the display control process, the process corresponding to the current control state (display control process flag) is selected from the processes corresponding to the control state, and the display control of the variable display device 9 is executed.

  Next, a random number update process for updating a predetermined random counter is executed (S607). Thereafter, the process returns to the process of checking the timer interrupt flag in S602. The display control INT signal from the sound / lamp control board 70 is input to the interrupt terminal of the display control microcomputer 800. For example, when the INT signal from the sound / lamp control board 70 is turned on, an INT interrupt is generated in the display control microcomputer 800. The display control microcomputer 800 executes a display control command reception process in the interrupt process. In the display control command reception process, the display control microcomputer 800 stores the received display control command data in a command reception buffer provided in the RAM 85, analyzes the command based on the command data, and performs various processes. Execute the process.

  Next, the display control process according to S606 in FIG. 78 will be described. FIG. 79 is a flowchart showing display control process processing. In the display control process, any one of S700 to S706 is executed according to the value of the display control process flag. In each process, the following process is executed.

  Fluctuation pattern command reception waiting process (S700): It is confirmed whether or not a decoration variation pattern command has been received. If it is confirmed that a decoration variation pattern command has been received, the value of the display control process flag is set to a value corresponding to S701. Update to

  Symbol variation start processing (S701): The ornament variation pattern and variation time are specified from the lower command of the ornament variation pattern command, and variation of the ornament symbol (left, middle, right symbol) in the variation display device 9 is started. Perform processing. Thereafter, the value of the display control process flag is updated to a value corresponding to S702.

  Symbol variation processing (S702): Controls the switching timing of each variation state (variation speed, advance notice, background image, primary re-lottery display, etc.) constituting the ornament variation pattern in the variation display device 9, and is set Monitor the end of the variable time. Then, when the variation time set in the variation time timer ends, the left, middle and right symbols of the decorative symbol are stopped, and control is performed to change the state of fluctuation fluctuation in which the symbol is swaying without confirming the display result. . Thereafter, the value of the display control process flag is updated to a value corresponding to S703. The primary re-lottery display described above is executed in the symbol variation process. That is, when the upper byte of the received decoration variation pattern command is “00” to “11” described with reference to FIG. 76, in the symbol variation processing, the variation temporary stop symbol specified from the upper byte is temporarily stopped. After that, a process for displaying the first re-lottery display is performed, and control is performed to stop (sway fluctuation) the stop symbol at the end of the fluctuation. Further, when the upper byte of the received decoration variation pattern command is “12” to “E9” described in FIG. 76, the variation end stop symbol or the final stop symbol identified from the upper byte in the symbol variation processing. Is controlled to stop (swing fluctuation).

  Symbol stop waiting process (S703): If the stop command is received after the variation time specified by the ornament variation pattern command has elapsed, the variation of the ornament symbol on the variation display device 9 is stopped (the above-mentioned fluctuation variation state is stopped). ) And control to display the stop symbol to confirm the stop symbol. That is, in the process during symbol change, control is performed to stop the stop symbol at the end of change or the final stop symbol specified from the higher byte. After that, when the decorative symbol stop symbol on the variable display device 9 is a combination of jackpot symbols, the value of the display control process flag is updated to a value corresponding to S704, and the display control of the jackpot gaming state is shifted. On the other hand, when the stop symbol of the decorative symbol on the variable display device 9 is a combination of symbols that are out of sync, the value of the display control process flag is updated to a value corresponding to S700.

  Big hit display processing (S704): After the end of the decorative symbol change time on the variable display device 9, display at the start of the big hit. Thereafter, the value of the display control process flag is updated to a value corresponding to S705.

  Big hit game processing (S705): Control for displaying a big hit game effect, which is a display for producing an effect during the big hit game. When the ending start command is received, the value of the display control process flag is updated to a value according to S706. When the upper byte of the received ending start command is “00” to “05” described in FIG. 77, the secondary re-lottery display of the type specified from the lower byte of the received ending start command is set. When the received ending start command is a command for specifying that the secondary re-lottery display is not performed, the normal ending display is set.

  Big hit game end process (S706): The ending display set in the big hit game process is performed. The ending display ends when an ending end command is received from the sound / lamp control microcomputer 700. The secondary re-lottery display described above is executed in the jackpot game end process. When the secondary re-lottery display is set in the big hit game process, the secondary re-lottery display of the set type is performed in the big hit game end process, and the control for stopping the big hit symbol specified from the upper byte is performed. Done. On the other hand, when the normal ending display is set in the big hit game process, the set normal ending display is performed in the big hit game end process. Thereafter, the value of the display control process flag is updated to a value corresponding to S700.

  Next, the symbol variation start process in S701 of FIG. 79 will be described. FIG. 80 is a flowchart showing the symbol variation start process (S701) of FIG. In the symbol variation start process, the display control microcomputer 800 performs the following process. First, data for performing a variation display with a decoration variation pattern corresponding to the received decoration variation pattern command is set (S711). Specifically, in S711, the decoration variation pattern is set by selecting and setting data used for variation display with the decoration variation pattern specified from the lower byte of the received decoration variation pattern command. Then, the variation time corresponding to the received decoration variation pattern command is set in the variation time timer for measuring the variation time in the variation display device 9, and the variation time timer timing (measurement of variation time) is started ( S712).

  Next, with the decoration variation pattern set in S712, the variation display of the decoration symbol for deriving and displaying the display result on the variation display device 9 is started (S713). Then, the display control process flag is updated to a value corresponding to the symbol changing process (S702) (S714), and the process returns. In this way, the start of variation of the decorative pattern with the decorative variation pattern set according to the decorative variation pattern command is executed while being managed by the variation time set according to the decorative variation pattern command.

  FIG. 81 is a flowchart showing the big hit game processing (S705) in the display control process. In the big hit game processing, first, in S720, the big hit game processing is performed. In the big hit game processing, for example, various display effects during each round in the big hit game state and various display effects during the interval period between rounds are performed. In S721, processing for determining whether or not an ending start command has been received is performed. If it is determined in S721 that an ending start command has been received, processing for setting a display effect corresponding to the ending start command is performed in S722. For example, when the upper byte of the received ending start command is “00” to “05” described in FIG. 77, the secondary re-lottery display of the type specified from the lower byte of the received ending start command is set. The When the received ending start command is a command for specifying that the secondary re-lottery display is not performed, the normal ending display is set. In S723, a process of updating the value of the display control process flag to a value corresponding to the big hit game end process is performed, and the big hit game process is ended.

  Next, an example of the primary re-lottery display and the secondary re-lottery display on the variable display device 9 will be described. FIG. 82 is an explanatory diagram showing an example of the primary re-lottery display and the secondary re-lottery display on the variable display device 9.

  82 (a) to 82 (d) show a state in which the decorative display of the variable display on the variable display device 9 starts, stops in the order of the left symbol, the right symbol, and the middle symbol, and becomes a jackpot symbol combination. ing. (A) shows a state in which the variable display of the left, middle, and right symbols has started simultaneously on the variable display device 9. (B) shows a state in which “2” is stopped and displayed as the left symbol. In (c), “2”, which is the same as the left symbol, is stopped and displayed as the right symbol, and the reach state is generated. (D) shows a state in which the middle symbols are displayed in a stopped state, and the variable temporary stop symbols are in a set of three “2” s, resulting in a combination of non-probable variation big hit symbols.

  FIG. 82 (e) shows a big hit occurrence notification effect for notifying that a big hit has occurred. In the big hit occurrence notification effect, a message such as “big hit !!!!” is displayed in the center of the variable display device 9 to notify that the big hit has occurred.

  82 (f) to 82 (i) show a state where the primary re-lottery display is performed on the variable display device 9. (F) shows a state in which a message such as “re-lottery!” For notifying that the primary re-lottery display is performed is displayed. (G) shows a state where the variation display device 9 displays the variation again while maintaining the combination of jackpot symbols. The state of re-variable display while maintaining the combination of jackpot symbols is, for example, a state of “222” → “333” →... “555” → “000” →. In (h), the stop symbol at the end of the change is displayed as a result of the re-lottery, and shows a state where three sets of “2” are formed again. (I) shows a state in which a message such as “rising failure ...” indicating that the probability variation big hit symbol has not been achieved is displayed. After the primary re-lottery display ends, the gaming state shifts to the big hit gaming state, and the big hit gaming is started.

  82 (j) to (p) show a state in which the big hit game is finished and the ending display is performed. Here, it is assumed that the secondary re-lottery display is set as the ending display. In (j), a message such as “End of jackpot” is displayed to notify that the jackpot gaming state has ended. When normal ending display is set as the ending display, a message such as “End of jackpot” is displayed and the process ends. (K) shows a state in which a message such as “Chance of chance !!” for notifying that the secondary re-lottery display is performed is displayed. In (m), as in (g), the variable display device 9 shows a state of re-variable display while maintaining the combination of jackpot symbols. In (n), the final stop symbol is displayed as a result of the re-lottery, and shows a state where three sets of “5” are formed. In (p), a message such as “probability entry” is displayed indicating that the combination of the non-probable big hit symbol combination is changed to the first probable big hit symbol combination, and the probability variation state is controlled. Thereafter, the gaming state is controlled to the probability changing state.

  As described above, in FIG. 82 (d), even when the non-probable variation big hit symbol is a non-probable big hit, the primary re-lottery display shown in FIGS. 82 (f) to (i) 82 (k) to (p), the second re-lottery display is performed, so that the player has a sense of expectation with respect to being controlled to the probability variation state by the first probability variation big hit symbol. Can improve the interest of the game.

  FIG. 83 is a display screen diagram illustrating a display example when the second probability variation big hit. In FIG. 83, a series of effect displays is shown in (a) to (h).

  As shown in FIG. 83 (a), after the variation display of the left, middle, and right symbols 91, 92, and 93 is started all at once on the decoration variation display device 9, it is shown in (b), (c), and (d). Thus, the decorative symbols are stopped and displayed in the order of the left symbol 91, the right symbol 93, and the middle symbol 92. Then, when the second probability variation jackpot is reached, as shown in (d), as the display result of the variable display, the chance chance that is the second probability variation jackpot display result as described above is derived and displayed.

  Then, when the second probability variation jackpot display result is derived and displayed, the second probability variation jackpot effect indicating that the second probability variation jackpot gaming state as shown in (e) to (f) is continuously executed for two rounds. Is done. In the second probability variation jackpot effect, at the start of the jackpot gaming state, the display is different from the display indicating the start of the jackpot gaming state as shown in FIG. 82 (e), and is displayed during the second probability variation jackpot gaming state. An image that has a connection with the effect produced by the displayed image and the display content is displayed. In addition, when the second probable big hit game state display is performed, the number of running rounds is not displayed, and the display content is not displayed in units of rounds. The display contents are continuously operated over the inside. Such a second probability variation jackpot effect allows the player to feel that the second probability variation jackpot has suddenly changed into a probability variation state without going through the jackpot gaming state, and allows the player to enjoy a variety of gaming states. Can be provided.

  When the second round is completed, as shown in (g), a display (“probability change entry!”) Indicating that the control is performed in the probability variation control mode based on the second probability variation big hit is performed. Then, as shown in (h), it is controlled to the probability variation control mode in which the next variation display can be executed. Thus, unlike the big hit gaming state in which the big hit gaming state of the maximum 15 rounds such as the normal big hit and the first positive big hit is continued, the second positive changed big hit is likely to change through a relatively short big hit gaming state of two rounds. In order to shift to the control mode, the player is informed that the control content is advantageous to a player who is different from the big hit that the big hit gaming state continues for a long period of time, such as the normal big hit and the first positive variation big hit. You can feel it.

  Next, the operation of the payout control means will be described. FIG. 84 is a flowchart showing main processing executed by the payout control means. In the main process, the payout control CPU 371 first performs necessary initial settings. That is, the payout control CPU 371 first sets the interrupt prohibition (SC701). Next, the interrupt mode is set to interrupt mode 2 (SC702), and a stack pointer designation address is set to the stack pointer (SC703). The payout control CPU 371 initializes the internal device register (SC704), initializes the CTC and PIO (SC705), and then sets the RAM in an accessible state (SC706). Further, 0000 (H) is set in a predetermined register as an initial value of each counter used in the payout control process (SC707).

  In this embodiment, one channel of the built-in CTC is used in the timer mode. Accordingly, in the internal device register setting process of SC704 and the process of SC705, register setting for setting the channel to be used to timer mode, register setting for permitting interrupt generation, and register for setting an interrupt vector Settings are made. The interrupt by the channel is used as a timer interrupt. For example, when it is desired to generate a timer interrupt every 2 mSC, a value corresponding to 2 mSC is set in a predetermined register (time constant register) as an initial value.

  The interrupt vector set for the channel set to the timer mode corresponds to the start address of the timer interrupt process. Specifically, the start address of the timer interrupt process is specified by the value set in the I register and the interrupt vector. In the timer interruption process, a payout control process for controlling the payout means (including at least a process of driving the ball payout device 97 in accordance with a command signal relating to award ball payout from the main board, and a ball payout device 97 in response to a ball lending request. A process for driving the above may be included).

  Next, the state of the clear switch signal from the clear switch 921 input through the input port is confirmed only once (SC708). When ON is detected in the confirmation (Y in SC708), the payout control CPU 371 executes an initialization process (SC712 to SC715). That is, when the clear switch 921 is turned on, initialization processing is executed.

  If the clear switch signal from the clear switch 921 is not in the ON state, the data protection processing of the backup RAM area (for example, power supply stop processing such as addition of parity data) is performed when power supply to the gaming machine is stopped. It is confirmed whether it has been done (SC709). Whether or not the protection process has been performed is determined by the value of the backup monitoring timer stored in the backup RAM area in the power supply stop process described later according to the execution of the data protection process in the backup RAM area (for example, It is confirmed by whether or not 10). Note that such a confirmation method is merely an example. For example, a flag indicating that data protection processing has been executed is set in the backup flag area in the power supply stop processing, and the flag is set in SC709. If it is confirmed, it may be determined that there is a backup.

  If it is determined that there is a backup, the payout control CPU 371 performs a data check (parity check in this example) in the backup RAM area (SC710). In this embodiment, clear data (00) is set in the checksum data area, and the checksum calculation start address is set in the pointer. Also, the number of checksum calculations corresponding to the number of data to be checksum is set. Then, the exclusive OR of the contents of the checksum data area and the contents of the RAM area pointed to by the pointer is calculated. The calculation result is stored in the checksum data area, the pointer value is incremented by 1, and the checksum calculation count value is decremented by 1. The above processing is repeated until the value of the checksum calculation count becomes zero. When the value of the checksum calculation count reaches 0, the CPU 56 inverts the value of each bit of the contents of the checksum data area and uses the inverted data as the checksum.

  In the power supply stop process, a checksum is calculated by the same process as described above, and the checksum is stored in the backup RAM area. In SC710, the calculated checksum is compared with the stored checksum. When the power supply is stopped after an unexpected power failure or the like, the data in the backup RAM area should be saved, so the check result (comparison result) is normal (matched). That the check result is not normal means that the data in the backup RAM area is different from the data when the power supply is stopped. In such a case, the internal state cannot be returned to the state at the time of power supply stop, so the payout control state recovery process is not executed, and the initialization process (the process of SC712 to SC715) is executed.

  If the check result is normal, the payout control CPU 371 performs payout control state recovery processing. Specifically, the value of each counter formed in the backup RAM is set in a predetermined register as an initial value of a counter (such as a prize ball unpaid number counter) used in the payout control process (SC711). And the process after SC712 is performed.

  In the initialization process, the payout control CPU 371 first performs a RAM clear process (SC712). Also, initial values are set in the flags and counters of the RAM area (SC713). The process of SC713 includes a process of setting an initial value of the counter (for example, set in a predetermined register) to a counter (formed in the RAM) used in the payout control process. Therefore, when the payout control state recovery process (SC711) is executed, the counter value stored in the backup RAM is set again in the counter. In other words, the counter value stored in the backup RAM is used as it is. That is, when the processing of SC712 and SC713 is executed without executing the processing of SC711, the payout control processing is started from the initial state. Further, when the processing of SC711 is executed and the processing of SC712 and SC713 is executed, the execution state of the payout control processing is returned to the state before the stop of power supply.

  Then, the CTC register provided in the payout control CPU 371 is set so that a timer interrupt is periodically received (SC714). That is, a value corresponding to the timer interrupt generation interval is set as an initial value in a predetermined register (time constant register). Since the interrupt is prohibited in SC701 of the initial setting process, the interrupt is permitted before completing the initialization process (SC715). Thereafter, a loop process for monitoring the occurrence of a timer interrupt is entered. When a timer interrupt occurs, the payout control CPU 371 executes a timer interrupt process.

  FIG. 85 is a flowchart showing an example of timer interrupt processing executed by the payout control means. The payout control CPU 371 first detects whether or not a power-off signal is output (whether or not it is turned on), and executes a power-off process when a power-off signal is output. (Power-off detection processing) is executed (SC748). Thereafter, a payout control process after SC749 is executed. In the payout control process, the payout control CPU 371 first checks whether or not a payout control command has been received, and executes a command analysis process for analyzing the content of the payout control command if received (SC749). .

  Next, excitation pattern output processing for the firing motor 94 (output of the patterns of the firing motors φ1 to φ4 to the output port 0) is performed (SC750). In the firing motor control process of SC752, the excitation pattern is stored in the excitation pattern buffer which is a RAM area. In SC750, the payout control CPU 371 outputs the contents of the excitation pattern buffer to the lower 4 bits of the output port 0. To do.

  Next, the payout control CPU 371 performs an input determination process (SC751). The input determination process includes a process of checking the state of detection signals of the payout number count switch 301 and the error release switch 375. Specifically, switch timers (payout number count switch timer, error release switch timer) corresponding to each of them are formed in the RAM, and when it is detected in the switch check process that they are on, the corresponding switch timer The value of the switch timer is incremented by 1 and when it is detected that the switch is off, the corresponding switch timer value is cleared.

  Next, the payout control CPU 371 executes a firing motor control process (SC752). In the firing motor control process, the patterns of the firing motors φ1 to φ4 are stored in the excitation pattern buffer. When the firing motor 94 should be disabled, the patterns of the firing motors φ1 to φ4 that do not rotate the firing motor 94 are stored in the excitation pattern buffer. Further, the payout control CPU 371 executes a payout motor control process (SC753). In the payout motor control process, when the payout motor 289 is to be driven, a process for outputting the patterns of the payout motors φ1 to φ4 to the output port 0 is performed.

  Also, the payout control CPU 371 executes a prepaid card unit control process for communicating with the card unit 50 (SC754). Next, a prize ball lending control process for performing a control for paying out a lending ball in response to a ball lending request from the card unit 50 and performing a control for paying out the number of award balls indicated by the prize ball number command from the main board. Is executed (SC756).

  Then, the payout control CPU 371 executes error processing for detecting various errors (SC757). Also, an information output process for outputting prize ball information and ball rental information output to the outside of the gaming machine is executed (SC758). Further, a process of performing a predetermined display on the error display LED 374 according to the result of the error process is executed (SC759). In the display control process, the payout control CPU 371 performs control for lighting the prize ball LED 51 when the prize ball REQ signal is on. Further, when the prize ball REQ signal is turned off, control for turning off the prize ball LED 51 is performed.

  In this embodiment, a RAM area corresponding to the output state of the output port is provided, but the payout control CPU 371 outputs the contents to the output port (SC760: output processing).

  FIG. 86 is an explanatory diagram showing an example of a counter used by the payout control means in the payout control process. In this embodiment, a prize-ball-payout-scheduled total counter that stores the total number of prize-balls to be paid out, which is the number obtained by cumulatively adding the numbers specified in the prize-ball number command, and an addition process (addition process) described later are executed. A total number of previous prize ball payout total counters that store the total number of prize ball payouts prior to being played, a payout operation counter in which a value corresponding to the number of revolutions of the payout motor 289 at the time of prize ball payout is set, and a series of prize balls A winning ball unpaid number counter in which the number of winning balls at the time of paying is set and a lending ball unpaid number counter in which the number of lending balls is set are used. These counters are formed in the RAM.

  The payout operation counter is used to determine the rotation speed of the payout motor 289. The values of the award ball unpaid number counter and the lending ball unpaid number counter are decremented by 1 when the payout number count switch 301 is turned on (the game ball passes the switch). Therefore, the award ball unpaid number counter and the lending ball unpaid number counter detect that the game ball finally paid out by the payout motor 289 passes through the payout number count switch 301 (the count value becomes 0). Used to determine that the award ball lending and ball lending have been completed.

  In order to determine the rotation speed of the payout motor 289, a payout operation timer that determines a rotation time according to the payout number may be used instead of the payout operation counter. When the payout operation timer is used, the data held in the drive amount data storage means (in this case, the timer value of the payout operation timer) corresponds to the drive amount of the payout drive means (in this example, the payout motor 289). The driving amount updating means for subtracting the minute amount corresponds to executing a process of reducing the timer value of the payout operation timer as time elapses.

  FIG. 87 is an explanatory diagram showing a configuration example of a reception buffer for storing a payout control command received from the main board 31. In this example, a ring buffer type reception buffer capable of storing six 2-byte payout control commands is used. The reception buffer is configured by a 12-byte area of command reception buffers 1 to 12. A command reception number counter indicating in which area the received command is stored is used. The command reception number counter takes a value from 0 to 11.

  FIG. 88 is a flowchart showing command reception processing. An INT signal for payout control from the main board 31 is input to an interrupt terminal of the payout control CPU 371. Therefore, when the INT signal from the main board 31 is turned on, the payout control CPU 371 is interrupted, and the payout control command reception process shown in FIG. 88 is started. That is, the payout control means receives the payout control command by an interrupt process that is activated based on the input of an input signal to the interrupt terminal.

  In the payout control command reception process, the payout control CPU 371 first saves each register in the stack (SC850). Next, the data is read from the input port assigned to the input of the payout control command data (SC851). Then, it is confirmed whether or not it is the first byte of the 2-byte payout control command (SC852). Whether or not it is the first byte is confirmed by whether or not the first bit of the received command is “1”. The first bit is “1”, which should be the MODE byte (first byte) of the payout control command having a 2-byte configuration. Therefore, if the first bit is “1”, the payout control CPU 371 determines that the valid first byte has been received, and stores the received command in the confirmed command buffer indicated by the command reception number counter in the reception buffer area (SC853). ).

  If it is not the first byte of the payout control command, it is confirmed whether the first byte has already been received (SC854). Whether or not it has already been received is confirmed by whether or not valid data is set in the reception buffer (deterministic command buffer).

  If the first byte has already been received, it is confirmed whether or not the first bit of the received 1 byte is “0”. If the first bit is “0”, it is determined that the valid second byte has been received, and the received command is stored in the confirmed command buffer indicated by the command reception number counter + 1 in the reception buffer area (SC855). The leading bit “0” is supposed to be the EXT byte (second byte) of the payout control command having a 2-byte configuration. If the confirmation result in SC854 indicates that the first byte has already been received, the process ends unless the first bit of the data received as the second byte is “0”.

  When the second byte of command data is stored in SC855, 2 is added to the command reception number counter (SC856). Then, it is confirmed whether or not the command reception counter is 12 or more (SC857), and if it is 12 or more, the command reception number counter is cleared (SC858). Thereafter, the saved register is restored (SC859), and interrupt permission is set (SC859).

  FIG. 89 is a flowchart showing an example of command analysis processing of SC749. In the command analysis process, the payout control CPU 371 checks whether or not the received payout control command (reception command) is in the reception buffer (SC501). If there is a received command, it is confirmed whether or not the received payout control command is a command for a prize ball number command (SC502). When there are a plurality of reception commands in the reception buffer, the SC 502 is confirmed for the reception command received most recently. If the received command is a command for winning ball number command, the number instructed by the winning ball number command is added to the winning ball payout scheduled total counter (SC503).

  Here, the ball lending command from the card unit 50 will be described. FIG. 90 is a timing diagram for explaining communication between the payout control means of the gaming machine and the card unit 50. The payout control means turns on the PRDY signal when power supply to the gaming machine is started and a payout operation is possible. When the power supply is started, the card unit 50 turns on the VL signal as a connection signal. When a card is received in the card unit 50, the ball lending switch is operated and a ball lending switch signal is input, the card unit 50 outputs a BRDY signal to the payout control means. That is, the BRDY signal is turned on. When a predetermined delay time elapses from this point, the card unit 50 outputs a BRQ signal to the payout control means. That is, the BRQ signal is turned on.

  Then, when the payout control means turns on the EXSC signal for the card unit 50 and detects the falling (off) of the BRQ signal from the card unit 50, the payout control means 289 drives the payout motor 289 to give a predetermined number (for example, 25). Pay out the rental balls to the player. Then, when the payout is completed, the payout control means causes the EXSC signal to the card unit 50 to fall. That is, the EXSC signal is turned off.

  FIG. 91 is a flowchart showing payout motor control processing in SC753. In the payout motor control processing, if the payout motor 289 is rotating (SC511), the payout control CPU 371 confirms the detection output of the payout motor position sensor 295, and the detection output indicates that the payout motor position sensor 295 is turned on. Is indicated, the payout operation counter is decremented by 1 (SC512, SC513). Thereafter, any one of SC521 to SC526 is executed according to the value of the payout motor control code.

  For example, when the payout control CPU 371 detects that the value of the payout operation counter has reached a predetermined value (for example, 1) in the payout motor low speed process in SC524, the payout motor brake process in SC525 is performed to stop the payout motor 289. Start. Further, in this embodiment, when the payout motor 289 is rotated 1/2, one game ball is paid out, and the payout motor position sensor 295 is turned on twice during one rotation. Take as an example. Accordingly, when paying out n game balls, the payout motor position sensor 295 is turned on n times.

  In the payout motor normal process (SC521) executed when the value of the payout motor control code is 0, the payout control CPU 371 sets the pointer at the head address of the table stored in the ROM. The payout motor normal process setting table stores a payout motor excitation pattern table in which data of each excitation pattern (payout motors φ1 to φ4) for rotating the payout motor 289 at the time of ball payout is sequentially set. .

Dispensing motor start preparation process executed when the dispensing motor control code value is 1 (
In SC522), the payout control CPU 371 performs processing such as setting the initial value of the excitation pattern in the output port buffer corresponding to the output state of the output port that outputs the payout motors φ1 to φ4. Then, the value of the dispensing motor control code is changed to 2.

  In the payout motor slow-up process (SC523) executed when the value of the payout motor control code is 2, the payout control CPU 371 is longer than the constant speed process in order to smoothly start the payout motor 289. Corresponding to the output state of the output port that outputs the payout motors φ1 to φ4 by reading out the contents of the payout motor excitation pattern table at intervals and at time intervals that gradually approach the time interval in the case of constant speed processing Set to output port buffer. At the time of reading, the contents of the payout motor excitation pattern table at the address pointed to by the pointer are read and the pointer value is incremented by one. When a predetermined time has elapsed since the value of the payout motor control code becomes 2, the value of the payout motor control code is changed to 3.

  In the payout motor constant speed process (SC524) executed when the value of the payout motor control code is 3, the payout control CPU 371 periodically reads the contents of the payout motor excitation pattern table and sets the payout motors φ1 to φ4. Set the output port buffer corresponding to the output status of the output port to be output. When a predetermined time comes before the time when the payout motor 289 should be stopped (the time when payout of the game ball is finished), the value of the payout motor control code is changed to 4. Whether or not a predetermined time has passed is confirmed, for example, by the value of the payout operation counter having reached a predetermined value (for example, 1).

Dispensing motor brake processing executed when the value of the dispensing motor control code is 4 (
In SC525), in order to smoothly stop the payout motor 289, the payout control CPU 371 has a longer interval than in the case of the constant speed process and a time interval that gradually moves away from the time interval in the case of the constant speed process. Thus, the contents of the payout motor excitation pattern table are read out and set in the output port buffer corresponding to the output state of the output port that outputs the payout motors φ1 to φ4. When the dispensing motor 289 is finally stopped, the value of the dispensing motor control code is changed to zero. The payout control CPU 371 finally stops the payout motor 289 by stopping driving the payout motor 289 when the value of the payout operation counter reaches a value corresponding to the end of payout of the game ball (for example, 0). Stop.

  In a ball biting payout motor brake process (SC526) executed when the value of the payout motor control code is 5, the payout control CPU 371 smoothes the payout motor 289 in the case of rotation for releasing the ball biting. In order to stop, the payout motor excitation pattern table has a longer interval than the rotation of the payout motor 289 for releasing the ball biting and at a time interval gradually moving away from the time interval in the case of constant speed processing. Is set in the output port buffer corresponding to the output state of the output port that outputs the payout motors φ1 to φ4. The contents of the output port buffer corresponding to the output state of the output port that outputs the payout motors φ1 to φ4 are output to the output port in the output processing of SC760. Note that the payout control CPU 371 changes the value of the payout motor control code to 5 when the ball engagement is detected in the processing of SC523 to SC525.

FIG. 92 is a flowchart showing the prize ball lending control process in S756. In the winning ball lending control process, the payout control CPU 371 first executes a winning ball payout amount addition control (SC600). The prize ball payout number addition control is a process for adding the number of newly received prize ball number commands to the number of prize balls to be paid out.

  Next, when the payout control CPU 371 confirms that the detection signal of the payout count switch 301 is turned on (SC601), the payout control CPU 371 determines whether or not the ball is being loaned based on the ball lending operation in progress flag (SC602). ). If the ball is being lent, the value of the unpaid ball counter is decremented by 1 (SC603), and if not, the value of the award ball unpaid number counter is decremented by 1 (SC604). Thereafter, one of the processes of SC610 to SC612 is executed according to the value of the payout control code.

  FIG. 93 is a flowchart showing the control for adding the number of prize balls to be paid. In the prize ball payout addition control, the payout control CPU 371 determines whether or not there is a bit indicating an error state in a set error flag in which various error states are reflected in each bit. If there is a bit indicating, the processing is terminated without doing anything (SC691). Further, it is determined whether or not the ball lending operation flag is set. If it is set, the processing is terminated without doing anything (SC692). Since the winning ball lending control process is executed every 2 mSC, the winning ball payout amount addition control is also executed every 2 mSC. However, the process after SC 694 is not executed in an error state by the process of SC 691. Further, even after the ball lending process based on the ball lending request from the prepaid card unit 50, the processes after SC694 are not executed.

  Furthermore, the payout control CPU 371 determines whether or not the value of the payout operation counter has reached a predetermined value (for example, 1) (SC693). When the predetermined value is reached, the processing after SC694 is executed. However, unless the predetermined value is reached, the processing after SC694 is not executed. The processing after SC694 is executed at the timing when the value of the payout operation counter is updated to a predetermined value (for example, when the value is changed from 2 to 1), and is not always executed in a state where the value is at the predetermined value. .

  In SC694, the payout control CPU 371 checks whether or not the content of the winning ball payout scheduled total counter (PA) is the same as the content of the previous winning ball payout scheduled total counter (PB). If they are not the same, a process for adding the number of prize balls paid out after SC695 (hereinafter referred to as an addition process or an addition process) is executed. The previous prize ball payout total counter (PB) is set with the content of the prize ball payout total counter (PA) at the start of the prize ball payout process and when the extra process (previous addition process) is executed. Yes. Further, when a prize ball number command is received from the game control means, the number instructed by the prize ball number command is added to a prize ball payout scheduled total counter (PA) (see FIG. 89). Accordingly, the fact that the content of the total number of winning ball payout counter (PA) is different from the content of the previous total number of paying ball counter (PB) means that a new winning ball number command has been received from the game control means. Therefore, when the conditions for prohibiting the addition of SC691 to SC693 are not satisfied, the addition process after SC695 is performed. The value of the payout operation counter is updated to a predetermined value when the payout motor 289 is rotating (see SC511, SC513), that is, when a game ball is being paid out. As a result of the determination, the process after SC695 is not executed while the prize ball payout is not being executed.

  In SC695, the payout control CPU 371 adds to the payout operation counter a value corresponding to the difference between the content of the total prize ball payout total counter (PA) and the content of the previous prize ball payout total counter (PB). The payout operation counter is updated (SC695). In addition, the difference between the contents of the total number of winning ball payouts counter (PA) and the content of the previous total number of paying ball counters (PB) is added to the number of unpaid prize balls counter (SC696). Furthermore, the previous winning ball payout scheduled total counter (PB) is updated by setting the content of the expected winning ball payout total counter (PA) in the previous winning ball payout scheduled total counter (PB) (SC697). In this embodiment, when one game ball is paid out from the payout motor 289, the value of the payout operation counter is decremented by 1. Therefore, the addition value for the payout operation counter and the addition for the award ball non-payout number counter are added. The value is the same value.

  As described above, the addition process is executed only at the timing when the value of the payout operation counter is updated to a predetermined value. Therefore, it is possible to reduce the number of times of determination (SC694 processing) whether or not the data has increased, and to reduce the burden of the determination processing.

  In SC697, instead of setting the content of the planned total number of payout balls counter (PA) in the previous total number of planned payout balls counter (PB), the planned total number of paid-out ball counters (PA) and the previous prize ball payout schedule are set. The contents of the total counter (PB) may be cleared to zero. That is, when the increase determination means determines that the data has increased, the increase number specifying means moves the increase data stored in the prize game medium number data storage means to the payout operation counter (SC695), The stored contents of the prize game medium number data storage means (in this example, the prize ball payout scheduled total counter (PA)) and the previous prize game medium number data storage means (in this example, the previous prize ball payout scheduled total counter (PB)) are initially stored. It may be made to be In such a configuration, it is possible to prevent the storage capacities of the premium game medium number data storage means and the previous premium game medium number data storage means from increasing.

  In this embodiment, since one game payout device 97 performs game ball payout based on the prize ball number command and game ball payout based on the loan request, when the ball lending process is executed, The prize ball payout process cannot be executed. Accordingly, even if the extra process is performed while the ball lending process is being performed, the award ball payout is not executed, and therefore a meaningless process is performed. However, by prohibiting the extra process when the ball lending process is performed, it is possible to improve the efficiency of the extra process so that a meaningless process is not executed.

  Similarly, the prize ball payout process cannot be executed in an error state. Therefore, even if the extra process is performed in an error state, the prize ball payout is not executed, and therefore a meaningless process is performed. However, by prohibiting the extra process in the error state, it is possible to improve the efficiency of the extra process so that the meaningless process is not executed. The addition process is executed collectively when the error state is canceled based on the operation signal from the error cancellation switch 375 (additions based on all prize ball number commands received in the error state are added. )

  FIG. 94 is a flowchart showing the payout start waiting process (SC610) executed when the payout control code is 0. In the payout start waiting process, the payout control CPU 371 does not execute the subsequent processes if the error bit is set (SC621).

  If the BRDY signal is not on (SC622), a process for paying out a prize ball after SC631 is executed. If the BRDY signal is on and the BRQ signal that is a ball lending request signal is on, the ball lending operation in progress flag is set (SC623, SC624). Then, “25” is set in the unpaid ball lending number counter (SC625), and “25” is set in the payout operation counter (SC626).

  The payout operation counter is referred to in the payout motor control process (SC768). That is, in the payout motor control process, control is performed to rotate the payout motor 289 by the number of rotations corresponding to the value set in the payout operation counter.

  Thereafter, the payout control CPU 371 sets a value (specifically “1”) corresponding to the payout motor start preparation process (SC522) to the payout motor control code for selecting the process executed in the payout motor control process. (SC627), the payout control code value is set to 1 (SC628), and the process is terminated.

  In SC631, the payout control CPU 371 checks whether or not the content of the winning ball payout scheduled total counter (PA) is 0 (SC631). If 0, the process ends. A value other than 0 (the number indicated by the prize ball number command) is added to the prize ball payout scheduled total counter (PA) when a prize ball number command is received from the game control means of the main board 31 in the command analysis process. ing. If the content of the total number of paying balls counter (PA) is not 0, the content of the total number of paying balls counter (PA) is set in the payout operation counter (SC632), and the number of winning balls in the award ball is not paid out The contents of the scheduled total counter (PA) are set (SC633). In addition, the contents of the total number of winning ball payouts counter (PA) are set in the previous number of paying ball payouts total counter (PB) (SC634). Then, a winning ball operating flag is set (SC635), and the process proceeds to SC627.

  FIG. 95 is a flowchart showing payout motor stop waiting processing (SC611) executed when the payout control code is 1. In the payout motor stop waiting process, the payout control CPU 371 checks whether or not the payout operation of the payout motor 289 has ended (SC641). For example, the payout control CPU 371 sets a flag to that effect when the payout motor brake process (SC525) in the payout motor control process is completed, and confirms the flag in SC641, whereby the payout operation of the payout motor 289 is performed. It can be confirmed whether or not the processing has ended.

  When the payout operation of the payout motor 289 is completed, the payout control CPU 371 sets the payout passing monitoring time in the payout control monitoring timer (SC642). The payout passing monitoring time is a time that has a margin in the time from when the last payout ball is paid out by the payout motor 289 until it passes through the payout number count switch 301. Then, the value of the payout control code is set to 2 (SC643), and the process ends.

  96 and 97 are flowcharts showing the payout passing waiting process (SC612) executed when the value of the payout control code is 2. In the payout passing waiting process, when a prize ball is being paid out, it is determined that the payout has been completed normally if the value of the prize ball unpaid number counter is zero. Note that the value set in the payout operation counter for determining the rotation amount of the payout motor 289 corresponds to the value set in the award ball non-payout number counter at the start of the payout process, and the control here is performed. When executed, the value of the payout operation counter is 0 corresponding to the stop of the payout motor 289 (the payout motor 289 has been paid out). The payout motor 289 should have made a predetermined number of payouts, but the payout number count switch 301 provided at the bottom of the ball payout device 97 could only detect less than a predetermined number of payouts. Become. That is, the payout has not been completed normally.

  When the value of the award ball unpaid-out counter is not 0, if the error ball is not in an error state, a game ball re-payout operation is attempted. In the re-payout operation, when it is detected by the payout number count switch 301 that the game ball is actually paid out, it is determined that the payout has been completed normally.

  Further, when the ball lending / dispensing is being performed, it is determined that the payout has been completed normally if the value of the lending / unpaid number counter is 0. If the value of the ball lending unpaid number counter is not 0, if it is not an error state, a re-payout operation of the game ball or the remaining number of ball lending (corresponding to the value of the ball lending unpaid number counter) is attempted.

  As a specific process of the above description, in the payout passing waiting process, the payout control CPU 371 decrements the payout control timer value by -1 if the payout control timer value is not 0 (SC651). If the value of the payout control timer is not 0 (SC652), that is, if the payout control timer has not timed out, the process is terminated.

  If the payout control timer has timed out (SC652), it is determined whether or not a ball lending payout process (ball lending operation) has been executed (SC653). Whether or not the ball lending operation has been executed is confirmed by whether or not the ball lending operation in progress flag in the payout control state flag formed in the RAM is set. When the ball lending operation is not executed, that is, when the prize ball payout process (prize ball operation) is executed, the payout control CPU 371 checks the value of the award ball unpaid number counter (SC654). . If the value of the prize ball unpaid number counter is 0, the following process is performed assuming that the prize ball payout process is normally completed.

  That is, the value set in the previous winning ball payout scheduled total counter (PB) is subtracted from the contents of the expected winning ball payout total counter (PA) (SC671). Then, the content of the previous winning ball payout total counter (PB) is cleared (initialized) to 0 (SC672).

  In addition, the payout ball detection bit, the re-payout operation bit, the winning ball operation flag and the ball lending operation bit in the payout control state flag are reset (SC655), the payout control code is set to 0 (SC656), and the process is terminated. The re-payout operation bit is a control bit used when the re-payout process is executed.

  In SC671, the contents of the previous prize ball payout total counter (PB) are subtracted without clearing the contents of the prize ball payout total counter (PA) to 0. In consideration of the fact that, during execution, a new prize ball number command is received, the contents of the prize ball payout total counter (PA) may increase.

  Although not explicitly shown in FIG. 96, the addition process is not executed while the payout passing waiting process is being executed. If it is executed, the initialization process of SC672 is executed in spite of the content of the previous prize ball payout total counter (PB) being updated, so that the previous prize ball payout total counter (PB) is updated. This is because the content may be set to 0 and the number of prize balls paid out may not be accurate. Also, the value of the award ball unpaid-out number counter increases (see SC696), and the check process of SC654 cannot be executed normally.

  The payout control CPU 371 determines that an error flag (specifically, a payout switch error error 1 bit, a payout switch error error 2 bit, and a payout case error bit when the value of the award ball unpaid number counter is not 0. The re-payout operation is executed on the condition that any one or a plurality of bits) is not set (SC659). If the error flag is set, the re-payout operation is not executed.

  In order to execute the re-payout process, the pay-out control CPU 371 first checks whether or not the re-payout operation in-progress bit is set (SC661). If not set, a re-payout operation in-progress bit is set (SC662), and a value corresponding to the value of the award ball unpaid number counter or the ball lending unpaid number counter is set in the payout operation counter (SC663). Thereafter, the payout control code is set to 1 (SC667), and the process is terminated.

  In SC661, when it is confirmed that the re-payout operation in-progress bit is set, the payout control CPU 371 does not pay out the game ball even if the re-payout process is executed (the payout number count switch 301 is used to play the game ball). As a result, the payout case error bit in the error flag is set (SC666). At that time, the re-payout operation in-progress bit is reset (SC665). Then, the process ends.

  As described above, if the game ball is not paid out correctly even after performing the re-payout operation in the re-payout process (corrected payout process), the payout count switch non-passing error bit (payout) is assumed as a game ball payout operation failure. Case error bit) is set.

  Upon confirming that the ball lending / dispensing process (ball lending operation) has been executed in SC653, the payout control CPU 371 confirms whether or not the value of the ball lending unpaid out counter is 0 (SC657). If it is 0, it is determined that the ball lending / dispensing process has been completed normally, and the process proceeds to SC655.

  If the value of the ball lending unpaid number counter is not 0, an error flag (specifically, any one bit of the payout switch abnormal error 1 bit, the payout switch abnormal error 2 bit, and the payout case error bit) On the condition that (multiple bits) is not set (SC658), the re-payout process is executed. If the error flag is set, the re-payout process is not executed.

  Next, error processing will be described. FIG. 98 is an explanatory diagram showing the relationship between the type of error and the display of the LED 374 for error display. In the error flag (for example, 1 byte) formed in the RAM, there are bits corresponding to the errors shown in FIG. As shown in FIG. 98, when the connection confirmation signal from the main board 31 is turned off, the payout control CPU 371 displays “1” on the error display LED 374 as a main board non-connection error. To do.

  When the disconnection of the payout number count switch 301 or a ball clogging occurs in the payout number count switch 301, the error display LED 374 is controlled to display “2” as the payout switch abnormality detection error 1. The disconnection of the payout number count switch 301 or the occurrence of ball clogging in the payout number count switch 301 is determined by the detection signal of the payout number count switch 301 not being turned off.

  When the detection signal of the payout number count switch 301 is turned on even though the game ball is not paying out, a control for displaying “3” on the error display LED 374 as a payout switch abnormality detection error 2 is performed. Do. If the detection signal of the payout count switch 301 does not turn on despite the rotation abnormality of the payout motor 289 or the game ball being paid out, “4” is displayed on the error display LED 374 as a payout case error. Control to do. The specific method for detecting that the detection signal of the payout number count switch 301 is not turned on is as described above.

  In addition, when the lower pan is full, that is, when the full switch 48 is turned on, control is performed to display “6” on the error display LED 374 as a full error. When the supply ball is insufficient, that is, when the ball break switch 187 is turned on, control is performed to display “7” on the error display LED 374 as a ball break error.

  Further, when the VL signal from the card unit 50 is turned off, control is performed to display “8” on the error display LED 374 as a prepaid card unit unconnected error. When communication with the card unit 50 is performed at an improper timing, control is performed to display “9” on the error display LED 374 as a prepaid card unit communication error. The prepaid card unit communication error is detected in the prepaid card unit control process (SC754).

  Among the above errors, after the occurrence of a payout switch abnormality detection error 2, a payout case error or a prize ball REQ signal error, the error release switch 375 is operated and an operation signal is output from the error release switch 375 (becomes turned on). The payout control means returns to the state before the error occurred.

  99 and 100 are flowcharts showing error processing of SC757. In the error processing, the payout control CPU 371 checks the error flag, and the set bits are only payout switch abnormality detection error 2, payout case error and prize ball REQ signal error (any one of the three). Whether only two bits or only two of the three bits or only those three bits) is determined (SC801). If these are the only bits that are set, it is confirmed whether or not the operation signal is turned on from the error release switch 375 (SC802). When the operation signal is turned on, the bits of the payout switch abnormality detection error 2, the payout case error and the prize ball REQ signal error in the error flag are reset (SC807), and the process proceeds to SC808.

  When the processing of SC807 is executed, there may be an error bit that is not in the set state among the bits of the payout switch abnormality detection error 2, the payout case error, and the prize ball REQ signal error. There is no problem even if an error bit that is not present is reset. As described above, in this embodiment, when an error (see FIG. 36) that causes the setting of the payout switch abnormality detection error 2, the payout case error, or the prize ball REQ signal error bit occurs, an error occurs. The error is released when the release switch 375 is pressed.

  In SC808, the payout control CPU 371 checks the detection signal of the full switch 48. If the detection signal of the full tank switch 48 is output (if it is in the ON state), the full tank error bit in the error flag is set (SC809). If the detection signal of the full tank switch 48 is OFF, the full tank error bit is reset (SC810).

  Further, the payout control CPU 371 checks the detection signal of the ball break switch 187 (SC811). If the detection signal of the ball break switch 187 is output (if it is ON), the ball break error bit in the error flag is set (SC812). If the detection signal of the ball break switch 187 is OFF, the ball break error bit is reset (SC813).

  Further, the payout control CPU 371 checks the state of the connection confirmation signal from the main board 31 (SC815). If the connection confirmation signal is not output (if it is in the off state), the main board unconnected error bit is set. (SC816). If the connection confirmation signal is output (if it is on), the main board non-connection error bit is reset (SC817).

Further, the payout control CPU 371 checks the value of the switch timer corresponding to the payout number count switch 301 among the switch timers in which the state of the detection signal of each switch is set, and the value is the switch on maximum time (for example, “ 240 ") (SC818), the bit of the payout switch abnormality detection error 1 is set in the error flag (SC819). If the value of the switch timer corresponding to the payout count switch 301 is equal to or shorter than the maximum switch-on time, the payout switch abnormality detection error 1 bit is reset (SC820). It should be noted that the value of each switch timer is incremented by 1 when the state of the input port to which the detection signal of each switch is input is switched on in the input determination process of SC751, and cleared by 0 when it is off. Accordingly, the fact that the value of the switch timer corresponding to the payout number count switch 301 exceeds the switch on maximum time means that the payout number count switch 301 is in the on state exceeding the switch on maximum time. Then, it is determined that the game ball is clogged at the disconnection of the payout number count switch 301 or at the portion of the payout number count switch 301.

  In addition, when the value of the switch timer corresponding to the payout number count switch 301 becomes a switch-on determination value (for example, “2”) (SC821), the payout control CPU 371 performs a ball lending operation flag and a winning ball operation. If both the flags are in the reset state, the game ball passes through the payout number count switch 301 even though the payout operation is not in progress, and the bit of the payout switch abnormality detection error 2 is set in the error flag (SC822, SC823). If the ball lending operation flag or the winning ball operation flag is set, the bit of the payout switch abnormality detection error 2 is reset (SC824).

  Further, the payout control CPU 371 checks the input state of the VL signal from the card unit 50 (SC825). If the VL signal is not input (if it is in the OFF state), the prepaid card unit is not connected in the error flag. An error bit is set (SC826). If the VL signal is input (if it is in the ON state), the prepaid card unit unconnected error bit is reset (SC827).

  In the display control process of SC759, notification by display (numerical value display) corresponding to the error bit in the error flag is performed by the error display LED 374.

FIG. 101 is an explanatory diagram showing an example of a change in the contents of a counter used in prize ball payout control. The winning ball payout scheduled total counter, the previous winning ball payout scheduled total counter, the payout operation counter, and the winning ball unpaid number counter are cleared to 0 in the initialization process (specifically, the process of SC712). Thereafter, for example, when 15 prize ball number commands are received, the value of the prize ball payout total counter is 15 in the command analysis process. When the prize ball payout process is started, 15 is set in the previous prize ball payout scheduled total counter, the payout operation counter, and the prize ball non-payout number counter (see SC632 to SC634). Thereafter, each time the payout motor position sensor 295 is turned on, the value of the payout operation counter is decremented by 1, and every time the payout number count switch 301 is turned on, the value of the award ball non-payout number counter is decremented by 1. In the meantime, for example, when 10 prize ball number commands are received, 10 is added to the prize ball payout scheduled total counter in the command analysis process to become 25.

  Then, a prize ball payout total counter (PA) is added by an addition process executed when the value of the payout operation counter reaches a predetermined value (in this example, “1”, but the predetermined value may not be 1). ) And the difference (10 in this example) between the contents of the previous award ball payout scheduled total counter (PB) are added to the payout operation counter and the award ball unpaid number counter. Accordingly, the value of the payout operation counter and the award ball non-payout number counter is 11. The contents of the previous winning ball payout total counter (PB) are the same as the contents of the winning ball payout total counter (PA) (see SC695 to SC697).

  Thereafter, when the value of the unsuccessful prize ball counter reaches zero and the prize ball payout is completed, the previous prize ball payout total counter (PB) is determined from the content of the prize ball payout total counter (PA) (25 in this example). Is subtracted (the subtraction result is 0 in this example), and the previous award ball payout scheduled total counter (PB) is cleared.

  FIG. 102 is an explanatory diagram showing another example of changes in the contents of the counter used in the prize ball payout control. The contents of the total number of winning ball payout counter (PA) and the value of the previous winning ball payout total counter (PB) are 15, and 10 winning ball number commands are received during the paying out of the winning ball. And Then, in the command analysis process, 10 is added to the prize ball payout scheduled total counter to be 25.

  Then, by the addition process executed when the value of the payout operation counter reaches a predetermined value (for example, 1), the contents of the planned total payout ball counter (PA) and the total previous payball payout total counter (PB) (10 in this example) is added to the payout operation counter and the award ball non-payout number counter. Accordingly, the value of the payout operation counter and the award ball non-payout number counter is 11. Further, the contents of the previous winning ball payout scheduled total counter (PB) are the same as the contents of the winning ball payout scheduled total counter (PA).

  Assume that the prohibition condition for the extra process is satisfied when the winning ball payout process is continued (see SC691 and SC692). Therefore, it is assumed that the addition process is not executed, but 15 prize ball number commands and 10 prize ball number commands are received during that time. Then, in the command analysis process, 15 and 10 are added to the prize ball payout scheduled total counter to be 50.

  When the prohibition condition for the extra process is canceled, the contents of the total prize ball payout counter (PA) and the previous prize ball payout total counter are executed by the extra process executed when the value of the payout operation counter reaches a predetermined value. The difference between the contents of (PB) (25 in this example) is added to the payout operation counter and the award ball unpaid number counter, and the value of the payout operation counter and the award ball unpaid number counter becomes 26. Further, the contents of the previous winning ball payout scheduled total counter (PB) are the same as the contents of the winning ball payout scheduled total counter (PA).

  Thereafter, when the value of the award ball unpaid number counter becomes 0 and the award ball payout is completed, the previous award ball payout total counter (PB) is determined from the content of the award ball payout total counter (PA) (50 in this example). Is subtracted (the subtraction result is 0 in this example), and the previous award ball payout scheduled total counter (PB) is cleared.

  As described above, in this embodiment, in the command analysis process, the number based on the prize ball number command received from the game control means is used as a counter (for example, the control during the prize ball payout) (for example, Rather than immediately adding (adding) to the payout operation counter), it is used for the control during payout of a winning ball when a predetermined condition (for example, the value of the payout operation counter reaches a predetermined value) is satisfied. Add to the counter. Therefore, the number of executions of the extra process can be reduced as compared with the case where it is added to the counter used for the control during the payout of the prize ball every time the prize ball number command is received.

  In this embodiment, a method of using the previous award ball payout scheduled total counter is used to determine whether or not the number of prize balls to be paid out has increased, but such a method is an example, Other methods may be used. For example, a cumulative counter that cumulatively adds the number indicated by the prize ball number command received after the start of the prize ball payout process is provided, and in the addition process, the count value of the cumulative counter is added to the prize ball unpaid number counter and the payout operation counter. The contents of the cumulative counter may be cleared. In such a configuration, the cumulative counter corresponds to the prize game medium number data storage means to which the number instructed by the prize ball number command is added.

  Further, in this embodiment, the winning ball payout total number counter and the winning ball unpaid number counter are used together, but either one of the counters may be used. FIG. 103 is an explanatory diagram showing an example of changes in the contents of the counter used in the prize ball payout control when the prize ball unpaid number counter is not used. In this case, when the number-of-payout count switch 301 is turned on, 1 is subtracted from the values of the award winning ball payout total counter and the previous award winning ball payout total counter.

The winning ball payout total counter, the previous winning ball payout total counter and the payout operation counter are cleared to 0 in the initialization process in the main process. Thereafter, for example, when 15 prize ball number commands are received, the value of the prize ball payout total counter is 15 in the command analysis process. When the winning ball payout process is started, 15 is set in the previous winning ball payout scheduled total counter and the payout operation counter. Thereafter, each time the payout motor position sensor 295 is turned on, the value of the payout operation counter is decremented by 1, and every time the payout number count switch 301 is turned on, the values of the award ball payout scheduled total counter and the previous award ball payout scheduled total counter are 1. Subtracted. In the meantime, for example, when 10 prize ball number commands are received, 10 is added to the prize ball payout scheduled total counter in the command analysis process. At this time, if the value of the prize ball payout scheduled total counter is 6, it is updated to 16.

  Then, by the addition process executed when the value of the payout operation counter reaches a predetermined value, the difference between the contents of the award ball payout total counter (PA) and the content of the previous award ball payout total counter (PB) (this In the example, 10) is added to the payout operation counter. Therefore, the value of the payout operation counter is 11. Further, the contents of the previous winning ball payout scheduled total counter (PB) are the same as the contents of the winning ball payout scheduled total counter (PA). When the extra process is executed, the value of the prize ball payout scheduled total counter is reduced from 16 to 11 (because 5 payouts have been made).

  Thereafter, when the value of the prize ball payout scheduled total counter becomes 0 and the prize ball payout ends, the previous prize ball payout scheduled total counter (PB) is cleared. However, if the control is performed normally, the previous prize ball payout scheduled total counter (PB) is already zero.

  FIG. 104 is an explanatory diagram showing another example of changes in the contents of the counter used in the prize ball payout control. The contents of the total number of winning ball payout counters (PA) and the value of the total number of previous winning ball payouts total counter (PB) are 6, and 10 winning ball number commands are received during paying out the winning balls. And Then, in the command analysis process, 10 is added to the prize ball payout scheduled total counter to be 16.

  Then, by the addition process executed when the value of the payout operation counter reaches a predetermined value (for example, 1), the contents of the planned total payout ball counter (PA) and the total previous payball payout total counter (PB) (10 in this example) is added to the payout operation counter. Therefore, the value of the payout operation counter is 11. Further, the contents of the previous winning ball payout scheduled total counter (PB) are the same as the contents of the winning ball payout scheduled total counter (PA).

  It is assumed that the prohibition condition for the extra process is satisfied when the winning ball payout process is continued. Therefore, it is assumed that the addition process is not executed, but 15 prize ball number commands and 10 prize ball number commands are received during that time. Then, in the command analysis process, 15 and 10 are added to the prize ball payout scheduled total counter, for example, 28. At this time, the value of the total number of the previous winning ball payout scheduled total counter is 3.

  When the prohibition condition for the extra process is canceled, the contents of the total number of expected payout payout counter (PA) and the previous prize ball are obtained by the extra process executed when the value of the payout operation counter reaches a predetermined value (for example, 1). The difference (25 in this example) of the contents of the scheduled payout total counter (PB) is added to the payout operation counter, and the value of the payout operation counter becomes 26. Further, the contents of the previous winning ball payout scheduled total counter (PB) are the same as the contents of the winning ball payout scheduled total counter (PA).

  Thereafter, when the value of the prize ball payout scheduled total counter becomes 0 and the prize ball payout ends, the previous prize ball payout scheduled total counter (PB) is cleared.

  FIG. 105 is a flowchart showing the winning ball lending control process in the embodiment not using the winning ball unpaid number counter. In this embodiment, if the prize ball payout process is performed when the payout number count switch 301 is turned on, the values of the total prize ball payout total counter (PA) and the previous prize ball payout total counter (PB) are set. -1 (SC604A, SC604B). In addition, in the winning ball payout addition control (SC600), setting of the winning ball payout counter (SC696 in FIG. 93) is not executed.

  FIG. 106 is a flowchart showing a payout start waiting process in an embodiment in which no winning ball payout counter is used. In this embodiment, unlike the above-described embodiment, a process (SC633) of setting the content of a prize ball payout total counter (PA) in a prize ball unpaid number counter is executed at the start of the prize ball payout process. do not do.

  FIG. 107 and FIG. 108 are flowcharts showing the payout passing waiting process in the embodiment that does not use the prize ball non-payout number counter. In this embodiment, the payout control means confirms that the award ball payout process continuously executed without dividing the payout of game balls according to a plurality of prize ball number commands for each prize ball number command is completed. The determination is made when the value of the total number of winning ball payout counter (PA) becomes 0 (SC654A). Further, when the re-payout operation is started, the contents of the total number of winning ball payouts (PA) are set in the payout operation counter (SC663A).

  Note that the processes in the payout control process other than the processes described here are the same as those in the above-described embodiment.

  As described above, in each of the above embodiments, in the command analysis process, the number based on the prize ball number command received from the game control means is used as a counter used for the control during the prize ball payout at that time. Rather than immediately adding (adding) to (for example, a payout operation counter), it is used for control during payout of a winning ball when a predetermined condition (for example, the value of the payout operation counter has reached a predetermined value) is satisfied. Is added to the counter. Therefore, the number of executions of the extra process can be reduced as compared with the case where it is added to the counter used for the control during the payout of the prize ball every time the prize ball number command is received.

  Note that the pachinko gaming machine of each of the above embodiments mainly has a predetermined game value when the stop symbol of the special symbol variably displayed on the variable display portion 9 based on the start winning is a combination of the predetermined symbols. Pachinko machines that can be granted to a player, but if there is a prize in a predetermined area of an electric accessory that is released based on the start prize, a pachinko machine that can be given a predetermined game value or start Even if it is a pachinko machine where a predetermined right is generated or continued when there is a prize for a predetermined electric combination that is released when the symbol of the symbol variably displayed based on the winning combination becomes a combination of the predetermined symbols The invention can be applied. Furthermore, the present invention can be applied to a slot machine as long as it has a configuration including a main board and a payout control board.

  FIG. 109 is a block diagram illustrating another configuration example of the random number circuit 503. In this embodiment, the basic configurations of the 12-bit random number circuit 503a and the 16-bit random number circuit 503b are the same. As shown in FIG. 109, this embodiment is different from the first embodiment in that the random number circuit 503 includes a delay circuit 532A instead of the inverting circuit 532 shown in FIG.

  The delay circuit 532A delays the random number generation clock signal SBI1 input from the clock signal output circuit 524, thereby generating a delayed clock signal SBI4 obtained by delaying the clock signal. The delay circuit 532A outputs the generated delayed clock signal SBI4 to the latch signal generation circuit 533. Therefore, in this embodiment, the latch signal generation circuit 533 outputs a latch signal to the random value storage circuit 531 in synchronization with the delayed clock signal SBI4 obtained by delaying the random number generation clock signal SBI1.

  The basic functions of the constituent elements of the random number circuit 503 other than the delay circuit 532A are the same as those functions described in the first embodiment.

  As described above, in this embodiment, the delay circuit 532A of the random number circuit 503 generates the delayed clock signal SBI4 and outputs a latch signal for instructing storage of the random number in synchronization with the delayed clock signal SBI4. . Therefore, the timing for updating the random number and the timing for storing the random number in the random value storage circuit 531 can be shifted, and the generated random number can be stored stably and reliably.

Next, main effects obtained by the above-described embodiment will be described.
(1) In S394 or S398 in FIG. 48, it is determined whether or not to perform a re-lottery that is an effect display related to whether or not the state is controlled to be in a certain variation state. Based on the determination result, as shown in FIG. First re-lottery display and secondary re-lottery display are performed. As a result, even if a non-probable big hit symbol other than the probable big hit symbol is stopped in the variation display, the primary re-lottery display or the secondary re-lottery display is performed, and there is a sense of expectation that it may become a probable big hit symbol. Since the player can be held, the interest of the player can be improved. Further, when the secondary re-lottery display is performed, as shown in S544 or S545 of FIG. 71, the changing temporary stop symbol and the changing end stop symbol are determined from the non-probable change big hit symbol and controlled to the probabilistic change state. At this time, as shown in S546 and S547, since the final stop symbol is determined from the probability variation big hit symbol, the probability variation big hit symbol is stopped and displayed in the secondary re-lottery display. As a result, the secondary re-lottery display is further performed even though the probability change big hit symbol has already been stopped and the fact that it is controlled to be in the probable state is displayed before the secondary re-lottery display is performed. Occurrence can be prevented.

  As shown in FIGS. 72 to 74, when the number of deviations as the deviation of the decorative symbol with respect to the jackpot symbol is specified by the symbol command set in S418 of FIG. 49, the reach that varies depending on the number of deviations. The fluctuation time of the deviation fluctuation pattern is set. As a result, even when the sound / lamp control microcomputer 700 receives the same variation pattern command from the game control microcomputer 560, if the number of deviations specified by the symbol command is different, the reach is determined as the deviation variation pattern. Since the setting of the variation time is different, it is possible to reduce the number of variation pattern commands compared to the case where the variation time is specified by the variation pattern command.

  (2) As shown in FIGS. 72 to 74, the sound / lamp control microcomputer 700 executes the first re-lottery display specified by the symbol command even when the same variation pattern command is received. Since the setting of the variation display time of the variation pattern can be varied according to the determination result to the effect, the primary re-lottery display can be executed without increasing the number of variation pattern commands.

  (3) The secondary re-lottery display is performed when it is determined in S518a that the ending switch command transmitted from the game control microcomputer 560 at the end of the big hit is received. As a result, the player can have a sense of expectation that the secondary re-lottery display will be performed when controlled to the big hit gaming state. Can be increased.

  (4) When secondary re-lottery display is not performed in S560 of FIG. 75A, a command (for example, “1111”) that specifies that secondary re-lottery display is not performed is specified as an ending start command Then, the setting process is performed. The ending start command is transmitted to the display control microcomputer 800 in S518b when the ending switch command is received in S518a. Thereby, the normal ending display is performed as the ending display, and the player can easily grasp that the secondary re-lottery display is not performed. Also, as shown in S434 and S435 in FIG. 52, the secondary re-lottery display execution time is set to be longer than the normal ending display execution time, so the secondary re-lottery display is not performed. Sometimes, it is possible to prevent the ending display performed by the variable display device 9 from being performed unnecessarily for a long time.

  (5) As shown in FIG. 33, the design command for specifying the display result when the reach is lost is different from the game control microcomputer 560 from the game control microcomputer 560 according to the number of deviations. 700 is transmitted. For this reason, the number of times of transmission of the command as the control signal can be reduced as compared with the case where the command for specifying the respective display results of the left, middle and right display areas in the variable display device 9 is transmitted a plurality of times. it can.

  (6) As shown in FIG. 68, the type of the primary re-lottery display, the type of the secondary re-lottery display, the temporary stop symbol during change, the stop symbol at the end of change, the final stop symbol, the ornament change pattern, etc. The sound / lamp control microcomputer 700 is determined based on the design command and variation pattern command from the game control microcomputer 560. Thereby, the processing load of the game control microcomputer 560 can be reduced. Further, in the sound / lamp control microcomputer 700, the type of the primary re-lottery display, the type of the secondary re-lottery display, the temporary stop symbol during change, the stop symbol at the end of change, the final stop symbol, the decoration change pattern, etc. Since it is determined, the processing can be performed efficiently. For example, the display control microcomputer 800 determines the type of the primary re-lottery display, the type of the secondary re-lottery display, the changing temporary stop symbol, the stop symbol at the end of change, the final stop symbol, the decoration variation pattern, etc. First, a command corresponding to a design command and a variation pattern command is received from the sound / lamp control microcomputer 700, the above contents are determined based on the command, and the determination result is sent to the sound / lamp control microcomputer 700. If not transmitted, the sound / lamp control microcomputer 700 cannot control the speaker 27, the decoration lamp 25, the top frame lamp 28a, the left frame lamp 28b, the right frame lamp 28c and the like in accordance with the determination result. However, in the above-described embodiment, it is not necessary for the display control microcomputer to transmit the determination result to the 800 sound / lamp control microcomputer 700, and processing can be performed efficiently.

  (7) As shown in FIG. 71, the sound / lamp control microcomputer 700 can also determine the temporary stop symbol during the change, so that the processing load of the game control microcomputer 560 can be further reduced. Can do.

  (8) The sound / lamp control microcomputer 700 determines the decoration variation pattern as the effect, the notice effect, the type of the re-lottery display, and the like based on the effect control command in S521 to S523 in FIG. The display control command indicating the display control content for executing the rendered effect is specified. The specified display control command is transmitted to the display control microcomputer 800 by the sound / lamp control microcomputer 700. The sound / lamp control microcomputer 700 performs sound control and lamp control corresponding to the display control contents. As a result, it is possible to perform a sound effect or a lamp effect that is consistent (synchronized) with the display effect in the variable display device 9.

  (9) A detection signal from the ball break switch 187 for detecting a state in which game media to be paid out is deficient, and a full tank switch for detecting that the storage state of the game media stored after being paid out is full. 48, the game control microcomputer 560 activates at least one of the speaker 27 or the ball break lamp 52 to notify that the game medium cannot be paid out based on the detection signal. (For example, a ball-out command or a full-fill command) is transmitted to the sound / lamp control microcomputer 700 without being transmitted to the display control microcomputer 800 (for example, SC227a, SC227b, S27). As a result, the number of commands transmitted can be reduced by the amount that the payout impossible notification command is not transmitted to the display control microcomputer 800, and the control of command transmission / reception can be simplified.

Next, feature points and modifications of the above-described embodiment will be described.
(1) In the above-described embodiment, as the secondary re-lottery display, it is notified whether or not a probable change state is obtained depending on whether or not a display that rises to a combination of probabilistic large win symbols by re-fluctuating the big hit symbol is performed. The thing was demonstrated as an example. However, it is not limited to re-fluctuating the jackpot symbol, and whether or not a specific display is performed as the secondary re-lottery display (for example, whether or not a specific character appears, or an effect that satisfies a specific condition) Whether or not it is performed or the like) may be used to notify whether or not the state is likely to change.

  (2) In the above-described embodiment, as described in S522 of FIG. 68, the sound / lamp control microcomputer 700 determines the temporary stop symbol during change, the stop symbol at the end of change, and the final stop symbol. Explained. However, the present invention is not limited to this, and the display control microcomputer 800 may be configured to determine the changing temporary stop symbol, the changing stop symbol, and the final stop symbol. Thereby, the processing load of the sound / lamp control microcomputer 700 can be reduced. Even in such a configuration, since the temporary stop symbol during change, the stop symbol at the end of change, and the final stop symbol are not related to the sound effect or the light effect, the display effect in the variable display device 9 Consistency with sound production and lamp production can be ensured.

  (3) In the above-described embodiment, as described with reference to FIG. 72 and the like, the example in which the sound / lamp control microcomputer 700 determines the content of the notice effect has been described. However, the present invention is not limited to this, and when the notice effect is an effect that is not related to the sound effect or the light effect (for example, an effect that only causes a character to appear), the display control microcomputer 800 displays the contents of the notice effect. May be determined. Thereby, the processing load of the sound / lamp control microcomputer 700 can be reduced. Even in such a case, since the notice effect is not related to the sound effect or the light effect, consistency between the display effect and the sound effect or the lamp effect in the variable display device 9 can be ensured. it can.

  (4) In the embodiment described above, the temporary stop symbol during change, the stop symbol at the end of change, and the upper byte of the decoration change pattern command transmitted from the sound / lamp control microcomputer 700 to the display control microcomputer 800; The final stop symbol, etc. can be specified, and the decoration change pattern, the determination result of whether or not to execute the primary re-lottery display, and the type of the primary re-lottery display can be specified by the lower byte of the ornament change pattern command. An example was described. However, as described above, the decoration variation pattern command is not limited to one in which the upper byte and the lower byte are separated and some contents can be specified from each. The decoration variation pattern command includes the upper byte and the lower byte of the decoration variation pattern command. As a condition, the temporary stop symbol during change, the stop symbol at the end of change, the final stop symbol, the decoration change pattern, the determination result of whether or not to execute the primary re-lottery display, and the primary re-lottery display It may be configured so as to be able to specify the type or the like.

  (5) In the above-described embodiment, sound / lamp control is performed from the game control microcomputer 560 as a multi-command that can specify the jackpot determination result and the determination result as to whether or not to perform the primary re-lottery display. An example of transmission to the microcomputer 700 has been described. However, the present invention is not limited to this, and the game pattern control microcomputer 560 uses the sound / lamp control micro as a multi-command capable of specifying the big hit determination result and the determination result as to whether or not to perform the first re-lottery display. You may comprise so that it may transmit to the computer 700. FIG.

  (6) In the above-described embodiment, the example in which the secondary re-lottery display is performed at the end of the big hit gaming state is shown. However, the present invention is not limited to this, and the secondary re-lottery display may be performed at the following timing. For example, the secondary re-lottery display may be performed at a predetermined timing other than at the end of the big hit gaming state in the big hit gaming state, such as the timing of switching rounds in the big hit gaming state. For example, when the second re-lottery display is performed at the timing of switching rounds in the big hit gaming state, commands such as effect control commands such as round start commands for instructing the start of each round are sound / lamp When the control board 70 receives it, a process for executing the secondary re-lottery display described in S433 to S436 in FIG. 52 may be performed. Further, for example, the secondary re-lottery display can be executed at one of a predetermined timing other than the end of the big hit gaming state in the big hit gaming state as described above and a timing at the end of the big hit gaming state. Alternatively, random determination means such as a random counter may be used to randomly select and determine at which timing among these timings the secondary re-lottery display is to be executed. In addition, when the secondary re-lottery display is performed at a timing other than the end of the big-hit gaming state in the big-hit gaming state, a random counter such as a random counter indicates the number of rounds in the big-hit gaming state to be executed You may make it determine at random using a determination means.

  (7) In the embodiment described above, in order to perform presentation control including display control, sound control, and lamp control, two boards of a sound / lamp control board 70 and a display control board 80 are provided, In the example, the sound / lamp control board 70 receives the effect control command from the main board 31 and transmits the display control command from the sound / lamp control board 70 to the display control board 80 based on the received command. However, the present invention is not limited to this, and the display control board 80 receives the effect control command from the main board 31, and the sound control and lamp control are performed from the display control board 80 to the sound / lamp control board 70 based on the received command. A sound / lamp control command for instructing the command may be transmitted.

  (8) In the above-described embodiment, two boards, the sound / lamp control board 70 and the display control board 80, are provided in order to perform presentation control including display control, sound control, and lamp control. An example is shown. However, the present invention is not limited to this, and one effect control board on which one effect control microcomputer that performs overall display control, sound control, and lamp control is mounted may be provided.

  (9) In the above-described embodiment, based on the fact that the symbol confirmation command for specifying that the decorative symbol variation display is to be stopped is transmitted from the game control microcomputer 560 to the sound / lamp control microcomputer 700, The example which stopped the change display of a decoration design was shown. However, the present invention is not limited to this, and it may be configured such that the decorative symbol variation display is stopped without using the symbol confirmation command. In that case, each of the sound / lamp control microcomputer 700 and the display control microcomputer 800 monitors whether or not the fluctuation time specified by the fluctuation pattern command has elapsed after the start of the fluctuation display. When the time has elapsed, control is performed so as to stop the variation display of the decorative symbols.

  (10) In the above-described embodiment, the example has been described in which the special gaming state is a probability variation state in which the probability of winning a big hit as compared to the normal state is improved. Specifically, the probability variation big hit determination table described in FIG. 29 is compared with 12 stored normal time big hit determination tables as values for determining big hits as values for determining big hits. 60 times 5 times are stored. 47, when the probability variation flag is set in S383 of the special symbol normal process described with reference to FIG. 47, the probability variation big hit determination table is set in S385, so sometimes the normal time big hit determination table is determined in S384. Compared with the case where the probability variation flag to be set is not set, the probability of a big hit is improved five times. However, the present invention is not limited to this, and as a special gaming state, a variable winning ball apparatus when the normal symbol display variation results in a normal symbol probability variation state that improves the probability that the normal symbol display result becomes a win symbol, and the normal symbol display result becomes a win symbol. It may be an open extension state in which the time during which 15 is opened is extended from the normal time. The special game state includes a normal symbol short-time state in which a game ball passes through the gate 32 and is detected by the gate switch 32a, thereby shortening the normal symbol variation display time started by the normal symbol display 10, or a game. It may be a special symbol short-time state that shortens the variation display time of the special symbol that is started when the ball is detected by the start port switch 14a. Further, the special game state may be a state in which the normal symbol short-time state, the newly extended state, the normal symbol probability variation state, and the special symbol short-time state are selectively combined, or a state in which all are combined. Thereby, it is possible to control to an advantageous state different from the big hit gaming state. It should be noted that the above-described opening extension state is not limited as long as the opening time per unit time can be extended, so that the opening time for one time is lengthened, or the opening time for one time does not change, but multiple times. Any device that performs the opening operation may be used.

  (11) In the embodiment described above, in the big hit gaming state, the hit ball enters the V winning area in the big winning opening while the big winning opening (big winning opening 21) is open (during the round), and the V winning switch ( When the V winning switch 64) is detected, the continuation right is generated, and an example of shifting to the next round is shown. However, the present invention is not limited to this, and a predetermined number (for example, 10) of hitting balls is won in the big prize opening during each round (excluding the final round) and the big prize opening is opened without providing a V prize switch. Or when a certain period of time (for example, 30 seconds in the normal big hit game state and the first positive variation big win game state, and one second in the second positive change game state) has elapsed since the big winning opening was opened, Control for shifting to the next round may be performed without fail.

  (12) In the above-described embodiment, an example has been described in which, in addition to the first probability variable big hit gaming state, the second probability variable big hit gaming state is used as the big hit gaming state controlled to the probability varying state. However, the present invention is not limited to this, and instead of using the second probability variable big hit gaming state, control in the big hit gaming state similar to the second probability variable big hit gaming state (the upper limit of the number of rounds is two, and a large number in each round) After the winning opening 21 is opened for 1 second), the control using the short and long hit game state (two round short and short hit game state) that is controlled in the short time state is performed without being controlled in the probability changing state. Good. Further, in addition to the control for setting the probability variation state after the second probability variation big hit gaming state, the control for setting the time reduction state after the above-mentioned short time big hit gaming state (two round short hit big gaming state) is also selected as the type of the big hit gaming state You may do it. As another example, instead of using the first probability variation jackpot gaming state, control in the jackpot gaming state similar to the first probability variation jackpot gaming state (the upper limit of the number of rounds is 15 times, and the winning prize opening in each round) After performing the opening time of 21 (30 seconds), the control using the short-time big hit game state (15 round short-time big hit game state) may be performed without being controlled to the probability changing state. Further, in addition to the control for setting the probability change state after the first probability change big hit gaming state, the control for setting the time reduction state after the short time big hit gaming state (15 round round short hit gaming state) as described above is also selected as the type of the big hit gaming state. You may do it.

  (13) In the above-described embodiment, when the second probability variable big hit symbol is derived and displayed as the display result, the game is controlled to the second probability variable big hit gaming state. However, the present invention is not limited to this, and when the second probability variable big hit symbol is derived and displayed as a display result, it may not be controlled to the second probability variable big hit gaming state with a predetermined probability (for example, 5%). As a specific control method, in S400 of FIG. 48, a second probability variation big hit symbol is included in the “missing symbol” selected by the random R3, and the probability is low even though the loss is predetermined. Then, control is performed so that the second probability variation big hit symbol is selected. Then, a command indicating that the second probability big hit symbol is selected is transmitted, and according to the command, the sound / lamp control control microcomputer 700 determines and displays the chance symbol combination.

  (14) In the above-described embodiment, the re-lottery is not performed when controlled to the second probability variable big hit gaming state. However, the re-lottery is also performed when controlled to the second probability variable big hit gaming state. You may control as follows.

  (15) In the above-described embodiment, the detection signals of the ball break switch 187 and the full tank switch 48 are input to both the main board 31 and the payout control board 37. However, instead, the detection signals of the ball break switch 187 and the full tank switch 48 are input only to the main board 31, and the ball break command and the full tank command based on each input signal are transmitted to the payout control board 37, In the payout control board 37, instead of inputting the detection signals of the ball break switch 187 and the full tank switch 48, control when the ball is full and full is performed based on the input of the ball full command and the full tank command. May be. Further, the ball break command and the full command may be transmitted directly from the main board 31 to the payout control board 37, and further from the main board 31 via the sound / lamp control board 70 to the direct payout control board 37. You may make it transmit. In addition, a lamp may be provided to display that when full tank is detected.

  (16) In the embodiment described above, the payout control means initializes the data set in the previous prize game medium number data storage means (for example, payout) when the payout of the game media is completed. A part for executing the process of step SC672 in the control means).

  According to such a configuration, the data set in the previous prize game medium number data storage means is initialized when the continuous game medium payout is completed, so whether or not the next data has increased. In the determination, there is no mistake in specifying the increase number.

  (17) In the above-described embodiment, the game medium paid out from the payout means is detected, and the payout detecting means (for example, the payout number count switch 301) for outputting the detection signal only to the payout control means is provided, and the payout control is performed. Lending control means (for example, in the payout control means) that controls the payout driving means based on a lending control command (for example, a BRQ signal from the card unit 50) indicating a gaming medium lending request. Based on the payout control command, the detection signal input from the payout detecting means and the part for executing the processing of steps SC623 to SC628 and the part for executing the winning ball lending control process (see FIG. 92) are executed. Determine whether the signal is a detection signal for a prize game medium that has been paid out or a detection signal for a game medium that has been paid out based on a lending control command When the payout determination means (for example, the portion of the payout control means that executes the process of step SC602) and the payout determination means determine that the signal is a detection signal for a prize game medium paid out based on the payout control command. A prize game medium number subtracting means for subtracting the data stored in the prize game medium number data storage means based on the detection signal (for example, a part for executing the processing of steps SC602 and SC604A in the payout control means). I have.

  According to such a configuration, when it is determined that the signal is a detection signal of a premium game medium paid out based on the payout control command, the premium game medium number data storage means stores it based on the detection signal. Since the data is subtracted, the number of parts can be reduced and the cost of the gaming machine can be reduced.

  (18) In the above-described embodiment, the game control means includes a game control microcomputer, and a plurality of effect devices (for example, variable display device 9, lamp / LED, speaker 27) for performing the game effect are controlled. Production control microcomputer (for example, display control microcomputer, light emitter control microcomputer, voice control microcomputer) and game control board (for example, display control board 80, lamp control) on which game control means is mounted. Board 35, voice control board 70) and a power supply board (for example, power supply board 910) for supplying power to each of the plurality of presentation control boards on which each of the plurality of presentation control microcomputers is mounted. A microcomputer and multiple production control microcomputers Power supply monitoring means (for example, a power supply monitoring circuit 920) for outputting a system reset signal for resetting the system, and a specific effect control microcomputer (for example, a display control microcomputer) among a plurality of effect control microcomputers However, a process for receiving a control signal (for example, a display control command) transmitted from the game control means, and a control signal for another effect control microcomputer (for example, a light emitter control microcomputer, a sound control microcomputer). (For example, a lamp control command voice control command) is transmitted, and the power source monitoring means does not go through an effect control board (for example, the display control board 80) on which a specific effect control microcomputer is mounted. Other production control microcomputer was installed. The system reset signal is output to the effect control board (for example, the lamp control board 35 and the sound control board 70).

  According to such a configuration, the power supply monitoring unit is not connected to the effect control board on which the specific effect control microcomputer is mounted, and the system is applied to the effect control board on which the other effect control microcomputer is mounted. Since the reset signal is output, the specific effect control microcomputer receives the control signal transmitted from the game control means and transmits the control signal to another effect control microcomputer. Even when an abnormality occurs on the board on which the control microcomputer is mounted, the other production control microcomputers can be surely reset.

  (19) In the above-described embodiment, the predetermined payout condition is established by winning a game medium in each of the plurality of winning areas provided in the gaming area, and winning according to each of the plurality of winning areas. Game medium detecting means (for example, winning port switches 29a, 30a, 33a, 39a, count switch 23 and start port switch 14a) for detecting a game medium and outputting a winning detection signal to the game control means is provided, and a payout control command is provided. The transmission means is configured to immediately transmit a payout control command (allowing a delay of several mSC in control) in response to the input of the winning detection signal.

  According to such a configuration, the payout control command transmission means in the game control means immediately transmits the payout control command in response to the input of the winning detection signal, so that the payout control command can be quickly transmitted to the payout control means. it can.

  (20) In the above-described embodiment, the payout control means includes the payout control microcomputer, and the payout control command transmission means takes an instruction for taking in the payout control command together with the payout control command indicating the number of payouts of the game medium. An interruption signal (for example, a payment INT signal) is transmitted, the acquisition signal is connected to the interrupt terminal of the microcomputer for payout control (see FIG. 6), and the payout control command receiving means inputs the acquisition signal to the interrupt terminal. The payout control command is received (for example, the process of steps SC853 and SC855) by an interrupt process (see FIG. 88) that is activated based on this.

  According to such a configuration, the payout control command receiving means in the payout control means receives the payout control command by the interruption process activated based on the input of the capture signal to the interrupt terminal. The control means can quickly receive the payout control command.

  (21) It should be understood that the embodiments disclosed herein are illustrative and non-restrictive in every respect. The scope of the present invention is defined by the terms of the claims, rather than the description above, and is intended to include any modifications within the scope and meaning equivalent to the terms of the claims.

It is the front view which looked at the pachinko game machine from the front. It is a front view which shows the front surface of the game board in the state which removed the glass door frame. It is the rear view which looked at the pachinko gaming machine 1 from the back. It is the front view (A) and sectional view (B) which show a ball dispensing device. It is a block diagram which shows the structural example of a game control board (main board). It is a block diagram which shows the circuit structural example of a payout control board. Block diagram showing circuit configuration on main board, signal line of effect control command transmitted from main board to sound / lamp control board, and signal line of display control command transmitted from sound / lamp control board to display control board It is. It is a block diagram which shows the structural example of a random number circuit. It is explanatory drawing which shows the example of an update rule selection register. It is explanatory drawing which shows the example of an update rule memory. It is explanatory drawing which shows the example in case a count value permutation change circuit changes the permutation of the count value which a counter outputs. It is explanatory drawing which shows the example of a count value permutation change register. It is explanatory drawing which shows the example of a random number maximum value setting register. It is explanatory drawing which shows the example of a period setting register. It is explanatory drawing which shows the example of a count value update register. It is explanatory drawing which shows the example of a random value taking-in register. It is explanatory drawing of an example of the random number update system selection register and the random number update system selection data written in the random number update system selection register. It is explanatory drawing which shows the example of a random number circuit starting register. It is a circuit diagram which shows one structural example of a random value storage circuit. It is a timing chart which shows the timing when each signal is input into a random value storage circuit, and the timing when a random value storage circuit outputs each signal. It is explanatory drawing which shows an example of the address map of the storage area in the microcomputer for game control. It is explanatory drawing which shows an example of the address map in a user program management area. It is explanatory drawing which shows an example of initial value change system setting data. It is explanatory drawing which shows the structural example of a user program. It is explanatory drawing which shows the structural example of a random number circuit setting program. It is explanatory drawing which shows the operation | movement which updates the value of random R, or reads the value of random R, when the 1st random number update system is selected. It is explanatory drawing which shows the operation | movement which updates the value of random R, or reads the value of random R, when the 2nd random number update system is selected. It is explanatory drawing which shows each memory with which the microcomputer for game control is provided. It is explanatory drawing which shows the example of the table for jackpot determination. It is explanatory drawing which shows the example of the table for probability variation determination. It is explanatory drawing which shows the example of a non-probability big hit time table. (A) is explanatory drawing which shows the example of a 1st probability variation big hit table, (b) is explanatory drawing which shows the example of a 2nd probability variation big hit table. It is explanatory drawing which shows the example of a loss time table. It is a figure for demonstrating the shift | offset | difference number of a decoration design. It is explanatory drawing which shows the example of the table for fluctuation pattern determination. It is a timing chart which shows an example of the fluctuation | variation display of the decoration design in case it becomes a detachment | leave. It is a flowchart which shows the main process which the microcomputer for game control performs. It is a flowchart which shows the main process which the microcomputer for game control performs. It is a flowchart which shows a random circuit setting process. It is a flowchart which shows a random number maximum value reset process. It is a flowchart which shows an initial value change process. It is a timing chart which shows the timing when each signal is input into a random number circuit, and the timing when each signal is generated in a random number circuit. It is a flowchart which shows a timer interruption process. It is a flowchart which shows an initial value update process. It is a flowchart which shows an example of a special symbol process process. It is a flowchart which shows a starting port switch passage process. It is a flowchart which shows a special symbol normal process. It is a flowchart which shows a special symbol stop symbol setting process. It is a flowchart which shows a change time setting process. It is a flowchart which shows the big winning opening opening pre-processing. It is a flowchart which shows a big winning opening open process. It is a flowchart which shows a specific area | region effective time process. It is a flowchart which shows a big hit end process. It is a flowchart which shows special game processing. (A) is explanatory drawing which shows the example of 1 structure of the payout control command, (b) is a timing diagram which shows the relationship between a control signal and an INT signal. It is explanatory drawing which shows an example of the content of the payout control command. It is explanatory drawing which shows the bit allocation example of the input port in a game control means. It is explanatory drawing which shows the buffer used by switch processing. It is a flowchart which shows an example of a switch process. It is a flowchart which shows an example of a winning switch check process. It is a flowchart which shows a prize ball process. It is explanatory drawing which shows the structure of a command transmission table. (A) is a flowchart showing a ball break process, (b) is a flowchart showing a full tank process, and (c) is a flowchart showing a command control process. It is a flowchart which shows a command transmission process. It is a flowchart which shows a sound / lamp control main process. It is a figure for demonstrating the various random counters which the microcomputer for sound and lamp control uses for presentation control. It is a flowchart which shows a command analysis process. It is a flowchart which shows a command setting process. It is a flowchart which shows a secondary re-lottery display determination process. It is a figure for demonstrating the secondary re-lottery display type determination table. It is a flowchart which shows a decoration design determination process. It is a flowchart which shows a decoration variation pattern determination process. It is a figure for demonstrating the decoration variation pattern determination table used in order to determine a decoration variation pattern. It is a figure for demonstrating the decoration variation pattern determination table used in order to determine a decoration variation pattern. (A) is a flowchart for explaining display control command setting processing, (b) is a flowchart for explaining sound control process processing, and (c) is a flowchart for explaining lamp control process processing. It is a figure for demonstrating the 1st high-order byte specific table. (A) is a 2nd upper byte specific table, (b) is a figure for demonstrating a lower byte specific table. It is a flowchart which shows a display control main process. It is a flowchart which shows a display control process process. It is a flowchart which shows a symbol variation start process. It is a flowchart which shows processing during a big hit game. It is explanatory drawing which shows an example of the primary re-lottery display and the secondary re-lottery display in a fluctuation | variation display apparatus. It is a display screen figure which shows the example of a display when it becomes the 2nd probability variation big hit. It is a flowchart which shows the main process which CPU for payout control performs. It is a flowchart which shows the timer interruption process which CPU for payout control performs. It is explanatory drawing which shows an example of the counter used in payout control processing. It is explanatory drawing which shows the example of 1 structure of a reception buffer. It is a flowchart which shows the example of the command reception processing of CPU for payout control. It is a flowchart which shows the example of a command analysis process. It is a timing diagram for demonstrating communication between the payout control means of a gaming machine and a card unit. It is a flowchart which shows a payout motor control process. It is a flowchart which shows a prize ball lending control process. It is a flowchart which shows prize ball payout number addition control. It is a flowchart which shows the payout start waiting process. It is a flowchart which shows a payout motor stop waiting process. It is a flowchart which shows payout passage waiting processing. It is a flowchart which shows payout passage waiting processing. It is explanatory drawing which shows the relationship between the kind of error, and the display of LED for an error display. It is a flowchart which shows an error process. It is a flowchart which shows an error process. It is explanatory drawing which shows an example of the change of the content of the counter used in prize ball payout control. It is explanatory drawing which shows the other example of the change of the content of the counter used in prize ball payout control. It is explanatory drawing which shows the other example of the change of the content of the counter used in prize ball payout control. It is explanatory drawing which shows the other example of the change of the content of the counter used in prize ball payout control. It is a flowchart which shows the other example of a prize ball lending control process. It is a flowchart which shows the other example of the payout start waiting process. It is a flowchart which shows the other example of payout passage waiting processing. It is a flowchart which shows the other example of payout passage waiting processing. It is a block diagram which shows the other structural example of a random number circuit.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 1 Pachinko machine, 31 Game control board (main board), 56 CPU, 503a 12 bit random number circuit, 560 Game control microcomputer, 700 Sound / lamp control microcomputer, 800 Display control microcomputer, 97 ball payout device 289 Dispensing motor, 295 Dispensing motor position sensor, 301 Dispensing number count switch, 371 Dispensing control CPU, 374 Error display LED, 375 Error canceling switch, 187 Out of ball switch, 48 Full switch, 51 Prize ball lamp, 27 Speaker, 910 Power board.

Claims (9)

A specific display result including a variable display unit for performing a variable display of a plurality of types of identification information each identifiable and deriving and displaying a display result, wherein the display result of the variable information display of the identification information is predetermined by the variable display unit The game is controlled to a specific game state advantageous to the player, and the player plays a predetermined game, and a predetermined number of game media are used as prizes according to the establishment of a predetermined payout condition. A gaming machine to be paid out,
Game control means for controlling the progress of the game;
First effect control means for controlling at least one of sound output means for outputting sound or light emission means for emitting light in accordance with the display mode of the variation display section;
Second effect control means for performing display control of the variable display section;
A payout means for paying out game media;
Payout driving means for driving the payout means to pay out the game medium;
A payout control means for controlling the payout drive means in accordance with the payout control command received from the payout control command transmission means,
The game control means includes
Pre-decision means for determining whether or not the display result of the variation display of the identification information is the specific display result;
A payout control command transmitting means for transmitting a payout control command instructing a payout number of game media when a predetermined payout condition is satisfied;
First control command transmission means for transmitting to the first effect control means a first control command used to execute an effect based on the determination result by the prior determination means,
The first effect control means includes:
Specifying means for specifying a second control command based on the first control command output from the control signal output means;
Output means for outputting the second control command to the second effect control means,
The second effect control means performs display control of the variation display unit based on the second control command,
The payout control means includes
A prize game medium number data storage means for storing data indicating the number of game medium payouts according to the payout control command;
A payout control command receiving means for receiving the payout control command;
When the payout control command receiving means receives the payout control command, an adding means for adding the payout number instructed by the payout control command to the data stored in the prize game medium number data storage means;
A payout start means for starting driving of the payout drive means when the data stored in the prize game medium number data storage means indicates that there is a game medium to be paid out;
An increase determination means for determining whether or not the data stored in the premium game medium number data storage means has increased when the payout driving means is driving the payout means;
An increase number specifying means for specifying an increase number when the increase determining means determines that the data is increasing; and
Drive amount data storage means for storing data capable of specifying the drive amount until the end of payout of the game medium of the payout drive means;
Drive amount update means for subtracting the data stored in the drive amount data storage means by an amount corresponding to the drive amount of the payout drive means;
When the payout driving means is driving the payout means, data indicating the drive amount according to the increase number specified by the increase number specifying means is added to the data stored in the drive amount data storage means. Driving amount data adding means for
After the payout starting means starts driving the payout driving means, the payout driving means is driven when the data stored in the drive amount data storage means becomes a value corresponding to the end of payout of the game medium. A withdrawal stop means for stopping
A gaming machine characterized by comprising: The game control means includes
When the display result of the variation display of the identification information becomes a special display result determined in advance among the specific display results, the probability that the display result of the variation display becomes the specific display result is the specific game state. Is a probability variation control means for controlling to a probability variation state improved over a different normal gaming state;
When it is determined by the pre-decision means that the display result is the specific display result, the specific display result other than the special display result is temporarily stopped, and then the special display result and the special display result First effect display execution determining means for determining whether or not to execute the first effect display for deriving and displaying any kind of specific display result from among the specific display results;
When the predetermining means determines that the display result is the specific display result, a second effect display is executed to indicate whether or not the probability variation state occurs after the specific gaming state is started. Second effect display execution determining means for determining whether or not to perform,
The first control command transmission unit transmits a result command used to specify a determination result by the prior determination unit to the first effect control unit when starting the variation display of the identification information. Including means,
At least one of the first control command transmitted by the first control command transmitting unit or the result command transmitted by the result command transmitting unit is based on at least one of the first control command or the result command. A multi-command configured so that the determination result by the first effect display execution determining means and the determination result by the second effect display execution determining means can be specified;
The specifying means is:
First effect display execution determining means for determining whether or not execution of the first effect display is instructed based on the multicommand;
First effect display mode determining means for determining the effect mode of the first effect display on the condition that the first effect display execution determining means determines that execution of the first effect display has been instructed; ,
Second effect display execution determining means for determining whether or not execution of the second effect display is instructed based on the multicommand;
Second effect display mode determining means for determining the effect mode of the second effect display on the condition that the second effect display execution determining means determines that execution of the second effect display has been instructed; ,
The display result of the variable display is determined based on the determination result of the prior determination unit specified based on the result command transmitted by the result command transmission unit and the determination result of the second effect display execution determination unit. Display result determination means to
After starting the variable display of the identification information in response to the first control command transmitted by the first control command transmitting means, the variable display is displayed when the variable display time set for each variable display has elapsed. A fluctuation pattern specifying means for specifying a fluctuation pattern for deriving and displaying the result,
The output means includes
The first effect display effect mode determined by the first effect display mode determination means, the second effect display effect mode determined by the second effect display mode determination means, and the display result determination means The information is transmitted so that the display result of the determined variation display and the variation pattern identified by the variation pattern identification unit can be identified by the second effect control unit. The gaming machine described in 1. A deficiency state detection means for detecting a lack of game media for payout and outputting the detection signal to the game control means;
A storage state detecting means for detecting that a predetermined amount of game media is stored after being paid out and outputting the detection signal to the game control means;
The game control means transmits a payout impossible notification command to the first effect control means when a detection signal from the deficiency state detection means or a detection signal from the storage state detection means is input. Including transmission means,
The first effect control means, based on the payout impossible notification command, activates at least one of the sound output means or the light emitting means to notify that the game medium cannot be paid out, and the payout impossible notification command. The gaming machine according to claim 1, wherein the game machine is not output. The game control means includes a random number circuit for generating a random number,
The random number circuit includes:
Numerical value updating means for updating numerical data according to a predetermined order from a predetermined initial value to a predetermined final value in a predetermined range in which the numerical data can be updated based on an input of a predetermined signal;
Random number storage means for storing numerical data updated by the numerical value updating means as a random value,
The game control means includes
Random number circuit initial setting means for initial setting of the random number circuit when power supply to the gaming machine is started;
Interrupt setting means for setting to generate a timer interrupt every predetermined time after the random number circuit initial setting means performs the initial setting of the random number circuit;
An interrupt process executing means for executing a timer interrupt process including the game control process when the timer interrupt occurs;
In the timer interrupt processing by the interrupt processing execution means, random number reading means for reading a random number value stored by the random number storage means when a condition for executing variable display is satisfied;
By determining whether or not the random number value read by the random number reading means matches a predetermined determination value, it is determined whether or not the display result of the variation display of the identification information is a specific display result. Display result determining means,
In the initial setting, the random number circuit initial setting means identifies the game control microcomputer in which the predetermined initial value of the numerical data updated by the numerical value update means is assigned to each game control microcomputer. 4. The gaming machine according to claim 1, wherein the gaming machine is set based on microcomputer identification information for the purpose. A variable winning means that is provided in a game area into which a game medium is to be placed and can be changed between a first state that is advantageous to the player and a second state that is disadvantageous to the player;
The game control means includes
When the display result of the variation display of the identification information becomes the special display result, the variable winning means is changed to the first state for a predetermined period as the specific gaming state for a predetermined number of times. A first specific gaming state control means for controlling the first specific gaming state to be shifted to the probability fluctuation state by the probability fluctuation control means after the end;
When the display result of the variable display of the identification information is a predetermined display result that is different from the special display result among the specific display results, the variable winning means is set as the specific gaming state, The state is changed to the first state at least one of a period shorter than the predetermined period and the number of times less than the predetermined number of times, and after the specific gaming state ends, the probability variation control unit shifts to the probability variation state. Second specific game state control means for controlling to the second specific game state;
When the display result of the variation display of the identification information is not the special display result and the specific display result other than the predetermined display result, the variable winning means is set to the first state for a predetermined period as the specific gaming state. And a third specific gaming state control means for performing a change a predetermined number of times and controlling the third specific gaming state not to shift to the probability fluctuation state by the probability fluctuation control means after completion of the specific gaming state. The gaming machine according to claim 2. The game control means includes a plurality of random number circuits having different predetermined ranges of numerical data that can be updated by the numerical value updating means,
In the initial setting, the random number circuit initial setting means sets a usable random number circuit from the plurality of random number circuits included in the game control means,
5. The gaming machine according to claim 4, further comprising random number stopping means for stopping the function of a random number circuit other than the random number circuit set to be usable by the random number circuit initial setting means. The random number circuit initial setting means includes a numerical data range that can be updated by the numerical value updating means in a numerical maximum value register in which a value as a maximum value of a predetermined range in which the numerical data is updated is set in the initial setting. Set a predetermined maximum value in
The numerical value updating means includes
Set value determining means for determining whether or not the predetermined maximum value set by the random number circuit initial setting means is equal to or less than a predetermined lower limit value;
The numerical value maximum value register can be updated by the numerical value updating means when it is determined that the predetermined maximum value set in the numerical value maximum value register is not more than the predetermined lower limit value by the set value determining means. 7. A gaming machine according to claim 4, further comprising maximum value resetting means for resetting a predetermined value within a range of numerical data. The payout control means includes previous prize game medium number data storage means for holding data stored in the prize game medium number data storage means when the drive amount data addition means adds data,
The increase determination means determines whether the data has increased by comparing the data stored in the prize game medium number data storage means with the data stored in the previous prize game medium number data storage means. Judgment,
The increase number specifying means specifies the difference between the data stored in the prize game medium number data storage means and the data stored in the previous prize game medium number data storage means as an increase number. A gaming machine according to any one of claims 1 to 7.   The payout control means sets the data stored in the prize game medium number data storage means in the previous prize game medium number data storage means when the increase determination means determines that the data has increased. The gaming machine according to claim 8, further comprising game medium number data setting means.

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